Over-current protection method and device for silicon carbide MOS (Metal Oxide Semiconductor) driving control chip

Abstract

The invention provides a silicon carbide MOS drive control chip overcurrent protection method and device, and the method comprises the steps: setting a forward sampling channel and a reverse sampling channel at a source sampling resistor, setting different sampling time windows for different sampling channels, carrying out the peak shifting setting of the time windows of the double sampling channels, and carrying out the peak shifting setting of the time windows of the double sampling channels, thereby achieving the overcurrent protection of a silicon carbide MOS drive control chip. The time period with the strongest common-mode interference can be avoided; meanwhile, the switching speed of the silicon carbide MOS device is mapped into a theoretical common-mode interference waveform, and the waveform and a bidirectional sampling signal are synthesized, so that a common-mode interference component in the sampling signal can be accurately separated, and the synthesized current signal is more accurate; on the basis, current signals are compensated by combining on-resistance change caused by junction temperature change, and overcurrent protection is carried out by adopting a graded protection strategy. According to the method, the influence of common-mode interference on current sampling is effectively overcome through peak shifting design on sampling channel time and common-mode interference separation based on switching speed.

Description

Technical Field

[0001] The present invention relates to the technical field of overcurrent protection, and in particular to an overcurrent protection method and device for a silicon carbide MOS drive control chip. Background Art

[0002] Silicon carbide MOS power devices are widely used in the field of power electronics due to their advantages such as fast switching speed and low switching loss. In practical applications, in order to improve the current-carrying capacity, a structure of multiple silicon carbide MOS devices in parallel is usually adopted, and each silicon carbide MOS device needs to be equipped with a corresponding drive control chip for control and protection. At present, the drive control chip mainly detects the current magnitude by collecting the voltage signal of the source sampling resistor, and triggers protection when overcurrent is detected. However, due to the extremely small Miller capacitance and ultra-fast switching speed characteristics of silicon carbide MOS devices, strong common-mode interference will be generated during high-frequency switching, and this interference overlaps with the current sampling signal frequency band, resulting in the drive control chip being unable to accurately identify the overcurrent state, making the overcurrent protection function fail or be mis-triggered, seriously affecting the reliability of silicon carbide MOS devices. Summary of the Invention

[0003] The main purpose of the present invention is to solve the technical problem that when the existing silicon carbide MOS drive control chip performs overcurrent protection, due to the strong common-mode interference generated by the high-frequency switching of the silicon carbide MOS device overlapping with the current sampling signal frequency band, the overcurrent state cannot be accurately identified; The first aspect of the present invention provides an overcurrent protection method for a silicon carbide MOS drive control chip, and the overcurrent protection method for the silicon carbide MOS drive control chip includes: Set a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, collect the source current signal through the forward sampling channel and the reverse sampling channel based on the corresponding sampling time window to obtain a bidirectional sampling signal; Calculate the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesize the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain a synthesized current signal; Detect the change in the junction temperature of the silicon carbide MOS device, obtain the change value of the on-resistance according to the change in the junction temperature, and compensate the synthesized current signal according to the change value of the on-resistance to obtain a compensated current signal; Compare the compensated current signal with a preset fast response threshold, determine the duration of the compensated current signal within the proximity range preset by the fast response threshold according to the comparison result, and select a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration.

[0004] Optionally, in the first implementation manner of the first aspect of the present invention, setting a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, collecting the source current signal based on the corresponding sampling time window through the forward sampling channel and the reverse sampling channel, and obtaining the bidirectional sampling signal includes: Setting a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, detecting the change process of the gate-source voltage of the silicon carbide MOS device to determine the duration of the Miller plateau; Setting the sampling time window of the forward sampling channel to one-third of the duration of the Miller plateau, and the sampling start time is located at the moment when the gate voltage starts to rise; Setting the sampling time window of the reverse sampling channel to one-half of the duration of the Miller plateau, and the sampling start time is located at the gate voltage drop stage after the end of the Miller plateau; Setting a sampling frequency synchronized with the gate drive signal of the drive control chip for the forward sampling channel and the reverse sampling channel, and respectively collecting the rising edge information and the falling edge information of the source current signal to obtain a bidirectional sampling signal.

[0005] Optionally, in the second implementation manner of the first aspect of the present invention, calculating a theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesizing the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain a synthesized current signal includes: Calculating a theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and performing a correlation analysis on the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value; Calculating the weight coefficients of the forward sampling signal and the reverse sampling signal in the bidirectional sampling signal according to the correlation analysis value; Performing weighted synthesis on the bidirectional sampling signal according to the weight coefficients to obtain a synthesized current signal.

[0006] Optionally, in the third implementation manner of the first aspect of the present invention, calculating a theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and performing a correlation analysis on the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value includes: Detecting the rising rate and the falling rate of the gate voltage of the silicon carbide MOS device to obtain the switching speed, and selecting a reference waveform from a preset common-mode interference waveform template library according to the switching speed; Perform a linear transformation on the time axis of the reference waveform to obtain a theoretical common-mode interference waveform, and perform Fourier transforms on the theoretical common-mode interference waveform and the forward sampling signal and the reverse sampling signal respectively to obtain first frequency-domain data and second frequency-domain data; Calculate a first correlation analysis value according to the first frequency-domain data, calculate a second correlation analysis value according to the second frequency-domain data, and perform weighted summation on the first correlation analysis value and the second correlation analysis value to obtain a correlation analysis value.

[0007] Optionally, in the fourth implementation manner of the first aspect of the present invention, the detecting the change in the junction temperature of the silicon carbide MOS device, obtaining a change value of the on-resistance according to the change in the junction temperature, and compensating the synthesized current signal according to the change value of the on-resistance to obtain a compensated current signal includes: Collect the voltage value and current value between the source and drain of the silicon carbide MOS device, and calculate the real-time on-resistance of the silicon carbide MOS device according to the voltage value and current value; Perform linear regression analysis on the real-time on-resistance to obtain an on-resistance change trend, and calculate a change value of the junction temperature of the silicon carbide MOS device according to the on-resistance change trend; According to the difference between the change value of the junction temperature and the preset calibration temperature, look up the corresponding change value of the on-resistance in the preset temperature-on-resistance mapping table; Perform an operation on the synthesized current signal and the change value of the on-resistance to obtain a compensation coefficient, and correct the synthesized current signal according to the compensation coefficient to obtain a compensated current signal.

[0008] Optionally, in the fifth implementation manner of the first aspect of the present invention, the performing linear regression analysis on the real-time on-resistance to obtain an on-resistance change trend, and calculating a change value of the junction temperature of the silicon carbide MOS device according to the on-resistance change trend includes: Perform linear regression calculations on the real-time on-resistance of multiple switching cycles and the corresponding time points to obtain a slope value and an intercept value of the on-resistance changing with time; Substitute the slope value and the intercept value into a linear equation to calculate the theoretical value of the on-resistance at each time point to obtain an on-resistance change trend; Perform a ratio calculation on the on-resistance change trend and the on-resistance reference value at the initial temperature to obtain a resistance value change rate; Convert the resistance value change rate into a change value of the junction temperature according to the preset on-resistance temperature coefficient.

[0009] Optionally, in the sixth implementation manner of the first aspect of the present invention, the comparing the compensation current signal with a preset fast response threshold, determining the duration of the compensation current signal within the proximity range preset by the fast response threshold according to the comparison result, and selecting a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration includes: Compare the compensation current signal with the fast response threshold to obtain a comparison result; When the comparison result shows that the compensation current signal is greater than the fast response threshold, adjust the falling slope of the gate drive voltage output by the drive control chip to turn off the silicon carbide MOS device; When the comparison result shows that the compensation current signal is less than the fast response threshold, calculate the difference between the compensation current signal and the fast response threshold, and determine whether the difference is within a preset proximity range; When the difference is within the preset proximity range, record the duration, and when the duration exceeds a preset time threshold, adjust the amplitude of the gate drive voltage output by the drive control chip to reduce the conduction level of the silicon carbide MOS device.

[0010] The second aspect of the present invention provides a silicon carbide MOS drive control chip overcurrent protection device, and the silicon carbide MOS drive control chip overcurrent protection device includes: A sampling module, configured to set a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, collect the source current signal through the forward sampling channel and the reverse sampling channel based on corresponding sampling time windows to obtain a bidirectional sampling signal; An interference processing module, configured to calculate a theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesize the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain a synthesized current signal; A temperature compensation module, configured to detect the change in the junction temperature of the silicon carbide MOS device, obtain a change value of the on-resistance according to the change in the junction temperature, and compensate the synthesized current signal according to the change value of the on-resistance to obtain a compensation current signal; A protection control module, configured to compare the compensation current signal with a preset fast response threshold, determine the duration of the compensation current signal within the proximity range preset by the fast response threshold according to the comparison result, and select a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration.

[0011] The above-mentioned overcurrent protection method and device for a silicon carbide MOS drive control chip set up a forward sampling channel and a reverse sampling channel in the source sampling resistor, set different sampling time windows for different sampling channels, and by staggering the time windows of the dual sampling channels, the time period with the strongest common-mode interference can be avoided. At the same time, by mapping the switching speed of the silicon carbide MOS device to a theoretical common-mode interference waveform and using this waveform to perform synthesis processing with the bidirectional sampling signal, the common-mode interference component in the sampling signal can be accurately separated, making the synthesized current signal more accurate. On this basis, the current signal is compensated in combination with the change in on-resistance caused by the change in junction temperature, and a hierarchical protection strategy is adopted for overcurrent protection. This method effectively overcomes the influence of common-mode interference on current sampling through the staggered design of the sampling channel time and the separation of common-mode interference based on the switching speed.

[0012] Other features and advantages of the present invention will be described in the following specification, and, in part, will be obvious from the specification, or will be understood by implementing the present invention. The objectives and other advantages of the present invention are achieved and obtained by the structures specifically pointed out in the specification, claims, and drawings.

[0013] To make the above objectives, features, and advantages of the present invention more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, provides a detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of the first embodiment of the overcurrent protection method for a silicon carbide MOS drive control chip in an embodiment of the present invention; Figure 2 It is a schematic diagram of an embodiment of the overcurrent protection device for a silicon carbide MOS drive control chip in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0015] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0016] The terms "including" and "having" and any variations thereof mentioned in the embodiments of the present invention are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes other unlisted steps or units, or optionally further includes other steps or units inherent to these processes, methods, products, or devices.

[0017] For the convenience of understanding this embodiment, first, a method for overcurrent protection of a silicon carbide MOS drive control chip disclosed in the embodiments of the present invention will be introduced in detail. As Figure 1 shown, the method includes the following steps: 101. Set a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, collect the source current signal through the forward sampling channel and the reverse sampling channel based on the corresponding sampling time window to obtain a bidirectional sampling signal; In an embodiment of the present invention, the step of setting a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, collecting the source current signal through the forward sampling channel and the reverse sampling channel based on the corresponding sampling time window to obtain a bidirectional sampling signal includes: setting a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, detecting the change process of the gate-source voltage of the silicon carbide MOS device to determine the duration of the Miller plateau; setting the sampling time window of the forward sampling channel to one-third of the duration of the Miller plateau, and the sampling start time is at the moment when the gate voltage starts to rise; setting the sampling time window of the reverse sampling channel to one-half of the duration of the Miller plateau, and the sampling start time is in the gate voltage drop stage after the end of the Miller plateau; setting the sampling frequencies of the forward sampling channel and the reverse sampling channel to be synchronized with the gate drive signal of the drive control chip, and respectively collecting the rising edge information and the falling edge information of the source current signal to obtain a bidirectional sampling signal.

[0018] Specifically, the process of setting a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, detecting the change process of the gate-source voltage of the silicon carbide MOS device to determine the duration of the Miller plateau involves multi-level level tracking and threshold determination. Specifically, at the moment when the gate drive signal starts to rise, the gate-source voltage is periodically observed by using a comparator and a latch, and based on the preset Vth starting value and the Miller capacitance discharge characteristics, the start and end time points of the Miller plateau are deduced. Determine the average duration of the Miller plateau, and clearly mark this time period on the high-speed sampling time scale, so as to set different sampling time windows for the forward channel and the reverse channel respectively.

[0019] Specifically, the step of setting the sampling time window of the forward sampling channel to one-third of the duration of the Miller plateau and setting the sampling start time at the moment when the gate voltage starts to rise includes correlating a counter with the main clock of the drive control chip and identifying the critical point of the gate voltage from low level to high level in a rising edge triggered manner. At this time, the value of the duration of the Miller plateau is divided into three equal parts, and the first interval is overlapped with the rising period of the gate voltage, so as to capture richer transient information in the initial stage with the fastest charging current. Since the drain current of the silicon carbide MOS device may climb rapidly during this period, the sampling window of this channel is arranged in a shorter time range, which can avoid greater noise interference in the later stage of the Miller plateau. After the trigger counter of the forward channel reaches one-third of the threshold, the sampling gate is closed, and the rising edge current data obtained by this channel is saved to form the forward sampling subset required for subsequent processing.

[0020] Specifically, the step of setting the sampling time window of the reverse sampling channel to one-half of the duration of the Miller plateau and setting the sampling start time at the gate voltage drop stage after the end of the Miller plateau includes identifying the trigger flag sent by the aforementioned counter when the end of the Miller plateau arrives, and delaying the sampling start moment to after the disappearance of the Miller plateau through a dedicated logic delay unit. At this time, the gate voltage is in an obvious falling interval, and the current flow mode between the drain and the source gradually changes from high level holding to the off state. Therefore, a longer one-half interval is configured in this window to completely record the current waveform in the falling edge stage. The reverse sampling channel obtains a large number of attenuation characteristic points through this wider monitoring period, so as to correct the interference components brought by high-frequency noise in combination with the charge release state accumulated before the Miller plateau, and finally turn off the sampling gate at the end of the turn-off process to form the reverse sampling subset.

[0021] Specifically, the step of setting the sampling frequencies of the forward sampling channel and the reverse sampling channel to be synchronized with the gate drive signal of the drive control chip and respectively collecting the rising edge information and the falling edge information of the source current signal to obtain the bidirectional sampling signal includes phase-locking and connecting both sampling channels to the PWM timer inside the drive control chip at the digital logic level, so that the sampling clock strictly follows the high and low switching of the gate drive pulse. When the forward channel enters the sampling period, the frequency signal triggers the analog front-end amplifier to parallelly quantify the source current and store it in the scratch register. When the reverse channel enters the sampling period, the frequency signal operates the other amplifier in the same way, so that the current data of the rising edge and the falling edge can be respectively obtained. The subset data of the two channels are merged according to the time stamp to form a bidirectional sampling signal with the characteristics of the forward switching segment and the reverse turn-off segment.

[0022] 102. Calculate the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesize the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain a synthesized current signal; In an embodiment of the present invention, the calculating the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesizing the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain a synthesized current signal includes: calculating the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and performing a correlation analysis on the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value; calculating the weight coefficients of the forward sampling signal and the reverse sampling signal in the bidirectional sampling signal according to the correlation analysis value; and performing weighted synthesis on the bidirectional sampling signal according to the weight coefficients to obtain a synthesized current signal.

[0023] Specifically, calculating the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MUS device, and performing a correlation analysis on the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value can be achieved through multiple parameter measurements and waveform template matching. First, calculate the switching speed according to the actual rising and falling slopes of the gate voltage during each switching process of the silicon carbide MOS device, and select the corresponding reference interference waveform in a preset interference waveform template library. Subsequently, compare the distribution difference of the gate voltage change at the switching speed and the reference waveform on the time axis, and stretch or compress the reference waveform through a linear transformation equation t’ = k , to obtain the theoretical common-mode interference waveform. Then, perform fast Fourier transforms on the theoretical common-mode interference waveform and the bidirectional sampling signal respectively, and calculate the correlation coefficient between the two after converting the time-domain signals to the frequency domain. Suppose there is , where represents the frequency-domain sampling points of the theoretical common-mode interference, represents the amplitude of the bidirectional sampling signal at the same frequency. The correlation coefficient can quantitatively measure the similarity of the waveforms of the two in the main frequency energy and harmonic components, and save the obtained correlation analysis value in the correlation matrix. The process of calculating the weight coefficients of the forward sampling signal and the reverse sampling signal in the bidirectional sampling signal according to the correlation analysis value needs to combine the correlation analysis value with the instantaneous sampling energy of each channel to construct an adaptive weight model. When the similarity between the frequency-domain components of the forward channel and the theoretical common-mode interference waveform is relatively high, the value in the correlation matrix is relatively large, indicating that this channel contains more interference components. At this time, by setting , make represents the weight factor of the forward channel, represents the correlation coefficient corresponding to the forward channel; similarly, perform calculation on the reverse channel. Represents the correlation coefficient of the reverse channel. When the interference component of a certain channel is less, its corresponding correlation coefficient is low, and the weight coefficient will be high, so as to ensure that the effective current component is more prominent in high-frequency bands or large-current switching. By smoothing the average correlation analysis value obtained through repeated statistics within several switching cycles, the weight coefficient can be kept stable under frequent switching or different load conditions. The process of weighted synthesis of the bidirectional sampling signal according to the weight coefficient to obtain the synthesized current signal requires multiplying the and factors by the time-domain sampling values or frequency-domain sampling values of the forward and reverse channels respectively, and then adding the results. The weighted synthesis formula can be set as , where represents the current value of the forward sampling channel at time , represents the current value of the reverse sampling channel at time t. After synthesis, the interference components are weakened due to the corresponding weights in the frequency domain, while the real current components are retained and enhanced during the synthesis process, forming a synthesized current signal that can better reflect the actual flowing current of the silicon carbide MOS device. This synthesized current signal will be used as the input reference for subsequent junction temperature compensation and hierarchical overcurrent protection actions, to distinguish the errors caused by high-frequency interference from the real overcurrent state, and to maintain effective sampling accuracy in a more complex parallel application environment.

[0024] Furthermore, calculating the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and performing a correlation analysis on the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain the correlation analysis value includes: detecting the rising rate and falling rate of the gate voltage of the silicon carbide MOS device to obtain the switching speed, and selecting a reference waveform from a preset common-mode interference waveform template library according to the switching speed; performing a linear transformation on the time axis of the reference waveform to obtain the theoretical common-mode interference waveform, and performing Fourier transforms on the theoretical common-mode interference waveform and the forward sampling signal and the reverse sampling signal respectively to obtain first frequency-domain data and second frequency-domain data; calculating a first correlation analysis value according to the first frequency-domain data, calculating a second correlation analysis value according to the second frequency-domain data, and performing a weighted sum on the first correlation analysis value and the second correlation analysis value to obtain the correlation analysis value.

[0025] Specifically, the process of detecting the rising rate and falling rate of the gate voltage of a silicon carbide MOS device to obtain the switching speed and selecting a reference waveform from a preset common-mode interference waveform template library requires continuous periodic voltage sampling of the gate drive pulse in the drive control chip and using a high-speed comparison unit to identify the change slope of the gate voltage from low level to high level and from high level to low level. Each time a slope change is detected, based on the instantaneous rising or falling curve of the gate voltage, through charging and discharging formulas of this kind, the gate capacitance discharge speed of the silicon carbide MOS device is derived, so as to obtain an approximate value of the switching speed. When selecting the reference waveform, first, according to the rising slope index in the template library, the initial template closest to the currently measured speed is screened, and then a secondary comparison is made in combination with the falling slope to ensure that the template has a suitable common-mode interference characteristic distribution throughout the switching cycle. In this way, the common-mode interference waveform form that fits the actual working state can be quickly located during high-frequency switching, laying a basis for subsequent linear transformation and frequency-domain analysis. Performing a linear transformation on the time axis of the reference waveform to obtain a theoretical common-mode interference waveform, and performing Fourier transforms on the theoretical common-mode interference waveform with the forward sampling signal and the reverse sampling signal respectively to obtain the first frequency-domain data and the second frequency-domain data includes stretching or compressing the reference waveform in time so as to be consistent with the currently detected gate waveform in the main clock cycle. Specifically, through the linear mapping formula, the main interference peak segment of the reference waveform coincides with the gate charging and discharging stage corresponding to the current switching speed, so that the high-frequency energy distribution of the theoretical common-mode interference waveform is aligned with the actual interference occurrence time. After completing this time transformation, the theoretical common-mode interference waveform is successively subjected to discrete Fourier transforms with the forward sampling signal and the reverse sampling signal in the time domain to obtain the first frequency-domain data and the second frequency-domain data respectively, so as to extract the amplitude and phase information of each channel in the high-order harmonic interval. This method can simultaneously measure the mapping degree of the interference waveform to the sampling channel signal, and use the frequency-domain amplitude response to distinguish the true current component from the noise component. Calculating a first correlation analysis value according to the first frequency-domain data, calculating a second correlation analysis value according to the second frequency-domain data, and performing weighted summation on the first correlation analysis value and the second correlation analysis value to obtain the correlation analysis value can be achieved by setting and to calculate the correlation degree of the two groups of frequency-domain data, where represents the th frequency sampling value of the theoretical common-mode interference waveform, and represent the amplitudes of the forward and reverse sampling signals at the same frequency sampling respectively. Multiply and by the corresponding weight factors respectively And Then add them together to obtain the overall correlation analysis value If the obtained correlation analysis value has a large proportion in the high-frequency energy section, it indicates that the theoretical common-mode interference waveform and the collected bidirectional sampling signal have a significant overlapping area, indicating that the current channel contains strong interference components. In the subsequent steps, the weighting coefficients of the positive and negative channels will be adjusted accordingly based on this value, so as to distinguish the real current component and the interference component in the overcurrent sampling data.

[0026] 103. Detect the change in the junction temperature of the silicon carbide MOS device, obtain the change value of the on-resistance according to the change in the junction temperature, and compensate the synthesized current signal according to the change value of the on-resistance to obtain a compensated current signal; In an embodiment of the present invention, the detecting the change in the junction temperature of the silicon carbide MOS device, obtaining the change value of the on-resistance according to the change in the junction temperature, and compensating the synthesized current signal according to the change value of the on-resistance to obtain a compensated current signal includes: collecting the voltage value and current value between the source and drain of the silicon carbide MOS device, and calculating the real-time on-resistance of the silicon carbide MOS device according to the voltage value and current value; performing linear regression analysis on the real-time on-resistance to obtain the on-resistance change trend, and calculating the change value of the junction temperature of the silicon carbide MOS device according to the on-resistance change trend; looking up the corresponding on-resistance change value from a preset temperature-on-resistance mapping table according to the difference between the change value of the junction temperature and the preset calibration temperature; performing an operation on the synthesized current signal and the on-resistance change value to obtain a compensation coefficient, and correcting the synthesized current signal according to the compensation coefficient to obtain a compensated current signal.

[0027] Specifically, the process of collecting the voltage value and current value between the source and drain of the silicon carbide MOS device and calculating the real-time on-resistance of the silicon carbide MOS device according to the voltage value and current value needs to be simultaneously monitored in the sampling channel of the drive control chip And And use a high-speed analog-to-digital conversion unit to record the transient waveform at a specific moment in the switching cycle. Based on sampling at the rising edge and falling edge, this process can use a group of latches to retain the instantaneous (t) and (t) pair, so as to obtain the real-time on-resistance through the ratio operation of (t) = (t) / (t). If there are multiple silicon carbide MOS devices in a high-power parallel scenario, a multi-channel parallel sampling circuit can be used to separately sample the (t) and (t) is quantized, and the corresponding on-resistance set is calculated based on the data of each path. This method can obtain a resistance value closer to the true switching state of the device in a strong interference and high-speed switching environment, and ensure that the transient effects occurring before and after the Miller plateau are not missed. In order to improve the credibility of the data in the case of high-frequency interference, the sampling channel usually combines a differential amplifier and a hardware filter circuit to obtain a clearer (t) signal reference by suppressing high-order harmonics and common-mode voltage mutations. The (t) sequence obtained in this way can be used in the next stage to judge the device heat dissipation level and the dynamic change of the junction temperature.

[0028] A process of performing linear regression analysis on the real-time on-resistance to obtain the on-resistance change trend and calculating the junction temperature change value of the silicon carbide MOS device based on the on-resistance change trend can set a set of timestamps to record (t) discrete samples within several switching cycles, and then perform linear regression on these sample points using the least squares method or the gradient descent algorithm. Assume the regression equation is (t) = k*t + b, where k and b are the slope and intercept respectively. If k is positive and has a large absolute value, it indicates that the on-resistance continues to rise in a short time, and thus it can be regarded that the junction temperature of the device tends to rise during this period. In order to obtain a more refined junction temperature change value, the known reference temperature and the corresponding reference resistance can be combined to calculate the junction temperature increment, where is the temperature coefficient constant of the device. This method can accurately track the resistance value change at each moment under different loads and switching frequencies, and weaken the fluctuations caused by transient disturbances through the linear regression method, so that the overall trend of the junction temperature change can be shown. The process of looking up the corresponding on-resistance change value from the preset temperature-on-resistance mapping table according to the difference between the junction temperature change value and the preset calibration temperature is usually implemented as the linkage of a look-up table module and digital control logic in the hardware design. First, read the obtained in the previous step and compare it with the calibration temperature . If is higher than , it means that the device is in a heating state higher than the reference level. At this time, it is necessary to query the corresponding in the mapping table. This is used to correct the additional resistance increase caused by high temperature. The look-up table process can use one-dimensional interpolation or segmented indexing algorithm to divide the temperature range into several segments and pre-define the on-resistance offset for each segment. When falls into a certain interval, the corresponding , and cross-verify with the temperature information obtained by other sensors. This method can be executed one by one in the case of multiple parallel silicon carbide MOS devices to ensure that each device has an independent junction temperature correction channel and avoid deviations caused by a single value. If the temperature is lower than the reference value, find the corresponding negative or small value to maintain the complete compensation for the decrease in the on-resistance in the low-temperature state. The process of performing an operation on the synthesized current signal and the on-resistance change value to obtain a compensation coefficient and correcting the synthesized current signal according to the compensation coefficient to obtain a compensated current signal can define a function The coupling relationship between the on-resistance change value and the synthesized current signal. If the synthesized current signal is denoted as (t) at time t, then it can be obtained through (t) = (t) way to correct (t), where represents the adjustment coefficient, represents the resistance offset of the current temperature range, is the on-resistance at the reference temperature. This operation performs differential cancellation based on the current monitoring error caused by the increase in the junction temperature, so as to avoid underestimating the actual current value under high-temperature conditions or preventing misjudgment of the overcurrent risk at relatively low temperatures. The obtained , that is, the compensated current signal, can be closer to the actual device load level during high-frequency switching or high-power operation, and can also reduce the measurement deviation caused by the common-mode interference and temperature drift together.

[0029] Furthermore, the linear regression analysis of the real-time on-resistance to obtain the on-resistance change trend and calculating the junction temperature change value of the silicon carbide MOS device according to the on-resistance change trend includes: performing linear regression calculation on the real-time on-resistance of multiple switching cycles and the corresponding time points to obtain the slope value and intercept value of the on-resistance changing with time; substituting the slope value and intercept value into a linear equation to calculate the theoretical value of the on-resistance at each time point to obtain the on-resistance change trend; performing a ratio calculation on the on-resistance change trend and the on-resistance reference value at the initial temperature to obtain the resistance change rate; converting the resistance change rate into the junction temperature change value according to the preset on-resistance temperature coefficient.

[0030] Specifically, the process of performing linear regression calculation on the real-time on-resistance of multiple switching cycles and the corresponding time points to obtain the slope value and intercept value of the on-resistance changing with time can first set a high-speed data acquisition module inside the drive control chip, and pair and store the on-resistance R(t) within each switching cycle with the corresponding time mark t. At this time, the sampled data forms a set of discrete coordinate points 。To obtain more stable results, denoising can be performed over multiple adjacent cycles to eliminate abnormal data that significantly deviates from the average value. Subsequently, the least squares method is introduced to perform regression operations on this set of coordinate points, assuming the linear model is , where k represents the rate at which the on-resistance increases or decreases over time, and b represents the initial value at t = 0. The calculation process uses and formulas to obtain the slope and intercept. If the slope k is positive and has a large absolute value, it indicates that within the selected observation time interval, the on-resistance shows an increasing trend over time, which may mean that the device is experiencing thermal accumulation or load shock. The linear regression model obtained in this way can characterize the overall trend of the on-resistance under several consecutive switching cycles, providing a reference in the time dimension for the calculations in subsequent steps. Substituting the slope value and intercept value into the linear equation to calculate the theoretical value of the on-resistance at each time point, the process of obtaining the on-resistance change trend requires substituting and operating k and b obtained in the previous step throughout the monitoring period. Specifically, insert k and b point by point in the time series , and use to obtain the theoretical distribution curve of the on-resistance. This curve can numerically present the resistance value shift over time. If the curve shows a linear increase, it represents that the device has obvious heating in a short time. If the curve is close to flat, it indicates that the device remains relatively stable within this interval. To improve the applicability under dynamic working conditions, the start and end points of t can be updated in a rolling manner within a certain time sliding window, and the latest on-resistance sampling values are incorporated into the regression data to refresh the model at a high frequency. The sequence obtained in this way can show a smoothing effect on high-frequency fluctuations at different times, avoiding transient interference within a single cycle from disturbing the overall trend. After completing this process, the overall change of the on-resistance on the time axis is re-described. The process of calculating the ratio of the on-resistance change trend to the on-resistance reference value at the initial temperature to obtain the resistance value change rate includes introducing a control term for each time point , where represents the calibrated on-resistance of the silicon carbide MOS device at the initial temperature . Let , so that the change rate of the resistance value relative to the reference value at the moment can be obtained. When is positive, it means that the actual on-resistance of the device is higher than the initial condition. If In a continuously rising state, it means that the device is gradually heating up or the operating point is deviating from the nominal range. This ratio can not only reflect the absolute increment of the on-resistance, but also be used to compare and analyze the resistance differences of each branch in a parallel silicon carbide MOS structure. If there is a value much higher than that of other branches in a certain branch , it can be determined that this branch is experiencing additional power consumption or thermal load. Such ratio calculation is applicable to different temperature environments and different initial thresholds, and in subsequent steps, combined with the temperature coefficient relationship, it forms a key index for junction temperature estimation. The process of converting the rate of change of the resistance value into a junction temperature change value according to the preset temperature coefficient of the on-resistance can be completed through a one-dimensional function mapping in a digital signal processing unit. If the temperature coefficient is denoted as , then can be used to convert the relative change in the on-resistance into the rise in the junction temperature of the device. When higher accuracy is required, piecewise linear or non-linear corrections can also be introduced. If the device is calibrated through thermal resistance-resistance parameters during design, a multi-segment interval mapping can also be established for to adapt to the different sensitivities that silicon carbide MOS may exhibit in different junction temperature intervals. In the case of a linear relationship, will have a proportional coefficient that is nearly one-to-one with , which not only simplifies the calculation but also has sufficient accurate prediction ability. The obtained junction temperature change value can bring more comprehensive thermal characteristic monitoring during high-speed switching and large-current operation, providing a direct reference for judging the safety margin of the device and the rationality of the overcurrent protection trigger threshold.

[0031] 104. Compare the compensation current signal with a preset fast response threshold, determine the duration of the compensation current signal within the preset proximity range of the fast response threshold according to the comparison result, and select a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration.

[0032] In an embodiment of the present invention, comparing the compensation current signal with a preset fast response threshold, determining the duration of the compensation current signal within the proximity range preset by the fast response threshold according to the comparison result, and selecting a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration includes: comparing the compensation current signal with the fast response threshold to obtain a comparison result; when the comparison result shows that the compensation current signal is greater than the fast response threshold, adjusting the falling slope of the gate drive voltage output by the drive control chip to turn off the silicon carbide MOS device; when the comparison result shows that the compensation current signal is less than the fast response threshold, calculating the difference between the compensation current signal and the fast response threshold, and determining whether the difference is within a preset proximity range; when the difference is within the preset proximity range, recording the duration, and when the duration exceeds a preset time threshold, adjusting the amplitude of the gate drive voltage output by the drive control chip to reduce the conduction level of the silicon carbide MOS device.

[0033] Specifically, the process of comparing the compensation current signal with the fast response threshold to obtain a comparison result can be achieved by pre-configuring a high-speed comparison module in the drive control chip and digitally processing the compensation current signal. First, the compensation current signal is quantized by an analog-to-digital converter at a sampling frequency with a certain resolution in the analog front end to obtain a continuously updated numerical sequence (n). On the other hand, the fast response threshold is stored in the read-only memory area or configuration register of the chip as a constant or programmable comparison reference . In each sampling period, the control logic sends (n) to the input terminal of the comparator and performs point-by-point calculation with to form a difference . The symbol of can be used to distinguish whether the current compensation current signal is higher or lower than the threshold, and then the symbol and the absolute value information are written into the comparison result register (n). If , it means that the compensation current signal is greater than the fast response threshold. If , it indicates that the compensated current signal is lower than the fast response threshold. The hardware structure of the comparator allows this calculation to be completed within an extremely short delay, enabling the system to quickly judge the overcurrent risk under high-frequency switching conditions. At the same time, to prevent false triggering caused by transient noise, a small hysteresis region can be introduced during the comparison process to remove the interference of high-frequency spikes on the difference value, and a stable comparison result is maintained through a latch. The comparison mechanism implemented in this way can generate accurate comparison results in each switching cycle, facilitating subsequent judgment on how to execute corresponding protection actions and counting the duration of the difference value within the dangerous range. When the comparison result shows that the compensated current signal is greater than the fast response threshold, the falling slope of the gate drive voltage output by the drive control chip is adjusted, so that the process of turning off the silicon carbide MOS device requires dynamic control of the pulling-down speed of the gate voltage at the drive stage. After detecting , the control logic first starts the configuration of a gate voltage discharge channel. Specifically, it makes the external or on-chip gate drive MOS transistor enter the adjustable state, and the corresponding adjustable current source discharges according to the set slope . When the value is too large, a sharp current chopping will occur at the drain and trigger a relatively high effect. Therefore, in this process, the gate voltage is not instantly pulled down to zero, but gradually reduced in the form of soft turn-off . The gate discharge curve can be expressed as ; where refers to the equivalent gate capacitance of the silicon carbide MOS device, and is the initial value of the gate voltage when overcurrent is detected. If a smoother turn-off is required, can be scheduled in stages. First, a higher discharge rate is used to suppress extreme overcurrent, and then the discharge rate is reduced when approaching the critical voltage to relieve the voltage spike caused by the inductive load feedback. After this process, the silicon carbide MOS device gradually transfers from the strong conduction state to the cut-off interval, thereby suppressing the overcurrent scale and protecting the power module and external circuit. The falling process of the gate voltage is detected in real time by the monitoring module. If it is monitored that the drain current has dropped to the safe range, the turn-off result will be latched and this fast response mode will end. When the comparison result shows that the compensated current signal is less than the fast response threshold, the difference between the compensated current signal and the fast response threshold is calculated. The process of judging whether the difference is within the preset proximity range is based on the interval division of the absolute value. At this time, is negative or zero, indicating (n) , so it is necessary to further determine and a smaller proximity threshold The relationship between. If is greater than , it indicates that the current compensation current signal is much lower than the fast response threshold, and no additional action is required. If is in vicinity, it indicates that the compensation current signal is approaching the threshold and is likely to enter the dangerous range during momentary fluctuations. This proximity range can be determined by the arithmetic unit at each sampling moment. Define to represent a small range threshold offset for distinguishing the safe area from the critical area. After the comparison is completed, if , then the marker signal is written into the time accumulation register to record the duration of the compensation current signal staying in the critical area through an increment operation. If within several subsequent sampling periods, the compensation current signal returns far from this critical area, then clear and maintain the original conduction level to avoid frequent triggering of unnecessary protection actions.

[0034] When the difference is within the preset proximity range, record the duration. When the duration exceeds the preset time threshold, adjusting the amplitude of the gate drive voltage output by the drive control chip to reduce the conduction level of the silicon carbide MOS device involves segmented timing logic control. If is pulled high in consecutive multiple sampling periods and the count value exceeds the preset time , it is considered that the compensation current signal has remained near the fast response threshold for too long, and at this time, a derating action will be triggered. The specific operation includes setting a programmable voltage reference in the gate drive unit to make the gate voltage no longer rise to the full amplitude in subsequent switching cycles but be limited to a lower range. As the gate voltage decreases, the on-resistance of the silicon carbide MOS device increases accordingly, thereby restricting the actual passing current level to achieve a gentle protection effect. If the compensation current signal still approaches the threshold for a long time in the derating mode, the control logic can further reduce the gate voltage until the overcurrent hazard is eliminated or a higher-level safety strategy is triggered. This hierarchical control system can disperse thermal stress without abruptly turning off the device, improve the survivability of the power loop in a harsh environment, and moderately meet the output power demand.

[0035] In this embodiment, by setting a forward sampling channel and a reverse sampling channel on the source sampling resistor, and setting different sampling time windows for different sampling channels, and staggering the time windows of the dual sampling channels, the time period with the strongest common-mode interference can be avoided. At the same time, by mapping the switching speed of the silicon carbide MOS device to the theoretical common-mode interference waveform and using this waveform to perform synthesis processing with the bidirectional sampling signal, the common-mode interference component in the sampling signal can be accurately separated, making the synthesized current signal more accurate. On this basis, the current signal is compensated in combination with the change in on-resistance caused by the change in junction temperature, and a hierarchical protection strategy is adopted for overcurrent protection. This method effectively overcomes the influence of common-mode interference on current sampling through the staggered design of the sampling channel time and the separation of common-mode interference based on the switching speed.

[0036] The overcurrent protection method for the silicon carbide MOS drive control chip in the embodiment of the present invention is described above. Next, the overcurrent protection device for the silicon carbide MOS drive control chip in the embodiment of the present invention will be described. Please refer to Figure 2 , an embodiment of the overcurrent protection device for the silicon carbide MOS drive control chip in the embodiment of the present invention includes: A sampling module 201, configured to set a forward sampling channel and a reverse sampling channel on the source sampling resistor of the silicon carbide MOS device, and during the process of the drive control chip driving the silicon carbide MOS device, collect the source current signal through the forward sampling channel and the reverse sampling channel based on the corresponding sampling time window to obtain a bidirectional sampling signal; An interference processing module 202, configured to calculate a theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesize the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain a synthesized current signal; A temperature compensation module 203, configured to detect the change in the junction temperature of the silicon carbide MOS device, obtain the on-resistance change value according to the change in the junction temperature, and compensate the synthesized current signal according to the on-resistance change value to obtain a compensated current signal; A protection control module 204, configured to compare the compensated current signal with a preset fast response threshold, determine the duration of the compensated current signal within the proximity range preset by the fast response threshold according to the comparison result, and select a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration.

[0037] In the embodiments of the present invention, the overcurrent protection device of the silicon carbide MOS drive control chip operates the above-mentioned overcurrent protection method for the silicon carbide MOS drive control chip. The overcurrent protection device of the silicon carbide MOS drive control chip sets a forward sampling channel and a reverse sampling channel on the source sampling resistor, sets different sampling time windows for different sampling channels, and by staggering the time windows of the dual sampling channels, the time period with the strongest common-mode interference can be avoided. At the same time, by mapping the switching speed of the silicon carbide MOS device into a theoretical common-mode interference waveform and using this waveform to perform synthesis processing with the bidirectional sampling signal, the common-mode interference component in the sampling signal can be accurately separated, making the synthesized current signal more accurate. On this basis, the current signal is compensated in combination with the change in on-resistance caused by the change in junction temperature, and a hierarchical protection strategy is adopted for overcurrent protection. This method effectively overcomes the influence of common-mode interference on current sampling through the staggered design of the sampling channel time and the separation of common-mode interference based on the switching speed.

[0038] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the above-described systems, devices, or units can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0039] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.

[0040] As mentioned above, the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A method for overcurrent protection of a silicon carbide MOS drive control chip, characterized in that: The overcurrent protection method of the silicon carbide MOS drive control chip comprises: A forward sampling channel and a reverse sampling channel are set for the source sampling resistor of the silicon carbide MOS device, and in the process of driving the silicon carbide MOS device by the driving control chip, a source current signal is collected through the forward sampling channel and the reverse sampling channel based on a corresponding sampling time window to obtain a bidirectional sampling signal; Calculating a theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesizing the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain a synthesized current signal; Detecting a junction temperature change of the silicon carbide MOS device, obtaining an on-resistance change value according to the junction temperature change, and compensating the synthetic current signal according to the on-resistance change value to obtain a compensated current signal; The compensation current signal is compared with a preset fast response threshold, and the duration of the compensation current signal in a range close to the preset fast response threshold is determined according to the comparison result, and a corresponding graded overcurrent protection strategy is selected to perform overcurrent protection according to the comparison result and the duration.

2. The overcurrent protection method for a silicon carbide MOS drive control chip according to claim 1, characterized in that: The forward sampling channel and the reverse sampling channel are set for the source sampling resistor of the silicon carbide MOS device, and in the process of driving the silicon carbide MOS device by the driving control chip, the source current signal is collected based on the corresponding sampling time window through the forward sampling channel and the reverse sampling channel to obtain the bidirectional sampling signal, which includes: A forward sampling channel and a reverse sampling channel are set for the source sampling resistor of the silicon carbide MOS device, and when the driving control chip drives the silicon carbide MOS device, a gate-source voltage change process of the silicon carbide MOS device is detected to determine the duration of the Miller platform; The sampling time window of the forward sampling channel is set to one third of the duration of the Miller platform, and the sampling start time is at the moment when the gate voltage starts to rise; The sampling time window of the reverse sampling channel is set to half of the duration of the Miller platform, and the sampling start time is located at the gate voltage drop stage after the Miller platform ends; The forward sampling channel and the reverse sampling channel are set with a sampling frequency synchronized with the gate driving signal of the driving control chip, and the rising edge information and the falling edge information of the source current signal are respectively collected to obtain a bidirectional sampling signal.

3. The overcurrent protection method for a silicon carbide MOS drive control chip according to claim 1, characterized in that: The calculating of the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and synthesizing the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain the synthesized current signal comprises: Calculating a theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and performing a correlation analysis between the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain a correlation analysis value; Calculating weight coefficients of a forward sampling signal and a reverse sampling signal in the bidirectional sampling signal according to the correlation analysis value; The bidirectional sampling signals are weighted and synthesized according to the weight coefficient to obtain a synthesized current signal.

4. The overcurrent protection method for a silicon carbide MOS drive control chip according to claim 3, characterized in that: The calculating of the theoretical common-mode interference waveform according to the switching speed of the silicon carbide MOS device, and performing correlation analysis on the theoretical common-mode interference waveform and the bidirectional sampling signal to obtain the correlation analysis value includes: Detecting the rising rate and falling rate of the gate voltage of the silicon carbide MOS device to obtain the switching speed, and selecting a reference waveform from a preset common-mode interference waveform template library according to the switching speed; Performing a linear transformation on the time axis of the reference waveform to obtain a theoretical common-mode interference waveform, and performing Fourier transformation on the theoretical common-mode interference waveform, a forward sampling signal and a reverse sampling signal, respectively, to obtain first frequency domain data and second frequency domain data; A first correlation analysis value is calculated based on the first frequency domain data, a second correlation analysis value is calculated based on the second frequency domain data, and the first correlation analysis value and the second correlation analysis value are weightedly summed to obtain a correlation analysis value.

5. The overcurrent protection method for silicon carbide MOS drive control chip according to claim 1, characterized in that: The detecting the junction temperature change of the silicon carbide MOS device, obtaining the on-resistance change value according to the junction temperature change, and compensating the synthetic current signal according to the on-resistance change value to obtain the compensated current signal includes: Collecting a voltage value and a current value between a source and a drain of a silicon carbide MOS device, and calculating a real-time on-resistance of the silicon carbide MOS device according to the voltage value and the current value; Performing a linear regression analysis on the real-time on-resistance to obtain an on-resistance variation trend, and calculating a junction temperature variation value of the silicon carbide MOS device according to the on-resistance variation trend; According to the difference between the junction temperature change value and the preset calibration temperature, searching for the corresponding on-resistance change value from a preset temperature on-resistance mapping table; The synthesized current signal and the on-resistance change value are operated to obtain a compensation coefficient, and the synthesized current signal is corrected according to the compensation coefficient to obtain a compensated current signal.

6. The overcurrent protection method for a silicon carbide MOS drive control chip according to claim 5, characterized in that: The performing linear regression analysis on the real-time on-resistance to obtain the on-resistance variation trend, and calculating the junction temperature variation value of the silicon carbide MOS device according to the on-resistance variation trend comprises: Perform linear regression calculation on the real-time on-resistance of multiple switching cycles and the corresponding time points to obtain the slope value and intercept value of the on-resistance changing with time; Substituting the slope value and the intercept value into the linear equation, calculating the theoretical value of the on-resistance at each time point, and obtaining the on-resistance change trend; Calculating the ratio of the on-resistance change trend to the on-resistance reference value at the initial temperature to obtain a resistance change rate; The resistance change rate is converted into a junction temperature change value according to a preset on-resistance temperature coefficient.

7. The overcurrent protection method for a silicon carbide MOS driver control chip according to claim 1, characterized in that: The step of comparing the compensation current signal with a preset fast response threshold, determining the duration of the compensation current signal within a preset proximity range of the fast response threshold according to the comparison result, and selecting a corresponding hierarchical overcurrent protection strategy for overcurrent protection according to the comparison result and the duration includes: Comparing the compensation current signal with the fast response threshold to obtain a comparison result; When the comparison result shows that the compensation current signal is greater than the fast response threshold, adjusting the falling slope of the gate drive voltage output by the drive control chip to turn off the silicon carbide MOS device; When the comparison result shows that the compensation current signal is less than the fast response threshold, calculating the difference between the compensation current signal and the fast response threshold, and determining whether the difference is within a preset proximity range; When the difference is within a preset proximity range, the duration is recorded; when the duration exceeds a preset time threshold, the amplitude of the gate drive voltage output by the drive control chip is adjusted to reduce the conduction level of the silicon carbide MOS device.

8. A silicon carbide MOS drive control chip overcurrent protection device, characterized in that: The silicon carbide MOS drive control chip overcurrent protection device comprises: A sampling module is used to set a forward sampling channel and a reverse sampling channel for the source sampling resistor of the silicon carbide MOS device, and collect a source current signal based on a corresponding sampling time window through the forward sampling channel and the reverse sampling channel during the process of driving the silicon carbide MOS device by the driving control chip to obtain a bidirectional sampling signal; An interference processing module, used for calculating a theoretical common-mode interference waveform according to a switching speed of a silicon carbide MOS device, and synthesizing the bidirectional sampling signal according to the theoretical common-mode interference waveform to obtain a synthesized current signal; A temperature compensation module is used to detect the junction temperature change of the silicon carbide MOS device, obtain an on-resistance change value according to the junction temperature change, and compensate the synthetic current signal according to the on-resistance change value to obtain a compensated current signal; A protection control module is used to compare the compensation current signal with a preset fast response threshold, determine the duration of the compensation current signal within a preset proximity range of the fast response threshold according to the comparison result, and select a corresponding graded overcurrent protection strategy for overcurrent protection according to the comparison result and the duration.

Images