Diode manufacturing method and diode
By depositing red phosphorus on the back of the first wafer of the rectifier diode and performing high-temperature push-hard treatment, combined with depositing protective layer on the front and etching, the problem of long-term and high-cost red phosphorus diffusion process of the back diffusion sheet is solved, and low-cost and high-efficiency diode manufacturing is achieved.
Patent Information
- Application Number
- CN202510259912.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-06
- Publication Date
- 2025-06-13
AI Technical Summary
When manufacturing rectifier diodes, the prior art uses back diffusers as the base material, resulting in a long and expensive red phosphorus diffusion process, which in turn increases the cost of rectifier diode devices.
The performance of the back expansion sheet is simulated by depositing red phosphorus on the back surface of the first wafer and subjecting it to a high-temperature well-pushing treatment. At the same time, the protective layer is deposited on the front surface of the first wafer, and the protective layer is etched after the high temperature pushing the trap to obtain a second wafer to reduce the contamination of red phosphorus to the front surface.
It is possible to manufacture diodes with low forward conduction voltage and qualified yield at lower costs, with wafer cost reduced by about 60% and greatly reduced overall cost.
Smart Images
Figure CN120152307A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor technology, and particularly to a method for manufacturing a diode and a diode. Background Art
[0002] When manufacturing a rectifier diode, it is usually pursued that the forward conduction voltage is as small as possible, so as to reduce the power consumption of the rectifier diode and improve the efficiency of the rectifier diode.
[0003] In the related art, when manufacturing a rectifier diode, a back diffusion wafer is usually used as a base material to manufacture the rectifier diode, so as to reduce the forward conduction voltage of the rectifier diode. A back diffusion wafer is a wafer material that has been subjected to back doping diffusion treatment and has characteristics such as high quality, low defects, and precisely controlled drift region thickness.
[0004] Red phosphorus is usually used to perform back doping diffusion treatment on the wafer to obtain a back diffusion wafer. In the process of using red phosphorus to perform back doping diffusion treatment on the wafer, in order to precisely control the drift region thickness of the back diffusion wafer, red phosphorus needs to diffuse for a long time to reach a specified depth in the wafer. The long diffusion process results in a high cost of the back diffusion wafer, and ultimately leads to a high cost of the manufactured rectifier diode device. Summary of the Invention
[0005] The present disclosure provides a method, device, equipment, and storage medium for manufacturing a diode, which can manufacture a diode with a low forward conduction voltage and a qualified yield at a low cost. The technical solution at least includes the following solutions: In a first aspect, a method for manufacturing a diode is provided, including: providing a first wafer, where the first wafer is any one of a floating zone melting method wafer, a Czochralski method wafer, and a neutron transmutation doping method wafer; depositing a protective layer on the front surface of the first wafer, and the diffusion rate of red phosphorus in the protective layer is lower than the diffusion rate of red phosphorus in the first wafer; depositing red phosphorus on the back surface of the first wafer; performing a high-temperature push well treatment on the back surface of the first wafer; etching the protective layer to obtain a second wafer; and manufacturing a rectifier diode based on the second wafer.
[0006] Optionally, during the process of depositing red phosphorus on the back surface of the first wafer, the concentration of the red phosphorus is greater than or equal to , and the thickness of the red phosphorus deposited on the back surface of the first wafer is greater than or equal to 20 .
[0007] Optionally, during the process of performing the high-temperature push well treatment on the back surface of the first wafer, the temperature of the high-temperature push well treatment is greater than or equal to 1250 °C, and the time of the high-temperature push well treatment is greater than or equal to 3 hours.
[0008] Optionally, the protective layer is made of silicon dioxide.
[0009] Optionally, the thickness of the protective layer is greater than or equal to 1 .
[0010] Optionally, etching the protective layer to obtain a second wafer includes: etching the front surface of the first wafer, and stopping the etching when the protective layer is completely etched and the silicon on the front surface of the first wafer is etched to a first depth.
[0011] Optionally, the first depth is greater than or equal to 10 .
[0012] Optionally, manufacturing a rectifier diode based on the second wafer includes: forming a channel cutoff ring on the second wafer by photolithography based on a first mask, where the first mask is used to form the channel cutoff ring; forming an active region and a termination region on the second wafer by photolithography based on a second mask, where the second mask is used to form the active region and the termination region; performing a high-temperature well-pushing process on the second wafer; growing a field oxide layer on the surface of the second wafer; opening holes in the field oxide layer by photolithography based on a third mask to expose the active region, where the third mask is used to form through holes; forming an anode metal electrode on the exposed surface of the active region by photolithography based on a fourth mask, where the fourth mask is used to form the anode metal electrode; flipping the second wafer, and depositing a cathode metal on the back surface of the second wafer to obtain a plurality of the rectifier diodes.
[0013] Optionally, manufacturing a rectifier diode based on the second wafer includes: forming an active region and a termination region on the second wafer by photolithography based on a second mask, where the second mask is used to form the active region and the termination region; performing a high-temperature well-pushing process on the second wafer; growing a field oxide layer on the surface of the second wafer; opening holes in the field oxide layer by photolithography based on a third mask to expose the active region, where the third mask is used to form through holes; forming an anode metal electrode on the exposed surface of the active region by photolithography based on a fourth mask, where the fourth mask is used to form the anode metal electrode; flipping the second wafer, and depositing a cathode metal on the back surface of the second wafer to obtain a plurality of the rectifier diodes.
[0014] The beneficial effects brought by the technical solutions provided by the embodiments of the present disclosure at least include: In the embodiments of the present disclosure, by depositing red phosphorus on the back surface of the first wafer and performing a high-temperature well-pushing treatment on the back surface of the first wafer, the first wafer can simulate the performance of a back-diffused wafer. By depositing a protective layer on the front surface of the first wafer before depositing red phosphorus and etching the protective layer after the high-temperature well-pushing treatment, a second wafer is obtained. In this way, the obtained second wafer can not only simulate the performance of a back-diffused wafer, but also prevent the yield from decreasing due to the contamination of the front surface of the wafer by red phosphorus. Compared with manufacturing a diode using a back-diffused wafer, the wafer cost of manufacturing a diode using the first wafer is reduced by about 60%. And in the process of processing the first wafer to obtain the second wafer in the embodiments of the present disclosure, the cost is only increased by less than 5%. Therefore, the overall cost is greatly reduced, and the rectifier diode manufactured by the method in the embodiments of the present disclosure also has the advantages of a low forward conduction voltage and a qualified yield. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0016] Figure 1 FIG. shows a flowchart of a diode manufacturing method provided by an exemplary embodiment of the present disclosure; Figure 2 is a schematic diagram of the doping concentrations of an FZ wafer, a CZ wafer, and a back-diffused wafer; Figure 3 is a schematic diagram of the yields of diodes manufactured using the second wafer and diodes manufactured using a back-diffused wafer when the first wafer is an FZ wafer; Figure 4 FIG. shows a flowchart of a diode manufacturing method provided by an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0017] Unless otherwise defined, the technical terms or scientific terms used herein shall have the ordinary meanings understood by those of ordinary skill in the art to which the present disclosure pertains. The "first", "second", "third", and similar terms used in the specification and claims of the present patent application do not denote any order, quantity, or importance, but are only used to distinguish different components. Similarly, terms such as "a" or "an" do not denote a quantity limitation, but mean that there is at least one. The terms "comprising" or "including" and similar terms mean that the elements or items appearing before "comprising" or "including" cover the elements or items listed after "comprising" or "including" and their equivalents, and do not exclude other elements or items.
[0018] To make the objectives, technical solutions, and advantages of the present disclosure clearer, the following will further describe the embodiments of the present disclosure in detail with reference to the accompanying drawings.
[0019] To facilitate the understanding of the embodiments of the present disclosure, the principle of the back diffusion wafer will be described below.
[0020] When manufacturing the back diffusion wafer, red phosphorus is usually used to perform back doping diffusion treatment on the wafer, so that a high-concentration doping layer (such as N+ or P+) is formed on the back of a certain wafer, and this wafer is the back diffusion wafer.
[0021] In a rectifying diode, the forward conduction voltage V f includes V PN , V 1 , V 2 These three parts.
[0022] That is, V f =V PN + V 1 + V 2 . Among them, V PN represents the voltage across the PN junction, V 1 represents the voltage across the bulk resistance, and V 2 represents the voltage across the contact resistance.
[0023] The back diffusion wafer can significantly reduce the bulk resistance because the back diffusion wafer will form a high-concentration doping layer on the back of the wafer. The high-concentration doping layer can increase the carrier concentration, thereby improving the conductivity. After the conductivity is improved, the bulk resistance is reduced.
[0024] According to Ohm's law, when the bulk resistance decreases, the voltage across the bulk resistance will decrease, and the forward conduction voltage will naturally decrease.
[0025] Here, Ohm's law is , where represents voltage, represents current, represents resistance. It can be seen from Ohm's law that when the current remains unchanged, if the resistance decreases, the voltage also decreases. Applied to V 1 , that is, when the current remains unchanged, V 1 decreases when the bulk resistance decreases. When V 1 decreases, the total forward conduction voltage also decreases. In summary, the back diffusion wafer reduces the bulk resistance through the heavily doped layer with a high doping concentration, thereby reducing V 1 , and finally reducing the forward conduction voltage.
[0026] Figure 1 shows a flowchart of a diode manufacturing method provided by an exemplary embodiment of the present disclosure. SeeFigure 1 , the method includes: In step 101, a first wafer is provided.
[0027] The first wafer is any one of a floating zone (FZ) wafer, a Czochralski (CZ) wafer, and a neutron transmutation doping (NTD) wafer.
[0028] Compared with the back-diffused wafers in the related art, the FZ wafer, the CZ wafer, and the NTD wafer have lower costs. If the first wafer is used instead of the back-diffused wafer, the wafer cost can be reduced by nearly 60%.
[0029] In step 102, a protective layer is deposited on the front surface of the first wafer.
[0030] The diffusion rate of red phosphorus in the protective layer is lower than that in the first wafer.
[0031] Optionally, the protective layer is silicon dioxide. The diffusion rate of red phosphorus in silicon dioxide is lower than that in the first wafer (silicon). Therefore, silicon dioxide can be used as the protective layer.
[0032] Optionally, the thickness of the protective layer is greater than or equal to 1 . For example, the thickness of the protective layer can be 1 , 1.5 , 2 etc. If the thickness of the protective layer is too low (such as less than 1 ), red phosphorus will easily pass through the protective layer and contaminate the front surface of the first wafer, and the protective effect of the protective layer will decline. When the thickness of the protective layer is greater than or equal to 1 , the red phosphorus passing through the protective layer can be reduced, and the protective effect of the protective layer on the front surface of the first wafer can be effectively improved.
[0033] In step 103, red phosphorus is deposited on the back surface of the first wafer.
[0034] Optionally, during the process of depositing red phosphorus on the back surface of the first wafer, the concentration of red phosphorus is greater than or equal to , and the thickness of the red phosphorus deposited on the back surface of the first wafer is greater than or equal to 20 , for example, it can be 20 , 40 or 60 etc. In this way, it can be ensured that there is sufficient red phosphorus on the back surface of the first wafer, providing a good process environment for the subsequent step 104.
[0035] In step 104, a high-temperature push-well treatment is performed on the back surface of the first wafer.
[0036] Optionally, during the process of performing high-temperature pusher well treatment on the back surface of the first wafer, the temperature of the high-temperature pusher well treatment is greater than or equal to 1250 °C, and the time of the high-temperature pusher well treatment is greater than or equal to 3 hours. For example, it can be 3 hours, 4 hours, or 5 hours. In this way, the doping concentration of the back surface of the first wafer after high-temperature pusher well treatment can be effectively increased.
[0037] The essence of steps 103-104 is to process the first wafer so that the first wafer also has properties similar to those of the back-epitaxial wafer (that is, there is a high-concentration doping layer on the back surface of the first wafer).
[0038] Figure 2 It is a schematic diagram of the doping concentrations of the FZ wafer, the CZ wafer, and the back-epitaxial wafer. As Figure 2 shown, it can be seen that the doping concentrations of the FZ wafer and the CZ wafer (i.e., the first wafer) are equal everywhere, while due to the presence of the high-concentration doping layer, the doping concentration of the back-epitaxial wafer gradually decreases from the back surface to the front surface.
[0039] Since the diffusion concentration in the first wafer is equal everywhere, that is, there is no high-concentration doping layer in the first wafer, there are differences in the performance between the first wafer and the back-epitaxial wafer. Therefore, if the first wafer is directly used to replace the back-epitaxial wafer without processing the first wafer, only the wafer cost is simply reduced at this time, but the quality of the finally produced diode is reduced.
[0040] Therefore, in the embodiments of the present disclosure, through steps 103 to 104, the back surface of the first wafer can also have a high diffusion concentration. In this way, the first wafer can simulate the performance of the back-epitaxial wafer, and the diode manufactured based on the first wafer also has the characteristic of a low forward conduction voltage.
[0041] In step 105, the protective layer is etched to obtain the second wafer.
[0042] When processing the first wafer using the above steps 102 to 104, the deposited red phosphorus may contaminate the front surface of the first wafer, resulting in a reduction in the yield of the subsequently produced rectifier diode. In the embodiments of the present disclosure, by depositing a protective layer on the front surface of the first wafer, since the diffusion rate of red phosphorus in the protective layer is lower than the diffusion rate of red phosphorus in the first wafer, the protective layer can reduce the contamination of the front surface of the first wafer by red phosphorus.
[0043] Optionally, step 105 includes: performing an etching process on the front surface of the first wafer, and stopping the etching when the protective layer is etched and the silicon on the front surface of the first wafer is etched to a first depth.
[0044] In a possible implementation, the first depth is greater than or equal to 10 , for example, it can be 10 、 30 or 60 。
[0045] In another possible implementation, the first depth is greater than or equal to 10 , and the first depth is less than or equal to the depth of the diffusion of red phosphorus on the back surface of the first wafer.
[0046] Taking the case where the first depth is equal to the depth of the diffusion of red phosphorus on the back surface of the first wafer as an example, for example, the depth of the diffusion of red phosphorus on the back surface of the first wafer is 60 , then the first depth is also 60 。
[0047] When implementing step 105, two cases are considered. In the first case, the etching stops after the protective layer is etched. In the second case, the etching stops when the protective layer is etched and the silicon on the front surface of the first wafer is etched to the first depth.
[0048] Circuit Probe Testing is performed on the first case and the second case respectively, and the yield rates obtained from the wafer testing in these two cases are compared with the yield rate when using a back-diffused wafer. The comparison results show that compared with the yield rate when using a back-diffused wafer, the yield rate of the first case drops significantly, indicating that the first case will cause a loss in yield.
[0049] In the first case, the second case is proposed to improve the yield. Compared with the yield rate of the first case, the yield rate of the second case has a significant increase (close to the yield rate when using a back-diffused wafer). Therefore, the second case (i.e., the solution in the embodiments of the present disclosure) can effectively improve the yield. That is, the second case is used to implement step 105.
[0050] Figure 3 is a schematic diagram of the yield rates of the diodes manufactured using the second wafer and the diodes manufactured using a back-diffused wafer when the first wafer is an FZ wafer. By Figure 3 It can be seen that the yield rate of the diodes manufactured using the second wafer obtained in the second case is 95%, and the yield rate of the diodes manufactured using a back-diffused wafer is 97%, and the two are relatively close. That is, the method in the embodiments of the present disclosure can significantly reduce the cost while slightly reducing the yield.
[0051] In this way, through steps 102 and 105, the contamination of the front side of the first wafer by red phosphorus can be reduced, and by the methods in steps 103 to 104, the first wafer can simulate the performance of a back-diffused wafer. That is to say, the finally obtained second wafer not only has performance similar to that of a back-diffused wafer, but also the front side of the second wafer is not contaminated by red phosphorus (or is contaminated very little). In this case, the rectifier diodes manufactured using the second wafer have two advantages: low forward conduction voltage and high yield.
[0052] Compared with the case of manufacturing rectifier diodes using back-diffused wafers, the cost ratio of the additional processes (steps 102 to 105) in the embodiments of the present disclosure is about 5%. Since the cost of the first wafer is reduced by 60% compared with that of the back-diffused wafer, the additional process cost is basically negligible compared with the reduced cost.
[0053] In step 106, based on the second wafer, a rectifier diode is manufactured.
[0054] The rectifier diodes manufactured using the second wafer have two advantages: low forward conduction voltage and high yield. This second wafer can be used to manufacture rectifier diodes.
[0055] In the embodiments of the present disclosure, by depositing red phosphorus on the back side of the first wafer and performing a high-temperature drive-in process on the back side of the first wafer, the first wafer can simulate the performance of a back-diffused wafer. By depositing a protective layer on the front side of the first wafer before depositing red phosphorus and etching the protective layer after the high-temperature drive-in process, a second wafer is obtained. In this way, the obtained second wafer can not only simulate the performance of a back-diffused wafer, but also the yield is not reduced due to the contamination of the front side of the wafer by red phosphorus. Compared with manufacturing diodes using back-diffused wafers, the wafer cost of manufacturing diodes using the first wafer is reduced by about 60%, and in the process of processing the first wafer to obtain the second wafer in the embodiments of the present disclosure, only less than 5% of the cost is increased. Therefore, the overall cost is greatly reduced, and the rectifier diodes manufactured using the method in the embodiments of the present disclosure also have the advantages of low forward conduction voltage and qualified yield.
[0056] Figure 4 The flowchart of a diode manufacturing method provided by an exemplary embodiment of the present disclosure is shown. Refer to Figure 4 , the method includes: In step 401, a first wafer is provided.
[0057] In step 402, a protective layer is deposited on the front side of the first wafer.
[0058] In step 403, red phosphorus is deposited on the back side of the first wafer.
[0059] In step 404, a high-temperature drive-in process is performed on the back side of the first wafer.
[0060] In step 405, the protective layer is etched to obtain a second wafer.
[0061] For the relevant content of steps 401 to 405, refer to the aforementioned steps 101 to 105, and the detailed description is omitted here.
[0062] In step 406, based on the first mask, a channel cutoff ring is formed on the second wafer by using a photolithography process.
[0063] The first mask is used to form the channel cutoff ring.
[0064] In step 407, based on the second mask, an active region and a terminal region are formed on the second wafer by using a photolithography process.
[0065] The second mask is used to form the active region and the terminal region; In step 408, the second wafer is subjected to a high-temperature well-pushing process.
[0066] In step 409, a field oxide layer is grown on the surface of the second wafer.
[0067] In step 410, based on the third mask, openings are formed in the field oxide layer by using a photolithography process to expose the active region.
[0068] The third mask is used to form through holes.
[0069] In step 411, based on the fourth mask, an anode metal electrode is formed on the surface of the exposed active region by using a photolithography process.
[0070] The fourth mask is used to form the anode metal electrode.
[0071] In step 412, the second wafer is flipped, and a cathode metal is deposited on the back surface of the second wafer to obtain a plurality of rectifying diodes.
[0072] There are many implementation methods for steps 406 to 412 in the related art, and the detailed description is omitted here.
[0073] In some embodiments, step 406 may not be executed, and only steps 401 to 405 and steps 407 to 412 are executed, so as to omit the cost of the first mask, and further reduce the cost of the overall process flow.
[0074] If steps 401 to 412 are executed, a total of 4 masks are required, and the cost is relatively high. By omitting step 406 (not executing step 406), and only executing steps 401 to 405 and steps 407 to 412, the cost of the first mask can be reduced. At this time, only 3 masks are needed, that is, the cost on the mask is reduced by 25%.
[0075] The foregoing are only alternative embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included within the protection scope of the present disclosure.
Claims
1. A method for manufacturing a diode, characterized in that: The method comprises: Providing a first wafer, wherein the first wafer is any one of a floating zone melting method wafer, a Czochralski method wafer, and a neutron transmutation doping method wafer; Depositing a protective layer on the front side of the first wafer, wherein a diffusion rate of red phosphorus in the protective layer is lower than a diffusion rate of red phosphorus in the first wafer; depositing red phosphorus on the back side of the first wafer; Performing a high-temperature well-driving process on the back side of the first wafer; Etching the protective layer to obtain a second wafer; Based on the second wafer, a rectifier diode is manufactured.
2. The diode manufacturing method according to claim 1, characterized in that: During the deposition of red phosphorus on the back of the first wafer, the concentration of the red phosphorus is greater than or equal to The thickness of the red phosphorus deposited on the back of the first wafer is greater than or equal to 20 .
3. The diode manufacturing method according to claim 1, characterized in that: In the process of performing high-temperature well-driving treatment on the back side of the first wafer, the temperature of the high-temperature well-driving treatment is greater than or equal to 1250° C., and the time of the high-temperature well-driving treatment is greater than or equal to 3 hours.
4. The diode manufacturing method according to claim 1, characterized in that: The protective layer is made of silicon dioxide.
5. The diode manufacturing method according to claim 1, characterized in that: The thickness of the protective layer is greater than or equal to 1 .
6. The diode manufacturing method according to claim 4, characterized in that: The etching of the first protective layer to obtain a second wafer comprises: The front side of the first wafer is etched, and the etching is stopped when the protective layer is completely etched and the silicon on the front side of the first wafer is etched to a first depth.
7. The diode manufacturing method according to claim 6, characterized in that: The first depth is greater than or equal to 10 .
8. The diode manufacturing method according to claim 1, characterized in that: The method of manufacturing a rectifier diode based on the second wafer includes: Based on a first mask, forming a channel stop ring on the second wafer by using a photolithography process, wherein the first mask is used to form the channel stop ring; Based on a second mask, forming an active area and a terminal area on the second wafer by using a photolithography process, wherein the second mask is used to form the active area and the terminal area; performing a high temperature well-driving process on the second wafer; growing a field oxide layer on the surface of the second wafer; Based on a third mask, a photolithography process is used to open a hole in the field oxide layer to expose the active area, wherein the third mask is used to form a through hole; Based on a fourth mask, a photolithography process is used to form an anode metal electrode on the exposed surface of the active area, wherein the fourth mask is used to form the anode metal electrode; The second wafer is turned over, and cathode metal is deposited on the back side of the second wafer to obtain a plurality of the rectifier diodes.
9. The diode manufacturing method according to claim 1, characterized in that: The method of manufacturing a rectifier diode based on the second wafer includes: Based on a second mask, forming an active area and a terminal area on the second wafer by using a photolithography process, wherein the second mask is used to form the active area and the terminal area; performing a high temperature well-driving process on the second wafer; growing a field oxide layer on the surface of the second wafer; Based on a third mask, a photolithography process is used to open a hole in the field oxide layer to expose the active area, wherein the third mask is used to form a through hole; Based on a fourth mask, a photolithography process is used to form an anode metal electrode on the exposed surface of the active area, wherein the fourth mask is used to form the anode metal electrode; The second wafer is turned over, and cathode metal is deposited on the back side of the second wafer to obtain a plurality of the rectifier diodes.
10. A diode, characterized in that: The diode is manufactured by the diode manufacturing method according to any one of claims 1 to 9.