Display panel, preparation method of display panel and electronic equipment

Abstract

The embodiment of the invention provides a display panel, a preparation method of the display panel and electronic equipment, and relates to the technical field of display. The conductive isolation layer is located on one side of the array substrate, the conductive isolation layer comprises a plurality of isolation structures and electrode wires located between the isolation structures, at least part of the electrode wires are first touch electrodes, and isolation openings are defined by the isolation structures; in the first mode, the isolation structure is used for driving the light-emitting sub-pixels to emit light; in the second mode, one of the isolation structure and the first touch electrode is used for accessing a touch driving signal; and the other one of the isolation structure and the first touch electrode is used for outputting a touch sensing signal. The thickness of the display panel can be reduced, and the purpose of lightening and thinning the display panel can be achieved more easily.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and more particularly, to a display panel, a method for manufacturing the display panel, and an electronic device. Background Art

[0002] Flat panel display devices based on technologies such as Organic Light Emitting Diode (OLED) and Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptop computers, and desktop computers due to advantages such as high image quality, power saving, thin body, and wide application range, and have become the mainstream in display panels.

[0003] However, in related technologies, the display panel is relatively thick and it is not easy to achieve the goal of being thin and light. Summary of the Invention

[0004] In order to overcome the technical problems mentioned in the above technical background, an embodiment of the present application provides a display panel, which includes a first mode and a second mode; the display panel includes:

[0005] An array substrate;

[0006] A conductive isolation layer located on one side of the array substrate, the conductive isolation layer includes a plurality of isolation structures and electrode traces located between the isolation structures, the isolation structures are insulated from adjacent electrode traces, and at least part of the electrode traces are first touch electrodes;

[0007] One of the isolation structure and an adjacent first touch electrode is used to access a touch driving signal, and the other of the isolation structure and the adjacent first touch electrode is used to output a touch sensing signal.

[0008] In a possible implementation manner, the first touch electrode includes a first touch trace segment extending in a first direction, and at least part of the orthographic projection of the first touch trace segment on the array substrate is located between the orthographic projections of adjacent isolation structures on the array substrate;

[0009] Preferably, the display panel further includes a packaging layer located on a side of the conductive isolation layer away from the array substrate;

[0010] Preferably, along the direction away from the array substrate, the packaging layer includes a first inorganic packaging layer, an organic packaging layer, and a second inorganic packaging layer stacked in sequence, and at least part of the orthographic projection of the first touch electrode on the array substrate is located outside the orthographic projection of the first inorganic packaging layer on the array substrate.

[0011] In a possible implementation, the first touch electrode further includes a second touch trace segment extending in a second direction, the second touch trace segment being electrically connected to the first touch trace segment, and at least a part of the orthographic projection of the second touch trace segment on the array substrate is located between the orthographic projections of adjacent isolation structures on the array substrate, the second direction intersecting the first direction;

[0012] Preferably, along the first direction, the width range of the orthographic projection of the second touch trace segment on the array substrate is 5 μm - 15 μm;

[0013] Preferably, along the second direction, the width range of the orthographic projection of the first touch trace segment on the array substrate is 5 μm - 15 μm;

[0014] Preferably, the minimum distance between the orthographic projection of the side of the first touch trace segment close to the isolation structure on the array substrate and the orthographic projection of the isolation structure on the array substrate is 10 μm - 30 μm;

[0015] Preferably, the minimum distance between the orthographic projection of the side of the second touch trace segment close to the isolation structure on the array substrate and the orthographic projection of the isolation structure on the array substrate is 10 μm - 30 μm;

[0016] Preferably, the second direction is perpendicular to the first direction.

[0017] In a possible implementation, the isolation structures arranged along the second direction are electrically connected by a first connection trace;

[0018] Preferably, some of the isolation structures arranged along the first direction are electrically connected by a second connection trace, the first direction intersecting the second direction;

[0019] Preferably, the first direction is perpendicular to the second direction;

[0020] Preferably, the display panel further includes a light-emitting sub-pixel located in the isolation opening, the light-emitting sub-pixel being electrically connected to the isolation structure; the isolation structure encloses an isolation opening, the isolation openings corresponding to the light-emitting sub-pixels one by one, and the orthographic projection of the light-emitting sub-pixel on the array substrate is located within the orthographic projection range of the corresponding isolation opening on the array substrate;

[0021] In the first mode, the isolation structure is used to provide a power signal for the light emission of the light-emitting sub-pixel;

[0022] In the second mode, the isolation structure is alternatively used to access a touch driving signal or to output a touch sensing signal.

[0023] In a possible implementation, the array substrate includes a substrate, and along a direction away from the substrate, the array substrate further includes a first metal layer, a second metal layer, a third metal layer and a fourth metal layer in sequence;

[0024] Preferably, the first connecting wire and / or the second connecting wire are respectively located in the same film layer or different film layers among the first metal layer, the second metal layer, the third metal layer and the fourth metal layer;

[0025] Preferably, the first connecting wiring and the second connecting wiring are arranged on the same layer;

[0026] Preferably, an insulating layer is provided between the first metal layer and the second metal layer, between the second metal layer and the third metal layer, and between the third metal layer and the fourth metal layer;

[0027] Preferably, along a direction away from the substrate, a via is formed on the insulating layer, and the first connecting wire, the second connecting wire and the isolation structure are electrically connected through the via.

[0028] In a possible implementation, the display panel further includes a first electrode layer, a light-emitting functional layer, and a second electrode layer which are sequentially arranged on one side of the array substrate;

[0029] The light-emitting sub-pixel comprises a first electrode located in the first electrode layer, a second electrode located in the second electrode layer, and a light-emitting portion located in the light-emitting functional layer, the second electrode is located on a side of the first electrode away from the array substrate, the light-emitting portion is located between the second electrode and the first electrode; the second electrode is electrically connected to the isolation structure;

[0030] Preferably, the first electrode layer further includes the first connecting wire and / or the second connecting wire;

[0031] Preferably, the display panel further comprises a pixel defining layer located at one side of the array substrate, the conductive isolation layer is located at a side of the pixel defining layer away from the array substrate, the pixel defining layer comprises a pixel opening exposing at least a portion of the first electrode, the orthographic projection of the isolation structure on the array substrate is located between the orthographic projections of two adjacent pixel openings on the array substrate, and the orthographic projection of the pixel opening on the array substrate is located within the orthographic projection of the isolation opening on the array substrate;

[0032] Preferably, along a direction perpendicular to the array substrate, a via hole is formed on the pixel defining layer, and the first connecting wire, the second connecting wire and the isolation structure are electrically connected through the via hole;

[0033] Preferably, the first electrode includes an anode;

[0034] Preferably, the second electrode includes a cathode.

[0035] In a possible implementation manner, the isolation structure includes a first isolation portion and a second isolation portion that are sequentially stacked in a direction away from the array substrate, and a positive projection of the first isolation portion on the array substrate is located within a positive projection of the second isolation portion on the array substrate.

[0036] In a possible implementation manner, the second electrode is electrically connected to the first isolation portion; or the isolation structure further includes a third isolation portion located on a side of the first isolation portion facing the array substrate, and the second electrode is electrically connected to the third isolation portion;

[0037] Preferably, the material of the third isolation portion includes molybdenum metal; and / or the material of the first isolation portion includes aluminum metal; and / or the material of the second isolation portion includes a titanium metal layer.

[0038] In a possible implementation manner, the present application further provides a method for manufacturing a display panel, and the display panel includes a first mode and a second mode; the method includes:

[0039] Providing an array substrate;

[0040] Forming a conductive isolation layer on one side of the array substrate, the conductive isolation layer includes a plurality of isolation structures and electrode traces located between the isolation structures, the isolation structures are insulated from adjacent electrode traces, and at least part of the electrode traces are first touch electrodes;

[0041] One of the isolation structure and an adjacent first touch electrode is used to access a touch driving signal, and the other of the isolation structure and the adjacent first touch electrode is used to output a touch sensing signal.

[0042] In a possible implementation manner, the present application further provides an electronic device, and the electronic device includes the display panel described in the present application.

[0043] Compared with the prior art, the present application has the following beneficial effects:

[0044] A display panel, a method for manufacturing the display panel, and an electronic device provided by the present application. By providing a plurality of isolation structures and a plurality of first touch electrodes on the same layer on one side of the array substrate, in the first mode, the isolation structure is used to drive the light-emitting sub-pixels to emit light, and in the second mode, the isolation structure is reused as a second touch electrode. In this way, the thickness of the touch film layer of the display panel can be reduced, so that the thickness of the display panel can be reduced, and it is easier to achieve the goal of making the display panel thinner and lighter. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required for the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0046] Figure 1 A cross-sectional view of a display panel in the related art provided by an embodiment of the present application;

[0047] Figure 2 A cross-sectional view of a display panel provided by an embodiment of the present application;

[0048] Figure 3 A top view of a display panel provided by an embodiment of the present application;

[0049] Figure 4 A top view of a display panel provided by an embodiment of the present application;

[0050] Figure 5 Provided by an embodiment of the present application Figure 4 One of the cross-sectional views at C-C;

[0051] Figure 6 Provided by an embodiment of the present application Figure 4 One of the cross-sectional views at C-C;

[0052] Figure 7 Provided by an embodiment of the present application Figure 4 One of the cross-sectional views at C-C;

[0053] Figure 8 Provided by an embodiment of the present application Figure 4 One of the cross-sectional views at C-C;

[0054] Figure 9 Provided by an embodiment of the present application Figure 4 One of the cross-sectional views at C-C;

[0055] Figure 10Schematic cross-sectional view of the isolation structure provided by the embodiment of the present application, which is a three-layer structure;

[0056] Figure 11 Schematic cross-sectional view of the display panel provided by the embodiment of the present application, which further includes a packaging layer;

[0057] Figure 12 Second schematic cross-sectional view of the display panel provided by the embodiment of the present application;

[0058] Figure 13 Schematic flow chart of a method for manufacturing a display panel provided by the embodiment of the present application;

[0059] Figure 14 Schematic cross-sectional view of forming a first electrode on an array substrate provided by the embodiment of the present application;

[0060] Figure 15 Schematic cross-sectional view of forming a pixel defining layer on the side of the first electrode layer away from the array substrate provided by the embodiment of the present application;

[0061] Figure 16 Schematic cross-sectional view of forming an isolation structure and a first touch electrode on the side of the pixel defining layer away from the array substrate provided by the embodiment of the present application.

[0062] Reference numerals: 1, array substrate; 101, substrate; 102, buffer layer; 103, gate insulating layer; 104, capacitive dielectric layer; 105, interlayer insulating layer; 106, first planarization layer; 107, second planarization layer; 108, semiconductor layer; 109, first metal layer; 110, second metal layer; 111, third metal layer; 112, fourth metal layer; 2, touch emission electrode; 3, touch receiving electrode; 4, touch insulating layer; 5, optical adhesive layer; 6, pixel defining layer; 61, pixel opening; 7, conductive isolation layer; 71, isolation structure; 411, first isolation part; 712, second isolation part; 713, third isolation part; 72, first touch electrode; 721, first touch trace segment; 722, second touch trace segment; 8, first electrode; 9, light emitting part; 10, second electrode; 11, isolation opening; 12, light emitting sub-pixel; 13, first connection trace; 14, second touch electrode; 15, second connection trace; 16, packaging layer; 161, first inorganic packaging layer; 162, organic packaging layer; 163, second inorganic packaging layer. Detailed implementation manners

[0063] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are some, but not all, of the embodiments of this application. The components of the embodiments of this application usually described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.

[0064] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of this application that is claimed, but merely represents selected embodiments of this application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in this application without creative efforts fall within the scope of protection of this application.

[0065] It should be noted that: Similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0066] In the description of this application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the inventive product is customarily placed during use. It is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation of this application. In addition, the terms "first", "second", "third", etc. are only used for descriptive distinction and cannot be construed as indicating or implying relative importance.

[0067] It should be noted that, without conflict, the different features in the embodiments of this application can be combined with each other.

[0068] Please refer to Figure 1 , in the related art, the display panel includes an array substrate 1, a packaging layer on one side of the array substrate 1, a touch emission electrode 2 on the side of the packaging layer away from the array substrate 1, a touch insulation layer 4 on the side of the touch emission electrode 2 away from the array substrate 1, a touch reception electrode 3 on the side of the touch insulation layer 4 away from the array substrate 1, and an optical adhesive layer 5 on the side of the touch reception electrode 3 away from the array substrate 1. Among them, one mask plate is required to form each of the touch emission electrode 2, the touch insulation layer 4, the touch reception electrode 3, and the optical adhesive layer 5. Therefore, at least four mask plates are required to set the touch film layer of this display panel. In this way, not only is the cost of this display panel relatively high, but also the thickness of this display panel is relatively thick, and it is not easy to achieve the goal of making the display panel thinner and lighter.

[0069] In view of this, the present embodiment provides a solution that can make the thickness of the display panel thinner and the cost lower. The solution provided by the present embodiment is described in detail below.

[0070] See also Figure 2 This embodiment provides a display panel, which includes an array substrate 1, a conductive isolation layer 7 and a light-emitting sub-pixel 12.

[0071] The conductive isolation layer 7 is located on one side of the array substrate 1, and the conductive isolation layer 7 includes multiple isolation structures 71 and electrode routing located between the isolation structures 71, at least part of the electrode routing is a first touch electrode 72, the isolation structure 71 encloses an isolation opening 11, and there is a spacing between the isolation structure 71 and the adjacent first touch electrode 72, and the isolation structure and the adjacent electrode routing are insulated from each other, that is, the isolation structure 71 and the first touch electrode 72 are insulated from each other.

[0072] One of the isolation structure 71 and the adjacent first touch electrode 72 is used to receive a touch driving signal, and the other of the isolation structure 71 and the adjacent first touch electrode 72 is used to output a touch sensing signal.

[0073] The light-emitting sub-pixel 12 is located in the isolation opening 11, the isolation opening 11 corresponds to the light-emitting sub-pixel 12 one by one, the orthographic projection of the light-emitting sub-pixel 12 on the array substrate 1 is located within the orthographic projection range of the corresponding isolation opening 11 on the array substrate 1, and the light-emitting sub-pixel 12 is electrically connected to the isolation structure 71.

[0074] The display panel further includes a first electrode layer, a light-emitting functional layer, and a second electrode layer sequentially arranged on one side of the array substrate 1, the first electrode layer includes a plurality of first electrodes 8 arranged at intervals, the light-emitting sub-pixel 12 may be a red sub-pixel, a green sub-pixel, or a blue sub-pixel, the light-emitting sub-pixel 12 includes a first electrode 8 located in the first electrode layer, a second electrode 10 located in the second electrode layer, and a light-emitting portion 9 located in the light-emitting functional layer, the second electrode 10 is located on a side of the first electrode 8 away from the array substrate 1, the light-emitting portion 9 is located between the second electrode 10 and the first electrode 8, and the second electrode 10 is electrically connected to the isolation structure 71. Among them, the first electrode 8 is an anode, and the second electrode 10 is a cathode.

[0075] The display panel further includes a pixel defining layer 6 located on one side of the array substrate 1. A conductive isolation layer 7 is located on the side of the pixel defining layer 6 away from the array substrate 1. The pixel defining layer 6 includes a pixel opening 61 exposing at least a part of the first electrode 8. The orthographic projection of the isolation structure 71 on the array substrate 1 is located between the orthographic projections of two adjacent pixel openings 61 on the array substrate 1. The orthographic projection of the pixel opening 61 on the array substrate 1 is located within the orthographic projection of the isolation opening 11 on the array substrate 1. At least a part of the second electrode 10 extends from within the pixel opening 61 to the side of the pixel defining layer 6 away from the array substrate 1 and is in electrical contact with the isolation structure 71.

[0076] The first mode is the display mode. In the first mode, the isolation structure 71 is used to provide a power signal to the light-emitting sub-pixel 12. That is, when the display panel is in the display mode and it is necessary to light up the light-emitting sub-pixel 12, the isolation structure 71 is conducted with the second electrode 10, and the isolation structure 71, the second electrode 10, and the first electrode 8 are used as driving electrodes to drive the light-emitting sub-pixel 12 to emit light.

[0077] The second mode is the touch control mode. In the second mode, the isolation structure 71 is alternatively used to access a touch control driving signal or to output a touch sensing signal.

[0078] When the display panel is in the touch control mode, the isolation structure 71 is conducted with the second electrode 10, and the isolation structure 71 and the second electrode 10 are multiplexed as the second touch electrode 14. When the first touch electrode 72 is a touch receiving electrode, the second touch electrode 14 is a touch transmitting electrode. When the first touch electrode 72 is a touch transmitting electrode, the second touch electrode 14 is a touch receiving electrode. The first touch electrode 72 and the second touch electrode 14 can realize the touch control function of the display panel.

[0079] Specifically, for example, a multiplexing control circuit can be set. A switch can be set on the multiplexing control circuit. When the voltage signal of the light-emitting control signal line (EM) of the display panel is high, the switch is electrically connected to a pin of the chip. At this time, the multiplexing control circuit is used to switch the isolation structure 71 to be electrically connected to the pixel circuit (such as the ground terminal of the pixel circuit) in the first mode, so as to control the second electrode 10 electrically connected to the isolation structure 71 to cooperate with the first electrode 8 to drive the light-emitting sub-pixel to emit light.

[0080] When the voltage signal of the light-emitting control signal line (EM) of the display panel is low, the switch is electrically connected to another pin of the chip. At this time, the multiplexing control circuit is further configured to switch the isolation structure 71 to be connected to the touch circuit in the second mode, so that the isolation structure 71 is alternatively used to access the touch driving signal or to output the touch sensing signal. That is, when the isolation structure 71 and the corresponding second electrode 10 electrically connected thereto are used to access the touch driving signal, the first touch electrode 72 is used to output the touch sensing signal; when the isolation structure 71 and the corresponding second electrode 10 electrically connected thereto are used to output the touch sensing signal, the first touch electrode 72 is used to access the touch driving signal, so as to implement the touch function of the display panel.

[0081] While forming the isolation structure 71, the first touch electrode 72 is formed. In the touch mode, the isolation structure 71 can also be multiplexed as the second touch electrode 14. Thus, compared with the related art in which at least four mask plates are required to set the touch film layer, the mask plate for setting the touch film layer in this embodiment can be reduced, thereby reducing the manufacturing cost of the display panel. In addition, compared with the related art in which the touch electrodes are located in different layers and the touch insulating layer 4 is required to separate the touch electrodes in different layers, resulting in a relatively thick display panel in the related art, in this embodiment, the first touch electrode 72 and the isolation structure 71 multiplexed as the second touch electrode 14 are arranged in the same layer, thereby greatly reducing the thickness of the display panel.

[0082] Based on the above design, in this embodiment, a plurality of isolation structures 71 and a plurality of first touch electrodes 72 are arranged in the same layer on one side of the array substrate 1. In the first mode, the isolation structure 71 is used to drive the light-emitting sub-pixel 12 to emit light. In the second mode, the isolation structure 71 is multiplexed as the second touch electrode 14. Thus, the thickness of the touch film layer of the display panel can be reduced, thereby reducing the thickness of the display panel, and further making it easier to achieve the goal of thinning the display panel, and the cost of the display panel can also be reduced.

[0083] In a possible implementation manner, please refer to Figure 3 , the first touch electrode 72 includes a first touch trace segment 721 extending along the first direction A, and at least a part of the orthographic projection of the first touch trace segment 721 on the array substrate 1 is located between the orthographic projections of adjacent isolation structures 71 on the array substrate 1.

[0084] The first direction A may be the row arrangement direction or the column arrangement direction of the isolation structure 71. In this embodiment, the first direction A is taken as an example of the row arrangement direction of the isolation structure 71. A plurality of first touch trace segments 721 all extend along the first direction A, and the plurality of first touch trace segments 721 may be arranged in parallel. The orthographic projection of each first touch trace segment 721 on the array substrate 1 is located between the orthographic projections of two rows of isolation structures 71 arranged along the first direction A on the array substrate 1.

[0085] In a possible implementation manner, please refer to again Figure 3 , the first touch electrode 72 further includes a second touch trace segment 722 extending along the second direction B. The second touch trace segment 722 is electrically connected to the first touch trace segment 721. At least a part of the orthographic projection of the second touch trace segment 722 on the array substrate 1 is located between the orthographic projections of adjacent isolation structures 71 on the array substrate 1. The second direction B intersects the first direction A. Preferably, the second direction B is perpendicular to the first direction A.

[0086] The second direction B may be the row arrangement direction or the column arrangement direction of the isolation structure 71. In this embodiment, the second direction B is taken as an example of the column arrangement direction of the isolation structure 71. A plurality of second touch trace segments 722 all extend along the second direction B. The plurality of second touch trace segments 722 may be arranged in parallel. The orthographic projection of each second touch trace segment 722 on the array substrate 1 is located between the orthographic projections of two columns of partial isolation structures 71 arranged along the second direction B on the array substrate 1.

[0087] One second touch trace segment 722 may be electrically connected to a plurality of first touch trace segments 721 in the second direction B. One first touch trace segment 721 may be electrically connected to a plurality of second touch trace segments 722 in the first direction A. The plurality of first touch trace segments 721 and the plurality of second touch trace segments 722 may be connected to each other to form a mesh structure. The mutually electrically connected first touch trace segments 721 and second touch traces form the first touch electrode 72. A plurality of first touch electrodes 72 are arranged along the second direction B. In this way, the first touch electrode 72 formed by connecting the plurality of first touch trace segments 721 and the plurality of second touch trace segments 722 to each other to form a mesh structure can increase the area of the first touch electrode 72, thereby increasing the touch sensitivity of the display panel.

[0088] Preferably, please refer to again Figure 3 , along the first direction A, the width L1 of the orthographic projection of the second touch trace segment 722 on the array substrate 1 ranges from 5 μm to 15 μm. For example, the width L1 may be 5 μm, 7 μm, 10 μm, 12 μm, 14 μm, 15 μm, etc. If the width L1 is set too large, the distance between the second touch trace segment 722 and the isolation structure 71 will be reduced, thereby increasing the difficulty of etching the second touch trace segment 722 and the isolation structure 71. If the width L1 is set too small, the touch sensitivity of the display panel will be reduced. Therefore, reasonably setting the width L1 can not only make it easier to etch the second touch trace segment 722 on the conductive isolation layer 7, but also not affect the touch sensitivity of the display panel.

[0089] Preferably, please refer to again Figure 3, along the second direction B, the width L2 of the orthographic projection of the first touch trace segment 721 on the array substrate 1 ranges from 5 μm to 15 μm. For example, the width L2 can be 5 μm, 7 μm, 10 μm, 12 μm, 14 μm, 15 μm, etc. If the width L2 is set too large, the spacing between the first touch trace segment 721 and the isolation structure 71 will be reduced, thereby increasing the difficulty of etching the first touch trace segment 721 and the isolation structure 71; if the width L2 is set too small, the touch sensitivity of the display panel will be reduced. Therefore, reasonably setting the width L2 can not only make it easier to etch the first touch trace segment 721 on the conductive isolation layer 7, but also not affect the touch sensitivity of the display panel.

[0090] Preferably, please refer to again Figure 3 , the minimum distance D1 between the orthographic projection of the side of the first touch trace segment 721 close to the isolation structure 71 on the array substrate 1 and the orthographic projection of the isolation structure 71 on the array substrate 1 ranges from 10 μm to 30 μm. For example, the minimum distance D1 can be 10 μm, 12 μm, 15 μm, 20 μm, 25 μm, 28 μm, 30 μm, etc. If the minimum distance D1 is set too small, the difficulty of etching the first touch trace segment 721 will increase, and there is even a risk of short circuit between the first touch trace segment 721 and the isolation structure 71; if the minimum distance D1 is set too small, the area of the first touch trace segment 721 will be reduced, thereby reducing the area of the first touch trace, and ultimately reducing the touch sensitivity of the display panel. Therefore, reasonably setting the minimum distance D1 can not only make it easier to etch the first touch trace segment 721 on the conductive isolation layer 7, but also not affect the touch sensitivity of the display panel.

[0091] Preferably, please refer to again Figure 3 , the minimum distance D2 between the orthographic projection of the side of the second touch trace segment 722 close to the isolation structure 71 on the array substrate 1 and the orthographic projection of the isolation structure 71 on the array substrate 1 ranges from 10 μm to 30 μm. For example, the minimum distance D2 can be 10 μm, 12 μm, 15 μm, 20 μm, 25 μm, 28 μm, 30 μm, etc. If the minimum distance D2 is set too small, the difficulty of etching the second touch trace segment 722 will increase, and there is even a risk of short circuit between the second touch trace segment 722 and the isolation structure 71; if the minimum distance D2 is set too small, the area of the second touch trace segment 722 will be reduced, thereby reducing the area of the first touch electrode 72, and ultimately reducing the touch sensitivity of the display panel. Therefore, reasonably setting the minimum distance D1 can not only make it easier to etch the second touch trace segment 722 on the conductive isolation layer 7, but also not affect the touch sensitivity of the display panel.

[0092] In a possible implementation manner, please refer to Figure 4, the isolation structures 71 arranged along the second direction B are electrically connected through the first connection trace 13.

[0093] All the isolation structures 71 arranged along the second direction B can be electrically connected through the first connection trace 13. The isolation structures 71 arranged along the second direction B are respectively electrically connected to the corresponding second electrodes 10. A column of isolation structures 71 arranged along the second direction B and the second electrodes 10 of the corresponding column of light-emitting sub-pixels 12 form the second touch electrode 14. In this way, the area of the second touch electrode 14 can be greatly increased, thereby greatly improving the touch sensitivity of the display panel.

[0094] Preferably, please refer to again Figure 4 , some of the isolation structures 71 arranged along the first direction A are electrically connected through the second connection trace 15. Multiple columns of isolation structures 71 are electrically connected to each other. Multiple columns of isolation structures 71 and the second electrodes 10 of the corresponding multiple columns of light-emitting sub-pixels 12 are electrically connected to form the second touch electrode 14. In this way, the area of the second touch electrode 14 can be further increased, thereby further improving the touch sensitivity of the display panel.

[0095] In a possible implementation manner, please refer to Figure 5 , the array substrate 1 includes a substrate 101. Along the direction D away from the substrate 101, the array substrate 1 further includes a first metal layer 109, a second metal layer 110, a third metal layer 111, and a fourth metal layer 112 in sequence.

[0096] The array substrate 1 further includes a buffer layer 102 on one side of the substrate 101 and a semiconductor layer 108 on the side of the buffer layer 102 away from the substrate 101. The semiconductor layer 108 includes a source region, a drain region, and a channel region. The first metal layer 109 includes a gate and a first capacitor plate. The second metal layer 110 includes a second capacitor plate. The first capacitor plate and the second capacitor plate form a capacitor. The third metal layer 111 includes a drain and a source. The drain is electrically connected to the drain region, and the source is electrically connected to the source region. The gate, the source, and the drain form a switching device. The metal trace of the fourth metal layer 112 is connected to the drain, and this metal trace of the fourth metal layer 112 is further connected to the first electrode 8.

[0097] Preferably, insulating layers are provided between the first metal layer 109 and the second metal layer 110, between the second metal layer 110 and the third metal layer 111, and between the third metal layer 111 and the fourth metal layer 112. Along the direction D away from the substrate 101, vias are formed in the insulating layers. The first connection trace 13, the second connection trace 15, and the isolation structure 71 are all electrically connected through the vias.

[0098] The insulating layer includes a gate insulating layer 103, a capacitor dielectric layer 104, an interlayer insulating layer 105, and a first planarization layer 106. The gate insulating layer 103 is located between the buffer layer 102 and the first metal layer 109. The capacitor dielectric layer 104 is located between the first metal layer 109 and the second metal layer 110. The interlayer insulating layer 105 is located between the second metal layer 110 and the third metal layer 111. The first planarization layer 106 is located between the third metal layer 111 and the fourth metal layer 112. The semiconductor layer 108 is located between the buffer layer 102 and the gate insulating layer 103. A second planarization layer 107 is further provided between the fourth metal layer 112 and the anode.

[0099] The first connection trace 13 and / or the second connection trace 15 are respectively located in the same film layer or different film layers among the first metal layer 109, the second metal layer 110, the third metal layer 111, and the fourth metal layer 112.

[0100] In the first embodiment, please refer to Figure 5 , the first metal layer 109 includes the first connection trace 13 and / or the second connection trace 15. In this embodiment, it is taken as an example that the first metal layer 109 includes the first connection trace 13 and the second connection trace 15. When forming the first metal layer 109, the first connection trace 13 and the second connection trace 15 are formed, and vias are sequentially opened in the pixel defining layer 6, the second planarization layer 107, the first planarization layer 106, the interlayer insulating layer 105, and the capacitor dielectric layer 104. The isolation structure 71 is electrically connected to the first connection trace 13 and the second connection trace 15 through the vias. In this way, there is no need to specially provide the first connection trace 13 and the second connection trace 15, thereby reducing the cost of providing the first connection trace 13 and the second connection trace 15.

[0101] In the second embodiment, please refer to Figure 6 , the second metal layer 110 includes the first connection trace 13 and / or the second connection trace 15. In this embodiment, it is taken as an example that the second metal layer 110 includes the first connection trace 13 and the second connection trace 15. When forming the second metal layer 110, the first connection trace 13 and the second connection trace 15 are formed, and vias are sequentially opened in the pixel defining layer 6, the second planarization layer 107, the first planarization layer 106, and the interlayer insulating layer 105. The isolation structure 71 is electrically connected to the first connection trace 13 and the second connection trace 15 through the vias. In this way, there is no need to specially provide the first connection trace 13 and the second connection trace 15, thereby reducing the cost of providing the first connection trace 13 and the second connection trace 15.

[0102] In the third embodiment, please refer to Figure 7, the third metal layer 111 includes the first connection trace 13 and / or the second connection trace 15. In this embodiment, the third metal layer 111 including the first connection trace 13 and the second connection trace 15 is taken as an example. When forming the third metal layer 111, the first connection trace 13 and the second connection trace 15 are formed, and vias are sequentially opened in the pixel defining layer 6, the second planarization layer 107, and the first planarization layer 106. The isolation structure 71 is electrically connected to the first connection trace 13 and the second connection trace 15 through the vias. In this way, there is no need to specifically provide the first connection trace 13 and the second connection trace 15, thereby reducing the cost of providing the first connection trace 13 and the second connection trace 15.

[0103] In the fourth embodiment, please refer to Figure 8 , the fourth metal layer 112 includes the first connection trace 13 and / or the second connection trace 15. In this embodiment, the fourth metal layer 112 including the first connection trace 13 and the second connection trace 15 is taken as an example. When forming the fourth metal layer 112, the first connection trace 13 and the second connection trace 15 are formed, and vias are sequentially opened in the pixel defining layer 6 and the second planarization layer 107. The isolation structure 71 is electrically connected to the first connection trace 13 and the second connection trace 15 through the vias. In this way, there is no need to specifically provide the first connection trace 13 and the second connection trace 15, thereby reducing the cost of providing the first connection trace 13 and the second connection trace 15.

[0104] In the fifth embodiment, please refer to Figure 9 , the first electrode layer includes the first connection trace 13 and / or the second connection trace 15. In this embodiment, the first electrode layer including the first connection trace 13 and the second connection trace 15 is taken as an example. When forming the first electrode layer, the first connection trace 13 and the second connection trace 15 are formed, and a via is opened in the pixel defining layer 6. The isolation structure 71 is electrically connected to the first connection trace 13 and the second connection trace 15 through the via. In this way, there is no need to specifically provide the first connection trace 13 and the second connection trace 15, thereby reducing the cost of providing the first connection trace 13 and the second connection trace 15.

[0105] The first connection trace 13 and the second connection trace 15 can be arranged on different layers. For example, the first connection trace 13 is located on the first metal layer 109, and the second connection trace 15 is located on the second metal layer 110. Another example is that the first connection trace 13 is located on the fourth metal layer 112, and the second connection trace 15 is located on the first electrode layer, etc. The first connection trace 13 or the second connection trace 15 at different positions can also be located on different metal layers. For example, the first connection trace 13 at a certain position is located on the fourth metal layer 112, and the first connection trace 13 at another position is located on the first electrode layer; the second connection trace 15 at a certain position is located on the third metal layer 111, and the second connection trace 15 at another position is located on the second metal layer 110, etc. In this way, the flexibility of the position setting of the first connection trace 13 and the second connection trace 15 is increased, so that the positions of the first connection trace 13 and the second connection trace 15 can be set according to different needs.

[0106] Preferably, the first connection trace 13 and the second connection trace 15 are arranged on the same layer. The first connection trace 13 and the second connection trace 15 are arranged on the same metal layer. For example, both the first connection trace 13 and the second connection trace 15 are arranged on the first electrode layer. In this way, it is more convenient to set the first connection trace 13 and the second connection trace 15, and the cost of setting the first connection trace 13 and the second connection trace 15 is lower.

[0107] In a possible implementation manner, please refer to again Figure 2 , the isolation structure 71 includes a first isolation portion 711 and a second isolation portion 712 that are sequentially stacked along the direction D away from the array substrate 1. The orthographic projection of the first isolation portion 711 on the array substrate 1 is located within the orthographic projection of the second isolation portion 712 on the array substrate 1.

[0108] Since the second isolation portion 712 is located on the side of the first isolation portion 711 away from the array substrate 1, and the lateral width of the second isolation portion 712 is greater than the lateral width of the first isolation portion 711, the second isolation portion 712 will disconnect the light-emitting portion 9 and the second electrode layer at the isolation structure 71. In this way, the isolation structure 71 formed by the first isolation portion 711 and the second isolation portion 712 can more easily independently package each light-emitting sub-pixel 12.

[0109] In a possible implementation manner, please refer to Figure 10, the second electrode 10 is electrically connected to the first isolation part 711; or the isolation structure 71 further includes a third isolation part 713 located on the side of the first isolation part 711 facing the array substrate 1, and the second electrode 10 is electrically connected to the third isolation part 713. Among them, the material of the third isolation part 713 includes molybdenum metal; and / or the material of the first isolation part 711 includes aluminum metal; and / or the material of the second isolation part 712 includes a titanium metal layer. In this way, when the isolation structure 71 partitions the second electrode layer into the second electrode 10, the second electrode 10 is more likely to be electrically connected to the first isolation part 711 or the third isolation part 713.

[0110] Preferably, please refer to Figure 11 , the display panel further includes a packaging layer 16 located on the side of the conductive isolation layer 7 away from the array substrate 1. The packaging layer 16 can prevent external water and oxygen from entering the light-emitting sub-pixels 12 and play a role in protecting the light-emitting sub-pixels 12.

[0111] Preferably, please refer to again Figure 11 , along the direction D away from the array substrate 1, the packaging layer 16 includes a first inorganic packaging layer 161, an organic packaging layer 162, and a second inorganic packaging layer 163 stacked in sequence. The orthographic projection of the first touch electrode 72 on the array substrate 1 is at least partially located outside the orthographic projection of the first inorganic packaging layer 161 on the array substrate 1.

[0112] The organic packaging layer 162 fills the gap between the first touch electrode 72 and the isolation structure 71 and acts as an insulating layer between the first touch electrode 72 and the isolation structure 71 to ensure that there is no electrical connection between the first touch electrode 72 and the isolation structure 71. The isolation structure 71 includes a side close to the array substrate 1, a side away from the array substrate 1, and a side surface. The first inorganic packaging layer 161 is disconnected on the side of the isolation structure 71 away from the array substrate 1, and the first inorganic packaging layer 161 extends from the side surface of the isolation structure 71 close to the light-emitting sub-pixels 12 to the side of the isolation structure 71 away from the array substrate 1. The first inorganic packaging layer 161 separately encapsulates the plurality of light-emitting sub-pixels 12, making the light-emitting sub-pixels 12 independent of each other, thereby improving the reliability of the packaging and further optimizing the optical performance of the display panel.

[0113] Please refer to Figure 12 , the first touch electrode 72 includes a side close to the array substrate 1, a side away from the array substrate 1, and a side surface. By means of dry etching, the side of the isolation structure 71 close to the first touch electrode 72 can be etched into a vertical surface, and the side surface of the first touch electrode 72 can be etched into a vertical surface. Specifically, the side of the isolation structure 71 close to the light-emitting sub-pixels can be etched into an eaves structure by wet etching first, and then the first touch electrode 72 can be etched by dry etching. In this way, the first touch electrode 72 and the isolation structure 71 can be set to different shapes, so as to better meet the needs of different customers.

[0114] In summary, in the present application, a plurality of isolation structures 71 and a plurality of first touch electrodes 72 are provided on the same layer on one side of the array substrate 1. In the first mode, the isolation structure 71 is used to drive the light-emitting sub-pixels 12 to emit light. In the second mode, the isolation structure 71 is multiplexed as the second touch electrode 14. In this way, the thickness of the touch film layer of the display panel can be reduced, so that the thickness of the display panel can be reduced, and it is easier to achieve the goal of making the display panel thinner and lighter. At the same time, the cost of the display panel can be reduced.

[0115] In a possible implementation manner, please refer to Figure 13 , the present application further provides a method for manufacturing a display panel, and the method includes:

[0116] S10: Provide an array substrate 1;

[0117] S11: Form a conductive isolation layer 7 on one side of the array substrate 1. The conductive isolation layer 7 includes a plurality of isolation structures 71 and electrode traces located between the isolation structures 71. The isolation structure 71 is insulated from the adjacent electrode traces, and at least part of the electrode traces are the first touch electrodes 72.

[0118] The isolation structures 71 enclose an isolation opening 11. One of the isolation structure 71 and the adjacent first touch electrode 72 is used to access the touch driving signal, and the other of the isolation structure 71 and the adjacent first touch electrode 72 is used to output the touch sensing signal.

[0119] Please refer to Figure 14 , form a first electrode layer on one side of the array substrate 1. The first electrode layer includes a plurality of first electrodes 8 arranged at intervals.

[0120] Please refer to Figure 15 , form a pixel defining layer 6 on the side of the first electrode layer away from the array substrate 1. The pixel defining layer 6 includes a pixel opening 61 that exposes at least part of the first electrode 8.

[0121] Please refer to Figure 16 , form a conductive isolation layer 7 on the side of the pixel defining layer 6 away from the array substrate 1, and etch the conductive isolation layer 7 into a plurality of isolation structures 71 and a plurality of first touch electrodes 72. The isolation structures 71 enclose an isolation opening 11, and the orthographic projection of the pixel opening 61 on the array substrate 1 is located within the orthographic projection of the isolation opening 11 on the array substrate 1.

[0122] Inside the pixel aperture 61, a light-emitting portion 9 of the light-emitting sub-pixel 12 and a second electrode layer are sequentially formed in the direction D away from the array substrate 1. The isolation structure 71 separates the light-emitting portion 9 and the second electrode layer. After separation, the second electrode layer forms a plurality of second electrodes 10. At least a part of the second electrodes 10 extends from inside the pixel aperture 61 to the side of the pixel defining layer 6 away from the array substrate 1 and is in electrical contact with the isolation structure 71, finally forming a display panel as shown in Figure 2 the figure shown.

[0123] In the first mode, the isolation structure 71 is used to provide a power signal to the light-emitting sub-pixel 12. That is, when the display panel is in the display mode and it is necessary to light up the light-emitting sub-pixel 12, the isolation structure 71 is turned on with the second electrode 10. The isolation structure 71, the second electrode 10, and the first electrode 8 act as driving electrodes to drive the light-emitting sub-pixel 12 to emit light.

[0124] In the second mode, the isolation structure 71 is alternatively used to access a touch driving signal or to output a touch sensing signal.

[0125] When the display panel is in the touch mode, the isolation structure 71 is turned on with the second electrode 10. The isolation structure 71 and the second electrode 10 are multiplexed as the second touch electrode 14. When the first touch electrode 72 is a touch receiving electrode, the second touch electrode 14 is a touch transmitting electrode. When the first touch electrode 72 is a touch transmitting electrode, the second touch electrode 14 is a touch receiving electrode. The first touch electrode 72 and the second touch electrode 14 can implement the touch function of the display panel.

[0126] Specifically, for example, a multiplexing control circuit can be set. A switch can be set on the multiplexing control circuit. When the voltage signal of the light-emitting control signal line (EM) of the display panel is high, the switch is electrically connected to a pin of the chip. At this time, the multiplexing control circuit is used to switch the isolation structure 71 to be electrically connected to the pixel circuit (such as the ground terminal of the pixel circuit) in the first mode, so as to control the second electrode 10 electrically connected to the isolation structure 71 to cooperate with the first electrode 8 to drive the light-emitting sub-pixel to emit light.

[0127] When the voltage signal of the light-emitting control signal line (EM) of the display panel is low, the switch is electrically connected to another pin of the chip. At this time, the multiplexing control circuit is also used to switch the isolation structure 71 to be connected to the touch circuit in the second mode, so that the isolation structure 71 is alternatively used to access a touch driving signal or to output a touch sensing signal. That is, when the isolation structure 71 and the second electrode 10 electrically connected thereto are used to access a touch driving signal, the first touch electrode 72 is used to output a touch sensing signal; when the isolation structure 71 and the second electrode 10 electrically connected thereto are used to output a touch sensing signal, the first touch electrode 72 is used to access a touch driving signal to implement the touch function of the display panel.

[0128] While forming the isolation structure 71, a first touch electrode 72 is formed. In the touch mode, the isolation structure 71 can also be reused as the second touch electrode 14. Thus, compared with the related art solution that requires at least four mask plates to set the touch film layer, the mask plate for setting the touch film layer in this embodiment can be reduced, thereby reducing the cost of the display panel. In addition, compared with the related art solution where the touch electrode parts are on the same layer and the touch insulation layer 4 is required to separate the touch electrodes on different layers, in this embodiment, the first touch electrode 72 and the isolation structure 71 reused as the second touch electrode 14 are arranged on the same layer, thereby greatly reducing the thickness of the display panel.

[0129] In a possible implementation manner, the present application further provides an electronic device, and the electronic device includes the display panel in the present application. The electronic device may include a device with image processing capabilities, such as a server, a personal computer, a laptop computer, etc. Since the electronic device includes the display panel in the present application, the thickness of the electronic device is thinner and the cost is lower.

[0130] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0131] The above-described embodiments merely represent several implementation manners of the present invention, and the description thereof is relatively specific and detailed, but it cannot be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the invention patent should be subject to the appended claims.

Claims

1. A display panel, characterized in that, the display panel comprises: an array substrate; a conductive isolation layer located on one side of the array substrate, the conductive isolation layer comprising a plurality of isolation structures and electrode traces located between the isolation structures, the isolation structures being insulated from adjacent electrode traces, and at least part of the electrode traces being first touch electrodes; one of the isolation structure and an adjacent first touch electrode is used to access a touch driving signal, and the other of the isolation structure and the adjacent first touch electrode is used to output a touch sensing signal.

2. The display panel according to claim 1, characterized in that, the first touch electrode comprises a first touch trace segment extending in a first direction, and at least part of the orthographic projection of the first touch trace segment on the array substrate is located between the orthographic projections of adjacent isolation structures on the array substrate; Preferably, the display panel further comprises a packaging layer located on the side of the conductive isolation layer away from the array substrate; Preferably, along the direction away from the array substrate, the packaging layer comprises a first inorganic packaging layer, an organic packaging layer and a second inorganic packaging layer stacked in sequence, and at least part of the orthographic projection of the first touch electrode on the array substrate is located outside the orthographic projection of the first inorganic packaging layer on the array substrate.

3. The display panel according to claim 2, characterized in that, the first touch electrode further comprises a second touch trace segment extending in a second direction, the second touch trace segment being electrically connected to the first touch trace segment, and at least part of the orthographic projection of the second touch trace segment on the array substrate is located between the orthographic projections of adjacent isolation structures on the array substrate, the second direction intersecting the first direction; Preferably, along the first direction, the width range of the orthographic projection of the second touch trace segment on the array substrate is 5 μm - 15 μm; Preferably, along the second direction, the width range of the orthographic projection of the first touch trace segment on the array substrate is 5 μm - 15 μm; Preferably, the minimum distance between the orthographic projection of the side of the first touch trace segment close to the isolation structure on the array substrate and the orthographic projection of the isolation structure on the array substrate is 10 μm - 30 μm; Preferably, the minimum distance between the orthographic projection of the side of the second touch trace segment close to the isolation structure on the array substrate and the orthographic projection of the isolation structure on the array substrate is 10 μm - 30 μm; Preferably, the second direction is perpendicular to the first direction.

4. The display panel according to claim 1, characterized in that, the isolation structures arranged along the second direction are electrically connected by a first connection trace; Preferably, some of the isolation structures arranged along the first direction are electrically connected by a second connection trace, the first direction intersecting the second direction; Preferably, the first direction is perpendicular to the second direction; Preferably, the display panel further includes a light-emitting sub-pixel located in the isolation opening, and the light-emitting sub-pixel is electrically connected to the isolation structure; the isolation structure encloses to form the isolation opening, and the isolation openings correspond to the light-emitting sub-pixels one by one. The orthographic projection of the light-emitting sub-pixel on the array substrate is located within the orthographic projection range of the corresponding isolation opening on the array substrate; In the first mode, the isolation structure is configured to provide a power signal to the light-emitting sub-pixel; In the second mode, the isolation structure is alternatively configured to access a touch driving signal or to output a touch sensing signal.

5. The display panel according to claim 4, wherein, the array substrate includes a substrate, and along a direction away from the substrate, the array substrate further sequentially includes a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer; Preferably, the first connection trace and / or the second connection trace are respectively located in the same film layer or different film layers among the first metal layer, the second metal layer, the third metal layer, and the fourth metal layer; Preferably, the first connection trace and the second connection trace are arranged in the same layer; Preferably, an insulating layer is provided between the first metal layer and the second metal layer, between the second metal layer and the third metal layer, and between the third metal layer and the fourth metal layer; Preferably, along a direction away from the substrate, vias are formed in the insulating layer, and the first connection trace, the second connection trace, and the isolation structure are electrically connected through the vias; 6. The display panel according to claim 4, wherein, the display panel includes a first electrode layer, a light-emitting functional layer, and a second electrode layer sequentially arranged on one side of the array substrate; the light-emitting sub-pixel includes a first electrode located in the first electrode layer, a second electrode located in the second electrode layer, and a light-emitting portion located in the light-emitting functional layer. The second electrode is located on a side of the first electrode away from the array substrate, and the light-emitting portion is located between the second electrode and the first electrode; the second electrode is electrically connected to the isolation structure; Preferably, the first electrode layer further includes the first connection trace and / or the second connection trace; Preferably, the display panel further includes a pixel defining layer on one side of the array substrate, the conductive isolation layer is located on a side of the pixel defining layer away from the array substrate, the pixel defining layer includes a pixel opening exposing at least a part of the first electrode, the orthographic projection of the isolation structure on the array substrate is located between the orthographic projections of two adjacent pixel openings on the array substrate, and the orthographic projection of the pixel opening on the array substrate is located within the orthographic projection of the isolation opening on the array substrate; Preferably, along a direction perpendicular to the array substrate, vias are formed in the pixel defining layer, and the first connection trace, the second connection trace, and the isolation structure are electrically connected through the vias; Preferably, the first electrode includes an anode; Preferably, the second electrode includes a cathode.

7. The display panel according to claim 6, wherein, the isolation structure includes a first isolation portion and a second isolation portion which are sequentially stacked in a direction away from the array substrate, and a positive projection of the first isolation portion on the array substrate is located within a positive projection of the second isolation portion on the array substrate.

8. The display panel according to claim 7, wherein, the second electrode is electrically connected to the first isolation portion; or the isolation structure further includes a third isolation portion located on a side of the first isolation portion facing the array substrate, and the second electrode is electrically connected to the third isolation portion; Preferably, the material of the third isolation portion includes molybdenum metal; and / or the material of the first isolation portion includes aluminum metal; and / or the material of the second isolation portion includes a titanium metal layer.

9. A method for manufacturing a display panel, wherein, the method includes: providing an array substrate; forming a conductive isolation layer on one side of the array substrate, the conductive isolation layer includes a plurality of isolation structures and electrode traces located between the isolation structures, the isolation structures are insulated from adjacent electrode traces, and at least part of the electrode traces are first touch electrodes; one of the isolation structure and an adjacent first touch electrode is used to access a touch driving signal, and the other of the isolation structure and the adjacent first touch electrode is used to output a touch sensing signal.

10. An electronic device, wherein, the electronic device includes the display panel according to any one of claims 1-8.

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