Voltage measurement method, device and equipment of chip differential pin, and storage medium

Abstract

The invention provides a voltage measurement method and device for a chip differential pin, equipment and a storage medium, and the method comprises the steps: presetting a differential mode voltage threshold value and a common mode voltage threshold value, and collecting a comparison result between the differential mode voltage of a chip differential pin group and the voltage of the differential mode voltage threshold value; when the voltage high-low comparison result of the differential-mode voltage and the differential-mode voltage threshold value meets a preset differential-mode voltage comparison result, and the voltage high-low comparison result of the common-mode voltage and the common-mode voltage threshold value meets a preset common-mode voltage comparison result, the differential-mode pin group is switched to the differential-mode voltage threshold value, and the differential-mode pin group is switched to the differential-mode voltage when the voltage high-low comparison result of the differential-mode voltage and the common-mode voltage threshold value meets the preset common-mode voltage comparison result. The differential mode voltage threshold is determined as the actual differential mode voltage, and the common mode voltage threshold is determined as the actual common mode voltage, so that the actual voltage value of each differential pin in the differential pin group can be calculated according to the actual differential mode voltage and the actual common mode voltage, and the synchronous voltage measurement of each differential pin of the chip is realized. And the accuracy and the reliability of a voltage measurement result are improved.

Description

Technical Field

[0001] The present disclosure relates to automated test technologies, and in particular, to a method, apparatus, device, and storage medium for measuring the voltage of differential pins of a chip. Background Art

[0002] During the chip testing process, in order to visually display the voltage variation at the differential pins of the chip, a chip voltage waveform display software can be used to obtain the voltage values at the differential pins of the chip and draw the corresponding voltage waveforms.

[0003] Currently, the chip voltage waveform display software on the market usually collects the single-ended pin voltage values of the differential pin group of the chip at a fixed frequency, and calculates the voltage values of the other end pins by means of symmetric complementation. This measurement method can only ensure the accuracy of the single-ended pin voltage values, and there may be a certain difference between the voltage values of the other end pins and the actual voltage values. Summary of the Invention

[0004] In view of the above technical problems, embodiments of the present disclosure provide a method, apparatus, device, and storage medium for measuring the voltage of differential pins of a chip.

[0005] In one aspect of the embodiments of the present disclosure, a method for measuring the voltage of differential pins of a chip is provided, including:

[0006] Receiving voltage sampling data, where the voltage sampling data includes the comparison result of the differential mode voltage of the differential pin group to be measured and the differential mode voltage threshold, and the comparison result of the common mode voltage of the differential pin group and the common mode voltage threshold;

[0007] Verifying the voltage sampling data to determine whether the comparison result of the differential mode voltage and the differential mode voltage threshold is a preset differential mode voltage comparison result, and determining whether the comparison result of the common mode voltage and the common mode voltage threshold is a preset common mode voltage comparison result;

[0008] In response to the voltage sampling data passing the verification, determining the differential mode voltage threshold as the actual differential mode voltage value of the differential pin group, and determining the common mode voltage threshold as the actual common mode voltage value of the differential pin group;

[0009] Calculating the actual voltage values of each differential pin in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value.

[0010] Optionally, the differential mode voltage threshold includes a differential mode high voltage threshold and a differential mode low voltage threshold, and the common mode voltage threshold includes a common mode high voltage threshold and a common mode low voltage threshold;

[0011] In response to the voltage sampling data being verified, determining the differential mode voltage threshold as the actual differential mode voltage value of the differential pin group, and determining the common mode voltage threshold as the actual common mode voltage value of the differential pin group, comprises:

[0012] In response to the differential mode voltage being less than or equal to the differential mode low voltage threshold, determining the differential mode low voltage threshold as the actual differential mode voltage value;

[0013] In response to the differential mode voltage being greater than or equal to the differential mode high voltage threshold, determining the differential mode high voltage threshold as the actual differential mode voltage value;

[0014] In response to the common mode voltage being less than or equal to the common mode low voltage threshold, determining the common mode low voltage threshold as the actual common mode voltage value;

[0015] In response to the common mode voltage being greater than or equal to the common mode high voltage threshold, the common mode high voltage threshold is determined as the actual common mode voltage value.

[0016] Optionally, the receiving voltage sampling data includes:

[0017] Receiving the voltage sampling data at at least two voltage sampling moments;

[0018] The calculating the actual voltage value of each differential pin in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value includes:

[0019] Based on the actual differential mode voltage value and the actual common mode voltage value at the at least two voltage sampling moments, respectively calculating the actual voltage value of each differential pin in the differential pin group at the at least two voltage sampling moments;

[0020] The method further comprises:

[0021] Based on the actual voltage value of each differential pin at the at least two voltage sampling moments, a voltage waveform diagram of each differential pin is generated.

[0022] Optionally, the method further includes:

[0023] In response to the differential mode voltage being greater than the differential mode low voltage threshold and less than the differential mode high voltage threshold, lowering the differential mode high voltage threshold and raising the differential mode low voltage threshold according to a first preset adjustment step; sending the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold, so as to reacquire the voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold;

[0024] In response to the common-mode voltage being greater than the common-mode low voltage threshold and less than the common-mode high voltage threshold, the common-mode high voltage threshold is lowered and the common-mode low voltage threshold is raised according to a second preset adjustment step size; the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold are sent to re-acquire the voltage sampling data based on the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold.

[0025] Optionally, the method further includes:

[0026] In response to adjusting the differential-mode voltage threshold at the current voltage sampling moment, the differential-mode voltage threshold is restored to its initial value at the next voltage sampling moment;

[0027] In response to adjusting the common-mode voltage threshold at the current voltage sampling moment, the common-mode voltage threshold is restored to its initial value at the next voltage sampling moment.

[0028] Optionally, the method further includes:

[0029] Based on the differential-mode voltage verification rule in the configuration file, the actual differential-mode voltage value is verified to obtain a first test result of the actual differential-mode voltage value, where the first test result includes that the differential-mode voltage test passes or the differential-mode voltage test fails, and the differential-mode voltage verification rule includes that the actual differential-mode voltage value is greater than the target differential-mode high voltage value, or the actual differential-mode voltage value is less than the target differential-mode low voltage value, or the actual differential-mode voltage value is greater than the target differential-mode low voltage value and less than the target differential-mode high voltage value;

[0030] Based on the common-mode voltage verification rule in the configuration file, the actual common-mode voltage value is verified to obtain a second test result of the actual common-mode voltage value, where the second test result includes that the common-mode voltage test passes or the common-mode voltage test fails, and the common-mode voltage verification rule includes that the actual common-mode voltage value is greater than the target common-mode high voltage value, or the actual common-mode voltage value is less than the target common-mode low voltage value, or the actual common-mode voltage value is greater than the target common-mode low voltage value and less than the target common-mode high voltage value.

[0031] Another aspect of the embodiments of the present disclosure provides a voltage measurement device for a chip differential pin, including:

[0032] A receiving module, configured to receive voltage sampling data, where the voltage sampling data includes the voltage high-low comparison result between the differential-mode voltage of the differential pin group of the chip to be measured and the differential-mode voltage threshold, and the voltage high-low comparison result between the common-mode voltage of the two differential pin groups and the common-mode voltage threshold;

[0033] A verification module for verifying the voltage sampling data to determine whether the voltage comparison result of the differential mode voltage and the differential mode voltage threshold is a preset differential mode voltage comparison result, and determining whether the voltage comparison result of the common mode voltage and the common mode voltage threshold is a preset common mode voltage comparison result;

[0034] A determination module for, in response to the voltage sampling data passing the verification, determining the differential mode voltage threshold as the actual differential mode voltage value of the differential pin group and determining the common mode voltage threshold as the actual common mode voltage value of the differential pin group;

[0035] A calculation module for calculating the actual voltage value of each differential pin in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value.

[0036] On the other hand, an embodiment of the present disclosure provides an electronic device, including:

[0037] A memory for storing a computer program;

[0038] A processor for executing the computer program stored in the memory, and when the computer program is executed, implementing the method described in the above aspect.

[0039] On the other hand, an embodiment of the present disclosure provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, implementing the method described in the above aspect.

[0040] On the other hand, an embodiment of the present disclosure provides a computer program, including computer program instructions, and when the computer program instructions are executed by a processor, implementing the method described in the above aspect.

[0041] Based on the embodiments of the present disclosure, by presetting a differential mode voltage threshold and a common mode voltage threshold, and collecting the voltage comparison result of the differential mode voltage of the differential pin group of the chip and the differential mode voltage threshold, as well as the voltage comparison result of the common mode voltage of the differential pin group and the common mode voltage threshold, when the voltage comparison result of the differential mode voltage and the differential mode voltage threshold satisfies the preset differential mode voltage comparison result, and the voltage comparison result of the common mode voltage and the common mode voltage threshold satisfies the preset common mode voltage comparison result, determining the differential mode voltage threshold as the actual differential mode voltage and determining the common mode voltage threshold as the actual common mode voltage, so that the actual voltage value of each differential pin in the differential pin group can be calculated according to the actual differential mode voltage and the actual common mode voltage, realizing synchronous voltage measurement of each differential pin of the chip and improving the accuracy and reliability of the voltage measurement result.

[0042] The technical solution of the present disclosure will be further described in detail below with reference to the drawings and embodiments. Description of the Drawings

[0043] The accompanying drawings, which form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0044] With reference to the accompanying drawings, the present disclosure can be more clearly understood from the following detailed description, wherein:

[0045] Figure 1 is a flowchart of an embodiment of a method for measuring the voltage of differential pins of a chip according to the present disclosure;

[0046] Figure 2 is a flowchart of another embodiment of a method for measuring the voltage of differential pins of a chip according to the present disclosure;

[0047] Figure 3 is a flowchart of another embodiment of a method for measuring the voltage of differential pins of a chip according to the present disclosure;

[0048] Figure 4 is a schematic structural diagram of an embodiment of a device for measuring the voltage of differential pins of a chip according to the present disclosure;

[0049] Figure 5 is a schematic structural diagram of another embodiment of a device for measuring the voltage of differential pins of a chip according to the present disclosure;

[0050] Figure 6 is a schematic structural diagram of another embodiment of a device for measuring the voltage of differential pins of a chip according to the present disclosure;

[0051] Figure 7 is a schematic structural diagram of an application embodiment of an electronic device according to the present disclosure. Detailed Description of the Embodiments

[0052] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that: Unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions, and values set forth in these embodiments do not limit the scope of the present disclosure.

[0053] Those skilled in the art can understand that terms such as "first" and "second" in the embodiments of the present disclosure are only used to distinguish different steps, devices, or modules, etc., and do not represent any specific technical meaning nor indicate an inevitable logical order between them.

[0054] It should also be understood that in the embodiments of the present disclosure, "a plurality of" may refer to two or more, and "at least one" may refer to one, two, or more.

[0055] It should also be understood that for any component, data, or structure mentioned in the embodiments of the present disclosure, without clear limitation or contrary indication in the context, it can generally be understood as one or more.

[0056] In addition, the term "and / or" in the present disclosure is merely an association relationship describing associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in the present disclosure generally indicates that the associated objects before and after are in an "or" relationship.

[0057] It should also be understood that the descriptions of the various embodiments in the present disclosure emphasize the differences between the various embodiments, and their similarities can be referred to each other. For the sake of brevity, they will not be elaborated one by one.

[0058] Meanwhile, it should be understood that for the convenience of description, the dimensions of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0059] The following description of at least one exemplary embodiment is actually merely illustrative and in no way constitutes any limitation to the present disclosure and its application or use.

[0060] Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the said technologies, methods, and devices should be regarded as part of the specification.

[0061] It should be noted that like reference numerals and letters denote like items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0062] Figure 1 The flowchart of the method for measuring the voltage of the differential pins of a chip provided for an exemplary embodiment of the present disclosure. The method for measuring the voltage of the differential pins of a chip in the embodiments of the present disclosure can be applied to an electronic device, such as a host computer in a chip test system.

[0063] As Figure 1 shown, the method includes the following steps:

[0064] Step 101, receive voltage sampling data.

[0065] The voltage sampling data includes the comparison result of the voltage level between the differential mode voltage of the differential pin group of the chip to be measured and the differential mode voltage threshold, and the comparison result of the voltage level between the common mode voltage of the differential pin group and the common mode voltage threshold.

[0066] Among them, the differential pin group of the chip to be measured refers to a group of pins on the chip to be measured used for jointly transmitting differential signals, usually including two pins, namely the P-terminal pin and the N-terminal pin. The differential mode voltage is the voltage difference between the two differential pins in the differential pin group, and the common mode voltage is the average voltage of the two differential pins in the differential pin group.

[0067] In a possible implementation, the differential pin group of the chip under test is connected to a test board card, which is responsible for collecting voltage sampling data and sending the voltage sampling data to an electronic device. It is difficult for the test board card to directly measure the actual voltage value of each differential pin. In the method provided by the embodiments of the present disclosure, a differential voltage threshold and a common-mode voltage threshold can be preset, and voltages with corresponding values are provided to the test unit in the test board card. At the same time, the test unit is connected to the differential pin group of the chip under test and receives the differential voltage and the common-mode voltage of the differential pin group, so as to obtain the comparison result of the voltage level between the differential voltage and the differential voltage threshold, and the comparison result of the voltage level between the common-mode voltage of the differential pin group and the common-mode voltage threshold. For example, the test unit can set a voltage comparator. One input terminal of the voltage comparator is connected to the differential pin group to receive the differential voltage of the differential pin group, and the other input terminal is connected to a power supply circuit to receive an input voltage with a value equal to the differential voltage threshold, so as to output the comparison result of the voltage levels of the two input terminals through the output terminal. For example, when the differential voltage is higher than the differential voltage threshold, a high voltage signal is output, and when the differential voltage is lower than the differential voltage threshold, a low voltage signal is output. Correspondingly, another voltage comparator can be used to compare the common-mode voltage and the common-mode voltage threshold.

[0068] Optionally, the host computer can send the preset differential voltage threshold and common-mode voltage threshold to the test board card. After the test board card finishes measuring the test item, it stores the voltage sampling data in the memory, and sends the voltage sampling data to the host computer after receiving the sampling data acquisition request sent by the host computer.

[0069] Step 102: Verify the voltage sampling data to determine whether the comparison result of the voltage level between the differential voltage and the differential voltage threshold is a preset differential voltage comparison result, and determine whether the comparison result of the voltage level between the common-mode voltage and the common-mode voltage threshold is a preset common-mode voltage comparison result.

[0070] Since the differential voltage usually includes at least two voltage values, namely high voltage and low voltage, correspondingly, the differential voltage and the common-mode voltage also include at least two situations of high voltage and low voltage. Optionally, a differential high voltage threshold and a differential low voltage threshold can be set for the differential voltage, and a common-mode high voltage threshold and a common-mode low voltage threshold can be set for the common-mode voltage.

[0071] Optionally, for the differential-mode voltage, a differential-mode high-voltage threshold and a differential-mode low-voltage threshold can be set, and the corresponding preset differential-mode voltage comparison result is that the differential-mode voltage is less than or equal to the differential-mode low-voltage threshold or the differential-mode voltage is greater than or equal to the differential-mode high-voltage threshold. Alternatively, a differential-mode high-voltage upper limit threshold and a differential-mode high-voltage lower limit threshold, as well as a differential-mode low-voltage upper limit threshold and a differential-mode low-voltage lower limit threshold can be set, and the corresponding preset differential-mode voltage comparison result is that the differential-mode voltage is between the differential-mode high-voltage upper limit threshold and the differential-mode high-voltage lower limit threshold, or the differential-mode voltage is between the differential-mode low-voltage upper limit threshold and the differential-mode low-voltage lower limit threshold. For the common-mode voltage, a common-mode high-voltage threshold and a common-mode low-voltage threshold can be set, and the corresponding preset common-mode voltage comparison result is that the common-mode voltage is less than or equal to the common-mode low-voltage threshold or the common-mode voltage is greater than or equal to the common-mode high-voltage threshold. Alternatively, a common-mode high-voltage upper limit threshold and a common-mode high-voltage lower limit threshold, as well as a common-mode low-voltage upper limit threshold and a common-mode low-voltage lower limit threshold can be set, and the corresponding preset common-mode voltage comparison result is that the common-mode voltage is between the common-mode high-voltage upper limit threshold and the common-mode high-voltage lower limit threshold, or the common-mode voltage is between the common-mode low-voltage upper limit threshold and the common-mode low-voltage lower limit threshold.

[0072] Step 103, in response to the voltage sampling data being verified and passed, determine the differential-mode voltage threshold as the actual differential-mode voltage value of the differential pin group, and determine the common-mode voltage threshold as the actual common-mode voltage value of the differential pin group.

[0073] Optionally, if the voltage sampling data is verified and passed, the differential-mode voltage threshold can be determined as the actual differential-mode voltage value of the differential pin group, and the common-mode voltage threshold can be determined as the actual common-mode voltage value of the differential pin group. If the voltage sampling data verification fails, the differential-mode voltage threshold and the common-mode voltage threshold can be updated, and sampling and verification are performed again based on the updated differential-mode voltage threshold and common-mode voltage threshold until the voltage sampling data verification passes, so as to explore the actual differential-mode voltage value and the actual common-mode voltage value.

[0074] Step 104, based on the actual differential-mode voltage value and the actual common-mode voltage value, calculate the actual voltage values of each differential pin in the differential pin group.

[0075] Optionally, based on the relationship between the differential-mode voltage, the common-mode voltage and the voltages of each differential pin, a system of equations can be established to solve for the actual voltage values of each differential pin in the differential pin group.

[0076] Schematically, the differential pin group includes two differential pins. Assume that the actual voltage value of one differential pin is P and the actual voltage value of the other differential pin is N. P and N are obtained by solving the following system of equations:

[0077]

[0078] Wherein, VDM is the actual differential mode voltage value, and VCM is the actual common mode voltage value.

[0079] Based on the embodiments of the present disclosure, by presetting a differential mode voltage threshold and a common mode voltage threshold, and collecting the comparison result of the voltage level between the differential mode voltage of the differential pin group of the chip and the differential mode voltage threshold, as well as the comparison result of the voltage level between the common mode voltage of the differential pin group and the common mode voltage threshold, when the comparison result of the voltage level between the differential mode voltage and the differential mode voltage threshold meets the preset differential mode voltage comparison result, and the comparison result of the voltage level between the common mode voltage and the common mode voltage threshold meets the preset common mode voltage comparison result, the differential mode voltage threshold is determined as the actual differential mode voltage, and the common mode voltage threshold is determined as the actual common mode voltage, so that the actual voltage value of each differential pin in the differential pin group can be calculated according to the actual differential mode voltage and the actual common mode voltage, realizing synchronous voltage measurement of each differential pin of the chip and improving the accuracy and reliability of the voltage measurement result.

[0080] In a possible implementation manner, the differential mode voltage threshold includes a differential mode high voltage threshold and a differential mode low voltage threshold, and the common mode voltage threshold includes a common mode high voltage threshold and a common mode low voltage threshold. The above step 103 may specifically include the following steps:

[0081] Step 103a, in response to the differential mode voltage being less than or equal to the differential mode low voltage threshold, determining the differential mode low voltage threshold as the actual differential mode voltage value.

[0082] Step 103b, in response to the differential mode voltage being greater than or equal to the differential mode high voltage threshold, determining the differential mode high voltage threshold as the actual differential mode voltage value.

[0083] Optionally, the preset differential mode voltage comparison result is that the differential mode voltage is less than or equal to the differential mode low voltage threshold or the differential mode voltage is greater than or equal to the differential mode high voltage threshold. When the differential mode voltage is less than or equal to the differential mode low voltage threshold, it is a differential mode low voltage at this time, and the differential mode low voltage threshold can be determined as the actual differential mode voltage value; when the differential mode voltage is greater than or equal to the differential mode high voltage threshold, it is a differential mode high voltage at this time, and the differential mode high voltage threshold can be determined as the actual differential mode voltage value.

[0084] Step 103c, in response to the common mode voltage being less than or equal to the common mode low voltage threshold, determining the common mode low voltage threshold as the actual common mode voltage value.

[0085] Step 103d, in response to the common mode voltage being greater than or equal to the common mode high voltage threshold, determining the common mode high voltage threshold as the actual common mode voltage value.

[0086] Optionally, the preset common-mode voltage comparison result is that the common-mode voltage is less than or equal to the common-mode low voltage threshold or the common-mode voltage is greater than or equal to the common-mode high voltage threshold. When the common-mode voltage is less than or equal to the common-mode low voltage threshold, it is the common-mode low voltage at this time, and the common-mode low voltage threshold can be determined as the actual common-mode voltage value; when the common-mode voltage is greater than or equal to the common-mode high voltage threshold, it is the common-mode high voltage at this time, and the common-mode high voltage threshold can be determined as the actual common-mode voltage value.

[0087] In a possible implementation, the test board can collect voltage sampling data at a preset frequency, and the host computer can determine the actual voltage values of each differential pin at multiple moments based on the received voltage sampling data at multiple moments, so as to generate a voltage waveform diagram for technicians to intuitively observe the voltage change of the differential pins. As Figure 2 shown, the voltage measurement method for the differential pins of the chip provided by the embodiments of the present disclosure may include the following steps:

[0088] Step 201, receive voltage sampling data at at least two voltage sampling moments.

[0089] Optionally, the test board can collect voltage sampling data at a preset frequency and continuously send the collected voltage sampling data to the host computer.

[0090] Step 202, check the voltage sampling data to determine whether the voltage comparison result between the differential mode voltage and the differential mode voltage threshold is the preset differential mode voltage comparison result, and determine whether the voltage comparison result between the common-mode voltage and the common-mode voltage threshold is the preset common-mode voltage comparison result.

[0091] Step 203, in response to the voltage sampling data passing the check, determine the differential mode voltage threshold as the actual differential mode voltage value of the differential pin group, and determine the common-mode voltage threshold as the actual common-mode voltage value of the differential pin group.

[0092] For the specific implementation manners of Step 202 to Step 203, reference may be made to the above Step 102 to Step 103, and the embodiments of the present disclosure will not elaborate herein.

[0093] Step 204, based on the actual differential mode voltage values and the actual common-mode voltage values at at least two voltage sampling moments, calculate the actual voltage values of each differential pin in the differential pin group at at least two voltage sampling moments.

[0094] Correspondingly, for each group of voltage sampling data that passes the check, determine the actual differential mode voltage value and the actual common-mode voltage value respectively and calculate the actual voltage value of the differential pin, so as to obtain the actual voltage value of each differential pin at each voltage sampling moment.

[0095] Step 205: Generate a voltage waveform diagram for each differential pin based on the actual voltage values of each differential pin at at least two voltage sampling moments.

[0096] Optionally, chip voltage waveform display software such as WaveDrom, TimeGen, WaveView, etc. can be run in the host computer, and the voltage waveform diagrams of each differential pin can be plotted and displayed through such software.

[0097] Based on the embodiments of the present disclosure, by setting multiple voltage sampling moments, and determining the actual voltage values of each differential pin at at least two voltage sampling moments based on the received voltage sampling data at at least two voltage sampling moments, a voltage waveform diagram is generated, so that technicians can intuitively observe the voltage change situation of the differential pins.

[0098] In a possible implementation manner, if the voltage sampling data fails to pass the verification, the differential mode voltage threshold and the common mode voltage threshold can be continuously adjusted until the voltage sampling data passes the verification, so as to explore the actual differential mode voltage value and the actual common mode voltage value. The method for measuring the voltage of the differential pins of the chip provided by the embodiments of the present disclosure may further include the following steps:

[0099] Step 1: In response to the differential mode voltage being greater than the differential mode low voltage threshold and less than the differential mode high voltage threshold, lower the differential mode high voltage threshold and raise the differential mode low voltage threshold according to a first preset adjustment step size; send the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold to re-obtain voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold.

[0100] After lowering the differential mode high voltage threshold and raising the differential mode low voltage threshold according to the preset adjustment step size for the differential mode voltage threshold (hereinafter referred to as the first preset adjustment step size), the test board can re-obtain voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold, and the host computer continues to execute the above steps 101 and 102. This process is repeated until the voltage sampling data passes the verification, and then the above step 103 is continued.

[0101] Schematically, assuming that the differential-mode low voltage of the differential pin group is usually about 1V and the differential-mode high voltage is usually about 3V, the differential-mode low voltage threshold can be preset to 0.9V and the differential-mode high voltage threshold can be preset to 3.1V. If the differential-mode voltage in the voltage sampling data is less than or equal to the differential-mode low voltage threshold, the actual differential-mode voltage is determined to be 0.9V. If the differential-mode voltage is greater than or equal to the differential-mode high voltage threshold, the actual differential-mode voltage is determined to be 3.1V. If the differential-mode voltage is greater than the differential-mode low voltage threshold and less than the differential-mode high voltage threshold, the differential-mode low voltage threshold is increased by 0.1V, that is, the updated differential-mode low voltage threshold is 1.0V. At the same time, the differential-mode high voltage threshold is decreased by 0.1V, that is, the updated differential-mode high voltage threshold is 3.0V. By continuously expanding the voltage scanning range (that is, the voltage value range less than or equal to 1.0V and greater than or equal to 3.0V), the differential-mode low voltage threshold or the differential-mode high voltage threshold gradually approaches the actual differential-mode voltage value. When the voltage sampling data verification passes, the actual differential-mode voltage value can be obtained without setting a complex voltage measurement circuit.

[0102] Step 2, in response to the common-mode voltage being greater than the common-mode low voltage threshold and less than the common-mode high voltage threshold, the common-mode high voltage threshold is decreased and the common-mode low voltage threshold is increased according to the second preset adjustment step size; the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold are sent to re-acquire voltage sampling data based on the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold.

[0103] After decreasing the common-mode high voltage threshold and increasing the common-mode low voltage threshold according to the preset adjustment step size for the common-mode voltage threshold (hereinafter referred to as the second preset adjustment step size), the test board can re-acquire voltage sampling data based on the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold. The host computer continues to execute the above steps 101 and 102. This process is repeated until the voltage sampling data verification passes, and then the above step 103 is continued.

[0104] Schematically, assuming that the common-mode low voltage of the differential pin group is usually around 1V and the common-mode high voltage is usually around 3V, the common-mode low voltage threshold can be preset to 0.9V and the common-mode high voltage threshold to 3.1V. If the common-mode voltage in the voltage sampling data is less than or equal to the common-mode low voltage threshold, the actual common-mode voltage is determined to be 0.9V. If the common-mode voltage is greater than or equal to the common-mode high voltage threshold, the actual common-mode voltage is determined to be 3.1V. If the common-mode voltage is greater than the common-mode low voltage threshold and less than the common-mode high voltage threshold, the common-mode low voltage threshold is increased by 0.1V, that is, the updated common-mode low voltage threshold is 1.0V. At the same time, the common-mode high voltage threshold is decreased by 0.1V, that is, the updated common-mode high voltage threshold is 3.0V. By continuously expanding the voltage scanning range (i.e., the voltage value range less than or equal to 1.0V and greater than or equal to 3.0V), the common-mode low voltage threshold or the common-mode high voltage threshold gradually approaches the actual common-mode voltage value until the actual common-mode voltage value can be obtained when the voltage sampling data passes the verification, without the need to set up a complex voltage measurement circuit.

[0105] Based on the embodiments of the present disclosure, when the voltage sampling data fails to pass the verification, by continuously adjusting the differential voltage threshold or the common-mode voltage threshold according to a preset step size, re-acquiring the voltage sampling data and data verification, and continuously expanding the voltage scanning range, the differential voltage threshold and the common-mode voltage threshold gradually approach the actual differential voltage value and the actual common-mode voltage value, and the actual voltage values of each differential pin in the chip differential pin group can be measured without setting up a complex voltage measurement circuit.

[0106] In a possible implementation manner, if the differential voltage threshold or the common-mode voltage threshold is adjusted at the current voltage sampling moment due to the voltage sampling data failing to pass the verification, then at the next voltage sampling moment, the differential voltage threshold or the common-mode voltage threshold is correspondingly restored to the initial value to continue sampling and verification, which can avoid the problem that the adjusted voltage value scanning range is too large due to short-term voltage fluctuations, affecting the subsequent voltage measurement accuracy. The voltage measurement method for the chip differential pins provided by the embodiments of the present disclosure further includes the following steps:

[0107] In response to adjusting the differential voltage threshold at the current voltage sampling moment, the differential voltage threshold is restored to the initial value of the differential voltage threshold at the next voltage sampling moment; in response to adjusting the common-mode voltage threshold at the current voltage sampling moment, the common-mode voltage threshold is restored to the initial value of the common-mode voltage threshold at the next voltage sampling moment.

[0108] Schematically, the initial value of the differential low voltage threshold is 0.9V, and the initial value of the differential high voltage threshold is 3.1V. If the differential low voltage threshold is adjusted to 1.0V and the differential high voltage threshold is adjusted to 3.0V at the current voltage sampling moment, then before collecting the voltage sampling data at the next voltage sampling moment, the differential low voltage threshold is restored to 0.9V and the differential high voltage threshold is restored to 3.1V.

[0109] In a possible implementation manner, after obtaining the actual differential-mode voltage value and the actual common-mode voltage value, the Pass / Fail result of the differential-mode pin group of the chip under test can also be determined based on the target differential-mode voltage value and the target common-mode voltage value preset in the configuration file. The voltage measurement method for the differential-mode pins of the chip provided by the embodiments of the present disclosure further includes the following steps:

[0110] Verify the actual differential-mode voltage value based on the differential-mode voltage verification rule in the configuration file to obtain the first test result of the actual differential-mode voltage value; verify the actual common-mode voltage value based on the common-mode voltage verification rule in the configuration file to obtain the second test result of the actual common-mode voltage value.

[0111] Wherein, the first test result includes passing the differential-mode voltage test or failing the differential-mode voltage test. The differential-mode voltage verification rule includes that the actual differential-mode voltage value is greater than the target differential-mode high voltage value, or the actual differential-mode voltage value is less than the target differential-mode low voltage value, or the actual differential-mode voltage value is greater than the target differential-mode low voltage value and less than the target differential-mode high voltage value; the second test result includes passing the common-mode voltage test or failing the common-mode voltage test. The common-mode voltage verification rule includes that the actual common-mode voltage value is greater than the target common-mode high voltage value, or the actual common-mode voltage value is less than the target common-mode low voltage value, or the actual common-mode voltage value is greater than the target common-mode low voltage value and less than the target common-mode high voltage value.

[0112] Schematically, the differential-mode voltage verification rule and the common-mode voltage verification rule can be set by setting the data value in the configuration file (Pattern file). For example, when the data value is H, it means that the differential-mode voltage verification rule is that the actual differential-mode voltage value is greater than the target differential-mode high voltage value; when the data value is L, it means that the differential-mode voltage verification rule is that the actual differential-mode voltage value is less than the target differential-mode low voltage value; when the data value is M, it means that the actual differential-mode voltage value is greater than the target differential-mode low voltage value and less than the target differential-mode high voltage value. Therefore, if the data value in the Pattern file is H and the actual differential-mode voltage value is greater than the target differential-mode high voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. If the data value in the Pattern file is L and the actual differential-mode voltage value is less than the target differential-mode low voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. If the data value in the Pattern file is M and the actual differential-mode voltage value is less than the target differential-mode high voltage value and greater than the target differential-mode low voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. Correspondingly, if the data value in the Pattern file is H and the actual common-mode voltage value is greater than the target common-mode high voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. If the data value in the Pattern file is L and the actual common-mode voltage value is less than the target common-mode low voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. If the data value in the Pattern file is M and the actual common-mode voltage value is less than the target common-mode high voltage value and greater than the target common-mode low voltage value, the Pass / Fail result is Pass; otherwise, it is Fail.

[0113] Combining the above method embodiments, Figure 3 shows a flowchart of a differential pin voltage measurement performed by an electronic device, as Figure 3 shown. The process may include the following steps:

[0114] 1. Set a preset frequency. The preset frequency refers to the frequency at which the test board collects voltage sampling data.

[0115] 2. Set the differential-mode voltage threshold and the common-mode voltage threshold. The electronic device can send a threshold setting instruction carrying the differential-mode voltage threshold and the common-mode voltage threshold to the test board, so that the test board obtains the differential-mode voltage threshold and the common-mode voltage threshold through this instruction.

[0116] 3. Run the test program. After running the test program, the electronic device can send a test request to the test board, so that the test board collects voltage sampling data.

[0117] 4. Obtain the voltage sampling data. The electronic device can send a sampling data acquisition request to the test board to make the test board send the voltage sampling data.

[0118] 5. Verify the differential-mode voltage. If the differential-mode voltage verification passes, proceed to step 7; if the differential-mode voltage verification fails, skip step 7 and directly proceed to step 9.

[0119] 6. Verify the common-mode voltage. If the common-mode voltage verification passes, proceed to step 8; if the common-mode voltage verification fails, skip step 8 and directly proceed to step 9.

[0120] There is no strict order of execution between step 5 and step 6. The electronic device can execute step 5 first, or execute step 6 first, or execute step 5 and step 6 synchronously.

[0121] 7. Store the actual differential-mode voltage value. If the differential-mode voltage verification passes, store the corresponding differential-mode voltage threshold as the actual differential-mode voltage value.

[0122] 8. Store the actual common-mode voltage value. If the common-mode voltage verification passes, store the corresponding common-mode voltage threshold as the actual common-mode voltage value.

[0123] 9. Determine whether there are actual differential-mode voltage values and actual common-mode voltage values. If they exist, proceed to step 11; if not, proceed to step 10.

[0124] 10. Adjust the differential-mode voltage threshold and / or the common-mode voltage threshold. Among them, if there is no actual differential-mode voltage value, that is, the differential-mode voltage verification fails, adjust the differential-mode voltage threshold; if there is no actual common-mode voltage value, that is, the common-mode voltage verification fails, adjust the common-mode voltage threshold. After the adjustment is completed, return to step 2 and re-collect the voltage sampling data based on the adjusted differential-mode voltage threshold and / or common-mode voltage threshold.

[0125] 11. Calculate the actual voltage values of each differential pin. Based on the stored actual differential-mode voltage value and actual common-mode voltage value of the differential pin group, the actual voltage value of each differential pin in the differential pin group can be calculated, and after obtaining the actual voltage values at at least two voltage sampling moments, a voltage waveform diagram of each differential pin can be generated.

[0126] 12. Calculate the pass / fail result of the differential pin group. The differential-mode voltage verification rule and the common-mode voltage verification rule can be set by setting the data value in the configuration file (Pattern file). If the differential-mode voltage meets the differential-mode voltage verification rule in the configuration file, the result is pass, otherwise it is fail; correspondingly, if the common-mode voltage meets the common-mode voltage verification rule in the configuration file, the result is pass, otherwise it is fail.

[0127] Figure 4The block diagram of a voltage measurement device for chip differential pins provided by an exemplary embodiment of the present disclosure is shown. The voltage measurement device for chip differential pins includes:

[0128] A receiving module 401, configured to receive voltage sampling data, where the voltage sampling data includes the comparison result of the voltage level between the differential mode voltage of the differential pin group to be measured and the differential mode voltage threshold, and the comparison result of the voltage level between the common mode voltage of two differential pin groups and the common mode voltage threshold;

[0129] A verification module 402, configured to verify the voltage sampling data received by the receiving module 401, and determine whether the comparison result of the voltage level between the differential mode voltage and the differential mode voltage threshold is a preset differential mode voltage comparison result, and determine whether the comparison result of the voltage level between the common mode voltage and the common mode voltage threshold is a preset common mode voltage comparison result;

[0130] A determination module 403, configured to, in response to the voltage sampling data passing the verification, determine the differential mode voltage threshold as the actual differential mode voltage value of the differential pin group, and determine the common mode voltage threshold as the actual common mode voltage value of the differential pin group;

[0131] A calculation module 404, configured to calculate the actual voltage value of each differential pin in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value determined by the determination module 403.

[0132] Optionally, in a possible implementation manner, the differential mode voltage threshold includes a differential mode high voltage threshold and a differential mode low voltage threshold, and the common mode voltage threshold includes a common mode high voltage threshold and a common mode low voltage threshold; the above-mentioned determination module 403 can also be used for:

[0133] In response to the differential mode voltage being less than or equal to the differential mode low voltage threshold, determine the differential mode low voltage threshold as the actual differential mode voltage value;

[0134] In response to the differential mode voltage being greater than or equal to the differential mode high voltage threshold, determine the differential mode high voltage threshold as the actual differential mode voltage value;

[0135] In response to the common mode voltage being less than or equal to the common mode low voltage threshold, determine the common mode low voltage threshold as the actual common mode voltage value;

[0136] In response to the common mode voltage being greater than or equal to the common mode high voltage threshold, determine the common mode high voltage threshold as the actual common mode voltage value.

[0137] Optionally, in a possible implementation manner, the above-mentioned receiving module 401 can also be used for:

[0138] Receive voltage sampling data at at least two voltage sampling times;

[0139] The above-mentioned calculation module 404 can also be used for:

[0140] Based on the actual differential-mode voltage values and actual common-mode voltage values at at least two voltage sampling moments, calculate the actual voltage values of each differential pin in the differential pin group at at least two voltage sampling moments respectively;

[0141] The voltage measuring device for the differential pins of the chip may further include:

[0142] A generating module, configured to generate a voltage waveform diagram of each differential pin based on the actual voltage values of each differential pin at at least two voltage sampling moments.

[0143] Optionally, in a possible implementation manner, as Figure 5 shown, the voltage measuring device for the differential pins of the chip may further include:

[0144] A first adjustment module 501, configured to respond to the differential-mode voltage being greater than the differential-mode low voltage threshold and less than the differential-mode high voltage threshold, lower the differential-mode high voltage threshold and raise the differential-mode low voltage threshold according to a first preset adjustment step; send the adjusted differential-mode high voltage threshold and the adjusted differential-mode low voltage threshold to re-acquire voltage sampling data based on the adjusted differential-mode high voltage threshold and the adjusted differential-mode low voltage threshold;

[0145] A second adjustment module 502, configured to respond to the common-mode voltage being greater than the common-mode low voltage threshold and less than the common-mode high voltage threshold, lower the common-mode high voltage threshold and raise the common-mode low voltage threshold according to a second preset adjustment step; send the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold to re-acquire voltage sampling data based on the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold.

[0146] Optionally, in a possible implementation manner, as Figure 6 shown, the voltage measuring device for the differential pins of the chip may further include:

[0147] A first recovery module 601, configured to respond to adjusting the differential-mode voltage threshold at the current voltage sampling moment, and restore the differential-mode voltage threshold to its initial value at the next voltage sampling moment;

[0148] A second recovery module 602, configured to respond to adjusting the common-mode voltage threshold at the current voltage sampling moment, and restore the common-mode voltage threshold to its initial value at the next voltage sampling moment.

[0149] Optionally, in a possible implementation manner, the voltage measuring device for the differential pins of the chip may further include:

[0150] The first test module is used to verify the actual differential-mode voltage value based on the differential-mode voltage verification rule in the configuration file, and obtain the first test result of the actual differential-mode voltage value. The first test result includes that the differential-mode voltage test passes or the differential-mode voltage test fails. The differential-mode voltage verification rule includes that the actual differential-mode voltage value is greater than the target differential-mode high voltage value, or the actual differential-mode voltage value is less than the target differential-mode low voltage value, or the actual differential-mode voltage value is greater than the target differential-mode low voltage value and less than the target differential-mode high voltage value.

[0151] The second test module is used to verify the actual common-mode voltage value based on the common-mode voltage verification rule in the configuration file, and obtain the second test result of the actual common-mode voltage value. The second test result includes that the common-mode voltage test passes or the common-mode voltage test fails. The common-mode voltage verification rule includes that the actual common-mode voltage value is greater than the target common-mode high voltage value, or the actual common-mode voltage value is less than the target common-mode low voltage value, or the actual common-mode voltage value is greater than the target common-mode low voltage value and less than the target common-mode high voltage value.

[0152] Each embodiment in this specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. For the same, similar or corresponding parts among the embodiments, reference can be made to each other. Since the method, device, and equipment embodiments basically correspond to each other, reference can be made to the corresponding parts of the description for the relevant parts. The methods, devices, and equipment in the embodiments of the present disclosure also correspond to each other in specific implementation manners and beneficial technical effects. The relevant content can be referred to each other and will not be elaborated here.

[0153] In addition, the embodiments of the present disclosure also provide an electronic device, including:

[0154] A memory for storing a computer program;

[0155] A processor for executing the computer program stored in the memory, and when the computer program is executed, implementing the voltage measurement method for the chip differential pins described in any one of the above embodiments of the present disclosure.

[0156] Figure 7 It is a schematic structural diagram of an application embodiment of the electronic device of the present disclosure. Next, refer to Figure 7 to describe the electronic device according to the embodiments of the present disclosure. The electronic device can be any one or both of the first device and the second device, or a stand-alone device independent of them. The stand-alone device can communicate with the first device and the second device to receive the input signals collected from them.

[0157] As Figure 7 shown, the electronic device includes one or more processors and a memory.

[0158] The processor can be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and can control other components in the electronic device to perform desired functions.

[0159] The memory can include one or more computer program products, and the computer program products can include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory can include, for example, random access memory (RAM) and / or cache memory, etc. The non-volatile memory can include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions can be stored on the computer-readable storage media, and the processor can run the program instructions to implement the voltage measurement method for the chip differential pins in various embodiments of the present disclosure described above and / or other desired functions.

[0160] In one example, the electronic device can further include: an input device and an output device, and these components are interconnected through a bus system and / or other forms of connection mechanisms (not shown).

[0161] In addition, the input device can further include, for example, a keyboard, a mouse, etc.

[0162] The output device can output various information to the outside, including the determined distance information, direction information, etc. The output device can include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0163] Of course, for simplicity, Figure 7 only some of the components related to the present disclosure in the electronic device are shown, and components such as buses, input / output interfaces, etc. are omitted. In addition, according to specific application scenarios, the electronic device can further include any other appropriate components.

[0164] In addition to the above methods and devices, the embodiments of the present disclosure can also be computer program products, which include computer program instructions, and when the computer program instructions are run by the processor, the processor is caused to execute the steps in the voltage measurement method for the chip differential pins according to various embodiments of the present disclosure described in the above part of this specification.

[0165] The computer program product may be written in any combination of one or more programming languages for programming code to perform the operations of the embodiments of the present disclosure. The programming languages include object-oriented programming languages such as Java, C++, etc., and also include conventional procedural programming languages such as the "C" language or similar programming languages. The programming code may be executed entirely on the user's computing device, partially on the user's device, executed as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0166] In addition, an embodiment of the present disclosure may also be a computer-readable storage medium storing computer program instructions, which, when run by a processor, cause the processor to execute the steps in the method for measuring the voltage of the chip differential pins according to various embodiments of the present disclosure described in the foregoing part of this specification.

[0167] The computer-readable storage medium may adopt any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may, for example, include but is not limited to an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0168] Those of ordinary skill in the art can understand that all or part of the steps for implementing the above method embodiments can be completed by hardware related to program instructions. The foregoing program may be stored in a computer-readable storage medium, and when executed, includes the steps of the above method embodiments; and the foregoing storage medium includes: ROM, RAM, magnetic disk, or optical disk and other various media that can store program code.

[0169] The basic principles of the present disclosure have been described above in conjunction with specific embodiments. However, it should be noted that the advantages, advantages, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, advantages, effects, etc. are essential for each embodiment of the present disclosure. In addition, the above-mentioned specific details are only for the purpose of illustration and facilitating understanding, rather than limitations. The above details do not limit the present disclosure to necessarily adopt the above specific details for implementation.

[0170] In the present specification, the various embodiments are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the various embodiments, reference can be made to each other. For system embodiments, since they basically correspond to method embodiments, the description is relatively simple. For the relevant parts, reference can be made to the partial description of the method embodiments.

[0171] The block diagrams of the devices, apparatuses, equipment, and systems involved in the present disclosure are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open-ended terms, meaning "including but not limited to", and can be used interchangeably with each other. The word "or" and "and" used herein refer to the word "and / or" and can be used interchangeably with each other, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to" and can be used interchangeably with each other.

[0172] The methods and apparatuses of the present disclosure can be implemented in many ways. For example, the methods and apparatuses of the present disclosure can be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above order of the steps for the method is only for illustration, and the steps of the method of the present disclosure are not limited to the specific order described above, unless otherwise specifically stated. In addition, in some embodiments, the present disclosure can also be implemented as a program recorded in a recording medium, and these programs include machine-readable instructions for implementing the method according to the present disclosure. Therefore, the present disclosure also covers a recording medium storing a program for executing the method according to the present disclosure.

[0173] It should also be noted that in the apparatuses, equipment, and methods of the present disclosure, each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent solutions of the present disclosure.

[0174] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be very apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to the broadest scope consistent with the principles and novel features disclosed herein.

[0175] The foregoing description has been presented for purposes of illustration and description. In addition, the description is not intended to limit embodiments of the disclosure to the form disclosed herein. Although several example aspects and embodiments have been discussed above, those skilled in the art will recognize some variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A method for measuring voltage of a chip differential pin, characterized in that: include: Receive voltage sampling data, wherein the voltage sampling data includes a voltage comparison result of a differential mode voltage of a differential pin group of a chip to be tested and a voltage high and low comparison result of a differential mode voltage threshold, and a voltage high and low comparison result of a common mode voltage of the differential pin group and a common mode voltage threshold; Verifying the voltage sampling data to determine whether a voltage comparison result between the differential mode voltage and the differential mode voltage threshold is a preset differential mode voltage comparison result, and determining whether a voltage comparison result between the common mode voltage and the common mode voltage threshold is a preset common mode voltage comparison result; In response to the voltage sampling data being verified, determining the differential mode voltage threshold as an actual differential mode voltage value of the differential pin group, and determining the common mode voltage threshold as an actual common mode voltage value of the differential pin group; Based on the actual differential mode voltage value and the actual common mode voltage value, an actual voltage value of each differential pin in the differential pin group is calculated.

2. The method according to claim 1, characterized in that The differential mode voltage threshold includes a differential mode high voltage threshold and a differential mode low voltage threshold, and the common mode voltage threshold includes a common mode high voltage threshold and a common mode low voltage threshold; In response to the voltage sampling data being verified, determining the differential mode voltage threshold as the actual differential mode voltage value of the differential pin group, and determining the common mode voltage threshold as the actual common mode voltage value of the differential pin group, comprises: In response to the differential mode voltage being less than or equal to the differential mode low voltage threshold, determining the differential mode low voltage threshold as the actual differential mode voltage value; In response to the differential mode voltage being greater than or equal to the differential mode high voltage threshold, determining the differential mode high voltage threshold as the actual differential mode voltage value; In response to the common mode voltage being less than or equal to the common mode low voltage threshold, determining the common mode low voltage threshold as the actual common mode voltage value; In response to the common mode voltage being greater than or equal to the common mode high voltage threshold, the common mode high voltage threshold is determined as the actual common mode voltage value.

3. The method according to claim 2, characterized in that The receiving voltage sampling data comprises: Receiving the voltage sampling data at at least two voltage sampling moments; The calculating the actual voltage value of each differential pin in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value includes: Based on the actual differential mode voltage value and the actual common mode voltage value at the at least two voltage sampling moments, respectively calculating the actual voltage value of each differential pin in the differential pin group at the at least two voltage sampling moments; The method further comprises: Based on the actual voltage value of each differential pin at the at least two voltage sampling moments, a voltage waveform diagram of each differential pin is generated.

4. The method according to claim 2, characterized in that: The method further comprises: In response to the differential mode voltage being greater than the differential mode low voltage threshold and less than the differential mode high voltage threshold, lowering the differential mode high voltage threshold and raising the differential mode low voltage threshold according to a first preset adjustment step; sending the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold, so as to reacquire the voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold; In response to the common mode voltage being greater than the common mode low voltage threshold and less than the common mode high voltage threshold, the common mode high voltage threshold is lowered and the common mode low voltage threshold is raised according to a second preset adjustment step; and the adjusted common mode high voltage threshold and the adjusted common mode low voltage threshold are sent to reacquire the voltage sampling data based on the adjusted common mode high voltage threshold and the adjusted common mode low voltage threshold.

5. The method according to claim 4, characterized in that The method further comprises: In response to the current voltage sampling moment, the differential mode voltage threshold is adjusted, and at the next voltage sampling moment, the differential mode voltage threshold is restored to the initial value of the differential mode voltage threshold; The common mode voltage threshold is adjusted in response to the current voltage sampling moment, and the common mode voltage threshold is restored to an initial value of the common mode voltage threshold at the next voltage sampling moment.

6. The method according to any one of claims 1 to 5, characterized in that: The method further comprises: Verify the actual differential mode voltage value based on the differential mode voltage verification rule in the configuration file to obtain a first test result of the actual differential mode voltage value, wherein the first test result includes a differential mode voltage test pass or a differential mode voltage test fail, and the differential mode voltage verification rule includes that the actual differential mode voltage value is greater than a target differential mode high voltage value, or the actual differential mode voltage value is less than a target differential mode low voltage value, or the actual differential mode voltage value is greater than the target differential mode low voltage value and less than the target differential mode high voltage value; The actual common-mode voltage value is verified based on the common-mode voltage verification rule in the configuration file to obtain a second test result of the actual common-mode voltage value, wherein the second test result includes a common-mode voltage test pass or a common-mode voltage test fail, and the common-mode voltage verification rule includes that the actual common-mode voltage value is greater than a target common-mode high voltage value, or the actual common-mode voltage value is less than a target common-mode low voltage value, or the actual common-mode voltage value is greater than the target common-mode low voltage value and less than the target common-mode high voltage value.

7. A voltage measurement device for a chip differential pin, characterized in that: include: A receiving module, used to receive voltage sampling data, wherein the voltage sampling data includes a voltage comparison result between a differential mode voltage of a differential pin group of a chip to be tested and a differential mode voltage threshold, and a voltage comparison result between a common mode voltage of the two differential pin groups and a common mode voltage threshold; A verification module, used to verify the voltage sampling data, determine whether a voltage high-low comparison result between the differential mode voltage and the differential mode voltage threshold is a preset differential mode voltage comparison result, and determine whether a voltage high-low comparison result between the common mode voltage and the common mode voltage threshold is a preset common mode voltage comparison result; a determination module, configured to determine the differential mode voltage threshold as an actual differential mode voltage value of the differential pin group, and determine the common mode voltage threshold as an actual common mode voltage value of the differential pin group in response to the voltage sampling data being verified; A calculation module is used to calculate the actual voltage value of each differential pin in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method described in any one of claims 1 to 6 is implemented.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to execute a computer program stored in the memory, and when the computer program is executed, implement the method described in any one of claims 1 to 6.

10. A computer program comprising computer program instructions, characterized in that When the computer program instructions are executed by a processor, the method described in any one of claims 1 to 6 is implemented.

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