Semiconductor device and manufacturing method thereof

Abstract

The invention provides a semiconductor device and a manufacturing method thereof, and belongs to the field of semiconductors. The semiconductor device manufacturing method comprises the steps that a semiconductor substrate with a PMOS area is provided, a gate structure and grooves are formed in the semiconductor substrate, and the grooves are located in the two sides of the gate structure; first cleaning treatment is carried out on the semiconductor substrate to remove carbon-containing and oxygen-containing impurities remaining in the groove, and a reagent for the first cleaning treatment comprises a hydrofluoric acid solution and a dimethyl sulfoxide (DMSO) solution which are mixed according to a set volume ratio. The hydrofluoric acid and the dimethyl sulfoxide are adopted as cleaning agents for wet etching to execute the first cleaning treatment, and the high permeability of DMSO and the chemical activity of HF can be utilized, so that carbon and oxygen-containing impurities in the groove can be effectively removed. Meanwhile, the reaction condition is mild, damage to the semiconductor substrate can be reduced, defects of the silicon-germanium epitaxial layer are avoided, and the reliability of a semiconductor device is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a semiconductor device and a manufacturing method thereof. Background Art

[0002] In order to improve the carrier mobility in the channel of a PMOS device, making grooves in the part of the PMOS device where source / drain regions are to be formed and filling the grooves with the technology of epitaxial embedded germanium silicon (e-SiGe) has become a hot topic of wide concern. Due to the characteristic that the grooves have a large undercut under the sidewalls of the gate gap, thus, the selective SiGe epitaxy formed in such grooves can generate greater stress on the device channel region.

[0003] The core part of the quality control of the selective SiGe epitaxy technology is the pre-cleaning step. The pre-cleaning step aims to thoroughly remove carbon (C)-containing impurities and oxygen (O)-containing impurities on the surface of the grooves. Because carbon (C)-containing impurities and oxygen (O)-containing impurities can significantly reduce the performance of semiconductor devices, such as reducing carrier mobility and increasing interface states. However, the current mechanisms for removing carbon and oxygen have a certain impact on the substrate, resulting in defects in the SiGe epitaxial layer and reducing the reliability of semiconductor devices.

[0004] It should be noted that the information disclosed in the background art part of this invention is only intended to deepen the understanding of the general background art of this invention, and should not be regarded as an admission or any form of implication that this information constitutes the prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of the present invention is to provide a semiconductor device and a manufacturing method thereof, so as to solve the problem that when the SiGe epitaxy technology removes carbon-containing impurities and oxygen-containing impurities, it affects the substrate, resulting in defects in the silicon germanium epitaxial layer and reducing the reliability of semiconductor devices.

[0006] To solve the above technical problems, the present invention provides a method for manufacturing a semiconductor device, including:

[0007] Providing a semiconductor substrate having a PMOS region, wherein the semiconductor substrate is formed with a gate structure and grooves, and the grooves are located on both sides of the gate structure;

[0008] Performing a first cleaning process on the semiconductor substrate to remove carbon-containing and oxygen-containing impurities remaining in the grooves, wherein the reagent for the first cleaning process includes a hydrofluoric acid solution and a dimethyl sulfoxide (DMSO) solution mixed in a set volume ratio;

[0009] Performing a second cleaning process on the semiconductor substrate to remove carbon-containing and oxygen-containing impurities in the grooves, and the gas for the second cleaning process includes ammonia;

[0010] Epitaxially grow an embedded germanium-silicon layer to completely fill the groove.

[0011] Preferably, the volume ratio of the hydrofluoric acid solution to the dimethyl sulfoxide (DMSO) solution is 0.1% - 0.5%, the duration of the first cleaning process is 5 min - 30 min, and the temperature is 25°C - 80°C.

[0012] Preferably, when performing the second cleaning process, in an inert gas environment, the temperature needs to reach the target temperature, and the target temperature is 400°C.

[0013] Preferably, the gas temperature for performing the second cleaning process is set in a stepwise manner starting from the first set temperature until the temperature reaches the target temperature.

[0014] Preferably, the gas temperature for performing the second cleaning process is set stepwise to a1°C, a2°C, a3°C, and X°C, where a1 is the first set temperature, X is the target temperature, and 0°C < a1°C < a2°C < a3°C < X°C.

[0015] Preferably, a1°C is 100°C, a2°C is 200°C, a3°C is 300°C, and X°C is 400°C.

[0016] Preferably, when performing the second cleaning process, the heating rates of the gas temperature from 100°C to 200°C, from 200°C to 300°C, and from 300°C to 400°C are 15 - 25°C / min, and when the gas temperature drops from 400°C to 100°C, the cooling rate is less than or equal to 25°C / min.

[0017] Preferably, the method further includes:

[0018] Performing a third cleaning process on the semiconductor substrate to remove the remaining impurities in the groove, and the gas for the third cleaning process includes ammonia and nitrogen trifluoride.

[0019] Preferably, the order of the first cleaning process, the second cleaning process, and the third cleaning process can be arbitrarily adjusted.

[0020] Based on the same inventive concept, the present invention also provides a semiconductor device, which is fabricated by using the semiconductor device manufacturing method as described above.

[0021] Compared with the prior art, the semiconductor device manufacturing method of the present invention has the following advantages:

[0022] The present invention performs a first cleaning process on the semiconductor substrate to remove carbon - containing and oxygen - containing impurities remaining in the groove. The reagents for the first cleaning process include hydrofluoric acid solution and dimethyl sulfoxide (DMSO) solution. After the first cleaning process, a second cleaning process is performed on the semiconductor substrate to remove the carbon - containing and oxygen - containing impurities in the groove. Using hydrofluoric acid (HF) solution and dimethyl sulfoxide (DMSO) solution as the cleaning agent for wet etching in the first cleaning process can utilize the high permeability of DMSO and synergistically combine with the etching chemical activity of HF to dissolve the remaining carbon - containing and oxygen - containing impurities in the groove, thereby effectively removing the carbon - containing and oxygen - containing impurities in the groove. At the same time, the reaction conditions are mild, which can reduce the damage to the semiconductor substrate, avoid the generation of defects in the silicon - germanium epitaxial layer, and improve the reliability of semiconductor devices. Subsequently, the second cleaning process is carried out. When performing the second cleaning process, ammonia gas (NH3) is introduced. NH3 passivates the surface of the groove, forms a stable surface chemical state on the groove surface, enhances the atomic flatness of the surface, and further removes carbon and oxygen impurities. In the two - step cleaning process, the first cleaning process gently removes the contaminants on the groove surface. The second cleaning process precisely removes the residues at the groove interface. This combined method can reduce the risk of damage to the silicon - germanium epitaxial layer, while ensuring the cleanliness of the groove interface, inhibiting defect generation, and improving carrier mobility and device reliability.

[0023] The semiconductor device provided by the present invention and the semiconductor device provided by the present invention belong to the same inventive concept. Therefore, the semiconductor device provided by the present invention has at least all the advantages of the semiconductor device provided by the present invention, can avoid the generation of defects in the silicon - germanium epitaxial layer, and improve the reliability of semiconductor devices. Brief Description of the Drawings

[0024] Figure 1 is a schematic structural diagram of an embedded silicon - germanium semiconductor device in an embodiment of the present invention;

[0025] Figure 2 is a flowchart of a method for manufacturing a semiconductor device in an embodiment of the present invention;

[0026] In the figure,

[0027] 100 - semiconductor substrate; 200 - silicon - germanium epitaxial layer;

[0028] 300 - gate structure. Detailed Description of the Embodiments

[0029] To make the objectives, advantages, and features of the present invention clearer, the following further elaborates on the semiconductor device and its manufacturing method proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise scales, only for conveniently and clearly assisting in explaining the objectives of the embodiments of the present invention. It should be understood that the drawings in the specification do not necessarily show the specific structure of the present invention in proportion, and the illustrative features used to explain certain principles of the present invention in the drawings of the specification will also adopt a slightly simplified drawing method. The specific design features of the present invention disclosed herein, such as specific dimensions, directions, positions, and shapes, will be partially determined by the specific application and usage environment. Also, in the following-described embodiments, sometimes the same reference numerals are used between different drawings to represent the same part or parts having the same function, and the repeated description thereof is omitted. In this specification, similar reference numerals and letters are used to represent similar items. Therefore, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0030] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present invention, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically and clearly defined.

[0031] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0032] For embedded silicon germanium (SiGe) semiconductor devices, after forming a sigma (∑) type groove, when removing carbon-containing and oxygen-containing impurities in the groove, a first cleaning is first performed using a mixture of sulfuric acid and hydrogen peroxide to remove carbon-containing and oxygen-containing impurities in the groove. Then, hydrogen (H2) is used to perform a second cleaning of the groove at 750°C to further remove carbon-containing and oxygen-containing impurities in the groove. However, during the first cleaning, due to the problem that sulfuric acid and hydrogen peroxide have corrosion that is difficult to control, when the silicon germanium epitaxial layer 200 is deposited in the groove, the crystal quality of the silicon germanium epitaxial layer 200 is affected, thereby affecting the performance of the semiconductor device. During the second cleaning, due to the surface passivated by hydrogen, trapped charges are easily generated, which in turn triggers the negative bias temperature instability (NBTI) effect, thereby affecting the reliability of the semiconductor device. In addition, the temperature of hydrogen is continuously maintained at a high temperature of 750°C, which is prone to oxidation of germanium and other potential material damage, and it is also impossible to ensure a sufficiently high removal rate of carbon-containing and oxygen-containing impurities.

[0033] The core idea of ​​the present invention is to provide a method for manufacturing a semiconductor device, which can avoid affecting the substrate when removing carbon-containing impurities and oxygen-containing impurities, thereby avoiding defects in the silicon germanium epitaxial layer 200 and improving the reliability of the semiconductor device.

[0034] In order to realize the above idea, the present invention provides a method for manufacturing a semiconductor device. Figure 1 and Figure 2 A specific implementation of a method for manufacturing a semiconductor device is disclosed. The method for manufacturing a semiconductor device includes the following steps S1 to S5.

[0035] Step S1 : providing a semiconductor substrate 100 having a PMOS region, wherein a gate structure 300 and a groove are formed on the semiconductor substrate 100 , wherein the groove is located on two sides of the gate structure 300 .

[0036] Specifically, refer to Figure 1 and Figure 2 As shown, the semiconductor substrate 100 has a PMOS region for forming a PMOS transistor. The PMOS region includes an N-well substrate (N-well). A gate structure 300 and a groove (not shown in the figure) are formed on the N-well substrate. The groove is located on both sides of the gate structure 300. Figure 1 The groove shown in has been filled with silicon germanium material to form a silicon germanium epitaxial layer 200. That is, the groove is located at the silicon germanium epitaxial layer 200. In order to improve the control ability of the gate structure 300, increase the contact area between the gate and the channel, so that the gate structure 300 can more effectively control the channel current and improve the driving ability of the device, for an embedded silicon germanium (SiGe) semiconductor device, the groove is a sigma groove. The shape of the silicon germanium epitaxial layer 200 after the sigma groove is filled with silicon germanium material is also the shape of a sigma structure.

[0037] Step S2: Perform a first cleaning process on the semiconductor substrate 100 to remove carbon- and oxygen-containing impurities remaining in the groove. The reagent for the first cleaning process includes a hydrofluoric acid solution and a dimethyl sulfoxide (DMSO) solution mixed in a set volume ratio.

[0038] Specifically, referring Figure 1 and Figure 2 As shown, during the process of forming the groove, steps such as photolithography and development are carried out on the position of the groove using photoresist. After patterning the groove, there are still carbon- and oxygen-containing impurities such as photoresist remaining in the groove. Perform a first cleaning process on the semiconductor substrate 100 to remove the carbon- and oxygen-containing impurities remaining in the groove. The reagent for the first cleaning process includes a hydrofluoric acid (HF) solution and a dimethyl sulfoxide (DMSO) solution. The volume concentration of the hydrofluoric acid solution is preferably 1% - 5%. The volume concentration of the dimethyl sulfoxide solution is preferably 0.1 - 1%. The volume ratio of the hydrofluoric acid solution to the dimethyl sulfoxide solution is 0.1% - 0.5%. The duration of the first cleaning process is 5 min - 30 min, and the temperature is 25°C - 80°C. Among them, DMSO dissolves HF as an organic solvent. Using a hydrofluoric acid (HF) solution and dimethyl sulfoxide (DMSO) as the cleaning agent for wet etching to perform the first cleaning process can utilize the high permeability of DMSO and the chemical activity of HF to effectively promote the dissolution of organic substances, dissolve the carbon- and oxygen-containing impurities remaining in the groove, and thus can effectively remove the carbon- and oxygen-containing impurities in the groove. At the same time, the reaction conditions are mild, which can reduce the damage to the semiconductor substrate 100 and improve the reliability of the semiconductor device. The volume ratio of the hydrofluoric acid solution to the dimethyl sulfoxide (DMSO) solution can be 0.1%, 0.2%, 0.3%, 0.4%, 0.5%, or any volume ratio within 0.1% - 0.5%. The duration of the first cleaning process can be 5 minutes (min), 10 min, 20 min, 25 min, 30 min, or any time within 5 min - 30 min. The temperature for performing the first cleaning process can be 25°C, 30°C, 50°C, 80°C, or any temperature within the range of 25°C - 80°C.

[0039] Step S3: In an inert gas environment, perform a second cleaning process on the semiconductor substrate 100 to remove the carbon- and oxygen-containing impurities in the groove. When performing the second cleaning process, the temperature needs to reach the target temperature. The gas temperature for performing the second cleaning process is set in a staged manner starting from the first set temperature and increasing until the temperature reaches the target temperature.

[0040] Specifically, referring Figure 1 and Figure 2As shown, after the first cleaning process, a second cleaning process is performed on the semiconductor substrate 100 to remove carbon- and oxygen-containing impurities in the grooves. The gas for the second cleaning process includes ammonia (NH3). The concentration of ammonia is 70% - 100%. That is, the concentration of ammonia being greater than or equal to 70% is sufficient. When performing the second cleaning process, the temperature needs to reach the target temperature. The target temperature is 400 °C. When performing the second cleaning, ammonia (NH3) is introduced. NH3 passivates the surface of the grooves, forms a stable surface chemical state on the groove surface, enhances the atomic flatness of the surface, and further removes carbon and oxygen impurities. Ammonia can also form a nitride layer on the surface of the semiconductor substrate 100. Si-N can effectively saturate the Si dangling bonds on the groove surface and replace the active sites of carbon and oxygen, thereby avoiding the subsequent carbon and oxygen from participating in the reaction again in the subsequent process, achieving the purpose of effectively removing carbon- and oxygen-containing impurities and reducing the surface defects of the semiconductor substrate 100. Especially for high-mobility embedded silicon-germanium semiconductor devices, it can effectively improve the interface quality of the semiconductor device and enhance the reliability of the semiconductor device.

[0041] The temperature of ammonia gas for performing the second cleaning process increases in a stepwise manner starting from a first set temperature until the temperature reaches the target temperature. The temperature of the gas for performing the second cleaning process is set to increase in a stepwise manner starting from the first set temperature until the temperature reaches the target temperature, including: the temperature of the gas for performing the second cleaning process is set in steps to a1 °C, a2 °C, a3 °C, and X °C, where a1 is the first set temperature, X is the target temperature, and 0 °C < a1 °C < a2 °C < a3 °C < X °C. Preferably, a1 °C is 100 °C, a2 °C is 200 °C, a3 °C is 300 °C, and X °C is 400 °C. That is, according to the stepwise setting of 100 °C - 200 °C - 300 °C - 400 °C, the temperature of the gas for the second cleaning process is increased. By using the processing method of setting the temperature in steps at a low temperature, the problems of surface damage and internal material deterioration of the semiconductor substrate 100 caused by a single high-temperature treatment are avoided, and the reliability of the semiconductor device is improved. When performing the second cleaning process, when the temperature is 100 °C, the duration is 5 s to 60 s; when the temperature is 200 °C, the duration is 5 s to 60 s; when the temperature is 300 °C, the duration is 5 s to 60 s; when the temperature is 400 °C, the duration is 5 s to 60 s. In this embodiment, preferably, when performing the second cleaning process, when the temperature is 100 °C, the duration is 30 s; when the temperature is 200 °C, the duration is 30 s; when the temperature is 300 °C, the duration is 30 s; when the temperature is 400 °C, the duration is 30 s. Further, in order to prevent the temperature from causing a thermal shock to the surface of the semiconductor substrate 100, the heating rate of the gas temperature from 100 °C to 200 °C, from 200 °C to 300 °C, and from 300 °C to 400 °C is 15 - 25 °C / min. When the gas temperature drops from 400 °C to 100 °C, the cooling rate is less than or equal to 25 °C / min.

[0042] The inert gas therein can be one of nitrogen, helium, etc. or any combination thereof, and no specific limitation is made here. As long as it can ensure that the semiconductor substrate 100 is not in an oxygen environment when performing the second cleaning process.

[0043] Step S4: Perform a third cleaning process on the semiconductor substrate 100 to remove the remaining impurities remaining in the grooves.

[0044] Specifically, refer Figure 1 and Figure 2As shown, after the second cleaning process, a third cleaning process is performed on the semiconductor substrate 100 to remove the remaining impurities remaining in the grooves. As an example, the third cleaning process is implemented using the Siconi etching process. The etching gases for Siconi etching mainly include NH3 and NF3. It should be noted that the order of performing the first cleaning process, the second cleaning process, and the third cleaning process can be arbitrarily adjusted. Preferably, since the second cleaning process and the third cleaning process are performed in the same chamber of the machine tool, the semiconductor substrate 100 can first be subjected to the first cleaning process, and then the second cleaning process and the third cleaning process.

[0045] Step S5: Epitaxially grow an embedded germanium-silicon layer to completely fill the groove.

[0046] Specifically, referring to Figure 1 and Figure 2 As shown, a selective epitaxial growth process is used to completely fill the groove with a germanium-silicon material to form a germanium-silicon epitaxial layer 200. The selective epitaxial growth process can be one of low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD), ultra-high vacuum chemical vapor deposition (UHVCVD), rapid thermal chemical vapor deposition (RTCVD), and molecular beam epitaxy (MBE). It should be noted that since the specific growth process of the germanium-silicon epitaxial layer 200 and the structure of the germanium-silicon epitaxial layer 200 are prior arts, those skilled in the art are already familiar with their specific processes and structures, and will not be elaborated in detail here.

[0047] To implement the above idea, this embodiment also discloses a semiconductor device, including being fabricated using the semiconductor device fabrication method as described above.

[0048] The semiconductor device provided in this embodiment and the semiconductor device provided in this embodiment belong to the same inventive concept. Therefore, the semiconductor device provided in this embodiment has at least all the advantages of the semiconductor device provided in this embodiment, avoids defects in the germanium-silicon epitaxial layer 200, and improves the reliability of the semiconductor device.

[0049] In summary, the above embodiments have elaborated in detail different configurations of the semiconductor device and its fabrication method. Of course, the above description is only a description of the preferred embodiments of the present invention, and is not any limitation on the scope of the present invention. The present invention includes but is not limited to the configurations listed in the above embodiments. Those skilled in the art can draw inferences from the content of the above embodiments. Any changes and modifications made by those of ordinary skill in the art of the present invention based on the above disclosure fall within the protection scope of the claims.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: include: Providing a semiconductor substrate having a PMOS region, wherein the semiconductor substrate is formed with a gate structure and a groove, wherein the groove is located at two sides of the gate structure; Performing a first cleaning process on the semiconductor substrate to remove carbon-containing and oxygen-containing impurities remaining in the groove, wherein a reagent for the first cleaning process includes a hydrofluoric acid solution and a dimethyl sulfoxide (DMSO) solution mixed in a set volume ratio; Performing a second cleaning process on the semiconductor substrate to remove carbon-containing and oxygen-containing impurities in the groove, wherein the gas used in the second cleaning process includes ammonia; An embedded silicon germanium layer is epitaxially grown to completely fill the groove.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The volume ratio of the hydrofluoric acid solution to the dimethyl sulfoxide (DMSO) solution is 0.1% to 0.5%, the first cleaning process is performed for 5 minutes to 30 minutes, and the temperature is 25° C. to 80° C.

3. The method for manufacturing a semiconductor device according to claim 1, wherein: When performing the second cleaning process, the temperature in an inert gas environment needs to reach a target temperature, which is 400° C.

4. The method for manufacturing a semiconductor device according to claim 3, wherein: The gas temperature for performing the second cleaning process is set in stages and increases from a first set temperature until the temperature reaches a target temperature.

5. The method for manufacturing a semiconductor device according to claim 4, characterized in that: The gas temperature for performing the second cleaning process is set in stages to a1°C, a2°C, a3°C and X°C, wherein a1 is the first set temperature, X is the target temperature, and 0°C<a1°C<a2°C<a3°C<X°C.

6. The method for manufacturing a semiconductor device according to claim 5, wherein: The a1°C is 100°C, the a2°C is 200°C, the a3°C is 300°C, and the X°C is 400°C.

7. The method for manufacturing a semiconductor device according to claim 6, wherein: When performing the second cleaning process, the gas temperature increases from 100°C to 200°C, from 200°C to 300°C, and from 300°C to 400°C at a heating rate of 15 to 25°C / min. When the gas temperature decreases from 400 to 100°C, the cooling rate is less than or equal to 25°C / min.

8. The method for manufacturing a semiconductor device according to claim 1, wherein: The method further includes: A third cleaning process is performed on the semiconductor substrate to remove remaining impurities in the groove, and the gas used in the third cleaning process includes ammonia and nitrogen trifluoride.

9. The method for manufacturing a semiconductor device according to claim 8, characterized in that: The order of the first cleaning process, the second cleaning process and the third cleaning process may be arbitrarily changed.

10. A semiconductor device, characterized in that: include: The semiconductor device is manufactured using the semiconductor device manufacturing method as described in any one of claims 1 to 9.

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