Modular multi-manifold micro-channel chip cooling device and manufacturing method thereof

Abstract

The invention provides a modular multi-manifold micro-channel chip cooling device and a manufacturing method thereof, and relates to the field of heat dissipation of micro electronic devices. The device comprises a manifold layer and an embedded micro-channel layer which are combined together according to a high-temperature bonding mode, the manifold layer and the embedded micro-channel layer are arranged from top to bottom; the embedded micro-channel layer is used for conveying cooling liquid into the manifold layer, and the manifold layer is used for conducting the cooling liquid so as to perform heat exchange on an area to be cooled; wherein the manifold layer comprises a plurality of liquid separation flow channels of a direct current type and topological optimization S-shaped structure, and the embedded micro-flow channel layer is provided with a plurality of liquid inlets and liquid outlets and corresponds to the liquid separation flow channels of the manifold layer. The cooling structure solves the problem that an existing cooling structure cannot solve the problem that local serious heating of a chip cannot be solved.

Description

Technical Field

[0001] The present invention relates to the technical field of heat dissipation of microelectronic devices, and particularly to a modular multi-manifold microchannel chip cooling device and a manufacturing method thereof. Background Art

[0002] In industry, it is particularly important to increase the heat transfer capacity while reducing the size of equipment. Miniature heat exchangers have been widely recognized due to their various advantages. Using a microchannel structure in a heat exchanger can effectively improve its heat transfer efficiency, making the equipment smaller and more compact. As the heat transfer surface is the interface where heat transfer occurs, it plays a crucial role in the heat exchange process between two fluids, and the heat transfer rate is proportional to the heat transfer surface. Therefore, a heat exchanger using a microchannel structure can achieve the largest surface growth with the smallest volume. For the demand of new heat exchangers that can be applied to various fields such as electronic device cooling, bioengineering, advanced energy microsystems, national defense, and aerospace, microchannel heat dissipation devices have unique advantages.

[0003] With the continuous development of electronic systems towards high integration, high power, and multi-function, the power density of various chips is constantly increasing. Currently, the average heat flux density of chips has increased from 10W / cm 2 to 500W / cm 2 , and the heat flux density of local hot spots will exceed 1000W / cm 2 . However, the existing microchannel heat dissipation devices on the market can only achieve overall heat dissipation of the chips and cannot solve the problem of local severe heating. Therefore, for locally highly heated chips, there is an urgent need for a highly efficient heat dissipation microchannel cooling device. Summary of the Invention

[0004] In order to overcome the deficiencies of the prior art, the purpose of the present invention is to provide a modular multi-manifold microchannel chip cooling device and a manufacturing method thereof.

[0005] To achieve the above purpose, the present invention provides the following solutions: A modular multi-manifold microchannel chip cooling device, comprising: A manifold layer and an embedded microchannel layer combined by a high-temperature bonding method; The manifold layer and the embedded microchannel layer are arranged from top to bottom; The embedded microchannel layer is used to convey a coolant into the manifold layer, and the manifold layer is used to conduct the coolant for heat exchange with the area to be cooled; Wherein, the manifold layer includes a plurality of straight-through and topologically optimized S-shaped liquid distribution channels, and the embedded microchannel layer is provided with a plurality of liquid inlets and outlets corresponding to the liquid distribution channels of the manifold layer.

[0006] Preferably, the length range of the liquid separation channel is from 200 μm to 500 μm, the width of the liquid separation channel is 100 μm, and the depth of the liquid separation channel is 300 μm.

[0007] Preferably, the multiple liquid inlets and outlets are formed by the staggered arrangement of the liquid inlet microchannels and the liquid outlet microchannels.

[0008] Preferably, the liquid inlet microchannel is a topology optimization structure.

[0009] Preferably, the width of the liquid inlet microchannel is 100 μm, and the depth of the liquid inlet microchannel is 300 μm.

[0010] Preferably, the width of the liquid outlet microchannel is 100 μm, and the depth of the liquid outlet microchannel is 300 μm.

[0011] Preferably, the length of the liquid inlet is 200 μm, and the width of the liquid inlet is 100 μm.

[0012] Preferably, the length of the liquid outlet is 100 μm, and the width of the liquid outlet is 100 μm.

[0013] A manufacturing method of a modular multi-manifold microchannel chip cooling device, the manufacturing method comprising: Determine the chip to be cooled and preprocess the chip to be cooled to obtain a preprocessed chip; Perform microchannel layer processing and manifold layer processing on the preprocessed chip to obtain a cooling device.

[0014] Preferably, the method for manifold layer processing is: Coat a positive photoresist PR layer on the back of the preprocessed chip, and use a mask containing a manifold pattern for exposure to obtain a chip after mask pattern transfer, and perform development and baking using a positive photoresist developer to obtain a first intermediate cooling device; Use a reactive ion etching process to etch the silicon dioxide on the surface of the substrate of the first intermediate cooling device, and expose the silicon dioxide region on the substrate surface to the air. Based on deep reactive ion etching, use the anisotropy of silicon to alternately etch the substrate to obtain a second intermediate cooling device; Use a dry plasma asher to remove the photoresist on the surface of the substrate of the second intermediate cooling device, and remove the silicon dioxide layer by wet etching to obtain the manifold layer of the cooling device.

[0015] The present invention discloses the following technical effects: The present invention provides a modular multi-manifold microchannel chip cooling device and a manufacturing method thereof. The device includes: a manifold layer and an embedded microchannel layer combined together by means of high-temperature bonding; the manifold layer and the embedded microchannel layer are arranged from top to bottom; the embedded microchannel layer is used to transport the coolant into the manifold layer, and the manifold layer is used to conduct the coolant to perform heat exchange on the area to be cooled; wherein, the manifold layer includes a plurality of liquid distribution channels with a direct current type and a topologically optimized S-shaped structure, and the embedded microchannel layer is provided with a plurality of liquid inlets and outlets corresponding to the liquid distribution channels of the manifold layer. Based on the existing 3D manifold cooling device, the present invention adds a direct current type and a topologically optimized S-shaped module manifold design to the first-layer manifold layer, and uses a topologically optimized channel structure and a modular design for the second-layer embedded microchannels. The topologically optimized S-shaped structure can change the flow rate and contact area of the coolant at the key heat-generating parts of the chip, realizing targeted cooling of the key heat-generating parts of the chip, and has a more significant effect when the flow rate of the coolant is relatively low, which can make up for the influence caused by different powers of different micro-pumps. The modular structure can change the manifold density of the manifold layer in different heat-generating areas, playing a role in targeted heat dissipation. The modular channel structure is also used in the bottom microchannels. The inlet microchannel is designed through topological optimization to ensure that the coolant enters the manifold layer at the same pressure. At the same time, special designs are carried out for different degrees of heat-generating areas, using different numbers or different arrangements, which is more conducive to heat exchange. The coolant inlet and the coolant outlet are arranged in different microchannels. By means of vertical liquid replacement, while increasing the contact area between the coolant and the device, it ensures that the coolant enters and exits the cooling device at a relatively high rate and reduces the power required by the micro-pump. The present invention provides a solution for chips with uneven heat generation, and has a reasonable design and a delicate structure, and has a significant improvement in the heat dissipation capacity compared with the existing cooling structure device. Description of the Drawings

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0017] Figure 1 It is an overall structure diagram of a modular multi-manifold microchannel chip cooling device provided by an embodiment of the present invention; Figure 2 It is a schematic structural diagram of the manifold layer provided by an embodiment of the present invention; Figure 3 It is a schematic plan view of the structure of the embedded microchannel layer provided by an embodiment of the present invention; Figure 4This is a partial 3D structure diagram of the embedded microchannel layer provided by the embodiments of the present invention.

[0018] Explanation of reference numerals: 1. Manifold layer; 2. Embedded microchannel layer; 3. Liquid inlet; 4. Liquid outlet; 5. Liquid inlet microchannel; 6. Liquid outlet microchannel; 7. Straight-flow channel; 8. Topology-optimized S-shaped channel. Detailed implementation manners

[0019] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0020] To make the above objects, features, and advantages of the present invention more obvious and understandable, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0021] As Figures 1-4 shown, the present invention provides a modular multi-manifold microchannel chip cooling device, including: A manifold layer 1 and an embedded microchannel layer 2 combined together by means of high-temperature bonding; The manifold layer 1 and the embedded microchannel layer 2 are arranged from top to bottom; The embedded microchannel layer 2 is used to transport the coolant into the manifold layer 1, and the manifold layer 1 is used to conduct the coolant to perform heat exchange on the area to be cooled; Wherein, the manifold layer 1 includes a plurality of straight-flow channels 7 and topology-optimized S-shaped channels 8, and the embedded microchannel layer 2 is provided with a plurality of liquid inlets 3 and liquid outlets 4 and corresponds to the liquid distribution channels of the manifold layer 1.

[0022] Specifically, the coolant inlet 3 and the coolant outlet 4 are arranged in different microchannels. By means of vertical liquid exchange, while increasing the contact area between the coolant and the device, it ensures that the coolant enters and exits the cooling device at a relatively high rate and reduces the power required by the micro pump.

[0023] Specifically, it includes a manifold layer 1 and an embedded microchannel layer 2 from top to bottom. The liquid distribution channels in the manifold layer 1 include a straight-through channel 7 and a topologically optimized S-shaped channel 8. The length can be 500 to 200 μm according to modular design, the width is 100 μm, and the depth is 300 μm. The embedded microchannel layer 2 is provided with a plurality of liquid inlets 3 and liquid outlets 4, which are formed by the staggered arrangement of the liquid inlet microchannels 5 and the liquid outlet microchannels 6, corresponding to the liquid distribution channels in the manifold layer 1. The liquid inlet microchannels 5 in the embedded microchannel layer 2 adopt a topologically optimized design structure to ensure that the water pressure sent to the upper layer is within the error range, with a width of 100 μm and a depth of 300 μm; the liquid outlet microchannels 6 have a width of 100 μm and a depth of 300 μm; the liquid inlets 3 have a length of 200 μm and a width of 100 μm; the liquid outlets 4 have a length of 100 μm and a width of 100 μm.

[0024] More specifically, the cooling method of the cooling device disclosed in this embodiment is as follows: The coolant fluid flows in through the multiple liquid inlets of the bottom liquid inlet microchannels and is evenly dispersed into the liquid distribution channels of the manifold layer 1, and effective heat exchange occurs with the inner wall during the flow process. After the coolant flows through the manifold liquid distribution channels until the end, it impacts the inner wall, and then the coolant enters the liquid outlet microchannels 6 and flows out through the liquid outlets.

[0025] More specifically, the coolant fluid enters the embedded microchannel layer 2 through the liquid inlets 3 located in the multiple liquid inlet microchannels 5. The coolant fills the liquid inlet microchannels 5 upward and is evenly dispersed into the liquid distribution channels of the manifold layer 1 and flows forward. When the coolant flows through the topologically optimized S-shaped channel 8, the flow rate slows down, the contact area with the inner wall increases, and efficient heat exchange occurs. When the coolant reaches the end of the manifold layer 1, it collides with the inner wall, then enters the liquid outlet microchannels 6 and flows out through the liquid outlets 4. The number and arrangement of the liquid inlet microchannels 5 and the liquid outlet microchannels 6 in different parts of the chip are different, corresponding to different structures and arrangement densities of the manifold layer 1. There are multiple liquid inlet microchannels 5 and liquid outlet microchannels 6 in the high-heat generation areas. When the coolant flows in through the multiple liquid inlets 3, in addition to entering the liquid outlet microchannels 6 by impacting the inner wall, the coolant can also enter the liquid outlet microchannels 6 through the collisions occurring within the manifold layer 1, and finally flows out through the liquid outlets 4.

[0026] This embodiment also provides a manufacturing method for a modular multi-manifold microchannel chip cooling device, and the manufacturing method includes: Determine the chip to be cooled and perform pre-treatment on the chip to be cooled to obtain a pre-treated chip; Perform microchannel layer processing and manifold layer processing on the pre-treated chip to obtain a cooling device.

[0027] The method for the manifold layer processing is as follows: Coat the positive photoresist PR layer on the back of the pre-treated chip, and use a mask containing a manifold pattern for exposure to obtain the chip after the mask pattern is transferred, and develop and bake it with a positive photoresist developer to obtain the first intermediate cooling device; Use the reactive ion etching process to etch the silicon dioxide on the surface of the substrate of the first intermediate cooling device, and expose the silicon dioxide region on the substrate surface to the air. Based on deep reactive ion etching, use the anisotropy of silicon to alternately etch the substrate to obtain the second intermediate cooling device; Use a dry plasma asher to remove the photoresist on the surface of the substrate of the second intermediate cooling device, and remove the silicon dioxide layer by wet etching to obtain the manifold layer of the cooling device.

[0028] Specifically, (1) Clean the chip to be used for cooling decoration to remove the contaminants remaining on the back of the chip. After cleaning and drying, perform a thermal oxidation treatment on the back of the chip. The thickness of the silicon dioxide layer is 4000 nm, and this oxide layer will act as a hard mask to protect the silicon-based non-etched area during the deep silicon etching process; (2) Coat the positive photoresist PR layer on the back of the substrate, and use a mask containing a manifold pattern for exposure. After the transfer of the mask pattern is completed, develop it with a positive photoresist developer, and perform a post-baking treatment after development to make the photoresist more firm; (3) Use the reactive-ion etching (RIE) process to etch the silicon dioxide on the surface of the substrate, with an etching depth of 4000 nm, to expose the single-crystalline silicon area to be etched to the air. Then, based on deep reactive ion etching, use the anisotropy of silicon to alternately etch the substrate, with an etching depth of 300 μm; (4) Use a dry plasma asher to remove the photoresist on the surface of the substrate, and remove the silicon dioxide layer by wet etching; The thickness of the Cr metal layer is 300 Å, and the thickness of the Au metal layer is 2000 Å to complete the bonding with the microchannel layer. The processing process flow of the microchannel layer is basically the same as that of the manifold layer processing step. The difference is that the structural processing of the microchannel involves double-sided photolithography etching. After the liquid separation and liquid convergence channels on the front of the microchannel layer are etched, multiple coolant inlets and outlets need to be processed on the back of the microchannel layer.

[0029] Specifically, to verify the superior heat dissipation performance of the structure provided by the present invention, a traditional rectangular straight microchannel structure is used as a control group, and a thermal simulation comparison analysis is performed on the two microchannel structures. According to the principle of equal parameters, the following settings are made: the substrate materials and sizes are the same; the channel sizes are the same; the coolant is the same; the heat flux, heat source power, and sizes are the same; the flow channel coverage areas are basically the same. Based on this, the detailed thermal simulation calculation model parameters and the settings of each boundary condition parameter are as follows: 1. Substrate material: Silicon 2. Heat source size: 6.3 mm * 3.6 mm * 0.2 mm 3. Cooling liquid: Liquid water 4. Ambient temperature: 273.15 K 5. Heat source power: 20 W Thermal simulation models of two microchannel heat sinks are established. Using the same discretization format and solution model, thermal simulation calculations are carried out on three microchannel heat sink structures under different inlet flow rates. The simulation results are shown in Table 1. Table 1 is a comparison table of simulation results, and Table 1 is as follows: Table 1 Comparison Table of Simulation Results

[0030] It can be analyzed from the above numerical simulation results that the microchannel structure designed by the present invention can more effectively reduce the overall temperature of the heating chip and has a more effective heat dissipation effect on the key heating areas, and the solid-liquid heat transfer efficiency has been significantly improved compared with the basic structure. Maximum temperature: The highest temperature of the system. Minimum temperature: The lowest temperature of the system.

[0031] In this specification, each embodiment is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0032] Specific examples are used in this article to elaborate on the principles and implementation methods of the present invention. The descriptions of the above embodiments are only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, based on the idea of the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A modular multi-manifold microchannel chip cooling device, characterized in that: include: A manifold layer and an embedded microchannel layer are bonded together by high temperature bonding; The manifold layer and the embedded microchannel layer are arranged from top to bottom; The embedded microchannel layer is used to transport the cooling liquid to the manifold layer, and the manifold layer is used to conduct the cooling liquid to perform heat exchange in the area to be cooled; The manifold layer comprises a plurality of liquid separation channels of direct flow type and topologically optimized S-shaped structures, and the embedded microchannel layer is provided with a plurality of liquid inlets and liquid outlets corresponding to the liquid separation channels of the manifold layer; The length of the liquid separation channel ranges from 200 μm to 500 μm, the width of the liquid separation channel is 100 μm, and the depth of the liquid separation channel is 300 μm; the multiple liquid inlets and liquid outlets are composed of liquid inlet microchannels and liquid outlet microchannels arranged alternately; the liquid inlet microchannel is a topologically optimized structure.

2. A modular multi-manifold microchannel chip cooling device according to claim 1, characterized in that: The width of the liquid inlet microchannel is 100 μm, and the depth of the liquid inlet microchannel is 300 μm.

3. The modular multi-manifold microchannel chip cooling device according to claim 1, characterized in that: The width of the liquid outlet microchannel is 100 μm, and the depth of the liquid outlet microchannel is 300 μm.

4. A modular multi-manifold microchannel chip cooling device according to claim 1, characterized in that: The length of the liquid inlet is 200 μm, and the width of the liquid inlet is 100 μm.

5. The modular multi-manifold microchannel chip cooling device according to claim 1, characterized in that: The length of the liquid outlet is 100 μm, and the width of the liquid outlet is 100 μm.

6. A method for manufacturing a modular multi-manifold microchannel chip cooling device, applied to the cooling device according to any one of claims 1 to 5, characterized in that: The manufacturing method comprises: Determining a chip to be cooled and preprocessing the chip to be cooled to obtain a preprocessed chip; The pre-processing chip is processed into a micro-channel layer and a manifold layer to obtain a cooling device.

7. The method for manufacturing a modular multi-manifold microchannel chip cooling device according to claim 6, characterized in that: The method for processing the manifold layer is: A positive photoresist PR layer is coated on the back of the pre-processed chip, and a mask containing a manifold pattern is used for exposure to obtain a chip after the mask pattern is transferred, and a positive photoresist developer is used for development and baking to obtain a first intermediate cooling device; The silicon dioxide on the surface of the substrate of the first intermediate cooling device is etched by using a reactive ion etching process, and the silicon dioxide area on the surface of the substrate is exposed to the air. Based on deep reactive ion etching, the substrate is alternately etched by utilizing the anisotropy of silicon to obtain a second intermediate cooling device. The photoresist on the surface of the substrate of the second intermediate cooling device is removed by a dry plasma stripper, and the silicon dioxide layer is removed by wet etching to obtain the manifold layer of the cooling device.

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