Semiconductor structure and forming method thereof
By designing a normally open piezoelectric MEMS valve, the combination of cantilever and piezoelectric actuator solves the problem that existing microvalves cannot be completely closed, achieving low power consumption and low cost microfluidic control.
Patent Information
- Application Number
- CN202411893958.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-03-27
- Filing Date
- 2024-12-20
- Publication Date
- 2025-06-20
AI Technical Summary
Existing microvalves cannot be completely closed, resulting in fluid leakage and high power consumption, especially in pneumatic microvalves that rely on external power supplies and ducts.
A normally open piezoelectric MEMS valve is designed, including cantilevers, piezoelectric actuators and valve blades. The cantilever is formed of a layer with residual compressive stress, and the piezoelectric actuator generates tensile stress by electrical activation, causing the cantilever to bend and close the valve cavity.
This enables valves to be normally open without external power and ducts, reducing power consumption and cost reduction through semiconductor manufacturing processes, suitable for microfluidic and wearable applications.
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Figure CN120172341A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present application relate to semiconductor structures and methods of forming the same. Background Art
[0002] Microelectromechanical systems (MEMS) is a technology that integrates miniaturized mechanical and electromechanical components on an integrated chip. MEMS devices are typically fabricated using microfabrication techniques. In recent years, MEMS devices have been widely used. For example, MEMS devices are present in handheld devices (such as accelerometers, gyroscopes, and digital compasses), pressure sensors (such as impact sensors), microfluidic components (such as valves and pumps), optical switches (such as mirrors), and the like. Summary of the Invention
[0003] According to one aspect of embodiments of the present application, there is provided a semiconductor structure, including: a cantilever having a first end located on and bonded to a substrate, and a second end opposite to the first end and located above an actuator cavity; a piezoelectric actuator located on the cantilever; and a valve blade bonded to the second end of the cantilever and further located above a valve cavity that is laterally adjacent to the actuator cavity; wherein the cantilever has a curved profile at the second end, and the curved profile is offset from the first end in a direction transverse to the top surface of the substrate.
[0004] According to another aspect of embodiments of the present application, there is provided a semiconductor structure, including: a cantilever having a first end located on and bonded to a substrate, and a second end opposite to the first end and located above an actuator cavity; a piezoelectric actuator located on the cantilever; and a valve blade located above and bonded to the second end of the cantilever, wherein the top surface of the valve blade is inclined upward from a position directly above the second end of the cantilever with respect to the top surface of the substrate.
[0005] According to yet another aspect of embodiments of the present application, there is provided a method of forming a semiconductor structure, including: providing a semiconductor layer located on and spaced apart from a substrate; depositing a device dielectric layer above the semiconductor layer; forming a piezoelectric actuator above the device dielectric layer; patterning the semiconductor layer and the device dielectric layer to define a cantilever located below the piezoelectric actuator; bonding a valve blade to the cantilever; patterning the substrate to form an actuator cavity at the cantilever, wherein the cantilever has a planar profile after the formation of the actuator cavity; and releasing the cantilever, wherein the cantilever transitions from the planar profile to a curved profile during the release. Brief Description of the Drawings
[0006] When read in conjunction with the accompanying drawings, various aspects of the present invention can be best understood from the following detailed description. It should be emphasized that, according to standard practice in the industry, the various components are not drawn to scale and are for illustrative purposes only. In fact, for clarity of discussion, the dimensions of the various components can be arbitrarily increased or decreased.
[0007] Figure 1A and Figure 1B shows cross-sectional views of some embodiments of a piezoelectric microelectromechanical system (MEMS) valve in a released state.
[0008] Figure 2 shows Figure 1A and Figure 1B cross-sectional views of some embodiments of a piezoelectric MEMS valve in an actuated state.
[0009] Figure 3 shows Figure 2 cross-sectional views of some alternative embodiments of a piezoelectric MEMS valve.
[0010] Figure 4 shows Figure 2 top layout views of some embodiments of a piezoelectric MEMS valve.
[0011] Figure 5A and Figure 5B shows Figure 1A and Figure 1B and / or Figure 2 cross-sectional views of some more detailed embodiments of a piezoelectric MEMS valve, where an input / output (IO) structure is located on a piezoelectric actuator of the piezoelectric MEMS valve.
[0012] Figure 6 shows Figure 5A and Figure 5B top layout views of some embodiments of a piezoelectric MEMS valve.
[0013] Figure 7A and Figure 7B shows Figure 5A and Figure 5B cross-sectional views of some alternative embodiments of a piezoelectric MEMS valve.
[0014] Figure 8 shows Figure 7A and Figure 7B top layout views of some embodiments of a piezoelectric MEMS valve.
[0015] Figures 9A - 9C shows Figure 8 top layout views of some alternative embodiments of a piezoelectric MEMS valve.
[0016] Figure 10 shows Figure 1A and Figure 1B and / or Figure 2 top layout views of some alternative embodiments of a piezoelectric MEMS valve, where the piezoelectric MEMS valve has a spiral cantilever.
[0017] Figure 11A andFigure 11B Shows Figure 10 Cross-sectional views of some embodiments of the piezoelectric MEMS valve in the released state.
[0018] Figure 12 Shows Figure 10 Cross-sectional views of some embodiments of the piezoelectric MEMS valve in the actuated state.
[0019] Figure 13 Displays Figure 1A and Figure 1B and / or Figure 2 Top layout views of some alternative embodiments of the piezoelectric MEMS valve, where the piezoelectric MEMS valve has a curved cantilever.
[0020] Figure 14A and Figure 14B Displays Figure 13 Cross-sectional views of some embodiments of the piezoelectric MEMS valve in the released state.
[0021] Figure 15 Shows Figure 13 Cross-sectional views of some embodiments of the piezoelectric MEMS valve in the actuated state.
[0022] Figures 16 - 35 Shows a series of cross-sectional views of some first embodiments of a method of forming a piezoelectric MEMS valve.
[0023] Figure 36 Shows Figures 16 - 35 Block diagrams of some embodiments of the method.
[0024] Figures 37 - 48 Displays a series of cross-sectional views of some second embodiments of a method of forming a piezoelectric MEMS valve.
[0025] Figure 49 Shows Figures 37 - 48 Block diagrams of some embodiments of the method. Detailed Description
[0026] The following disclosure provides many different embodiments or examples for implementing the present invention. Specific embodiments or examples of components and arrangements are described below to simplify the present invention. Of course, these are only examples and are not intended to be limiting. For example, in the following description, forming a first component above or on a second component may include embodiments where the first component and the second component are in direct contact, and may also include embodiments where additional components may be formed between the first component and the second component such that the first component and the second component may not be in direct contact. In addition, the present invention may repeat reference numerals and / or letters in various examples. This repetition is for the purpose of simplicity and clarity and does not itself indicate a relationship between the various embodiments and / or configurations discussed.
[0027] In addition, for ease of description, spatial relationship terms such as "below", "beneath", "lower", "above", "upper", etc. may be used herein to describe the relationship of one element or component to another as shown in the figures. Except for the orientation shown in the figures, the spatial relationship terms are intended to include different orientations of the device during use or operation. The device may be positioned otherwise (rotated 90 degrees or in other orientations), and the spatial relationship descriptors used herein may be interpreted accordingly.
[0028] Microvalves are used in microfluidics to control the flow of fluids through microchannels. However, some microvalves cannot be fully closed. As a result, fluids may leak and / or diffuse through the microvalve. In addition, some microvalves rely on external power sources and / or pipes to operate. For example, pneumatic microvalves rely on an external pneumatic power source and pipes to deliver pneumatic power. Moreover, at least some such microvalves are inherently closed (e.g., normally closed) without a power source and thus rely on power for opening operations. However, for applications where the microvalve is opened more frequently than closed, this results in high power consumption.
[0029] In addition to microfluidics, microvalves can also be used for pressure control. For example, a microvalve can be integrated into an earcup to reduce the occlusion effect. The occlusion effect refers to the pressure caused by sound waves being trapped in the ear canal due to the earcup blocking the ear canal. By opening the ear canal with the microvalve of the earcup during normal use of the earcup and closing the microvalve during the use of active noise cancellation (ANC), the occlusion effect can be reduced. However, the microvalves in earcups are bulky, expensive, noisy, and consume high power.
[0030] This application relates to a normally open piezoelectric MEMS valve. The piezoelectric MEMS valve is applied to microfluidic control, pressure control (e.g., alleviating the occlusion effect in earcups), etc. In some embodiments, the piezoelectric MEMS valve includes a cantilever, a piezoelectric actuator, and a valve blade. The first end of the cantilever is located above and bonded to the substrate, and the second end is above the actuator cavity. The piezoelectric actuator is located on the cantilever, and the valve blade is above and bonded to the second end of the cantilever.
[0031] The cantilever portion is formed of a layer having a residual compressive stress. The residual compressive stress causes the cantilever to inherently bend downward from the first end to the second end without external factors to counteract the downward bending. In addition, since the valve blade is bonded to the second end, the curve causes the valve blade to be inclined downward relative to the top surface of the substrate to open the valve cavity. On the other hand, the electrical activation of the piezoelectric actuator generates a tensile stress opposite to the residual compressive stress. As a result, the cantilever bends upward from the first end to the second end to move the valve blade to a more horizontal position, thereby closing the valve cavity.
[0032] Due to residual compressive stress, the piezoelectric MEMS valve is typically open without any external power source and / or pipeline. This results in low power consumption, at least for applications where the piezoelectric MEMS valve is open more frequently than it is closed. Additionally, since a piezoelectric actuator is used to close the piezoelectric MEMS valve, the piezoelectric MEMS valve can be easily controlled (e.g., by voltage control and / or capacitance control), and the valve blade can form a tight seal to prevent leakage when the piezoelectric MEMS valve is closed. Moreover, the piezoelectric MEMS valve can be formed using semiconductor manufacturing processes. This reduces costs and allows for small sizes to be achieved for microfluidics, wearable applications, etc.
[0033] Reference Figure 1A and Figure 1B , cross-sectional views 100A, 100B of some embodiments of a piezoelectric MEMS valve in a released state are provided. Figure 1B There is provided Figure 1A an enlarged cross-sectional view 100B of a portion of the piezoelectric MEMS valve within the box BX1. The released state corresponds to the natural state of the piezoelectric MEMS valve without external factors (e.g., external power, force, stress, etc.) acting on the piezoelectric MEMS valve. Additionally, in the released state, the piezoelectric MEMS valve is open.
[0034] The cantilever 102 has a first end that is above and bonded to the substrate 104, and has a second end opposite the first end that is above the actuator cavity 106 extending through the substrate 104. In some embodiments, the cantilever 102 can be considered beam-shaped or lever-shaped. Additionally, the cantilever 102 supports the piezoelectric actuator 108 and is formed by the semiconductor layer 110 and the device dielectric layer 112. The semiconductor layer 110 is above the substrate 104 and is separated from the substrate 104 by the substrate dielectric layer 114, and the device dielectric layer 112 is above the semiconductor layer 110.
[0035] The piezoelectric actuator 108 and the device dielectric layer 112 have residual compressive stress such that the piezoelectric actuator 106 and the device dielectric layer 112 want to expand outwards. This results in an outward force along the top of the semiconductor layer 110, causing the cantilever 102 to inherently bend downwards. Additionally, since the piezoelectric MEMS valve is released, there are no external factors to counteract the external force and the downward bending, so the cantilever 102 bends downwards from the first end of the cantilever 102 to the other end of the cantilever 102.
[0036] The valve vane 116 is above the cantilever 102 and the valve cavity 118. The valve cavity 118 extends through the substrate 104 and is laterally separated from the actuator cavity 106. The valve vane 116 has a pad protrusion 116p and a stop protrusion 116s protruding from the bottom of the valve vane 116 at opposite ends of the valve vane 116, respectively. The pad protrusion 116p is cushioned by the vane engagement pad 120 and is joined to the second end of the cantilever 102 by the cantilever engagement pad 122 at the second end.
[0037] Since the cantilever 102 bends downward to the second end of the cantilever 102 and since the valve vane 116 is joined to the second end, the top surface of the valve vane 116 is inclined with respect to the top surface or the bottom surface of the substrate 104. For example, the angle α (as Figure 1B shown) between the top surface of the valve vane 116 and the top surface of the substrate 104 may be greater than about 25 degrees, about 45 degrees, about 65 degrees, or other suitable values. Additionally, due to the inclination, the valve cavity 118 is open. Fluid can pass through the valve cavity 118 unimpeded by the valve vane 116.
[0038] Due to the cantilever 102 inherently bending downward, the piezoelectric MEMS valve is normally open without any external power source and / or piping. This results in low power consumption, at least for applications where the piezoelectric MEMS valve is open more frequently than it is closed. Additionally, as described below, the piezoelectric MEMS valve can be formed using semiconductor manufacturing processes. This reduces costs and allows for small sizes to be achieved for microfluidics, wearable applications, and the like.
[0039] Continuing to refer to Figure 1A and Figure 1B , the piezoelectric actuator 108 includes a bottom electrode 124, a piezoelectric layer 126 above the bottom electrode 124, and a top electrode 128 above the piezoelectric layer 126. Additionally, the piezoelectric actuator 108 is released or unactuated, as schematically shown by the switch 130. The switch 130 is in an open state and selectively electrically couples the power source 132 from the top electrode 128 to the bottom electrode 124. As shown below, the piezoelectric actuator 108 can be actuated (e.g., by closing the switch 130) to close the piezoelectric MEMS valve.
[0040] When unactuated, the piezoelectric actuator 108 as a whole has a residual compressive stress that exerts an outward force along the top of the device dielectric layer 112 and the semiconductor layer 110. In some embodiments, the top electrode 128 and the bottom electrode 124 have a residual tensile stress, while the piezoelectric layer 126 has a residual compressive stress that cancels out and exceeds the residual tensile stress, such that the piezoelectric actuator 108 as a whole has a residual compressive stress.
[0041] In some embodiments, the compressive or tensile stress of a layer (e.g., device dielectric layer 112, piezoelectric layer 126, etc.) can be regarded as the compression or tension experienced by the layer when in an independent state or not in contact with any other object. Additionally, in some embodiments, the compressive or tensile stress of the layer can be intrinsic or extrinsic. For example, the internal stress can be the stress present during layer deposition. For example, the external stress can be the stress caused by changes in external factors (such as temperature, mechanical force, etc.) after the layer is deposited. In some embodiments, the residual compressive stress of the device dielectric layer 112 and the piezoelectric layer 126 is intrinsic, the residual tensile stress of the top electrode 128 and the bottom electrode 124 is intrinsic, and the semiconductor layer 110 has no intrinsic stress.
[0042] In some embodiments, the substrate 104 is or includes silicon and / or some other suitable substrate material. In some embodiments, the substrate dielectric layer 114 is or includes silicon oxide (e.g., SiO2) and / or some other suitable dielectric. In some embodiments, the semiconductor layer 110 is or includes silicon, polysilicon, some other suitable semiconductor, or any combination of the above. In some embodiments, the substrate 104, the substrate dielectric layer 114, and the semiconductor layer 110 correspond to a semiconductor-on-insulator substrate, etc.
[0043] In some embodiments, the thickness of the substrate 104 is about 200 - 1000 microns, about 200 - 600 microns, about 600 - 1000 microns, or some other suitable value. In some embodiments, the thickness of the substrate dielectric layer 114 is about 0.1 - 5 microns, about 0.1 - 2.5 microns, about 2.5 - 5 microns, or some other suitable value. In some embodiments, the thickness of the semiconductor layer 110 is about 0.1 - 50 microns, about 0.1 - 25 microns, about 25 - 50 microns, or some other suitable value.
[0044] In some embodiments, the device dielectric layer 112 is or includes silicon oxide (e.g., SiO2), titanium oxide (e.g., TiO2), some other suitable dielectric, or any combination of the above. In some embodiments, the thickness of the device dielectric layer 112 is about 0.1 - 10 microns, about 0.1 - 5 microns, about 5 - 10 microns, or some other suitable value.
[0045] In some embodiments, the bottom electrode 124 is or includes platinum (e.g., Pt) and / or some other suitable conductive material. In some embodiments, the piezoelectric layer 126 is or includes sol - gel, lead zirconate titanate (PZT), lead - free potassium sodium niobate (KNN), aluminum nitride (AlN), some other suitable piezoelectric material, or any combination of the above materials. In some embodiments, the top electrode 128 is or includes platinum (e.g., Pt), ruthenium (e.g., Ru), some other suitable conductive material, or any combination of the above materials.
[0046] In some embodiments, the thickness of the bottom electrode 124 is about 500 - 10000 angstroms, about 500 - 5000 angstroms, about 5000 - 10000 angstroms, or some other suitable value. In some embodiments, the thickness of the piezoelectric layer 126 is about 2000 - 50000 angstroms, about 2000 - 25000 angstroms, about 25000 - 50000 angstroms, or some other suitable value. In some embodiments, the thickness of the top electrode 128 is about 500 - 100000 angstroms, about 500 - 25000 angstroms, about 25000 - 50000 angstroms, about 50000 - 75000 angstroms, about 75000 - 100000 angstroms, or some other suitable value.
[0047] In some embodiments, the cantilever bonding pad 122 and the vane bonding pad 120 are in direct contact with each other at the fusion bond and / or eutectic bond. However, in alternative embodiments, other suitable bonding types are also feasible. In some embodiments, the thickness of the cantilever bonding pad 122 is about 3000 - 8000 angstroms, about 3000 - 5500 angstroms, about 5500 - 8000 angstroms, or some other suitable value. In some embodiments, the cantilever bonding pad 122 and / or the vane bonding pad 120 have a residual tensile stress that is offset and exceeded by the residual compressive stress of the device dielectric layer 112, such that the cantilever 102 maintains its natural curve downward.
[0048] The cantilever bonding pad 122 can be, for example, gold (e.g., Au), aluminum copper (e.g., AlCu), copper (e.g., Cu), tin (e.g., Sn), silicon dioxide (e.g., SiO2), some other suitable bonding material, or any combination of the above materials. The vane bonding pad 120 can be or include, for example, gold (e.g., Au), germanium (e.g., Ge), silicon (e.g., Si), some other suitable bonding material, or any combination of the above materials.
[0049] In some embodiments, both the cantilever bonding pad 122 and the vane bonding pad 120 are gold. In other embodiments, the cantilever bonding pad 122 is aluminum copper and the vane bonding pad 120 is germanium, gold, or silicon. In other embodiments, the cantilever bonding pad 122 is silicon dioxide and the vane bonding pad 120 is silicon. In other embodiments, the cantilever bonding pad 122 is tin and the vane bonding pad 120 is gold. In other embodiments, the cantilever bonding pad 122 and the vane bonding pad 120 are some other suitable materials.
[0050] In some embodiments, the thickness of the cantilever bonding pad 122 is about 3000 - 5000 angstroms, the thickness of the top electrode 128 is about 1000 angstroms, the thickness of the piezoelectric layer 126 is about 2000 - 20000 angstroms, the thickness of the bottom electrode 124 is about 1000 angstroms, the thickness of the device dielectric layer 112 is about 10000 - 20000 angstroms, and / or the thickness of the device dielectric layer 112 is about 50000 angstroms. However, other suitable values are also acceptable.
[0051] In some embodiments, the valve vane 116 is or comprises glass, an interlayer, silicon, plastic, ceramic, metal, some other suitable material, or any combination of the above materials. In some embodiments, the thickness of the valve vane 116 is about 10 - 300 microns, about 10 - 155 microns, about 155 - 300 microns, or some other suitable value. In some embodiments, the height of the pad protrusion 116p is about 1 - 10 microns, about 1 - 5.5 microns, about 5.5 - 10 microns, or some other suitable value. In some embodiments, the height of the stop protrusion 116s is about 1 - 10 microns, about 1 - 5.5 microns, about 5.5 - 10 microns, or some other suitable value.
[0052] Reference Figure 2 , there is provided Figure 1A and Figure 1B A cross-sectional view 200 of some embodiments of a piezoelectric MEMS valve in an actuated state. The actuated state corresponds to the electroactive state of the piezoelectric MEMS valve. Further, in the actuated state, the piezoelectric MEMS valve is closed.
[0053] Actuation of the piezoelectric MEMS valve occurs through actuation of the piezoelectric actuator 108. For example, the switch 130 can be closed, thereby electrically coupling the power supply 132 from the top electrode 128 to the bottom electrode 124. This actuation changes the piezoelectric actuator 108 from a compressive stress to a tensile stress. As a result, the piezoelectric actuator 108 wants to contract and apply an inward force along the top of the device dielectric layer 112 and the semiconductor layer 110. This cancels and exceeds the outward force from the device dielectric layer 112, whereby the cantilever 102 starts to bend upward from the Figure 1A and Figure 1B direction in
[0054] Since the valve vane 116 is bonded to the second end of the cantilever 102, the upward curve reduces the inclination of the valve vane 116 (e.g., causes the valve vane 116 to drop or flatten). The reduction in inclination continues until the stop protrusion 116s contacts the wall structure 202 on the side of the valve cavity 118 opposite to the piezoelectric actuator 108. Further, once the stop protrusion 116s contacts the wall structure 202, the valve vane 116 transfers the force from the wall structure 202 to the cantilever 102, thereby preventing the cantilever 102 from bending upward.
[0055] When the stop projection 116s contacts the wall structure 202, the valve blade 116 closes the valve chamber 118. Thus, fluid cannot flow through the piezoelectric MEMS valve, and the piezoelectric MEMS valve is closed. In addition, the top surface of the valve blade 116 is parallel or substantially parallel to the top or bottom surface of the substrate 104, and the cantilever 102 has a planar or substantially planar profile. As shown below, a curved profile may also be suitable.
[0056] To return the piezoelectric MEMS valve to the open state, the piezoelectric actuator 108 can be released. For example, the switch 130 can be opened as Figure 1A and Figure 1B shown. This restores the piezoelectric actuator 108 to its natural state with compressive stress. The compressive stress of the piezoelectric actuator 108 and the compressive stress of the device dielectric layer 112 cause the cantilever 102 to bend downward, thereby tilting the valve blade 116 and opening the valve chamber 118, as Figure 1A and Figure 1B shown.
[0057] Referring to Figure 3 , a cross-sectional view 300 of some alternative embodiments of the piezoelectric MEMS valve of Figure 2 is provided, in which the height of the stop projection 116s has been reduced. Due to the reduced height, the cantilever 102 bends upward more before the stop projection 116s hits the wall structure 202 (e.g., compared to Figure 2 ). Thus, when the piezoelectric MEMS valve is closed, the cantilever 102 has an upwardly curved profile instead of the Figure 2 planar profile. In addition, the top surface of the valve blade 116 is angled with respect to the top or bottom surface of the substrate 104.
[0058] Referring to Figure 4 , a top layout view 400 of some embodiments of the piezoelectric MEMS valve of Figure 2 is provided. Figure 2 The cross-sectional view 200 of Figure 4 can be taken or, for example, along line A-A' in Figure 4 or along other suitable lines in
[0059] When the piezoelectric MEMS valve is in the actuated state, the valve blade 116 completely covers the valve chamber 118, thus closing the piezoelectric MEMS valve and preventing fluid from flowing through the piezoelectric MEMS pipe. In addition, the valve blade 116 is joined to the cantilever 102 only at the second end of the cantilever 102 that overlaps the actuator chamber 106. When the piezoelectric MEMS valve is in the released state, the cantilever 102 bends downward (in cross-section) into the actuator chamber 106 to tilt the valve blade 116 and open the piezoelectric MEMS valve, so that fluid can flow through the piezoelectric MEMS valve.
[0060] Although Figure 4 the top layout view 400 corresponds to the actuation state of the piezoelectric MEMS valve, the top layout view Figure 40 is generally applicable to Figure 1A and Figure 1B the release state of the piezoelectric MEMS valve in Figure 4 . That is, in the release state of the piezoelectric MEMS valve, the tilt of the valve vane 116 and the bending of the cantilever 102 will minimally change Figure 1A the top layout view 400 of Figure 1B . Further, it should be understood that in at least some embodiments, Figure 2 , Figure 4 and
[0061] all correspond to one or more common embodiments of the piezoelectric MEMS valve. Figure 5A and Figure 5B are referenced to provide cross-sectional views 500A, 500B of some more detailed embodiments of Figure 1A and Figure 1B and / or Figure 2 of the piezoelectric MEMS valve, where a pair of input / output (IO) structures 502 are located on the piezoelectric actuator 108. Figure 5A corresponds to the release state of the piezoelectric MEMS valve, Figure 5B and
[0062] corresponds to the actuation state of the piezoelectric MEMS valve.
[0063] In some embodiments, the paired IO structures 502 have corresponding thicknesses of about 3000 - 8000 angstroms, about 3000 - 5500 angstroms, about 5500 - 8000 angstroms, or some other suitable value. In some embodiments, the paired IO structures 502 are of the same material as the cantilever bonding pads 122. In some embodiments, the paired IO structures 502 are or include gold (e.g., Au), aluminum copper (e.g., AlCu), copper (e.g., Cu), tin (e.g., Sn), silicon oxide (e.g., SiO2), some other suitable material, or any combination of the above materials. In some embodiments, the paired IO structures 502 have a residual tensile stress that is counteracted and exceeded by the compressive stress of the piezoelectric actuator 108 and the device dielectric layer 112, such that the cantilever 102 maintains its downward natural curve.
[0064] In some embodiments, the IMD layer 504 has a residual compressive stress. Due to the residual compressive stress, the IMD layer 504 wants to expand outward. This results in an outward force along the top of the piezoelectric actuator 108, the device dielectric layer 112, and the semiconductor layer 110 to assist the downward intrinsic curve of the cantilever 102. In some embodiments, the IMD layer 504 is or includes aluminum oxide (e.g., Al2O3), silicon oxide (e.g., SiO2), silicon nitride (e.g., Si3N4), some other suitable dielectric, or any combination of the above. In some embodiments, the thickness of the IMD layer 504 is or includes 1000 - 5000 angstroms, 1000 - 3000 angstroms, 3000 - 5000 angstroms, or some other suitable value.
[0065] Reference Figure 6 , there is provided Figure 5A and Figure 5B a top layout view 600 of some embodiments of the piezoelectric MEMS valve in an actuated state. Figure 5B The cross-sectional view 500B of Figure 6 can be taken along the line B - B' in Figure 6 or along some other suitable line of
[0066] The paired IO structures 502 include separate IO vias 502v, separate IO pads 502p, and separate redistribution portions 502r. The first ends of the redistribution portions 502r are above the bottom electrode 124 and the top electrode 128 and are electrically connected to the bottom electrode 124 and the top electrode 128 respectively through the IO vias 502v. In addition, the redistribution portions 502r extend from the IO vias 502v to the IO pads 502p respectively. The IO pads 502p are located outside the area covered by the valve blade 116 and provide positions for electrically coupling the control circuit to the piezoelectric actuator 108.
[0067] Although Figure 6 the top layout diagram 600 corresponds to Figure 5B the actuation state of the piezoelectric MEMS valve shown, the top layout diagram 600 is generally applicable to Figure 5A the release state of the piezoelectric MEMS valve shown. Additionally, it should be understood that in at least some embodiments, Figure 5A , Figure 5B and Figure 6 all correspond to one or more common embodiments of the piezoelectric MEMS valve.
[0068] Referring to Figure 7A and Figure 7B , cross-sectional views 700A, 700B of some alternative embodiments of the piezoelectric MEMS valve of Figure 5A and Figure 5B are provided. Figure 7A Corresponds to the release state of the piezoelectric MEMS valve, Figure 7B corresponds to the actuation state of the piezoelectric MEMS valve.
[0069] The substrate 104 covers and is bonded to a printed circuit board (PCB) 702 by an adhesive 704. The adhesive 704 can for example be or include epoxy resin and / or the like. The actuator cavity 106 extends through the PCB 702 and the substrate 104. Additionally, the valve cavity 118 extends through the PCB 702 and further extends between the outermost sidewall of the substrate 104 and the outermost sidewall of the seal 706. This is in contrast to the embodiments of Figure 5A and Figure 5B where the valve cavity 118 extends through the substrate 104. The seal 706 can for example be or include plastic, rubber, a sealing ring, glue, epoxy resin, some other suitable sealing material, or any combination of the above materials.
[0070] The cantilever bonding pad 122 and the IO structure 502 are covered by a separate cover layer 708. For example, the cover layer 708 can be or include an under bump metallization (UBM) layer, nickel gold (e.g., electroless nickel immersion gold (ENIG)), nickel palladium gold (e.g., electroless nickel / electroless palladium / immersion gold (ENEPI)), on pad metal (OPM), front side metal (FSM), some other suitable metal and / or conductive material, or any combination of the above materials.
[0071] The bottom of the valve vane 116 has a flat or planar profile without pad protrusions 116p and stop protrusions 116s. In alternative embodiments, the pad protrusions 116p and / or the stop protrusions 116s persist. The vane bonding pad 710 is located at the bottom of the valve vane 116 and is bonded to the cantilever bonding pad 122 by a conductive bump 712. The conductive bump 712 can for example be a solder bump and / or some other suitable conductive bump.
[0072] As shown below, due to the small die size, compared with the piezoelectric MEMS valves of Figure 5A and Figure 5B , the piezoelectric MEMS valves of Figure 7A and Figure 7B have lower manufacturing costs. That is to say, Figure 7A and Figure 7B the die of the piezoelectric MEMS valve can include the actuator cavity 106 but not the valve cavity 118, while Figure 5A and Figure 5B the die of the piezoelectric MEMS valve can include the actuator cavity 106 and the valve cavity 118. Therefore, Figure 7A and Figure 7B the die of the piezoelectric MEMS valve is smaller than that of Figure 5A and Figure 5B . Due to the small die size, more dies can be formed on each wafer, and the manufacturing cost may be lower. In addition, since the valve cavity 118 is located outside the die of the piezoelectric MEMS valves of Figure 7A and Figure 7B , the valve cavity 118 may be larger than in other cases.
[0073] Referring to Figure 8 , a top layout view 800 of some embodiments of the piezoelectric MEMS valve of Figure 7A and Figure 7B in the actuated state is provided. For example, Figure 7B the cross-sectional view 700B can be taken along the line C-C' in Figure 8 or along other suitable lines in Figure 8 . In addition, several components of the piezoelectric MEMS valve (e.g., the valve vane 116, the actuator cavity 106, etc.) are shown in dashed lines, and the IMD layer 504 is omitted to show the structures that would otherwise be hidden.
[0074] The valve cavity 118 is defined by the seal 706 and the die on which the cantilever 102 and the piezoelectric actuator 108 are arranged. The valve cavity 118 has a rectangular top geometry, where three sides are defined by the seal 706 and the other side is defined by the die. In alternative embodiments, the valve cavity 118 can have some other suitable top geometry. In addition, in alternative embodiments, the seal 706 can extend in a closed path around the die and / or the valve cavity 118 to reduce valve leakage.
[0075] Although Figure 8 the top layout view 800 corresponds to the actuated state of the piezoelectric MEMS valve shown in Figure 7B , the top layout view 800 is generally applicable to the released state of the piezoelectric MEMS valve shown in Figure 7A . In addition, it should be understood that in at least some embodiments,Figure 7A , Figure 7B and Figure 8 each correspond to one or more common embodiments of a piezoelectric MEMS valve.
[0076] Referring Figures 9A - 9C , there is provided a top layout view 900A - 900C of some alternative embodiments of the piezoelectric MEMS valve of Figure 8 . In Figure 9A , the seal 706 extends in a closed path around the valve cavity 118 and around the die on which the cantilever 102 and the piezoelectric actuator 108 are disposed. In Figure 9B , the seal 706 extends in a closed path around the valve cavity 118 but not around the die. In Figure 9C , the seal 706 extends in a first closed path around the valve cavity 118 and in a second separate closed path around the die.
[0077] Referring Figure 10 , there is provided a top layout view 1000 of some alternative embodiments of the piezoelectric MEMS valve of Figure 1A and Figure 1B and / or Figure 2 , in which the cantilever 102 and the piezoelectric actuator 108 are helical. This is in contrast to the beam or lever shape of the cantilever 102 in Figure 1A , Figure 1B and Figure 2 . It should be noted that, although not shown for ease of illustration, the piezoelectric actuator 108 includes the bottom electrode 124, the piezoelectric layer 126, and the top electrode 128 seen in the previous figures.
[0078] The first end of the cantilever 102 overlaps and is bonded to a substrate (not shown) outside the actuator cavity 106, and the second end overlaps the actuator cavity 106. Further, the cantilever 102 spirals inward from the first end to the second end. The piezoelectric actuator 108 overlaps the cantilever 102 and has a helical shape similar to that of the cantilever 102. The valve vane 116 overlaps the cantilever 102 and is bonded to the center of the cantilever 102 through the cantilever bonding pad 122 and the vane bonding pad 120. Thus, the valve vane 116 moves with the release and actuation states of the cantilever 102.
[0079] Referring Figure 11A and Figure 11B , there is provided cross-sectional views 1100A, 1100B of some embodiments of the piezoelectric MEMS valve of Figure 10 in a released (e.g., natural or non-powered) state. Figure 11B There is provided an enlarged cross-sectional view 1100B of a portion of the piezoelectric MEMS valve within the box BX2 of Figure 11A . Further, for example, the cross-sectional views 1100A, 1100B can be along Figure 10Intercepted along line D-D' in
[0080] The device dielectric layer 112 and the piezoelectric actuator 108 have residual compressive stress. In some embodiments, the top electrode 128 and the bottom electrode 124 have residual tensile stress, while the piezoelectric layer 126 has a residual compressive stress that cancels out and exceeds the residual tensile stress, such that the piezoelectric actuator 108 as a whole has residual compressive stress.
[0081] Due to the residual compressive stress, the piezoelectric actuator 108 and the device dielectric layer 112 tend to expand. This results in an outward force along the top of the semiconductor layer 110, which causes the cantilever 102 to inherently bend downward. Additionally, since the piezoelectric MEMS valve is released, there is no external factor to counteract the outward force and the downward bending, so the cantilever 102 spirals downward from the first end of the cantilever 102 to the second end of the cantilever 102.
[0082] Because the cantilever 102 spirals downward to the second end of the cantilever 102, and because the valve vane 116 is joined to the second end, the valve vane 116 tilts upward from the pad protrusion 116p to the stop protrusion 116s. Additionally, the stop protrusion 116s is spaced apart from the wall structure 202 that defines the valve cavity 118. As a result, the valve cavity 118 opens and fluid can pass through the piezoelectric MEMS valve. Due to the spiral shape of the cantilever 102, the cantilever 102 can be longer in a given area than the embodiments in Figure 1A , Figure 1B and Figure 2 . Therefore, the second end of the cantilever 102 can deflect downward more than the embodiments in Figure 1A , Figure 1B and Figure 2 , and the valve vane 116 can be more tilted than the embodiments in Figure 1A , Figure 1B and Figure 2 . This can allow fluid to pass through the valve cavity 118 better.
[0083] Due to the inherent downward spiral of the cantilever 102, the piezoelectric MEMS valve is normally open without any external power source and / or plumbing. This results in low power consumption, at least for applications where the piezoelectric MEMS valve is open more frequently than it is closed. Additionally, as described below, the piezoelectric MEMS valve can be formed using semiconductor manufacturing processes. This reduces cost and allows for small sizes to be achieved for microfluidics, wearable applications, etc.
[0084] Referring to Figure 12 , a cross-sectional view 1200 of some embodiments of the piezoelectric MEMS valve in an actuated (e.g., powered-on) state is provided. For example, the cross-sectional view 1200 can be intercepted along line D-D' in Figure 10 . Figure 10 Intercepted along line D-D' in
[0085] Actuation of the piezoelectric MEMS valve occurs through actuation of the piezoelectric actuator 108. For example, switch 130 may be closed to electrically couple power source 132 from top electrode 128 to bottom electrode 124. This actuation changes the piezoelectric actuator 108 from a compressive stress to a tensile stress.
[0086] As a result of the actuation and the change from compressive stress to tensile stress, the piezoelectric actuator 108 wants to contract and apply an inward force along the top of device dielectric layer 112 and semiconductor layer 110. This cancels and exceeds the outward force from device dielectric layer 112, whereby the center of cantilever 102 moves upward. Additionally, cantilever 102 flattens and moves to or near the planar orientation as Figure 11A and Figure 11B shown. In some embodiments, cantilever 102 may further move to a upward spiral rather than a downward spiral.
[0087] Because valve blade 116 is joined to the center of cantilever 102, flattening of cantilever 102 levels valve blade 116 and moves stop protrusion 116s into contact with wall structure 202. Additionally, once stop protrusion 116s contacts wall structure 202, valve blade 116 transfers force from wall structure 202 to cantilever 102, thereby stopping further movement of cantilever 102. In the case where stop protrusion 116s contacts wall structure 202, valve blade 116 closes valve cavity 118, and thus fluid cannot flow through the piezoelectric MEMS valve.
[0088] To return the piezoelectric MEMS valve to the open state, the piezoelectric actuator 108 may be released. For example, switch 130 may be opened as Figure 11A and Figure 11B shown. This returns the piezoelectric actuator 108 to its native state with compressive stress. The compressive stress of piezoelectric actuator 108 and the compressive stress of device dielectric layer 112 cause cantilever 102 to spiral downward, as Figure 11A and Figure 11B shown.
[0089] Reference Figure 13 provides a top layout view 1300 of some alternative embodiments of the piezoelectric MEMS valve of Figure 1A and Figure 1B and / or Figure 2 wherein cantilever 102 and piezoelectric actuator 108 have a meandering shape. This is in contrast to the beam or lever shape of cantilever 102 in Figure 1A , Figure 1B and Figure 2 . Note that although not shown for ease of illustration, piezoelectric actuator 108 includes bottom electrode 124, piezoelectric layer 126, and top electrode 128 seen in the previous figures.
[0090] The cantilever 102 has a first end that overlaps and engages a substrate (not shown) external to the actuator cavity 106, and also has a second end that overlaps the actuator cavity 106. Further, the cantilever 102 meanders back and forth along a serpentine path from the first end to the second end, and has a plurality of linear segments that extend in parallel and are connected end-to-end to form the serpentine path. The piezoelectric actuator 108 overlaps the cantilever 102 and has a serpentine shape similar to that of the cantilever 102. The valve blade 116 overlaps the cantilever 102 and is joined to the second end of the cantilever 102 by the cantilever engagement pad 122 and the blade engagement pad 120. Thus, the valve blade 116 moves with the release and actuation states of the cantilever 102.
[0091] Reference Figure 14A and Figure 14B , there are provided Figure 13 cross-sectional views 1400A, 1400B of some embodiments of a piezoelectric MEMS valve in a released (e.g., native or non-powered) state. Figure 14B There are provided Figure 14A an enlarged cross-sectional view 1400B of a portion of the piezoelectric MEMS valve within the box BX3. Further, for example, the cross-sectional views 1400A, 1400B may be taken along Figure 13 the line E-E' in
[0092] Similar to the previous embodiments, the device dielectric layer 112 and the piezoelectric actuator 108 have residual compressive stress. In some embodiments, the top electrode 128 and the bottom electrode 124 have residual tensile stress, while the piezoelectric layer 126 has residual compressive stress that cancels and exceeds the residual tensile stress, such that the piezoelectric actuator 108 as a whole has residual compressive stress.
[0093] Due to the residual compression, the cantilever 102 bends downward along the serpentine path of the cantilever 102. This causes the valve blade 116 to tilt upward from the pad protrusion 116p and spaces the valve blade 116 from the wall structure 202 to open the valve cavity 118. As a result, the piezoelectric MEMS valve opens and fluid can pass through the valve cavity 118 unimpeded. Due to the serpentine shape of the cantilever 102, the length of the cantilever 102 in a given area may be longer than that in the embodiments of Figure 1A , Figure 1B and Figure 2 . Thus, the second end of the cantilever 102 can deflect downward more than in the embodiments of Figure 1A , Figure 1B and Figure 2 , and the valve blade 116 may be more tilted. This can allow fluid to pass through the valve cavity 118 better.
[0094] Reference Figure 15 , there are provided Figure 13Cross-sectional view 1500 of some embodiments of the piezoelectric MEMS valve in an actuated (e.g., energized) state. For example, cross-sectional view 1500 can be along Figure 13 the line E-E' in
[0095] The actuation of the piezoelectric MEMS valve occurs by the actuation of the piezoelectric actuator 108. For example, switch 130 can be closed, thereby electrically coupling power supply 132 from the top electrode 128 to the bottom electrode 124. This actuation changes the piezoelectric actuator 108 from compressive stress to tensile stress. As a result of the actuation and the change from compressive stress to tensile stress, the piezoelectric actuator 108 wants to contract and apply an inward force along the top of the device dielectric layer 112 and the semiconductor layer 110. This cancels and exceeds the outward force from the device dielectric layer 112, whereby the cantilever 102 flattens and moves to or near the planar orientation as shown in Figure 14A and Figure 14B shown.
[0096] Since the valve vane 116 is joined to the cantilever 102, the flattening of the cantilever 102 levels the valve vane 116 and moves the stop protrusion 116s into contact with the wall structure 202. In addition, once the stop protrusion 116s contacts the wall structure 202, the valve vane 116 transfers the force from the wall structure 202 to the cantilever 102, thereby stopping the further movement of the cantilever 102. In the case where the stop protrusion 116s contacts the wall structure 202, the valve vane 116 closes the valve cavity 118, so that fluid cannot flow through the piezoelectric MEMS valve.
[0097] To return the piezoelectric MEMS valve to the open state, the piezoelectric actuator 108 can be released. For example, switch 130 can be opened as shown in Figure 14A and Figure 14B shown. This returns the piezoelectric actuator 108 to its natural state as shown in Figure 14A and Figure 14B shown, to open the piezoelectric MEMS valve.
[0098] Referring to Figures 16 - 35 , a series of cross-sectional views 1600 - 3500 of some first embodiments of a method of forming a piezoelectric MEMS valve are provided. For example, the piezoelectric MEMS valve can be the piezoelectric MEMS valve in Figure 5A , Figure 5B and Figure 6 or can be other suitable piezoelectric MEMS valves. In addition, the piezoelectric MEMS valve can correspond to, for example, a die, a chip, etc.
[0099] As shown in Figure 16As shown in the cross-sectional view 1600, a semiconductor structure including a substrate 104, a substrate dielectric layer 114, and a semiconductor layer 110 can be provided or otherwise formed. The substrate dielectric layer 114 is on the substrate 104, and the semiconductor layer 110 is on the substrate dielectric layer 114.
[0100] In some embodiments, the substrate 104, the substrate dielectric layer 114, and the semiconductor layer 110 correspond to a silicon-on-insulator (SOI) wafer or substrate, a polysilicon-on-insulator (POI) wafer or substrate, two bonded wafers, or a substrate bonded to them via a dielectric layer, etc. The substrate 104 can also be referred to as a device wafer, a device substrate, etc. The substrate dielectric layer 114 can also be referred to as a buried oxide layer, a buried dielectric layer, etc. The semiconductor layer 110 can also be referred to as a device layer, etc.
[0101] In some embodiments, the substrate 104 is or includes silicon and / or some other suitable substrate material, and / or has a thickness T of about 200 - 1000 microns or some other appropriate value s 。In some embodiments, the substrate dielectric layer 114 is or includes silicon oxide (e.g., SiO2) and / or some other suitable dielectric, and / or has a thickness T of about 0.1 - 5 microns angstrom or some other appropriate value sdl 。In some embodiments, the semiconductor layer 110 is or includes single-crystalline silicon, polycrystalline silicon, some other suitable semiconductor material, or any combination of the above materials, and / or has a thickness T of about 0.1 - 50 microns angstrom or some other suitable value sl 。
[0102] As Figure 17 shown in the cross-sectional view 1700, a device dielectric layer 112 is deposited on the semiconductor layer 110, and then an actuator film is deposited on the device dielectric layer 112. The actuator film includes a bottom electrode layer 124l, a piezoelectric layer 126 on the bottom electrode layer 124, and a top electrode layer 128l on the piezoelectric layer 126.
[0103] The materials of the device dielectric layer 112 and the actuator film are selected to have a combined residual stress that is compressive. For example, the device dielectric layer 112 and the piezoelectric layer 126 can have separate residual compressive stresses, and the bottom electrode layer 124l and the top electrode layer 128l can have separate residual tensile stresses that are offset and exceeded by the remaining compressive stress. As a result, the device dielectric layer 112 and the actuator film want to expand, thus applying an outward force along the top surface of the semiconductor layer 110. As shown below, this results in an inherent downward curve of the cantilever formed thereafter.
[0104] In some embodiments, the device dielectric layer 112 is deposited by thermal oxidation (THOX), chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), some other suitable deposition process, or any combination of the above processes. Additionally, in some embodiments, the device dielectric layer 112 is or includes silicon oxide (e.g., SiO2), titanium oxide (e.g., TiO2), some other suitable dielectric, or any combination of the above. Additionally, in some embodiments, the thickness T of the device dielectric layer 112 ddl is about 1000 - 10000 angstroms or some other suitable value.
[0105] In some embodiments, the bottom electrode layer 124l is deposited by PVD and / or some other suitable deposition process. Additionally, in some embodiments, the bottom electrode layer 124l is or includes platinum and / or some other suitable conductive material, and / or has a thickness T of about 500 - 10000 angstroms or some other appropriate value bel . In some embodiments, the top electrode layer 128l is deposited by PVD and / or some other suitable deposition process. Additionally, in some embodiments, the top electrode layer 128l is or includes platinum, ruthenium, some other suitable conductive material, or any combination of the above materials. Additionally, in some embodiments, the thickness T of the top electrode layer 128l tel is about 500 - 100000 angstroms or some other suitable value.
[0106] In some embodiments, the piezoelectric layer 126 is deposited by PVD and / or some other suitable deposition process. Additionally, in some embodiments, the piezoelectric layer 126 is or includes sol - gel, PZT, some other suitable piezoelectric material, or any combination of the above materials. Additionally, in some embodiments, the thickness T of the piezoelectric layer 126 p is about 2000 - 50000 angstroms or some other suitable value.
[0107] As Figure 18 shown in the cross - sectional view 1800, the top electrode layer 128l, the piezoelectric layer 126, and the bottom electrode layer 124l are patterned into a piezoelectric actuator 108. The piezoelectric actuator 108 includes a portion of the bottom electrode layer 124l (hereinafter referred to as the bottom electrode 124) and a portion of the piezoelectric layer 126 that is above the bottom electrode 124. Additionally, the piezoelectric actuator 108 includes a portion of the top electrode layer 128l, which is hereinafter referred to as the top electrode 128 and is located above the piezoelectric layer 126.
[0108] For example, patterning can include selectively etching the top electrode layer 128l using a lithography / etch process with a first mask, then selectively etching the piezoelectric layer 126 using a lithography / etch process with a second mask, and then selectively etching the bottom electrode layer 124l using a lithography / etch process with a third mask. For example, each etching step can be performed by reactive ion etching (RIE), ion beam etching, aqua regia etching, or some other suitable etching process.
[0109] As Figure 19 shown in cross-sectional view 1900 of FIG. 1900, the IMD layer 504 is deposited on the device dielectric layer 112 and the piezoelectric actuator 108. In some embodiments, the IMD layer 504 has a residual compressive stress, similar to the device dielectric layer 112. In some embodiments, the IMD layer 504 is deposited by CVD and / or some other suitable deposition process. In some embodiments, the IMD layer 504 is or includes alumina (e.g., Al2O3), silicon oxide (e.g., SiO2), silicon nitride (e.g., Si3N4), some other suitable dielectric, or any combination of the above. In some embodiments, the thickness T of the IMD layer 504 IMDl is or includes 1000 - 5000 angstroms or some other suitable value.
[0110] As Figure 20 shown in cross-sectional view 2000 of FIG. 2000, the cantilever bond pad 122 and the pair of IO structures 502 are formed. The cantilever bond pad 122 is formed above the IMD layer 504, laterally adjacent to the piezoelectric actuator 108. The pair of IO structures 502 are formed above the IMD layer 504 and the piezoelectric actuator 108. In addition, the pair of IO structures 502 are formed to protrude through the IMD layer 504 to the bottom electrode 124 and the top electrode 128, respectively. For example, the top layout of the cantilever bond pad 122 and the pair of IO structures 502 can be as Figure 6 shown and described.
[0111] In some embodiments, a passivation layer (not shown) is further deposited on the cantilever bonding pads 122 and the pair of IO structures 502 and then patterned to form openings exposing the cantilever bonding pads 122 and the pair of IO structures 502. In some embodiments, the process for forming the cantilever bonding pads 122 and the pair of IO structures 502 includes patterning the IMD layer 504 to form via openings that are above the bottom electrode 124 and the top electrode 128 and expose the bottom electrode 124 and the top electrode 128, respectively. A conductive layer is deposited above the IMD layer 504 and fills the via openings and is patterned into the cantilever bonding pads 122 and the pair of IO structures 502. The patterning for forming the via openings can be performed, for example, by dry etching, buffered oxide etching (BOE), some suitable etching, or any combination of the above. The patterning of the conductive layer can be performed, for example, by ion beam etching, dry metal etching, wet metal etching, some suitable etching, or any combination of the above.
[0112] In some embodiments, the conductive layer is or includes gold, aluminum copper, copper, some other suitable conductive material, or any combination of the above materials. In some embodiments, the conductive layer is deposited by PVD and / or some other suitable deposition process. In some embodiments, the thickness T of the conductive layer c is or includes 3000 - 8000 angstroms or some other suitable value.
[0113] As Figure 21 shown in cross-sectional view 2100 of, the IMD layer 504, the device dielectric layer 112, and the semiconductor layer 110 are patterned to form a cantilever opening 2102 that defines the cantilever 102. In some embodiments, the cantilever 102 has a top layout as Figure 6 shown. In other embodiments, the cantilever 102 has a top layout as Figure 10 or Figure 13 shown. The patterning can be performed, for example, by a series of one or more etchings and can use, for example, the substrate dielectric layer 114 as an etch stop layer.
[0114] As Figure 22 shown in cross-sectional view 2200 of, the IMD layer 504, the device dielectric layer 112, and the semiconductor layer 110 are patterned to define a valve cavity region 118a on the side of the piezoelectric actuator 108 opposite the cantilever bonding pads 122. Due to different process loads (such as etch load, etc.), the patterning is performed separately from the patterning for forming the cantilever opening 2102. Additionally, the patterning can be performed, for example, by a series of one or more etchings and can use, for example, the substrate dielectric layer 114 as an etch stop layer.
[0115] As Figure 23As shown in the cross-sectional view 2300, a blade substrate 2302 is provided. In some embodiments, the blade substrate 2302 is or includes silicon and / or some other suitable substrate material, and / or the blade substrate 2102 corresponds to a semiconductor wafer or the like. In some embodiments, the thickness T of the blade substrate 2302 vs is about 735 microns or some other suitable value.
[0116] As Figure 24 shown in the cross-sectional view 2400, the blade substrate 2302 is patterned to form pad protrusions 116p and stop protrusions 116s. For example, the patterning can be performed by selectively etching the blade substrate 2302 using one or more lithography / etching processes. However, other suitable patterning processes are also feasible. The etching can be performed, for example, by Bosh dry etching or the like.
[0117] The height T of the pad protrusion 116p pp is less than the height T of the stop protrusion 116s sp . However, the height T of the pad protrusion 116p pp can optionally be greater than or equal to the height T of the stop protrusion 116s sp . In some embodiments, the height T of the pad protrusion 116p pp is about 1 - 10 microns or some other suitable value. In some embodiments, the height T of the stop protrusion 116s sp is about 1 - 10 microns or some other suitable value.
[0118] As Figure 25 shown in the cross-sectional view 2500, the blade bonding pad 120 is formed on the pad protrusion 116p. In some embodiments, the blade bonding pad 120 is or includes a eutectic bonding material, a fusion bonding material, some other suitable bonding material, or any combination of the above materials. For example, the blade bonding pad 120 can be or include gold, germanium, silicon, etc.
[0119] The process of forming the blade bonding pad 120 can, for example, include depositing a conductive layer on the blade substrate 2302 and padding it, and then patterning the conductive layer into the blade bonding pad 120. For example, the patterning can be performed by a lithography / etching process or some other suitable patterning process.
[0120] As Figure 26As shown in the cross-sectional view 2600, the vane substrate 2302 is patterned to form trenches 2602 that define the valve vane 116 at the pad protrusion 116p and the stop protrusion 116s. For example, the patterning can be performed by a lithography / etching process or some other suitable patterning process. For example, the etching can be performed by Bosh etching, deep reactive ion etching (DRIE), some other suitable etching process, or any combination of the above processes. In some embodiments, the depth Dt of the trenches 2602 is about 10 - 300 microns or some other suitable value.
[0121] As Figure 27 shown in the cross-sectional view 2700, the vane substrate 2302 is vertically flipped and bonded to Figure 22 a semiconductor structure. This bonding includes bonding the cantilever bonding pads 122 to the vane bonding pads 120 by fusion bonding, eutectic bonding, or some other suitable type of bonding. In some embodiments, the stop protrusion 116s further contacts the IMD layer 504 but is not bonded to the IMD layer 502.
[0122] As Figure 28 shown in the cross-sectional view 2800, the carrier substrate 2802 is bonded to the top of the vane substrate 2302. For example, the bonding can be performed by an adhesive, fusion bonding, or some other suitable type of bonding.
[0123] As Figure 29 shown in the cross-sectional view 2900, Figure 28 the structure is vertically flipped. In addition, the substrate 104 is thinned (e.g., the thickness is reduced), and then patterned to form the actuator cavity 106 and the valve cavity 118 that extend through the substrate 104 and the substrate dielectric layer 114. The actuator cavity 106 overlaps with the piezoelectric actuator 108 and the cantilever 102. The valve cavity 118 is laterally spaced from the actuator cavity 106 and is located at the valve cavity region 118a (e.g., see Figure 22 ).
[0124] For example, the thinning can be performed by grinding, chemical mechanical polishing (CMP), etc., or any combination of the above methods. For example, the patterning can be performed by a lithography / etching process or some other suitable patterning process. For example, the etching can be performed by Bosh etching, DRIE, some other suitable etching process, or any combination of the above processes. In some embodiments, the substrate dielectric layer 114 serves as an etch stop layer during etching. In addition, in some embodiments, the actuator cavity 106 and the valve cavity 118 are formed by different patterning processes (e.g., by different lithography / etching processes with different masks).
[0125] As Figure 30As shown in cross-sectional view 3000, a sacrificial layer 3002 is deposited around the cantilever 102 and the valve vane 116, and further partially fills the actuator cavity 106 and the valve cavity 118. The sacrificial layer 3002 holds the cantilever 102 and the valve vane 116 in place during subsequent processing and can be, for example, or include, epoxy resin and / or some other suitable material.
[0126] Generally speaking, the cantilever 102, the piezoelectric actuator 108, the valve vane 116, the actuator cavity 106, and the valve cavity 118 form or otherwise correspond to the MEMS die D. For example, the MEMS die D can also be referred to as an MEMS die or the like. In addition, the MEMS die D can be repeated in a grid pattern or other suitable pattern outside of cross-sectional view 3000, so that there are multiple instances of the MEMS die D. These multiple instances can be formed simultaneously according to Figures 16 - 30 the actions.
[0127] As Figure 31 shown in cross-sectional view 3100 of Figure 30 it, the structure is vertically flipped and adhered to the carrier tape 3102 with the frame tape 3104. For example, the carrier tape 3102 can facilitate the dicing or singulation of the MEMS die D.
[0128] As Figure 32 shown in cross-sectional view 3200 of vs it, the carrier substrate 2802 is removed from the vane substrate 2302. In addition, the vane substrate 2302 is thinned to expose the sacrificial layer 3002. This has the effect of separating the valve vane 116 from the repeated portions of the valve vane 116 formed in the vane substrate 2302 outside of cross-sectional view 3200. In some embodiments, after thinning, the thickness T of the vane substrate 2302
[0129] As Figure 33 shown in cross-sectional view 3300 of
[0130] it, the sacrificial layer 3002 is removed. For example, removal can be performed by plasma ashing and / or some other suitable removal process. Removing the sacrificial layer 3002 releases the cantilever 102, whereby the cantilever 102 returns to its natural and / or non-energized state.
[0130] As described above, the piezoelectric actuator 108 and the device dielectric layer 112 have residual compressive stress. In addition, in some embodiments, the IMD layer 504 has residual compressive stress. Layers and / or structures under residual compressive stress tend to expand, thereby exerting an outward force on adjacent layers and / or structures. The outward forces from the piezoelectric actuator 108, the device dielectric layer 112, and in some embodiments the IMD layer 504 are transmitted to the top of the semiconductor layer 110, which causes the cantilever 102 to bend downward. In addition, since the valve vane 116 is joined to the cantilever 102, this bending causes the valve vane 116 to tilt downward and open the valve cavity 118.
[0131] During use of the piezoelectric MEMS valve, actuation of the piezoelectric actuator 108 counteracts the outward force of the residual compressive stress, and the cantilever 102 bends upward. The upward bending causes the valve vane 116 to descend or become horizontal until the stop protrusion 116s contacts the IMD layer 504 at the periphery of the valve cavity 118. In addition, the upward bending closes the valve cavity 118, thereby preventing fluid from passing through the valve cavity 118. Figure 5B More details are provided.
[0132] As Figure 34 shown in cross-sectional view 3400 of Figure 33 the semiconductor structure undergoes dicing to separate the MEMS die D from the repeating portion of the MEMS die D. For example, the dicing can be performed by removing material at the scribe region S of the semiconductor structure, which demarcates the MEMS die D from the repeating portion of the MEMS die D. For example, the dicing can be performed by laser dicing or the like.
[0133] As Figure 35 shown in cross-sectional view 3500 of
[0134] Although Figures 16 - 35 is described with reference to a method, it is understood that the structures shown in these figures are not limited to that method, but can be independent of that method. Although Figures 16 - 35 is described as a series of actions, it should be understood that in other embodiments, the order of the actions can be changed. Although Figures 16 - 35 shows and describes a particular set of actions, some of the actions shown and / or described can be omitted in other embodiments. In addition, actions not shown and / or described can be included in other embodiments.
[0135] Referring to Figure 36 there is provided Figures 16 - 35 a block diagram 3600 of some embodiments of the method of
[0136] At operation 3602, a substrate, a substrate dielectric layer over the substrate, and a semiconductor layer over the substrate dielectric layer are provided. For example, see Figure 16 .
[0137] At operation 3604, a device dielectric layer is deposited over the semiconductor layer, where the device dielectric layer has a residual compressive stress. For example, see Figure 17 .
[0138] At operation 3606, a piezoelectric actuator is formed over the device dielectric layer, where the piezoelectric actuator has a residual compressive stress. For example, see Figure 17 and Figure 18 .
[0139] At operation 3608, an IMD layer is deposited over the piezoelectric actuator and the device dielectric layer, where the IMD layer has a residual compressive stress. For example, see Figure 19 .
[0140] At operation 3610, a cantilever bonding pad and a pair of IO structures are formed over the IMD layer, where the cantilever bonding pad is laterally adjacent to the piezoelectric actuator. For example, see Figure 20 .
[0141] At operation 3612, the IMD layer, the device dielectric layer, and the semiconductor layer are patterned to form a cantilever opening that defines a cantilever at the piezoelectric actuator and the bonding pad and further divides a valve cavity region. For example, see Figure 21 and Figure 22 .
[0142] At operation 3614, a valve vane is formed in a blade substrate, where the valve vane includes a stop protrusion and a bonding pad protrusion that is cushioned by a valve vane pad. For example, see Figures 23 - 26 .
[0143] At operation 3616, the valve vane pad is bonded to the cantilever bonding pad such that the valve vane covers the valve cavity region. For example, see Figure 27 .
[0144] At operation 3618, the substrate and the substrate dielectric layer are patterned to form an actuator cavity at the cantilever and further form a valve cavity in the valve cavity region. For example, see Figure 29 .
[0145] At operation 3620, a sacrificial layer is deposited around the cantilever and the valve vane. For example, see Figure 30 .
[0146] At operation 3622, the substrate and the blade substrate are mounted to a tape frame. For example, see Figure 31 .
[0147] At operation 3624, the vane substrate is thinned to separate the valve vane from the repeating portion of the valve vane formed in the vane substrate. For example, see Figure 32 .
[0148] At operation 3626, the sacrificial layer is removed to release the cantilever, where the cantilever inherently bends downward into the actuator cavity. For example, see Figure 33 .
[0149] At operation 3628, the substrate is cut to separate the die from the repeating portion of the die, where the die includes a piezoelectric actuator, a valve vane, a cantilever, an actuator cavity, and a valve cavity. For example, see Figure 34 .
[0150] At operation 3630, the die is removed from the tape frame. For example, see Figure 35 .
[0151] Although Figure 36 block diagram 3600 is shown and described herein as a series of operations or events, it should be understood that the order of these operations or events shown should not be construed as limiting. For example, some operations may occur in a different order and / or concurrently with other operations or events not shown and / or described herein. Additionally, not all of the operations shown may be required to implement one or more aspects or embodiments described herein, and one or more of the operations described herein may be performed in one or more separate operations and / or phases.
[0152] Referring Figures 37 - 48 , a series of cross-sectional views 3700 - 4800 of some second embodiments of a method of forming a piezoelectric MEMS valve are provided. For example, the piezoelectric MEMS valve can be the piezoelectric MEMS valve in Figure 7A , Figure 7B and Figure 8 , or it can be other suitable piezoelectric MEMS valves. Additionally, the piezoelectric MEMS valve can correspond to, for example, a die, a chip, etc.
[0153] As Figure 37 shown in cross-sectional view 3700, the operations described with respect to Figures 16 - 19 are performed. Additionally, the cantilever bonding pads 122 and the pair of IO structures 502 are covered by corresponding capping layers 708.
[0154] The cantilever bonding pads 122 are formed over the IMD layer 504, laterally adjacent to the piezoelectric actuator 108. The pair of IO structures 502 are formed over the IMD layer 504 and the piezoelectric actuator 108. Additionally, the pair of IO structures 502 are formed to protrude through the IMD layer 504 to the bottom electrode 124 and the top electrode 128, respectively. For example, the top layout of the cantilever bonding pads 122 and the pair of IO structures 502 can be as Figure 8 orFigures 9A - 9C as shown and described in any of
[0155] In some embodiments, a passivation layer (not shown) is further deposited on the cantilever bonding pads 122 and the pair of IO structures 502 and then patterned to form openings exposing the cantilever bonding pads 122 and the pair of IO structures 502. In some embodiments, the capping layer 708 is or includes a UBM layer, nickel gold (e.g., ENIG), nickel palladium gold (e.g., ENEPI), OPM, FSM, some other suitable metal and / or conductive material, or any combination of the foregoing materials.
[0156] In some embodiments, the processes for forming the cantilever bonding pads 122, the pair of IO structures 502, and the capping layer 708 include patterning the IMD layer 504 to form via openings that are above the top electrodes 124, 128 and expose the bottom and top electrodes 124, 128, respectively. Then a first conductive layer and a second conductive layer on the first conductive layer are deposited and patterned into the cantilever bonding pads 122, the pair of IO structures 502, and the capping layer 708. The cantilever bonding pads 122 and the pair of IO structures 502 may correspond to the first conductive layer, while the capping layer 708 may correspond to the second conductive layer. The patterning to form the via openings may be performed, for example, by dry etching, BOE, some suitable etching, or any combination of the foregoing. The patterning of the first and second conductive layers may be performed, for example, by ion beam etching, dry metal etching, wet metal etching, some suitable etching, or any combination of the foregoing.
[0157] As Figure 38 shown in cross-sectional view 3800 of Figure 8 or Figures 9A - 9C the IMD layer 504, the device dielectric layer 112, and the semiconductor layer 110 are patterned to form a cantilever opening 2102 that defines the cantilever 102. In some embodiments, the cantilever 102 has a top layout as shown in any of Figure 10 or Figure 13 In other embodiments, the cantilever 102 has a top layout as shown in
[0158] As Figure 39 shown in cross-sectional view 3900 of a sacrificial layer 3902 is deposited on the cantilever bonding pads 122 and the pair of IO structures 502. In some embodiments, the top surface of the sacrificial layer 3902 may also be planarized by CMP and / or some other suitable planarization process. In some embodiments, the sacrificial layer 3902 is or includes polyimide, polymer, photoresist, some other suitable material, or any combination of the foregoing materials. In some embodiments, the carrier substrate (e.g.,Figure 28 The carrier substrate 2802) can also be bonded to the top surface of the sacrificial layer 3902 to improve Figure 39 the stiffness and structural strength of the semiconductor structure in
[0159] As Figure 40 shown in the cross-sectional view 4000 of, the sacrificial layer 3902 is patterned to form a bump opening 4002 that is above the capping layer 708 corresponding to the cantilever bonding pad 122 and exposes the capping layer 708. In an alternative embodiment, the patterning is skipped. In some embodiments, additional bump openings are formed outside the cross-sectional view 4000. Such additional bump openings are formed above the capping layer 708 corresponding to the paired IO structures 502 and expose the capping layer 708. For example, the patterning can be performed by a lithography / etching process or some other suitable patterning process.
[0160] As Figure 41 shown in the cross-sectional view 4100 of, Figure the structure of is vertically flipped. In addition, the substrate 104 is thinned (e.g., the thickness is reduced), and then patterned to form an actuator cavity 106. The actuator cavity 106 is formed to extend through the substrate 104 and the substrate dielectric layer 114 and further overlap with the piezoelectric actuator 108 and the cantilever 102.
[0161] For example, the thinning can be performed by CMP or the like. For example, the patterning can be performed by a lithography / etching process or some other suitable patterning process. For example, the etching can be performed by Bosh etching, DRIE, some other suitable etching process, or any combination of the above processes. In some embodiments, the substrate dielectric layer 114 serves as an etch stop layer during the etching.
[0162] As shown in the cross-sectional view 4200 of, the structure of is vertically flipped and a conductive bump 712 is formed in the bump opening 4002. In some embodiments, the conductive bump 712 is or includes tin, nickel, copper, conductive epoxy resin, some other suitable material, or any combination of the above materials. In some embodiments, the conductive bump 712 is a solder bump that is or includes tin, nickel, some other suitable material, or any combination of the above materials. In other embodiments, the conductive bump 712 is a plated bump (e.g., a bump formed by plating) that is copper or the like or includes copper or the like.
[0163] Generally speaking, the cantilever 102, the piezoelectric actuator 108, and the actuator cavity 106 form or otherwise correspond to the MEMS die D. For example, the MEMS die D can also be referred to as an MEMS chip, etc. In addition, the MEMS die D can be repeated in a grid pattern or other suitable pattern outside of the cross-sectional view 4200, such that there are multiple instances of the MEMS die D. These multiple instances can be formed simultaneously according to the actions of.
[0164] As shown in the cross-sectional view 4300 of, the structure of is adhered to the tape frame 3102 with the frame tape 3104. For example, the tape frame 3102 can facilitate the dicing or singulation of the MEMS die D.
[0165] As shown in the cross-sectional view 4400 of, the semiconductor structure undergoes dicing to separate the MEMS die D from the repeating portions of the MEMS die D. For example, the dicing can be performed by removing the material at the scribed region S of the semiconductor structure, which scribed region S defines the repeating portion of the MEMS die D - MEMS die D. For example, the dicing can be performed by laser dicing or the like.
[0166] Since the MEMS die D does not include the valve cavity 118, as shown in the embodiment of, the MEMS die D is smaller. Therefore, more repeating MEMS die D can be formed simultaneously, thereby reducing the manufacturing cost.
[0167] As shown in the cross-sectional view 4500 of, the tape frame 3102 and the frame tape 3104 are removed from the MEMS die D. In addition, the MEMS die D is mounted onto the PCB 702 by the adhesive 704.
[0168] The MEMS die D is mounted such that the actuator cavity 106 is above the opening passing through the PCB 702. In some embodiments, this opening can be regarded as an extension of the actuator cavity 106. In addition, the MEMS die D is mounted laterally on the PCB 702 beside the seal 706. The MEMS die D and the seal 706 define the valve cavity 118 that covers an additional opening in the PCB 702. In some embodiments, this additional opening can be regarded as an extension of the valve cavity 118. Since the valve cavity 118 is formed outside of the MEMS die D, the valve cavity 118 can be larger than otherwise. The seal 706 can be, for example, plastic, rubber, a sealing ring, glue, epoxy resin, some other suitable material, or any combination of the above materials. For example, the seal 706 can have a top layout as shown in any one of and any one of those shown.
[0169] As shown in cross-sectional view 4600 of, the valve blade 116 is formed or otherwise provided with a blade engagement pad 710. The blade engagement pad 710 is located at the bottom of the valve blade 116, at the first end of the valve blade 116. In addition, the valve blade 116 has a planar profile, but some other suitable profiles (e.g., as and shown) are also feasible. The valve blade 116 can be or include, for example, glass, an interlayer, silicon, plastic, ceramic, metal, etc., or any combination of the above materials.
[0170] As shown in cross-sectional view 4600 of, the valve blade 116 is engaged with the conductive bump 712 through the blade engagement pad 710. In addition, the valve blade 116 is engaged above the valve cavity 118, and its second end opposite the first end contacts the seal 706. For example, the engagement can be performed by fusion bonding, eutectic bonding, some other suitable bonding, or any combination of the above bondings.
[0171] As shown in cross-sectional view 4700 of, the sacrificial layer 3902 is removed. For example, it can be removed by plasma ashing and / or some other suitable removal process. Removing the sacrificial layer 3902 releases the cantilever 102, whereby the cantilever 102 returns to its natural and / or non-energized state.
[0172] As above, the piezoelectric actuator 108 and the device dielectric layer 112 have residual compressive stress. In addition, in some embodiments, the IMD layer 504 has residual compressive stress. The residual compressive stress causes an outward force to be transmitted to the top of the semiconductor layer 110, which causes the cantilever 102 to bend downward into the actuator cavity 106. In addition, since the valve blade 116 is joined to the cantilever 102, this curve causes the valve blade 116 to tilt downward and open the valve cavity 118.
[0173] During the use of the piezoelectric MEMS valve, the actuation of the piezoelectric actuator 108 counteracts the outward force of the residual compressive stress, and the cantilever 102 bends upward. The upward curve causes the valve blade 116 to descend or become horizontal until the valve blade 116 contacts the seal 706 at the periphery of the valve cavity 118. In addition, the upward curve closes the valve cavity 118, thereby preventing fluid from passing through the valve cavity 118. More details are provided.
[0174] As shown in cross-sectional view 4800 of, the conductive bump 712 can undergo a reflow process. In addition, although the bonding can pair the IO pads 502p (e.g., see ) is electrically coupled to the PCB 702 outside the cross-sectional view 4800. Additionally, in some embodiments, a metal lid may be disposed around the piezoelectric MEMS valve.
[0175] Although is described with reference to one method, it is understood that the structures shown in these figures are not limited to that method, but can be independent of it. Although is described as a series of actions, it should be understood that in other embodiments, the order of the actions may be changed. Although a specific set of actions is shown and described, in other embodiments some of the actions shown and / or described may be omitted. Additionally, actions not shown and / or described may be included in other embodiments.
[0176] Referring , a block diagram 4900 of some embodiments of the method is provided.
[0177] At action 4902, a substrate, a substrate dielectric layer on the substrate, and a semiconductor layer on the substrate dielectric layer are provided. For example, see and .
[0178] At action 4904, a device dielectric layer is deposited on the semiconductor layer, where the device dielectric layer has a residual compressive stress. For example, see and .
[0179] At action 4906, a piezoelectric actuator is formed on the device dielectric layer, where the piezoelectric actuator has a residual compressive stress. For example, see , and .
[0180] At action 4908, an IMD layer is deposited on the piezoelectric actuator and the device dielectric layer, where the IMD layer has a residual compressive stress. For example, see and .
[0181] At action 4910, a cantilever bonding pad and a pair of IO structures are formed on the IMD layer, where the cantilever bonding pad is laterally adjacent to the piezoelectric actuator. For example, see Figure 37 .
[0182] At action 4912, the IMD layer, the device dielectric layer, and the semiconductor layer are patterned to form a cantilever opening that defines a cantilever at the piezoelectric actuator and the bonding pad. For example, see Figure 38 .
[0183] At operation 4914, a sacrificial layer is formed that covers the cantilever and the piezoelectric actuator, the sacrificial layer having bump openings that expose the cantilever bond pads. For example, see Figure 39 and Figure 40 .
[0184] At operation 4916, the substrate and the substrate dielectric layer are patterned to form an actuator cavity at the cantilever. For example, see Figure 41 .
[0185] At operation 4918, conductive bumps are formed in the bump openings. For example, see Figure 42 .
[0186] At operation 4920, the substrate is mounted onto a tape frame. For example, see Figure 43 .
[0187] At operation 4922, the substrate is diced to separate the die from the repeated dies, where the die includes the piezoelectric actuator, the cantilever, and the actuator cavity. For example, see Figure 44 .
[0188] At operation 4924, the die is mounted onto a PCB, near a seal, where the die and the PCB define a valve cavity, and where the PCB has separate openings in the actuator cavity and the valve cavity, respectively. For example, see Figure 45 .
[0189] At operation 4926, a valve vane is formed or otherwise provided with valve vane pads along the bottom of the valve vane. For example, see Figure 46 .
[0190] At operation 4928, the valve vane pads are bonded to the cantilever bond pads by the conductive bumps, positioning the valve vane above the valve cavity. For example, see Figure 46 .
[0191] At operation 4930, the sacrificial layer is removed to release the cantilever, where the cantilever inherently bends downward into the actuator cavity. For example, see Figure 47 .
[0192] At operation 4932, the conductive bumps are reflowed. For example, see Figure 48 .
[0193] Although Figure 49The block diagram 4900 is shown and described herein as a series of acts or events, but it should be understood that the order of these acts or events shown should not be construed as restrictive. For example, some acts may occur in a different order and / or concurrently with other acts or events shown and / or not shown herein. Additionally, not all acts shown may be required to implement one or more aspects or embodiments described herein, and one or more of the acts herein may be performed in one or more separate acts and / or phases.
[0194] Various embodiments of the present disclosure relate to a semiconductor structure, comprising: a cantilever having a first end located on and bonded to a substrate, and further having a second end opposite the first end and located over an actuator cavity; a piezoelectric actuator located on the cantilever; and a valve blade bonded to the second end of the cantilever and further located over a valve cavity that is laterally adjacent to the actuator cavity; wherein the cantilever has a curved profile at the second end that is offset from the first end in a direction transverse to the top surface of the substrate. In some embodiments, the cantilever has a linear top geometry that protrudes above the actuator cavity, and wherein the cantilever bends downward from the first end to the second end. In some embodiments, the piezoelectric actuator is configured to bend the cantilever upward in response to actuation. In some embodiments, the semiconductor structure comprises: a semiconductor layer located on the substrate; and a device dielectric layer located on the semiconductor layer, wherein the piezoelectric actuator is located on the device dielectric layer, the device dielectric layer has compressive stress, and applies an outward force along the top surface of the semiconductor layer. In some embodiments, the piezoelectric actuator comprises a bottom electrode, a piezoelectric layer located above the bottom electrode, and a top electrode located above the piezoelectric layer, wherein the bottom electrode and the top electrode have tensile stress, and the piezoelectric layer has compressive stress that cancels and exceeds the tensile stress. In some embodiments, the semiconductor structure comprises an intermetal dielectric (IMD) layer located on the device dielectric layer and the piezoelectric actuator, wherein the IMD layer has compressive stress. In some embodiments, the valve cavity extends through the substrate and is bounded by a pair of sidewalls of the substrate that face each other on opposite sides of the valve cavity. In some embodiments, the valve blade is configured to close the valve cavity in response to actuation of the piezoelectric actuator. In some embodiments, the cantilever has a spiral top geometry, wherein the second end of the cantilever is located at the center of the spiral top geometry. In some embodiments, the cantilever comprises a plurality of linearly extended and end-to-end coupled segments to form a meandering path that meanders from the first end to the second end.
[0195] In some embodiments, the present invention provides another semiconductor structure, comprising: a cantilever having a first end located on and bonded to a substrate, and further having a second end opposite the first end and located above an actuator cavity; a piezoelectric actuator located on the cantilever; and a valve vane located above and bonded to the second end of the cantilever, wherein a top surface of the valve vane slopes upward from a position directly above the second end of the cantilever with respect to a top surface of the substrate. In some embodiments, the cantilever inherently bends downward from the first end to the second end. In some embodiments, a valve cavity extends through the substrate and is laterally spaced from the actuator cavity, wherein the valve vane has a first protrusion and a second protrusion, wherein the first protrusion is located above and bonded to the second end of the cantilever on a first side of the valve cavity, and wherein the second protrusion is located on a second side of the valve cavity opposite the first side. In some embodiments, the semiconductor structure comprises: a microelectromechanical system (MEMS) die including the cantilever and the piezoelectric actuator, and having the actuator cavity disposed therein; and a seal adjacent to the MEMS die, wherein the seal and the MEMS die define the valve cavity located below the valve vane. In some embodiments, the semiconductor structure comprises a printed circuit board (PCB), wherein the MEMS die and the seal are mounted on the PCB, and wherein the PCB has pairs of openings respectively below the actuator cavity and the valve cavity.
[0196] In some embodiments, the present disclosure provides a method of forming a semiconductor structure, comprising: providing a semiconductor layer located above and separated from a substrate; depositing a device dielectric layer above the semiconductor layer; forming a piezoelectric actuator above the device dielectric layer; patterning the semiconductor layer and the device dielectric layer to define a cantilever located below the piezoelectric actuator; bonding a valve vane to the cantilever; patterning the substrate to form an actuator cavity at the cantilever, wherein the cantilever has a planar profile after completion of the formation of the actuator cavity; and releasing the cantilever, wherein the cantilever transitions from the planar profile to a bent profile during release. In some embodiments, the valve vane is bonded to the cantilever before forming the actuator cavity, and wherein the method further comprises: after patterning, depositing a sacrificial layer around the cantilever and the valve vane to form the actuator cavity, wherein releasing comprises removing the sacrificial layer. In some embodiments, the method comprises patterning the substrate to form a valve cavity laterally separated from the actuator cavity, wherein the patterning to form the valve cavity is performed after bonding. In some embodiments, the method comprises forming a cantilever bonding pad on the device dielectric layer, adjacent to the piezoelectric actuator, wherein the cantilever is formed below the cantilever bonding pad; and forming a valve vane, the valve vane comprising a pad protrusion cushioned by a blade bonding pad and further comprising a stop protrusion, wherein bonding comprises arranging the cantilever bonding pad and the blade bonding pad in direct contact. In some embodiments, the method comprises depositing a sacrificial layer on the piezoelectric actuator and the cantilever before forming the actuator cavity, wherein the valve vane is bonded to the cantilever after forming the actuator cavity, and wherein releasing comprises removing the sacrificial layer. In some embodiments, the method comprises: dicing the substrate to form a die, the die comprising a cantilever, a piezoelectric actuator, and an actuator cavity; and mounting the die adjacent to a sealing ring onto a printed circuit board (PCB), wherein bonding is performed after mounting.
[0197] The foregoing outlines features of several embodiments so that those skilled in the art may better understand the various aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for achieving the same purposes and / or achieving the same advantages as the embodiments introduced herein. Those skilled in the art should also recognize that such equivalent structures do not depart from the spirit and scope of the present invention, and that they may make various changes, substitutions, and alterations therein without departing from the spirit and scope of the present invention.
Claims
1. A semiconductor structure comprising: a cantilever having a first end located above the substrate and bonded to the substrate, and a second end opposite the first end and located above the actuator cavity; a piezoelectric actuator located on the cantilever; as well as a valve blade coupled to the second end of the cantilever arm and further positioned above the valve cavity laterally adjacent to the actuator cavity; The cantilever has a curved profile at the second end, and the curved profile is offset from the first end in a direction transverse to the top surface of the substrate.
2. The semiconductor structure according to claim 1, wherein: The cantilever has a linear top geometry that protrudes above the actuator cavity, and wherein the cantilever bends downwardly from the first end to the second end.
3. The semiconductor structure according to claim 1, wherein: The piezoelectric actuator is configured to bend the cantilever upward in response to actuation.
4. The semiconductor structure according to claim 1, further comprising: A semiconductor layer, located on the substrate; as well as A device dielectric layer is located on the semiconductor layer, wherein the piezoelectric actuator is located on the device dielectric layer, the device dielectric layer has a compressive stress and applies an outward force along the top surface of the semiconductor layer.
5. The semiconductor structure according to claim 1, wherein: The piezoelectric actuator includes a bottom electrode, a piezoelectric layer located on the bottom electrode, and a top electrode located on the piezoelectric layer, wherein the bottom electrode and the top electrode have tensile stress and the piezoelectric layer has a compressive stress that offsets and exceeds the tensile stress.
6. The semiconductor structure according to claim 4, further comprising: An intermetallic dielectric layer is located on the device dielectric layer and the piezoelectric actuator, wherein the intermetallic dielectric layer has compressive stress.
7. The semiconductor structure according to claim 1, wherein: The valve blade is configured to close the valve chamber in response to actuation of the piezoelectric actuator.
8. A semiconductor structure comprising: a cantilever having a first end positioned above the substrate and bonded to the substrate and also having a second end opposite the first end and positioned above the actuator cavity; a piezoelectric actuator, located on the cantilever; as well as A valve blade is located above and joined to the second end of the cantilever, wherein a top surface of the valve blade is tilted upward relative to a top surface of the substrate from a position directly above the second end of the cantilever.
9. The semiconductor structure according to claim 8, wherein: A valve cavity extends through the substrate and is laterally spaced apart from the actuator cavity, wherein the valve blade has a first protrusion and a second protrusion, wherein the first protrusion is located above and joined to the second end of the cantilever on a first side of the valve cavity, and wherein the second protrusion is located on a second side of the valve cavity opposite the first side.
10. A method of forming a semiconductor structure, comprising: providing a semiconductor layer located above and spaced apart from a substrate; depositing a device dielectric layer over the semiconductor layer; forming a piezoelectric actuator over the device dielectric layer; patterning the semiconductor layer and the device dielectric layer to define a cantilever beneath the piezoelectric actuator; engaging a valve blade to the cantilever; patterning the substrate to form an actuator cavity at the cantilever, wherein the cantilever has a planar profile after the formation of the actuator cavity is completed; and The cantilever is released, wherein the cantilever transitions from the planar profile to a curved profile during the releasing.
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