Shallow trench isolation structure and preparation method and application thereof

Abstract

The invention relates to a preparation method of a shallow trench isolation structure, and the method comprises the steps: forming a pad oxide layer and a pad nitride layer on a substrate with a first region and a second region, forming a trench in the substrate, and forming a substrate oxide layer in the trench; laying photoresist on the first region and the second region, removing the photoresist in the second region, and injecting oxygen ions into the substrate through the groove in the second region so as to form a first isolation layer below the groove in the second region; and filling the grooves in the first region and the second region to form a second isolation layer in the grooves. According to the invention, the isolation layer is formed below the groove, so that the isolation between devices with different depths is realized under the combined action of the isolation layer and the isolation structure formed by filling the groove, and the problems of process difficulty and cost increase caused by etching a part of regions to form a high aspect ratio groove can be solved.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductors, and particularly relates to a shallow trench isolation structure, a preparation method thereof, and an application thereof. Background Art

[0002] With the progress of semiconductor manufacturing processes, the volume of semiconductor devices is getting smaller and smaller, but the integrated functions are getting more and more complex. Devices with different functions in an integrated circuit may have different electrical properties. Therefore, isolation trenches with different depths are required to achieve isolation between devices. Shallow trench isolation (STI) is usually used in processes below 0.25 um for isolation between different devices. Currently, in the process of manufacturing integrated circuits, etching is generally performed separately for trenches with different depths. However, as the process size of integrated circuits decreases, the differences in etched patterns with different depths and different pattern densities become more obvious.

[0003] To solve these problems, CN108807261A proposes a method for fabricating isolation trenches with different depths. The method includes sequentially forming a pad oxide layer and a mask layer from bottom to top on a substrate including a first region and a second region, wherein the aperture of the isolation trench to be formed in the second region is larger than that of the isolation trench to be formed in the first region, and the density distribution of the isolation trenches to be formed in the second region is smaller than that of the isolation trenches to be formed in the first region; then performing a first etching until the substrate in the second region is exposed and performing a second etching with a high etching selectivity, so that the depth of the isolation trench formed in the second region is greater than that of the isolation trench formed in the first region. However, this method still increases the production difficulty and production cost as it requires etching with a high etching selectivity. Summary of the Invention

[0004] The purpose of the present invention is to provide a preparation method for an isolation structure with different depths, which has a simple preparation process and small differences in the prepared isolation trenches.

[0005] To achieve the above purpose, a first aspect of the present invention provides a preparation method for a shallow trench isolation structure, the method comprising the following steps: sequentially forming a pad oxide layer and a pad nitride layer on a substrate; wherein the substrate includes a first region and a second region; etching the pad oxide layer, the pad nitride layer, and a part of the substrate to form a trench in the substrate; forming a substrate oxide layer in the trench; laying a photoresist on the first region and the second region, removing the photoresist in the second region, and then injecting oxygen ions into the substrate through the trench in the second region to form a first isolation layer below the trench in the second region; filling the trenches in the first region and the second region to form a second isolation layer in the trenches.

[0006] Optionally, the conditions for oxygen ion implantation include: implantation energy of 5 - 100 keV; implantation dose of 1×10 18 -7×10 18 ions / cm 2 .

[0007] Optionally, the included angle between the angle of the oxygen ion implantation and the normal line of the substrate is 0 - 7 degrees.

[0008] Optionally, the implanted oxygen ions are selected from one or more of H2O + , O + , HO + and O2 + .

[0009] Optionally, the depth of the trench is 100 - 300 nm; in the cross-sectional direction perpendicular to the substrate, the maximum width of the trench is 50 - 200 nm; and / or the thickness of the first isolation layer is 5 - 50 nm, preferably 9 - 20 nm.

[0010] Optionally, the method further includes: removing the photoresist in the first region, and then performing an annealing treatment; the conditions for the annealing treatment include: annealing temperature of 900 - 1300 °C; annealing time of 2 - 8 h.

[0011] Optionally, the substrate oxide layer is formed by thermal oxidation; the conditions for the thermal oxidation include: growth temperature of 800 - 1400 °C; the thickness of the substrate oxide layer is 50 - 150 angstroms. Optionally, the method for filling the trench includes plasma chemical vapor deposition or high aspect ratio process; the second isolation layer is selected from one or more of silicon dioxide, tetraethyl orthosilicate and polysilicon.

[0012] Optionally, the method further includes: forming a nitride layer on the substrate oxide layer of the trench in the second region before oxygen ion implantation.

[0013] The second aspect of the present invention provides a shallow trench isolation structure prepared by the first aspect of the present invention.

[0014] The third aspect of the present invention provides an integrated circuit, and the integrated circuit includes the shallow trench isolation structure provided by the second aspect of the present invention.

[0015] Through the above technical solutions, by implanting oxygen ions into the trenches of the isolation structure that requires a greater depth, the present invention can form an isolation layer below the trenches, so as to cooperate with the isolation structure formed by filling in the trenches to achieve isolation between devices with different depths. At the same time, the method of the present invention can solve the problems of process difficulty and increased cost caused by etching some regions to form high aspect ratio trenches.

[0016] Other features and advantages of the present invention will be described in detail in the following specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the specification. Together with the following specific implementation, they are used to explain the present invention, but do not constitute a limitation to the present invention. In the drawings:

[0018] Figure 1 is a schematic structural diagram after forming a trench in the method provided by an embodiment of the present invention.

[0019] Figure 2 is a schematic structural diagram after photolithography in the method provided by an embodiment of the present invention.

[0020] Figure 3 is a schematic structural diagram after oxygen ion implantation annealing in the method provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0021] The following provides a detailed description of the specific implementation of the present invention. It should be understood that the specific implementation described here is only used to illustrate and explain the present invention, and is not used to limit the present invention. The following is described in conjunction with the accompanying drawings. It should be noted that the accompanying drawings are all in a simplified form and use non-precise scales, and are only used to illustrate the purpose of the embodiments of the present invention.

[0022] With the increasing requirements for the integration density and performance of integrated circuits, the feature size of semiconductor devices is smaller, which in turn reduces the width of the trench and increases the aspect ratio of the trench, increasing the difficulty of preparing a shallow trench isolation structure.

[0023] To solve the above problems, a first aspect of the present invention provides a method for preparing a shallow trench isolation structure, the method comprising the following steps:

[0024] S1. Sequentially form a pad oxide layer and a pad nitride layer on a substrate; wherein, the substrate includes a first region and a second region;

[0025] S2. Etch the pad oxide layer, the pad nitride layer and a part of the substrate to form a trench in the substrate;

[0026] S3. Form a substrate oxide layer in the trench;

[0027] S4. Lay a photoresist on the first region and the second region, remove the photoresist in the second region, and then implant oxygen ions into the substrate through the trench in the second region to form a first isolation layer below the trench in the second region;

[0028] S5. Fill the trenches in the first region and the second region to form a second isolation layer in the trenches.

[0029] Through the above technical solution, by implanting oxygen ions into the trenches of the isolation structure that requires a greater depth, an isolation layer can be formed below the trenches, so as to cooperate with the isolation structure formed by filling in the trenches to achieve isolation between devices at different depths. At the same time, the method of the present invention can solve the problems of process difficulty and increased cost caused by etching to form high-aspect-ratio trenches in some regions.

[0030] The following will introduce the method for preparing a shallow trench isolation structure provided by the embodiments of the present invention in conjunction with Figures 1 to 3 to introduce the method for preparing a shallow trench isolation structure provided by the embodiments of the present invention.

[0031] Figure 1 Schematically shows the structure of trenches with the same depth. As Figure 1 In the structure shown, a pad oxide layer 120 is formed on the surface of the substrate 110, a pad nitride layer 130 is provided on the surface of the pad oxide layer 120, trenches 210 are formed in the substrate, and a substrate oxide layer 220 is provided in the trenches 210.

[0032] In the present invention, the substrate 110 can be a common semiconductor type. For example, it can be bulk silicon, silicon carbide, silicon germanium, germanium alloy, InAs, GeAs, or InP. The foregoing examples are only used to describe the semiconductor substrate, and the type of the semiconductor substrate does not constitute a limitation on the protection scope of the present invention.

[0033] During preparation, first form a pad oxide layer 120 on the surface of the substrate 110 to relieve the stress of the pad nitride layer 130 on the substrate. Then form a pad nitride layer 130 on the pad oxide layer 120. And etch the substrate with the pad oxide layer and the pad nitride layer, so that the pad oxide layer, the pad nitride layer and a part of the thickness of the substrate in the preset area are etched, so as to form trenches 210 in the area where the isolation structure needs to be prepared. The trenches divide the semiconductor substrate into isolation regions and active regions, and an isolation region is provided between any two active regions to isolate devices.

[0034] Specifically, the pad oxide layer can be a silicon oxide layer, and can be made by a thermal oxidation process. For example, a pad oxide layer is formed on the surface of the substrate at a temperature of 800-1400°C. Preferably, the thickness of the prepared pad oxide layer is 5-15 nm.

[0035] Specifically, the pad nitride layer is a silicon nitride layer, and can be made by a CVD (chemical vapor deposition) or LPCVD (low pressure chemical vapor deposition) process. Preferably, the thickness of the pad nitride layer is 90-150 nm.

[0036] In the present invention, the trench can be formed by a dry plasma etching process, and the etching gas can be a mixed gas of chlorine, oxygen, and hydrogen bromide. In some specific embodiments, the depth of the trench is 100 - 300 nm; in the cross-sectional direction perpendicular to the substrate, that is, in the illustrated cross-sectional schematic diagram, the maximum width of the trench is 50 - 200 nm.

[0037] In the invention, a thermal oxidation process can be used to grow the substrate oxide layer in the trench to relieve the stress of the second isolation layer on the substrate.

[0038] Specifically, the conditions for the thermal oxidation include: the growth temperature is 800 - 1400 °C; the thickness of the substrate oxide layer grown in the trench by the thermal oxidation process is 50 - 500 angstroms. It should be noted that the oxygen flow rate during the thermal oxidation process in the present invention is carried out according to the standard.

[0039] Since a layer of substrate oxide layer is first formed on the inner surface of the trench by thermal oxidation, on the one hand, the substrate oxide layer can repair the damage caused to the trench edge substrate by STI trench etching and make the sharp corners formed by STI trench etching rounded (corner rounding), reducing the contact surface. On the other hand, it can also serve as a buffer layer for the subsequent formation of the second isolation layer, reducing the damage to the substrate during the ion implantation and filling processes.

[0040] As Figure 2 shown, the trenches and the substrate surface in the first region are covered with photoresist 300, and the second region is not covered with photoresist for oxygen ion implantation. After removing the photoresist, the trench structure with the first isolation layer as shown in Figure 3 can be obtained.

[0041] As Figure 3 shown, no first isolation layer is formed below the trench 211 in the first region, while a first isolation layer 230 is formed below the trench 212 in the second region. Specifically, the first isolation layer 230 can be formed directly below the bottom edge of the trench 212 or on the peripheral side of the trench 212.

[0042] In the present invention, only the surfaces of the substrate, trenches, and active regions in the first region can be covered with photoresist to avoid oxygen ion implantation in the regions where a deeper isolation structure is not required. Alternatively, the surfaces of the substrate, trenches, and active regions in both the first region and the second region can be covered with photoresist, and then developed and exposed to remove the photoresist in the second region to implant oxygen ions into the trenches that need to increase the depth and are not covered with photoresist.

[0043] Among them, the conditions for oxygen ion implantation include: the implantation energy is 5 - 100 keV; for example, it can be 5 keV, 10 keV, 20 keV, 30 keV, 40 keV, 50 keV, 60 keV, 70 keV, 80 keV, 90 keV, 100 keV or any value within the foregoing range. The implantation dose is 1×10 18 -7×10 18 ions / cm 2 , for example, it can be 1×10 18 ions / cm 2 、2×10 18 ions / cm 2 、3×10 18 ions / cm 2 、4×10 18 ions / cm 2 、5×10 18 ions / cm 2 、6×10 18 ions / cm 2 、7×10 18 ions / cm 2 or any value within the foregoing range.

[0044] In the present invention, the energy and dose of oxygen ion implantation need to be adjusted in combination with the thickness of the first isolation layer to be formed. The higher the thickness requirement of the first isolation layer, the greater the energy and dose of ion implantation; conversely, the lower the thickness requirement of the first isolation layer, the smaller the energy and dose of ion implantation.

[0045] In the present invention, during the oxygen ion implantation process, the oxygen ions are arranged in a Gaussian distribution in the substrate, and multiple implantations can be performed so that the peaks of the implanted ions are at different depths in the normal direction of the substrate. In this way, the oxygen ions can be implanted into the preset depth of the substrate by controlling the implantation energy, and the number of oxygen ions in the substrate can be controlled by adjusting the implantation dose, improving the reliability of the first isolation layer, so as to obtain a layer that can play an isolation role.

[0046] Among them, the included angle between the angle of oxygen ion implantation and the normal of the substrate is 0 - 7 degrees. In some specific embodiments, the included angle between the angle of oxygen ion implantation and the normal of the substrate is 0 degree, 1 degree, 2 degrees, 3 degrees, 4 degrees, 5 degrees, 6 degrees, 7 degrees or any value within the foregoing range.

[0047] In addition, a nitride layer can be further formed on the substrate oxide layer of the trench in the second region, and oxygen ions can be injected as much as possible below the trench by controlling the angle of oxygen ion implantation. For example, in a specific embodiment, the nitride layer is silicon nitride, and the angle of oxygen ion implantation can be 0-7 degrees. Due to the channeling effect during the ion implantation process, the method of tilting the wafer can be adopted to reduce the channeling effect during the ion implantation process. At the same time, the methods of multiple implantation and wafer rotation can be combined to inject oxygen ions as much as possible below the trench.

[0048] The thermally grown silicon dioxide is an amorphous material. The ions before being implanted into the substrate first pass through the nitride layer and the substrate oxide layer. Due to scattering caused by collisions, the angle at which the ions are squeezed into the substrate can change to a certain extent, and the ions are made to follow the Gaussian distribution as much as possible. At the same time, the nitride layer plays a further blocking role, which can further control the depth and direction of ion implantation, facilitating the realization of a deeper isolation structure together with the second isolation layer.

[0049] Specifically, the implanted oxygen ions are selected from one or more of H2O + , O + , HO + and O2 + . By performing oxygen ion implantation on the trench in the second region having a substrate oxide layer, more external oxygen ions can diffuse into the substrate to react and undergo internal thermal oxidation, and the cross-section of the first isolation layer and the trench can also be made more flat.

[0050] Specifically, the thickness of the first isolation layer is 5-50 nm, preferably 9-20 nm. The thickness of the first isolation layer can be adjusted according to the depth of the isolation structure that needs to be deepened.

[0051] Wherein, the method further includes: removing the photoresist in the first region, and then performing an annealing treatment. The annealing after ion implantation can be high-temperature furnace annealing or rapid thermal annealing. The conditions of the annealing treatment include: the annealing temperature is 900-1300 °C; the annealing time is 2-8 h. Specifically, the annealing atmosphere can be a mixed gas atmosphere of nitrogen and oxygen, or a mixed gas atmosphere of argon and oxygen. Among them, the volume content of oxygen in the mixed gas atmosphere can be 1-30%, so that the oxygen ions implanted into the trench in the second region react with the substrate to form silicon dioxide and repair the damage to the silicon substrate caused by the oxygen ion implantation process. Preferably, rapid thermal annealing can be adopted to reduce the diffusion of dopants and eliminate the damage caused by ion implantation to the substrate.

[0052] As Figure 3 shown, the method of the present invention selectively implants oxygen ions at the bottom of the trenches with the same depth, thereby obtaining an isolation structure with different depths.

[0053] Specifically, during the filling process, the second isolation layer covers the surface of the trench and the pad nitride layer, and then a chemical mechanical polishing (CMP) process is used for planarization to remove the second isolation layer on the surface of the pad nitride layer. The second isolation layer is selected from one or more of silicon dioxide, tetraethyl orthosilicate, and polysilicon. In some preferred embodiments, the second isolation layer may be silicon dioxide.

[0054] Among them, the method for filling the trench includes plasma enhanced chemical vapor deposition (PECVD) or high aspect ratio (HARP) process.

[0055] The plasma enhanced chemical vapor deposition process may specifically be a high density plasma chemical vapor deposition process (HDPCVD) to deposit silicon oxide in the shallow trench to form a shallow trench isolation structure.

[0056] The high aspect ratio (HARP) process can meet the requirements for filling STI trenches with dimensions of 65 nm and below, and can adjust the stress of semiconductor devices. The STI structure formed by using HARP has a tensile stress, which can buffer the compressive stress caused by the source / drain doping of NMOS transistors, thereby reducing the defects in the NMOS structure and improving the performance of NMOS devices.

[0057] Specifically, the precursors in the HARP process are Si(CH5O)(TEOS) and ozone. By adjusting the ratio of ozone to TEOS, the filling quality can be ensured, especially for trenches with an aspect ratio greater than 10. Moreover, the HARP process uses chemical vapor deposition and will not cause damage to the substrate due to plasma bombardment.

[0058] Specifically, it also includes annealing the substrate after the filling process. Specifically, the annealing temperature is 900 - 1300 °C, and the annealing time is 2 - 8 h. The annealing atmosphere can be an atmosphere with an oxygen content.

[0059] Since there are many incompletely reacted active bonds in the second isolation layer deposited by the HARP process, it is easy to absorb water, resulting in a reduction in the structural performance of the second isolation layer, and the subsequent CMP process will also cause damage to the second isolation layer. The annealing treatment can densify the second isolation layer and achieve a certain hardness.

[0060] In the present invention, the depths of the trenches in the first region and the second region and the widths at the maximum distance are the same or different, and can be specifically designed according to the desired depth, or can be designed as trenches with the same width or depth, and then a first isolation layer is formed below the trenches that need to have a greater depth.

[0061] The second aspect of the present invention provides the shallow trench isolation structure prepared by the first aspect of the present invention.

[0062] The present invention also provides an integrated circuit, which includes the foregoing shallow trench isolation structure.

[0063] The method of the present invention will be further described below in conjunction with specific embodiments, but the present invention is not limited to the following embodiments.

[0064] Embodiment

[0065] S1. A pad oxide layer and a pad nitride layer are sequentially formed on a substrate having a first region and a second region; the pad oxide layer is silicon oxide, and the thickness of the pad oxide layer is 9 - 15 nm; the pad nitride layer is silicon nitride, and the thickness of the pad nitride layer is 100 - 150 nm;

[0066] S2. The pad oxide layer, the pad nitride layer and a part of the substrate are etched to form a trench in the substrate; the depth of the trench is 200 nm, and the maximum width of the trench at the cross section is 100 nm;

[0067] S3. A substrate oxide layer is formed in the trench by a thermal oxidation process; the thickness of the substrate oxide layer is 9 - 15 nm;

[0068] S4. A photoresist is laid on the first region and the second region, the photoresist in the second region is removed, and then oxygen ions (O + ) are implanted into the substrate through the trench in the second region to form a first isolation layer under the trench in the second region; the second region is different from the first region; the thickness of the first isolation layer is 20 nm;

[0069] S5. The HARP process is used to fill the trenches in the first region and the second region to form a second isolation layer in the trenches.

[0070] Comparative Example

[0071] S1. A pad oxide layer and a pad nitride layer are sequentially formed on a substrate having a first region and a second region; the pad oxide layer is silicon oxide, and the thickness of the pad oxide layer is 9 - 15 nm; the pad nitride layer is silicon nitride, and the thickness of the pad nitride layer is 100 - 150 nm;

[0072] S2. The pad oxide layer, the pad nitride layer and a part of the substrate are etched to form a trench in the substrate; the depth of the trench is 200 nm, and the maximum width of the trench at the cross section is 100 nm;

[0073] S3. A photoresist is laid on the first region and the second region, the photoresist in the second region is removed, and then oxygen ions (O +) to form a first isolation layer under the trenches in the second region; the thickness of the first isolation layer is 20 nm;

[0074] S4. Use the HARP process to fill the trenches in the first region and the second region to form a second isolation layer in the trenches.

[0075] By fabricating the STI structures of the embodiments and the comparative examples into CMOS image sensors (CIS), for the isolation structures with different depths prepared in the embodiments, since the trench has a substrate oxide layer, the second isolation layer formed by the HARP process causes less damage to the substrate, and the reliability of the device is higher. It is applicable to devices that require the formation of isolation structures with multiple depths. Moreover, the compatibility between the second isolation layer and the first isolation layer formed by oxygen ion implantation is good, and the isolation effect is good.

[0076] The method for the shallow trench isolation structure provided by the present invention can form an isolation layer under the trench by injecting oxygen ions into the trench that requires a greater depth of the isolation structure, so as to cooperate with the isolation structure filled in the trench to achieve isolation between devices with different depths. At the same time, the method of the present invention can solve the problems of process difficulty and increased cost caused by etching some regions to form high aspect ratio trenches.

[0077] The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solutions of the present invention, and these simple modifications all fall within the protection scope of the present invention.

[0078] In addition, it should be noted that, in the above specific embodiments, the various specific technical features described can be combined in any suitable manner without conflict. To avoid unnecessary repetition, the present invention will not separately describe various possible combination methods.

[0079] In addition, any combination can be made between various different embodiments of the present invention as long as it does not violate the idea of the present invention, and it should also be regarded as the content disclosed by the present invention.

Claims

1. A method for preparing a shallow trench isolation structure, characterized in that, The method comprises the following steps: Form a pad oxide layer and a pad nitride layer on the substrate in sequence; wherein, the substrate comprises a first region and a second region; Etch the pad oxide layer, the pad nitride layer and a part of the substrate to form a trench in the substrate; Form a substrate oxide layer in the trench; Lay a photoresist on the first region and the second region, remove the photoresist in the second region, and then inject oxygen ions into the substrate through the trench in the second region to form a first isolation layer under the trench in the second region; Fill the trenches in the first region and the second region to form a second isolation layer in the trenches.

2. The method according to claim 1, wherein, The conditions for oxygen ion implantation include: implantation energy is 5 - 100 keV; implantation dose is 1×10 18 -7×10 18 ions / cm 2 .

3. The method according to claim 1, wherein, The included angle between the angle of the oxygen ion implantation and the normal line of the substrate is 0-7 degrees.

4. The method according to claim 1, wherein, The implanted oxygen ions are selected from one or more of H2O + , O + , HO + and O2 + .

5. The method according to claim 1, wherein, The depth of the trench is 100-300 nm; in the cross-sectional direction perpendicular to the substrate, the maximum width of the trench is 50-200 nm; and / or The thickness of the first isolation layer is 5-50 nm, preferably 9-20 nm.

6. The method according to claim 1, wherein, The method further comprises: removing the photoresist in the first region, and then performing an annealing treatment; the conditions of the annealing treatment include: the annealing temperature is 900-1300 °C; the annealing time is 2-8 h.

7. The method according to claim 1, wherein, The substrate oxide layer is formed by thermal oxidation; the conditions of the thermal oxidation include: the growth temperature is 800-1400 °C; The thickness of the substrate oxide layer is 50-150 angstroms.

8. The method according to claim 1, wherein, The method for filling the trench includes plasma chemical vapor deposition or high aspect ratio process; The second isolation layer is selected from one or more of silicon dioxide, tetraethyl orthosilicate and polysilicon.

9. The method according to claim 1, wherein, The method further comprises: forming a nitride layer on the substrate oxide layer in the trench in the second region before the oxygen ion implantation.

10. A shallow trench isolation structure prepared by the method according to any one of claims 1-9.

11. An integrated circuit, characterized in that, The integrated circuit comprises the shallow trench isolation structure as claimed in claim 10.

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