Non-linear transient improvement of

Abstract

The invention relates to a non-linear transient improvement for a current mode controller. A method of increasing a transient response of a current mode controller and a current mode controller with an improved transient response are provided. The current mode controller is configured to control the high side switch and the low side switch. The current mode controller includes a pulse width modulation generator.

Description

Technical Field

[0001] The present disclosure relates to non - linear transient improvement of a current - mode controller, and particularly to a method for increasing the transient response of a current - mode controller. Background Art

[0002] A current - mode controller is a DC - DC converter that regulates the output voltage to a desired value by measuring the current flowing through an inductor. For example, a current - mode controller can be used in a buck - converter circuit. An important aspect of a current - mode controller and its ability to regulate the output voltage is its transient response. When the load applied to the current - mode controller changes, this will cause a change in the output voltage. Compared with the desired value, this change will be an increase or decrease in the output voltage. The transient response is a measure of how quickly the current - mode controller can regulate the output voltage back to the desired value. A current - mode controller with a good transient response is a controller with a fast transient response. This is desirable to avoid circuit jitter and faults.

[0003] In the art, the transient response depends on the bandwidth of the compensation loop. The compensation loop is a set of components in a current - mode controller, including capacitors and resistors, which are used to control the duty cycle of a pulse - width modulator. The higher the bandwidth of the compensation loop, the better the transient response. By increasing the capacitance and resistance values in the compensation loop, the bandwidth can be increased. However, increasing the bandwidth will result in a decrease in the stability of the current - mode controller, leading to an increase in noise and interference in the output. This can be offset by increasing the value of the output capacitance of the circuit; however, this will result in a more expensive system.

[0004] Therefore, there is a need for a method to improve the transient response of a current - mode controller while maintaining stable performance.

[0005] The object of the present disclosure is to solve one or more of the above - mentioned limitations. Summary of the Invention

[0006] According to a first aspect of the present disclosure, there is provided a method for increasing the transient response of a current - mode controller, wherein the current - mode controller is configured to control a high - side switch and a low - side switch.

[0007] Optionally, the current - mode controller includes a pulse - width modulation generator having a duty cycle configured to set the on - time of the high - side switch.

[0008] Optionally, the on - time of the high - side switch is determined by at least one or more of a sense voltage, a compensation voltage, and an output voltage.

[0009] Optionally, the high - side switch and the low - side switch are metal - oxide field - effect transistor switches.

[0010] Optionally, the method includes: comparing the output voltage with a threshold voltage value and generating a first signal that can have a high value or a low value, wherein the first signal has a high value if the output voltage is less than the threshold voltage.

[0011] Optionally, the threshold voltage value is proportional to a target output voltage value.

[0012] Optionally, the method includes: generating a second signal that can have a high value or a low value.

[0013] Optionally, the value of the second signal depends on a square wave function, the first signal, and the second signal that can have high values or low values, whereby the value of the second signal is high in the following cases: the square wave function, the first signal, and the second signal all have high values; or the square wave function and the first signal have high values and the second signal has a low value; or the square wave function has a high value and the first signal and the second signal have low values.

[0014] Optionally, the current mode controller is configured to operate in a first state with a first sense voltage in the case where the second signal has a low value, wherein the first sense voltage is proportional to the inductor current.

[0015] Optionally, the current mode controller is configured to operate in a second state with a second sense voltage in the case where the second signal has a high value, wherein the second sense voltage is proportional to the difference between the inductor current and an offset current.

[0016] Optionally, the offset current is a DC current.

[0017] Optionally, the first operating state has a first duty cycle for the high-side switch having a first on-time, and the second operating state has a second duty cycle for the high-side switch having a second on-time, wherein the second on-time is longer than the first on-time.

[0018] Optionally, the first on-time has a duration set by the first sense voltage, and the second on-time has a duration set by the second sense voltage.

[0019] Optionally, during the first operating state or the second operating state, when the square wave function is high, the low-side switch can have its on-time shortened a finite number of times.

[0020] According to a second aspect of the present disclosure, there is provided a current mode controller with improved transient response using the method according to the first aspect, the current mode controller including a pulse width modulation generator.

[0021] Optionally, the pulse width modulation generator operates with a duty cycle configured to set the on-time of the high-side switch.

[0022] Optionally, the controller includes: a feedback comparator configured to output a first signal; and logic configured to receive a plurality of inputs and output a second signal, wherein at least one of the plurality of inputs is the first signal.

[0023] Optionally, the first signal can have a high value or a low value, and the second signal can have a high value or a low value.

[0024] Optionally, at least one of the plurality of inputs for the second signal is the second signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The present disclosure is described in more detail below by way of example and with reference to the accompanying drawings, in which:

[0026] Figure 1 is an example embodiment of a current mode controller according to the prior art;

[0027] Figure 2 is according to the prior art Figure 1 graphical representation of the inductor current build-up of the current mode controller in

[0028] Figure 3 is a method for improving the transient response of a current mode controller according to the present disclosure;

[0029] Figure 4 is for implementing Figure 3 example embodiment of a current mode controller of the method;

[0030] Figure 5 is during the first operating state and the second operating state Figure 4 graphical representation of the inductor current build-up of the current mode controller;

[0031] Figure 6A is Figure 4 example embodiment of the logic chip of the current mode controller;

[0032] Figure 6B is Figure 6A graphical representation of the operation of the logic chip;

[0033] Figure 7A is shown during discontinuous conduction mode using Figure 3 simulation results of the operation of an embodiment of a current mode controller of the method;

[0034] Figure 7B is shown during continuous conduction mode using Figure 3 simulation results of the operation of an embodiment of a current mode controller of the method; and

[0035] Figure 7Care simulation results showing the effects of different offset currents on the operation of a current mode controller according to the present disclosure. DETAILED DESCRIPTION

[0036] Figure 1 FIG. illustrates a current mode controller 100 according to the prior art. The current mode controller 100 includes a transconductance amplifier 110, the output of which is coupled to a compensation loop 120. The current mode controller 100 also includes a slope compensator 130 coupled to a second comparator 140. A digital pulse width modulation (PWM) generator module 150 is connected to a gate driver 160 that controls a high side power switch HS and a low side power switch LS. The HS and LS power switches are used to establish a current across an inductor L1, which provides the output of the current mode controller 100 via an output capacitor C1. The switch HS and the switch LS can be, for example, metal oxide field effect transistor (MOSFET) switches.

[0037] In operation, an output voltage VOUT is provided as a first input to the transconductance amplifier 110. The transconductance amplifier 110 compares VOUT with a reference voltage VREF to output a current proportional to the difference between VOUT and VREF. The current is converted to a voltage VCOMP by the compensation loop 120. If VOUT is less than VREF, then VCOMP increases and vice versa. The compensation loop 120 includes a resistor R1 and a capacitor C2. VCOMP is then used as one of the two inputs to the second comparator 140. The second input to the second comparator 140 is a sense voltage VSENSE. The sense voltage VSENSE is obtained through a direct-through sensor 170 for sensing the inductor current IL. The sensed inductor current IL is passed into the slope compensator 130 and adjusted with a slope current Islope. The sense voltage across a resistor R2 is then measured and is given by: VSENSE = (IL + Islope) * R2. The compensation slope current (Islope) is generated internally and is proportional to the downward slope of the inductor current.

[0038] The sense voltage VSENSE and the compensation voltage VCOMP are compared by the comparator 140 to output a signal TOFF. If VSENSE is greater than VCOMP, then TOFF is high and the digital PWM generator 150 instructs the gate driver 160 to turn off HS. The digital PWM generator also receives a second input from a switch clock CLK. This provides a predetermined duty cycle timer for the current mode controller 100. The duty cycle determines the on-time of HS, which controls the current establishment across the inductor L1. Depending on the application of the current mode controller, the frequency of the switch clock CLK will be different.

[0039] The current mode controller 100 is designed to control the peak of the inductor current IL measured across the inductor L1, which in turn will determine the output voltage VOUT measured across C1. This is achieved by turning on and off HS and LS according to the sensed and output voltages. For example, for a buck converter, the current mode controller 100 will take the input voltage VIN and generate an output voltage VOUT that is less than VIN.

[0040] Figure 2 The build-up of the inductor current IL across the inductor L1 of the current mode controller 100 according to the prior art is shown.

[0041] First, the current mode controller 100 is turned on. The CLK signal is low, and thus the PWM signal 220 is also low. Therefore, the HS switch is not turned on. At point A, the CLK signal is high, and the PWM signal 220 is also high because VSENSE 210 is less than VCOMP, and thus the signal TOFF (not shown) is low. Therefore, at point A, HS is turned on while LS is turned off. Between point A and point B, HS remains on. The inductor current IL increases towards the peak Ipeak. At the same time, VSENSE 210 also increases. This is expected because the sensed voltage depends on the inductor current: VSENSE = (IL + Islope) * R2.

[0042] At point B, VSENSE 210 is at the value of the compensation voltage VCOMP. Therefore, Figure 1 the second comparator 140 outputs a high TOFF signal (not shown), resulting in a low PWM signal 220. Then HS is turned off and LS is turned on. The inductor current IL starts to decrease. The current mode controller 100 maintains this configuration until point C when CLK is high again. The behavior between point C and D is the same as that between A and B. This cycle will repeat until the current mode controller 100 is turned off. The build-up speed of the current IL depends on Figure 1 the values of R1 and C2 in the compensation loop 120 of. These values are in turn limited by the desired stability of the system. Once the current mode controller starts operating, the transient response cannot be changed. Therefore, during events such as output undershoot, the current mode controller 100 cannot restore the output to the desired output faster than the preset bandwidth during manufacturing.

[0043] Figure 3is a flowchart illustrating a method for improving the transient response of a current mode controller according to the present disclosure, where the current mode controller is configured to control a high-side switch and a low-side switch. The method allows for an adaptive transient response in the case of an output undershoot. If the output voltage drops below a threshold, the operating state of the current mode controller changes. The threshold is proportional to a target voltage value or a fixed offset value from the target value, where the target voltage value is the desired output voltage of the current mode controller configured to use Figure 3 the method. In this case, the operating state refers to the duty cycle of a pulse width modulation (PWM) signal configured to set the on-time and off-time of the high-side switch. At a given operating state, the on-time of the duty cycle is determined by at least one or more of the following: a sensed voltage, a compensated voltage, and an output voltage.

[0044] In step 310, the output voltage is compared with a threshold voltage value. It is important to note that the threshold voltage value is different from the reference voltage VREF. In the next step 320, a first signal is generated. The first signal can have a high value or a low value. If the output voltage is less than the threshold voltage, a first signal with a high value is generated. When the first signal has a high value, this can also be referred to as a pulse.

[0045] In step 330, a second signal is generated. The second signal can also have a high value or a low value. When the second signal has a high value, this can also be referred to as a pulse. The second signal is generated by a logic that accepts multiple inputs. The multiple inputs include: a time window signal in the form of a square wave function, the first signal, and the second signal. The time window signal can also have a high value or a low value. The duty cycle of the time window signal indicates the period during which the second signal can remain high. The second signal can follow the first signal pulse during the on-time of the time window signal. The number of pulses of the first signal that the second signal can pass through is programmable. Depending on the value of the second signal, the current mode controller will operate in one of two states.

[0046] If the second signal has a low value, the next step of the method is step 340a. In this step, the current mode controller is configured to operate in a first state. The first state is defined as an operating state with a first sensed voltage, where the first sensed voltage is proportional to the inductor current. Since the current mode controller operates in the same manner as a prior art current mode controller, this first state can also be referred to as a normal operating state.

[0047] If the second signal has a high value, the next step of the method is step 340b. In this step, the current mode controller is configured to operate in a second state. The second state is defined as an operating state with a second sensed voltage, where the second sensed voltage is proportional to the difference between the inductor current and the offset current. The offset current is a DC current with a predetermined value. The predetermined value can be programmable. This second operating state can also be referred to as a non-linear operating state. When the output undershoots and a faster transient response is required, the second operating state of the current mode controller will be triggered.

[0048] Figure 4 is configured to implement Figure 3 The current mode controller 400 of the method. For consistency, any components that also exist in the current mode controller 100 and have the same function in the current mode controller 400 are given the same labels. For the sake of brevity, their operating functions will not be repeated here as it is the same as that of the current mode controller 100.

[0049] The current mode controller 400 includes a feedback comparator 410, a logic 420, and a digital pulse width modulator (PWM) generator 430. The feedback comparator 410 is configured to output a first signal S1. The first signal can have a high value or a low value. The feedback comparator 410 compares the output voltage VOUT with a threshold voltage VTHRESH. If VOUT < VTHRESH, the first signal S1 is high. The threshold voltage value is programmable according to the application of the current mode controller 400. The first signal S1 is one of the multiple inputs of the logic 420 configured to generate a second signal S2. The second signal S2 can also have a high value or a low value. The other inputs of the logic include the signal S2 and a time window signal in the form of a square wave function t1. The time window signal t1 can have a high value or a low value, where when t1 has a high value, it represents the time window during which the signal S2 can be high. The time window signal t1 can also be programmable according to the application of the current mode controller 400.

[0050] The digital PWM generator 430 provides the time window signal t1 to the logic 420. The digital PWM generator 430 is configured to generate a PWM signal with a specific duty cycle to be sent to the gate driver 160 to control the high-side switch HS and the low-side switch LS. The digital PWM generator 430 in the current mode controller 400 also receives the output signal TOFF and the switch CLK, in addition to the second signal S2 and the maximum count value MAX COUNT.

[0051] If the second signal S2 has a low value, the current mode controller 400 operates in a first operating state. In this state, the current mode controller 400 operates as in the prior art. The sensed voltage VSENSE received by the comparator 140 is given by VSENSE = (IL + Islope) * R2. The on-duration of the high-side switch HS depends on the time required for VSENSE to reach the compensation voltage VCOMP.

[0052] If the second signal S2 has a high value, the current mode controller 400 operates in a second operating state. During the second operating state, the digital PWM generator 430 regulates the duty cycle of the PWM signals configured to turn on and off HS and LS. In the second operating state, the duty cycle is regulated such that HS is on for an extended period of time. This is achieved by regulating the sensed voltage VSENSE. During the second operating state, the high value of the second signal S2 triggers the switch Sw1 to turn on. This allows the offset current Ioffset to flow through the resistor R2. The offset current Ioffset is a programmable value, which can be selected, for example, as a part of the ripple current in the inductor. In this operating state, the sensed voltage is given by: VSENSE = (IL + Islope - Ioffset) * R2. The offset current is direct current (DC) and is pre-programmed according to the application for which the current mode controller 400 is used. The offset current Ioffset increases the length of time required for VSENSE > VCOMP, and thus extends the on-time of HS. This allows the current mode controller 400 to ramp up the inductor current IL across the inductor L1 in a shorter time, in other words, it increases the transient response of the current mode controller. Additionally, the second operating state has the additional benefit of increasing the peak inductor current. During this second operating state, the on-time of the low-side switch LS can also be shortened to enter the next switching cycle more quickly. Typically, a constant-frequency current mode controller turns on the switch at a selected frequency. To shorten the on-time of the low-side switch LS, the duty cycle is temporarily increased by shortening the off-time to a minimum off-time which is a programmable value. The on-time of the low-side switch can only be shortened a limited number of times while the square wave function t1 is high. The digital PWM generator 430 includes a counter, and each time the on-time of the low-side is shortened within a given time window t1, the value of this counter is incremented by 1. The maximum count value MAX COUNT sets the number of times the on-time of the low-side switch can be shortened and the high-side switch can be restarted during the time window signal t1. For example, if the value of MAXCOUNT is 1, the on-time of the low-side switch can only be shortened once within the time window t1. Once the time window t1 ends, the counter in the digital PWM generator 430 is reset to 0. The maximum count value MAX COUNT has a preset value and provides another way to control the bandwidth of the controller 400.

[0053] When the output voltage VOUT drops below the threshold voltage VTHRESH, the feedback comparator 410 generates a first signal S1 with a high value. The logic 420 processes the first signal S1 to generate a second signal S2. Then, when the second signal S2 has a high value, the digital PWM generator 430 modifies the PWM signal. If S2 goes high during the high-side switch on-time, the high-side switch on-time is immediately extended to reduce transients. This marks the first extended high-side on-time. If S2 remains high after the end of this first extended high-side on-time and the low-side switch is turned on, the low-side on-time will be shortened as described above, and the high-side switch will be turned on again. Conversely, if S2 goes high during the period when the high-side switch is off and the low-side switch is on, the low-side switch will immediately turn off and the high-side switch will turn on with an extended on-time.

[0054] Figure 5 A graphical representation of the inductor current build-up in the current mode controller 400 during the first and second operating states is shown. The sense voltage 510 and the inductor current IL are shown as dashed lines for the first operating state and as solid lines for the second operating state.

[0055] During the second operating state, the sense voltage takes longer to increase above the compensation voltage. This can be seen by the shallower gradient of the solid line compared to the dashed line of VSENSE 510. This increases the HS on-time, and thus the peak inductor current, which can be seen by comparing the solid and dashed lines of IL.

[0056] Figure 6A An example embodiment of the logic 420 in the current mode controller 400 is shown. The logic 420 is configured to generate the second signal S2 based on a plurality of inputs including the first signal S1, a square wave function t1 (time window), and the second signal S2. The logic 420 allows only one high-value first signal S1 to pass to S2 within a given time window t1. In other embodiments, a D-type flip-flop can be used in the logic 420, which allows more than one S1 pulse to pass to S2 within the time window t1.

[0057] Figure 6B An example of the change in the output voltage VOUT due to the improved transient response of the second operating state of the current mode controller 400 is shown. The solid line shows the output voltage VOUT of the second operating state, while the dotted line shows the output voltage VPRIOR of the prior art current mode controller 100.

[0058] At point E, the output voltage VOUT drops below the threshold voltage value VTHRESH. At this time, the feedback comparator 410 changes the value of the first signal S1 from low to high. This also causes the second signal S2 to have a high value, and the square wave function t1 to have a high value. Therefore, the current mode controller 400 is now operating in the second operating state. This is reflected in the behavior of the rapidly increasing VOUT. At point F, VOUT is now greater than VTHRESH again. The first signal S1 now has a low value. However, the value of t1 is still high. Therefore, the current mode controller 400 continues to operate in the second operating state. At point G, VOUT drops below VTHRESH again, and another high-value S1 pulse is generated. S2 remains low because it is only programmed to trigger one pulse during t1. However, since t1 is still high, this does not affect the operating state of the current mode controller. After point H, the output voltage level becomes the target value, and S1, t1, and S2 all have low values. Therefore, the current mode controller 400 returns to operating in the first operating state.

[0059] The purpose of the time window of the square wave function t1 is to act as a blank period to reduce the bandwidth of the system. This increases the stability of the current mode controller and also improves the transient response.

[0060] Figure 7A A simulation example of a current mode controller with improved transient response using Figure 3 the method is shown. In this example, when the current mode controller is in discontinuous conduction mode, the second operating state is triggered. Between 251 and 252 microseconds, as the load applied to the current mode controller increases, the S2 pulse is triggered. This causes the high-side switch to turn on and have an extended conduction time, as shown by the increase in the inductor current. This allows the inductor current to reach its peak without waiting for the sense voltage to build up to the compensation voltage. Typically, before turning off the low-side switch, one usually waits until the CLK signal goes high. The shortened conduction time of the low-side switch represents the minimum programmable time period. If it expires, the low-side switch turns off. When the low-side switch is on, the inductor current decreases. By minimizing the time the low-side switch is on, the decrease in the inductor current is also minimized. In this simulation example, the MAX COUNT value is set to 1, which means that in a given time window signal, the low-side switch cycle can only be shortened once.

[0061] Figure 7B A simulation example of a current mode controller with improved transient response using Figure 3Simulation example of a current mode controller with improved transient response for the method. In this example, when the current mode controller is already in continuous conduction mode, the second operating state is triggered. In this case, when the HS switch is already on, the S2 pulse is triggered to extend the cycle by reducing the current sensing gain. The following low-side switch cycle suddenly ends to allow the high-side switch cycle to restart.

[0062] Figure 7C is the use of Figure 3 Simulation example of a current mode controller with improved transient response for the method. This figure shows the effect of the selection of the offset current on the inductor current build-up and the peak of the inductor current. The larger the offset current, the larger the peak inductor current. The offset current can be preset according to the rated load of different regulators used by the current mode controller.

[0063] Therefore, those skilled in the art will understand that variations of the disclosed arrangements are possible without departing from the present disclosure. Therefore, the above description of specific embodiments is for example only and not for the purpose of limitation. It will be clear to those skilled in the art that minor modifications can be made without significant changes to the operations.

Claims

1. A method of increasing a transient response of a current mode controller, wherein the current mode controller is configured to control a high-side switch and a low-side switch. 2 . The method of claim 1 , wherein the current mode controller comprises a pulse width modulation generator having a duty cycle configured to set an on-time of the high-side switch. 3 . The method of claim 2 , wherein the on-time of the high-side switch is determined by at least one or more of a sense voltage, a compensation voltage, and an output voltage. The method of claim 3 , wherein the high-side switch and the low-side switch are metal oxide field effect transistor switches.

5. The method according to claim 4, further comprising: The output voltage is compared to a threshold voltage value and a first signal is generated that can have a high value or a low value, wherein the first signal has a high value if the output voltage is less than the threshold voltage. The method of claim 5 , wherein the threshold voltage value is proportional to a target output voltage value.

7. The method according to claim 6, further comprising: A second signal is generated that can have a high value or a low value.

8. The method according to claim 7, wherein the value of the second signal depends on a square wave function capable of having a high value or a low value, the first signal and the second signal, whereby the value of the second signal is high if: The square wave function, the first signal and the second signal all have high values; or The square wave function and the first signal have high values ​​and the second signal has a low value; or The square wave function has a high value and the first signal and the second signal have a low value. 9 . The method of claim 8 , wherein if the second signal has a low value, the current mode controller is configured to operate in a first state having a first sensing voltage, wherein the first sensing voltage is proportional to the inductor current.

10. The method of claim 9, wherein if the second signal has a high value, the current mode controller is configured to operate in a second state having a second sensing voltage, wherein the second sensing voltage is proportional to a difference between the inductor current and an offset current. The method of claim 10 , wherein the offset current is a DC current.

12. The method of claim 11, wherein the first operating state has a first duty cycle with a first on-time for the high-side switch, and the second operating state has a second duty cycle with a second on-time for the high-side switch, wherein the second on-time is longer than the first on-time.

13. The method according to claim 12, wherein The first on-time has a duration set by the first sensing voltage, and the second on-time has a duration set by the second sensing voltage. 14 . The method of claim 13 , wherein during the first operating state or the second operating state, when the square wave function is high, the low-side switch has an on-time that can be shortened a finite number of times.

15. A current mode controller with improved transient response using the method of claim 1, the current mode controller comprising a pulse width modulation generator.

16. The current mode controller of claim 15, wherein the pulse width modulation generator operates with a duty cycle configured to set an on-time of a high-side switch.

17. The current mode controller of claim 16 further comprising: a feedback comparator configured to output a first signal; as well as Logic is configured to receive a plurality of inputs and output a second signal, wherein at least one of the plurality of inputs is the first signal.

18. The current mode controller of claim 17, wherein the first signal can have a high value or a low value, and the second signal can have a high value or a low value.

19. The current mode controller of claim 18, wherein at least one of the plurality of inputs for the second signal is the second signal.

Images