Oscillating circuit of quartz clock system

Abstract

The invention discloses an oscillation circuit of a quartz clock system. The oscillation circuit comprises an oscillation circuit, a frequency hopping control circuit, a compensation circuit, a delay circuit, a clock monitoring circuit and a power switching circuit, the oscillation circuit is used for outputting a clock signal, the temperature characteristics of the first resistor and the second resistor are the same, and the compensation circuit is connected with a target node and used for adjusting the temperature characteristics of the voltage of the target node, namely, the temperature characteristics of the clock signal are compensated under the condition that the temperature characteristics of the first resistor and the second resistor are the same. The output frequency of the clock signal meets the preset temperature drift; whether an external clock is accessed or not can be automatically distinguished, and a corresponding same-frequency mode signal is generated to control one of the first switching device and the second switching device to be switched on; and when no external clock is detected to be accessed, the device works in a mode of setting frequency by an external resistor. When an external clock is accessed, the device can automatically work in a mode of synchronizing the external clock.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and specifically to a quartz clock system oscillation circuit. Background Art

[0002] As is well known, a quartz clock is a timekeeping device. Everyone is familiar with a clock. It is a timekeeping device that tells us the time, and we use it every day. In daily life, it is sufficient for a clock to be accurate to within 1 second. However, in many fields of scientific research or engineering technology, much higher requirements are placed on the time. The quartz clock was precisely developed to meet this need. Its main component is a very stable quartz oscillator.

[0003] However, existing quartz clocks cannot generate a clock signal with low temperature drift, cannot compensate for the temperature characteristics of the clock signal, and cannot automatically identify whether an external clock is connected. Therefore, we propose a quartz clock system oscillation circuit to solve the above-mentioned problems. Summary of the Invention

[0004] The purpose of the present invention is to provide a quartz clock system oscillation circuit to solve the problems raised in the above background art.

[0005] To achieve the above purpose, the present invention provides the following technical solutions:

[0006] A quartz clock system oscillation circuit, comprising: an oscillation circuit, a frequency hopping control circuit, a compensation circuit, a delay circuit, a clock monitoring circuit, and a power supply switching circuit;

[0007] The oscillation circuit is used to output a clock signal and includes at least a first resistor and a second resistor connected in series and a capacitor connected in parallel with the first resistor. Among them, the first resistor and the second resistor have the same temperature characteristics, and the connection between the series-connected first resistor and the second resistor is marked as the target node;

[0008] The frequency hopping control circuit is configured to generate a first comparison voltage and a second comparison voltage based on the output error voltage of the switching power supply, and generate a frequency hopping signal according to the comparison result of the first comparison voltage and the second comparison voltage;

[0009] The compensation circuit is connected to the target node and is used to adjust the temperature characteristics of the voltage at the target node to compensate for the temperature characteristics of the clock signal, so that the output frequency of the clock signal meets the preset temperature drift;

[0010] The delay circuit includes an adder counter and a first OR gate, and the adder counter includes a second OR gate, a first D flip-flop, and a second D flip-flop;

[0011] A clock detection circuit is used to generate a corresponding same-frequency mode signal SYNC-MODE according to whether an external clock signal CLK is connected to the input end of the clock detection circuit. The same-frequency mode signal SYNC-MODE is connected to the second switching device S2, and the same-frequency mode signal SYNC-MODE is also connected to the first switching device S1 through an inverter INV; control one of the first switching device S1 and the second switching device S2 to conduct and the other to turn off; when the first switching device S1 conducts, set the oscillator frequency using an external resistor unit; when the second switching device S2 conducts, set the oscillator frequency using an external clock unit;

[0012] A power supply switching circuit includes a first control resistor R1, a second control resistor R2, a voltage follower and a comparator; a first end of the first control resistor R1 is connected to a power supply V DD , a second end of the first control resistor R1 and a first end of the second control resistor R2 are connected to the positive input end of the voltage follower, a second end of the second control resistor R2 is grounded, an output end of the voltage follower is connected to its negative input end and the positive input end of the comparator, a negative input end of the comparator provides a reference voltage of 1.2V through a bandgap reference circuit, and the comparator is also powered through the power supply V H , an output end of the comparator is input to a power supply gating logic unit through a level shift, and the power supply gating logic unit is also respectively connected to the power supply V DD and the power supply V BAK , the power supply gating logic unit outputs to select and connect the power supply V S and is connected to the input end of the LDO circuit. The LDO circuit is also connected to an external control EN18 pin and a standby voltage V CORE pin.

[0013] As a further solution of the present invention: The compensation circuit adjusts the temperature characteristic of the voltage of the target node, including: The compensation circuit generates a current with a positive temperature characteristic to extract a current with a positive temperature characteristic from the target node.

[0014] As a further solution of the present invention: The compensation circuit includes a current generation module, a current derivation module, and a current extraction module. The current generation module is connected to the current derivation module, and the current derivation module is connected to the current extraction module.

[0015] As a further solution of the present invention: The frequency hopping control circuit is further configured to compare the magnitudes of a first comparison voltage and a second comparison voltage when the frequency hopping enable signal is at a low level, and when the first comparison voltage is equal to the second comparison voltage, the generated frequency hopping signal is an invalid signal, and when the first comparison voltage is greater than the second comparison voltage, the generated frequency hopping signal is a valid signal.

[0016] As a further solution of the present invention: the frequency hopping control circuit includes: a first current generation circuit, a first comparison voltage generation circuit, a second comparison voltage generation circuit, and a comparison circuit; wherein, the first current generation circuit is configured to generate a first current signal based on the output error voltage of the switching power supply; the first comparison voltage generation circuit is configured to generate a first comparison voltage based on the first mirror signal of the first current signal; the second comparison voltage generation circuit is configured to generate a second comparison voltage based on the second mirror signal of the first current signal, the mirror signal of the second current signal, and the frequency hopping enable signal; the comparison circuit is configured to generate a frequency hopping signal according to the comparison result between the first comparison voltage and the second comparison voltage.

[0017] As a further solution of the present invention: the first current generation circuit includes: a first transistor, a second transistor, a third transistor, and a first current source; the first comparison voltage generation circuit includes: a fourth transistor and a first resistor; the second comparison voltage generation circuit includes: a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a second current source, and a first capacitor; the comparison circuit includes: a first voltage comparator.

[0018] As a further solution of the present invention: the D terminal of the first D flip-flop is connected to its own inverted output terminal, its clock terminal is connected to the output terminal of the second OR gate, and its non-inverted output terminal is left unconnected.

[0019] As a further solution of the present invention: the D terminal of the second D flip-flop is connected to its own inverted output terminal, its clock terminal is connected to the inverted output terminal of the first D flip-flop, its non-inverted output terminal is connected to the first input terminal of the second OR gate, and its inverted output terminal is connected to the first input terminal of the first OR gate.

[0020] As a further solution of the present invention: the second input terminal of the second OR gate is connected to the output terminal of the oscillation circuit to receive the clock signal.

[0021] As a further solution of the present invention: the second input terminal of the first OR gate is connected to the output terminal of the oscillation circuit to receive the clock signal, and the output terminal of the first OR gate is connected to the clock receiving terminal of the frequency hopping control circuit.

[0022] Compared with the prior art, the beneficial effects of the present invention are:

[0023] For the quartz clock system oscillation circuit, the oscillation circuit is used to output a clock signal. Among them, the first resistor and the second resistor have the same temperature characteristics. The compensation circuit is connected to the target node and is used to adjust the temperature characteristics of the voltage of the target node. That is, when the first resistor and the second resistor have the same temperature characteristics, the temperature characteristics of the clock signal are compensated, so that the output frequency of the clock signal meets the preset temperature drift.

[0024] The quartz clock system oscillation circuit can automatically identify whether an external clock is connected and generate a corresponding same-frequency mode signal to control the conduction of one of the first switching device and the second switching device. When it is detected that no external clock is connected, it operates in the mode of the frequency set by the external resistor. When an external clock is connected, it can automatically operate in the mode of synchronizing with the external clock;

[0025] By setting a frequency hopping control circuit in the quartz clock system oscillation circuit, even if the output error voltage is very low and the response is slow, the frequency hopping signal will not continuously output multiple invalid signals. Only when the first comparison voltage is equal to the second comparison voltage can an invalid signal be output, thereby achieving that each clock signal has a relatively long and same time interval, improving the efficiency of light load operation and avoiding the problems of double pulses or burst pulses. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a circuit schematic diagram of the quartz clock system oscillation circuit of the present invention.

[0027] Figure 2 It is a structural schematic diagram of the quartz clock system oscillation circuit of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0028] In one embodiment, as Figure 1 - Figure 2 shown, a quartz clock system oscillation circuit includes: an oscillation circuit, a frequency hopping control circuit, a compensation circuit, a delay circuit, a clock monitoring circuit, and a power supply switching circuit;

[0029] The oscillation circuit is used to output a clock signal and at least includes a first resistor and a second resistor connected in series and a capacitor connected in parallel with the first resistor. Among them, the first resistor and the second resistor have the same temperature characteristics, and the connection between the series-connected first resistor and the second resistor is marked as the target node;

[0030] The frequency hopping control circuit is configured to generate a first comparison voltage and a second comparison voltage based on the output error voltage of the switching power supply, and generate a frequency hopping signal according to the comparison result of the first comparison voltage and the second comparison voltage;

[0031] The compensation circuit is connected to the target node and is used to adjust the temperature characteristics of the voltage of the target node to compensate the temperature characteristics of the clock signal, so that the output frequency of the clock signal meets the preset temperature drift;

[0032] The delay circuit includes an adder counter and a first OR gate, and the adder counter includes a second OR gate, a first D flip-flop, and a second D flip-flop;

[0033] A clock detection circuit is used to generate a corresponding same-frequency mode signal SYNC-MODE according to whether an external clock signal CLK is connected to the input end of the clock detection circuit. The same-frequency mode signal SYNC-MODE is connected to the second switching device S2, and the same-frequency mode signal SYNC-MODE is also connected to the first switching device S1 through an inverter INV; control one of the first switching device S1 and the second switching device S2 to conduct and the other to turn off; when the first switching device S1 conducts, set the oscillator frequency by using an external resistance unit; when the second switching device S2 conducts, set the oscillator frequency by using an external clock unit;

[0034] A power supply switching circuit includes a first control resistor R1, a second control resistor R2, a voltage follower and a comparator; the first end of the first control resistor R1 is connected to the power supply V DD , the second end of the first control resistor R1 and the first end of the second control resistor R2 are connected to the positive input end of the voltage follower, the second end of the second control resistor R2 is grounded, the output end of the voltage follower is connected to its negative input end and the positive input end of the comparator, the negative input end of the comparator provides a reference voltage of 1.2V through a bandgap reference circuit, and the comparator is also powered through the power supply V H , the output end of the comparator is input to the power supply gating logic unit through a level shift, and the power supply gating logic unit is also respectively connected to the power supply V DD and the power supply V BAK , the power supply gating logic unit outputs to select and connect the power supply V S and is connected to the input end of the LDO circuit. The LDO circuit is also connected to an external control EN18 pin and a standby voltage V CORE pin.

[0035] The compensation circuit adjusts the temperature characteristic of the voltage of the target node, including: the compensation circuit generates a current with a positive temperature characteristic to extract a current with a positive temperature characteristic from the target node;

[0036] The compensation circuit adjusts the temperature characteristic of the voltage of the target node X, including: the compensation circuit generates a current with a positive temperature characteristic to extract a current with a positive temperature characteristic from the target node X;

[0037] The compensation circuit generates a current with a positive temperature characteristic to extract a current with a positive temperature characteristic from the target node X, and further adjusts the temperature characteristic of the voltage of the target node X, so that the output frequency of the clock signal meets the preset temperature drift. Among them, the output frequency of the clock signal is The temperature drift of the capacitance value C is usually ignored. When the temperature characteristics of the first resistor and the second resistor are the same, for example, both are resistors with positive temperature characteristics or both are resistors with negative temperature characteristics. At this time, by extracting a current with a positive temperature characteristic, the temperature characteristic (temperature coefficient) of the voltage of the target node X is adjusted, and then the adjustment is realized The positive and negative temperature characteristics and magnitude enable the output frequency of the clock signal to satisfy low / zero temperature drift.

[0038] The compensation circuit includes a current generation module, a current derivation module, and a current extraction module. The current generation module is connected to the current derivation module, and the current derivation module is connected to the current extraction module.

[0039] The frequency hopping control circuit is further configured to compare the magnitudes of the first comparison voltage and the second comparison voltage when the frequency hopping enable signal is at a low level, and when the first comparison voltage is equal to the second comparison voltage, the generated frequency hopping signal is an invalid signal, and when the first comparison voltage is greater than the second comparison voltage, the generated frequency hopping signal is a valid signal.

[0040] The frequency hopping control circuit includes: a first current generation circuit, a first comparison voltage generation circuit, a second comparison voltage generation circuit, and a comparison circuit. Among them, the first current generation circuit is configured to generate a first current signal based on the output error voltage of the switching power supply; the first comparison voltage generation circuit is configured to generate a first comparison voltage based on the first mirror signal of the first current signal; the second comparison voltage generation circuit is configured to generate a second comparison voltage based on the second mirror signal of the first current signal, the mirror signal of the second current signal, and the frequency hopping enable signal; the comparison circuit is configured to generate a frequency hopping signal according to the comparison result of the first comparison voltage and the second comparison voltage.

[0041] The first current generation circuit includes: a first transistor, a second transistor, a third transistor, and a first current source; the first comparison voltage generation circuit includes: a fourth transistor and a first resistor; the second comparison voltage generation circuit includes: a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a second current source, and a first capacitor; the comparison circuit includes: a first voltage comparator.

[0042] The D terminal of the first D flip-flop is connected to its own inverted output terminal, its clock terminal is connected to the output terminal of the second OR gate, and its non-inverted output terminal is left unconnected; the D terminal of the second D flip-flop is connected to its own inverted output terminal, its clock terminal is connected to the inverted output terminal of the first D flip-flop, its non-inverted output terminal is connected to the first input terminal of the second OR gate, and its inverted output terminal is connected to the first input terminal of the first OR gate; the second input terminal of the second OR gate is connected to the output terminal of the oscillation circuit to receive the clock signal; the second input terminal of the first OR gate is connected to the output terminal of the oscillation circuit to receive the clock signal, and the output terminal of the first OR gate is connected to the clock receiving terminal of the frequency hopping control circuit.

[0043] In the present invention, an oscillation circuit is used to output a clock signal. Among them, the first resistor and the second resistor have the same temperature characteristics. The compensation circuit is connected to the target node and is used to adjust the temperature characteristics of the voltage of the target node. That is, when the temperature characteristics of the first resistor and the second resistor are the same, the temperature characteristics of the clock signal are compensated, so that the output frequency of the clock signal meets the preset temperature drift; it can automatically identify whether there is an external clock access and generate a corresponding same-frequency mode signal to control the conduction of one of the first switching device and the second switching device. When it is detected that there is no external clock access, it works in the mode of the frequency set by the external resistor. When there is an external clock access, it can automatically work in the mode of synchronizing with the external clock; by setting the frequency hopping control circuit, even if the output error voltage is very low and the response is slow, the frequency hopping signal will not continuously output multiple invalid signals, and only when the first comparison voltage is equal to the second comparison voltage can an invalid signal be output, thereby realizing that each clock signal has a relatively long and the same time interval, improving the efficiency of light-load operation and avoiding the problems of double pulses or burst pulses.

[0044] As mentioned above, the above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, makes equivalent substitutions or changes, and should be covered by the protection scope of the present invention.

Claims

1. A quartz clock system oscillation circuit, characterized in that: include: Oscillation circuit, frequency hopping control circuit, compensation circuit, delay circuit, clock monitoring circuit, power switching circuit; An oscillator circuit, used for outputting a clock signal, comprising at least a first resistor and a second resistor connected in series and a capacitor connected in parallel with the first resistor, wherein the first resistor and the second resistor have the same temperature characteristics, and a node between the first resistor and the second resistor connected in series is marked as a target node; A frequency hopping control circuit is configured to generate a first comparison voltage and a second comparison voltage based on an output error voltage of the switching power supply, and generate a frequency hopping signal according to a comparison result of the first comparison voltage and the second comparison voltage; A compensation circuit, connected to the target node, for adjusting the temperature characteristic of the voltage of the target node to compensate for the temperature characteristic of the clock signal so that the output frequency of the clock signal satisfies a preset temperature drift; A delay circuit includes an adder counter and a first OR gate, wherein the adder counter includes a second OR gate, a first D flip-flop and a second D flip-flop; A clock detection circuit, for generating a corresponding frequency synchronization mode signal SYNC-MODE according to whether an external clock signal CLK is connected to an input end of the clock detection circuit, wherein the frequency synchronization mode signal SYNC-MODE is connected to the second switch device S2, and the frequency synchronization mode signal SYNC-MODE is also connected to the first switch device S1 through an inverter INV; controlling one of the first switch device S1 and the second switch device S2 to be turned on and the other to be turned off; when the first switch device S1 is turned on, the oscillator frequency is set by using an external resistance unit; when the second switch device S2 is turned on, the oscillator frequency is set by using an external clock unit; The power switching circuit includes a first control resistor R1, a second control resistor R2, a voltage follower and a comparator; the first end of the first control resistor R1 is connected to a power source V DD The second end of the first control resistor R1 and the first end of the second control resistor R2 are connected to the positive input end of the voltage follower, the second end of the second control resistor R2 is grounded, the output end of the voltage follower is connected to its negative input end and the positive input end of the comparator, the negative input end of the comparator is provided with a 1.2V reference voltage through a bandgap reference circuit, and the comparator is also connected to the positive input end of the comparator through the power supply V H The comparator output is input to the power supply gating logic unit through level shifting, and the power supply gating logic unit is also connected to the power supply V DD and power supply V BAK , the power supply gate logic unit output gate power supply V S The LDO circuit is also connected to the external control EN18 pin and the backup voltage V CORE Pin.

2. A quartz clock system oscillation circuit according to claim 1, characterized in that: The compensation circuit adjusts the temperature characteristic of the voltage of the target node, including: the compensation circuit generates a current with a positive temperature characteristic to extract the current with the positive temperature characteristic from the target node.

3. A quartz clock system oscillation circuit according to claim 1, characterized in that: The compensation circuit includes a current generating module, a current deriving module, and a current extracting module. The current generating module is connected to the current deriving module, and the current deriving module is connected to the current extracting module.

4. A quartz clock system oscillation circuit according to claim 1, characterized in that: The frequency hopping control circuit is also configured to compare the first comparison voltage with the second comparison voltage when the frequency hopping enable signal is at a low level, and when the first comparison voltage is equal to the second comparison voltage, the generated frequency hopping signal is an invalid signal, and when the first comparison voltage is greater than the second comparison voltage, the generated frequency hopping signal is a valid signal.

5. A quartz clock system oscillation circuit according to claim 1, characterized in that: The frequency hopping control circuit includes: a first current generating circuit, a first comparison voltage generating circuit, a second comparison voltage generating circuit and a comparison circuit; wherein the first current generating circuit is configured to generate a first current signal based on an output error voltage of a switching power supply; the first comparison voltage generating circuit is configured to generate a first comparison voltage based on a first mirror signal of the first current signal; the second comparison voltage generating circuit is configured to generate a second comparison voltage based on a second mirror signal of the first current signal, a mirror signal of the second current signal and a frequency hopping enable signal; and the comparison circuit is configured to generate a frequency hopping signal according to a comparison result between the first comparison voltage and the second comparison voltage.

6. A quartz clock system oscillation circuit according to claim 5, characterized in that: The first current generating circuit includes: a first transistor, a second transistor, a third transistor and a first current source; the first comparison voltage generating circuit includes: a fourth transistor and a first resistor; the second comparison voltage generating circuit includes: a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a second current source and a first capacitor; the comparison circuit includes: a first voltage comparator.

7. A quartz clock system oscillation circuit according to claim 1, characterized in that: The D terminal of the first D flip-flop is connected to its own inverting output terminal, the clock terminal is connected to the output terminal of the second OR gate, and the positive output terminal is left unconnected.

8. A quartz clock system oscillation circuit according to claim 7, characterized in that: The D terminal of the second D flip-flop is connected to its own inverting output terminal, its clock terminal is connected to the inverting output terminal of the first D flip-flop, its non-inverting output terminal is connected to the first input terminal of the second OR gate, and its inverting output terminal is connected to the first input terminal of the first OR gate.

9. A quartz clock system oscillation circuit according to claim 8, characterized in that: The second input terminal of the second OR gate is connected to the output terminal of the oscillation circuit to receive the clock signal.

10. A quartz clock system oscillation circuit according to claim 9, characterized in that: The second input end of the first OR gate is connected to the output end of the oscillation circuit to receive a clock signal, and the output end of the first OR gate is connected to the clock receiving end of the frequency hopping control circuit.

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