Method and apparatus for processing semiconductor substrate

Abstract

According to the present invention, there is provided a method of processing a semiconductor substrate having etched features comprising sidewalls having a fan-shaped profile, the method comprising the steps of: placing the semiconductor substrate on a substrate support in an etching chamber, the semiconductor substrate has etched features including sidewalls having a fan-shaped profile; and performing a processing step by generating a plasma in a gaseous atmosphere comprising Ar, O2 and at least one perfluorocarbon and simultaneously applying an RF signal having an RF power to the substrate support, where the plasma (i) deposits a protective layer formed at least partially from the perfluorocarbon on the sidewall, and (ii) etching the sidewall to smooth the sector profile of the sidewall.

Description

Technical Field

[0001] The present invention relates to a method for processing a semiconductor substrate, in particular a semiconductor substrate having etched features with sidewalls having a fan-shaped profile. The present invention also relates to a related apparatus. Background Art

[0002] U.S. Patent No. 6,127,273 proposed the so-called "Bosch process" for etching silicon, and the process has since evolved significantly. The process enables high etching rates when etching features such as silicon trenches and vias. This is particularly important for deep etched features (greater than 10 mm depth), where conventional anisotropic non-cyclic etching rates would be impractical. The Bosch process is a cyclic process that has an isotropic etching cycle, a polymer passivation cycle, and in some embodiments a breakthrough step that is repeated until the desired depth is achieved. When transitioning from one cycle to the next, a "fan" is formed on the sidewalls of the feature. Figure 1 FIG. 10 is a schematic representation of an etched feature in silicon using the Bosch process. The silicon wafer 11 has a mask 12, which can be a photoresist, a laser scribed coating, or a hard mask, and is supported on a tape attached to a frame or carrier wafer 13. The opening 15 in the mask enables the plasma etching process to localize the etching process and produce the desired feature 14. A fan 16 is present on the sidewalls of the etched feature. The cyclic Bosch produces a series of isotropic cavities, which can be considered to have "peaks" and "valleys". The height of the fan is defined by the distance between the peak and the valley, designated as Δ1. Δ1 can typically be about 50 to 200 nm. Generally, a faster etching rate is produced by employing a longer isotropic etching step duration, which produces a larger fan. While the fan is acceptable in some applications, such as many MEM devices or plasma cut wafers, in many cases the size of the fan is problematic.

[0003] In many applications, when there are subsequent process steps, such as in through-silicon vias (TSVs) where a smooth surface is required to assist in step coverage and Cu filling or in plasma cut wafers where defect control is critical, it is desirable to have the fan size as small as possible. In hybrid or fusion bonding applications, successful bonding requires an extremely clean surface, and the sharp points on the fan provide a source of particles. By way of example, Figure 2 shows a through-silicon via (TSV) formation process, in Figure 2 (a) thereof, the via 21 is etched into the silicon through a mask. The etching process stops at a depth 22. The via diameter can vary between 1 and 10 microns, with an aspect ratio of up to 20:1. Figure 2(b) shows the through - hole after subsequent processing, where the through - hole is filled with copper 27 by ECD (electrochemical deposition). Before depositing the CVD dielectric layer 23, the barrier layer 24, and the PVD copper seed layer 25, the sidewalls of the desired features are as smooth as possible. Figure 2 (b) is a schematic representation of a TSV after removing the film on the wafer surface by CMP (chemical mechanical polishing). In this case, especially in the case of features with a high aspect ratio, the fan - out is required to be as small as possible, for example, less than 50 nm. Conventional Bosch processing produces an unacceptable Δ2 for subsequent processing steps even when operating at a low etching rate. Usually, Δ2 < Δ1.

[0004] In addition, the inventors of the present case have realized that if a smoothing step can be applied to reduce the size of the large fan - out, then productivity benefits can be brought. A high silicon etching rate is associated with an increased fan - out size (due to the extension of the isotropic etching step). If a fast smoothing step can be provided, then productivity benefits may also be achievable in some applications where the reduced etching time achieved using a longer isotopic etching step exceeds the time taken to perform the smoothing step. SUMMARY OF THE INVENTION

[0005] A method for smoothing the fan - out is needed. It is desired to significantly remove or reduce the size of the fan - out formed after a Bosch - type silicon etching process. It is desired to perform the smoothing in the same system used for the Bosch etching process.

[0006] According to a first aspect of the present invention, there is provided a method of processing a semiconductor substrate having an etched feature comprising sidewalls with a fan - out profile, the method comprising the steps of:

[0007] Placing the semiconductor substrate on a substrate support in an etching chamber, the semiconductor substrate having an etched feature comprising sidewalls with a fan - out profile; and

[0008] Performing a processing step by generating a plasma in a gaseous atmosphere comprising Ar, O2, and at least one perfluorocarbon and simultaneously applying an RF signal having RF power to the substrate support, wherein the plasma (i) deposits a protective layer formed at least in part from the perfluorocarbon on the sidewalls, and (ii) etches the sidewalls to smooth the fan - out profile of the sidewalls.

[0009] There are many benefits associated with the present invention, including reducing sharp and rough scallop points that may be considered defects by inspection metrology. Additionally, a smoother sidewall profile allows for more conformal deposition during post-etch processing steps. Further, the need for small scallops typically limits the process window available for processing in prior art methods. The present invention allows for the formation of larger scallops in the main etch process and subsequent reduction of the scallops through a smoothing step. Etch processes that produce larger scallops generally have a larger process window and a faster etch rate. Both of these attributes are highly desirable.

[0010] The processing step can be performed with the pressure in the etch chamber in the range of 100 to 300 mTorr. The processing step can be performed with the pressure in the etch chamber in the range of 150 to 250 mTorr. Using such relatively high pressures is advantageous because this can assist in the conformal deposition of the protective layer on the sidewalls. In principle, it is possible to use lower pressures, at least at the start of the smoothing process. For example, an etch apparatus having a plasma generation device in addition to an RF-driven substrate support can be used, such as an ICP (Inductively Coupled Plasma) plasma generation device. At least the start of the smoothing process can be run at a lower pressure using the ICP plasma generation device.

[0011] The processing step can be performed using RF power in the range of 1,500 W to 5,000 W. The processing step can be performed using RF power in the range of 2,500 W to 4,000 W.

[0012] At least one perfluorocarbon has the general formula C x F y n. At least one perfluorocarbon can comprise one or more perfluoroalkanes, perfluorocycloalkanes, perfluoroolefins, and / or perfluorocycloolefins. At least one fluorocarbon can comprise one or more of C4F8, C5F8, and C4F6. Other perfluorocarbon species can be used as long as they are gaseous or have a sufficiently high vapor pressure.

[0013] The processing step can be performed in a gaseous atmosphere consisting essentially of Ar, O2, and at least one perfluorocarbon.

[0014] The processing step can be performed with Ar introduced into the etch chamber at a flow rate in the range of 100 to 500 sccm. The processing step can be performed with Ar introduced into the etch chamber at a flow rate in the range of 250 to 350 sccm.

[0015] The processing step can be performed with O2 introduced into the etch chamber at a flow rate in the range of 30 to 100 sccm. The processing step can be performed with O2 introduced into the etch chamber at a flow rate in the range of 50 to 80 sccm.

[0016] The processing steps can be performed when at least one fluorocarbon is introduced into the etching chamber at a flow rate in the range of 25 to 50 sccm.

[0017] The processing steps are performed when the substrate support is maintained at a temperature in the range of 0 to 20 °C.

[0018] The semiconductor substrate can be a silicon substrate. The semiconductor substrate can be a wafer, such as a silicon wafer.

[0019] The etched features can be vias, trenches, and / or etched features having a depth of 10 microns or greater. The etched features can have an aspect ratio of 10:1 or greater. The etched features can have an aspect ratio of 15:1 or greater.

[0020] The semiconductor substrate can have a mask formed on its surface, the mask having holes that define the openings of the etched features. The mask can be of any suitable type, such as a photoresist, a hard mask, or a laser scribed coating.

[0021] The protective layer can be a polymer.

[0022] The fan-shaped profile can comprise a plurality of fan-shaped portions, each fan-shaped portion having an associated height, and the smoothing of the fan-shaped profile of the sidewall can comprise reducing the height of the fan-shaped portion. The height of the fan-shaped portion is (as Figure 1 shown) the length difference between the tip of the fan-shaped portion and the bottom of the fan-shaped portion along a line perpendicular to the plane defined by the bottom of the fan-shaped portion, the line intersecting the tip of the fan-shaped portion. The height of the fan-shaped portion can be reduced by at least 50%. The height of the fan-shaped portion can be reduced by at least 75%. The height of the fan-shaped portion can be reduced by at least 90%.

[0023] One advantage of the present invention is that the apparatus for etching features can be used to perform the processing steps.

[0024] The method can be performed using an RF signal as the only plasma generation source. For example, the apparatus may not have a supplementary plasma generation source (such as ICP), or the supplementary plasma generation source may be turned off during smoothing.

[0025] According to a second aspect of the present invention, there is provided a method of etching and processing a semiconductor substrate, comprising the steps of:

[0026] Placing the semiconductor substrate on a substrate support in an etching chamber;

[0027] Performing an etching step by generating a plasma and using the plasma to etch features in the semiconductor substrate, the etched features comprising sidewalls having a fan-shaped profile; and

[0028] A processing step is performed by generating a plasma in a gaseous atmosphere containing Ar, O2, and at least one perfluorocarbon while applying an RF signal having RF power to the substrate support, wherein the plasma (i) deposits a protective layer formed at least in part from the perfluorocarbon on the sidewalls, and (ii) etches the sidewalls to smooth the scalloped profile of the sidewalls.

[0029] The method may include the following additional steps:

[0030] A second etching step is performed by generating a plasma and using the plasma to deepen the etched feature by etching another portion deeper into the semiconductor substrate, the other portion including sidewalls having a scalloped profile; and

[0031] A second processing step is performed by generating a plasma in a gaseous atmosphere containing Ar, O2, and at least one perfluorocarbon while applying an RF signal having RF power to the substrate support, wherein the plasma (i) deposits a protective layer formed at least in part from the perfluorocarbon on the sidewalls of the other portion, and (ii) etches the sidewalls of the other portion to smooth the scalloped profile of the sidewalls of the other portion.

[0032] The step of performing the second etching step and the step of performing the second processing step may be alternated.

[0033] In fact, both the etching step and the second etching step when performed may be Bosch-type etching processes, wherein isotropic etching cycles, sidewall passivation cycles, and optionally more anisotropic breakthrough step cycles are performed cyclically.

[0034] An advantage of the present invention is that the apparatus for etching features can be used to perform the smoothing step.

[0035] According to a third aspect of the present invention, there is provided an etching apparatus for processing a semiconductor substrate, comprising:

[0036] An etching chamber;

[0037] A substrate support located in the etching chamber;

[0038] An RF source configured to supply an RF signal having RF power to the substrate support;

[0039] At least one inlet for introducing a plurality of gases into the etching chamber; and

[0040] A controller configured to control the apparatus to perform the method according to any one of the foregoing technical solutions.

[0041] The device may further include a plasma generating device other than the RF source. The plasma generating device may be an ICP plasma generating device.

[0042] To avoid ambiguity, whenever the terms "comprising" or "including" and similar terms are mentioned herein, the invention is also understood to include more restrictive terms, such as "consisting of" and "consisting essentially of". To avoid ambiguity, whenever two ranges with respective upper and lower limits are provided herein for a parameter, the invention also discloses other sub-ranges formed by all possible combinations of the boundaries explicitly disclosed herein. As discussed herein, different sub-ranges allow for fine-tuning of various characteristics.

[0043] Although the invention has been described above, the invention encompasses any inventive combination of the features set forth in the description above or below, the drawings or the claims. To avoid ambiguity, any feature disclosed with respect to the first and second aspects of the invention may be combined, where appropriate, with any feature disclosed with respect to the third aspect of the invention, and vice versa. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0045] Figure 1 is a cross-sectional view of a plasma-etched trench in a silicon substrate; and

[0046] Figure 2 shows cross-sectional views of (a) a plasma-etched through-silicon via (TSV) in a silicon substrate and (b) the TSV after CMP and filling with Cu. DETAILED DESCRIPTION

[0047] The present invention provides a technique for smoothing a semiconductor substrate having etched features, the etched features including sidewalls having a fan-shaped profile. The present invention can be implemented in a wide variety of etching apparatuses having the ability to apply RF power to a substrate support. An example of a commercial etching apparatus that can be adapted to perform the method of the present invention is Rapier TM300S Etching Chamber (SPTS Technologies Limited, Newport, UK). The smoothing of the fan-shaped sidewalls is performed in this type of etching chamber using an Ar, O2, and C4F8 environment and an RF-driven (13.56 MHz) substrate support. The substrate support includes a thick ceramic monopole electrostatic chuck (ESC) that is cooled to approximately 0 to 20 °C using He “backside” pressure, and the He is supplied to the ESC in a manner well known to those skilled in the art. Table 1 shows representative process conditions for the fan-shaped smoothing process. Excellent fan-shaped removal has been achieved using up to 3 kW of RF bias power. The etching rate depends largely on the RF bias power. There are various etching components, parameters, and factors that affect the results of the smoothing process. For example, high bias power enables high-energy ion bombardment of the wafer, and the relatively high pressure (100 to 300 mTorr) used helps to promote conformal polymer deposition on the sidewalls from the dissociation of C4F8. Ar is present as a sputtering gas to physically remove material from the tip of the fan-shaped portion and in turn expose portions of silicon. Oxygen also helps to remove polymers from the tip of the fan-shaped portion and provides an F source for etching silicon. Although there is some Ar sputter etching at the tip of the fan-shaped portion, the fluorine released from the dissociation of C4F8 increases the etching rate by chemically etching silicon.

[0048] Using other C x F y gases or using a combination of C4F8 and other C x F y gases can achieve similar results.

[0049] Parameter Range Typical Value Pressure (mTorr) 100 to 300 150 Platen (kW) 1.5 to 5 3 Ar (sccm) 100 to 500 300 <![CDATA[O2(sccm)]]> 30 to 100 65 <![CDATA[C4F8(sccm)]]> 10 to 70 35 He (Torr) 2.5 to 10 8 ESC (kV) 3 to 10 6 Temperature (°C) 0 to 20 3

[0050] Table 1. Process conditions for fan-shaped smoothing.

[0051] A discussion of the general trends associated with the various factors in the smoothing process is now presented. Although the discussion is not exhaustive, it should be understood that it helps the skilled person to vary the process conditions used in the smoothing step to improve the results for any given application. The balance of the gas flow can be varied to change the rate of scallop reduction. Increasing the C4F8 flow rate and decreasing the O2 flow rate enhances the polymer formation under the scallops, thus providing better protection for the "true" etched sidewalls (i.e., the surface left after the smoothing process is completed). Alternatively, decreasing the C4F8 flow rate and increasing the O2 flow rate increases the isotropic etch rate, thus causing more scallop removal as more polymer is removed by oxygen. This can be beneficial for applications where polymer remains on the sidewalls after the initial etching process. A decrease in the C4F8 flow rate increases the selectivity to oxide. This is generally beneficial as many applications have an oxide stop layer that should be retained. Changing the flow of argon changes the physics of the etching. The action of argon is mainly directed at the tips of the scallops, and thus argon can be used to smooth smaller scallops without damaging the "true" sidewalls. Increasing the RF bias increases the effectiveness of the smoothing. Higher RF power is beneficial for rapid scallop removal and higher selectivity to the photoresist mask. However, if the features have an oxide stop layer, then lower RF power can be used over an extended process time to reduce oxide loss. The total pressure affects the conformal degree of the protective layer coating the scallops. Changes in pressure can change the degree to which the underside of the scallops and the "true" sidewalls are protected.

[0052] Experimental results

[0053] On a 300 mm silicon wafer on a tape wafer carrier (400 mm) in an SPTS Rapier TM 300S chamber. It is possible to place the wafer itself rather than the wafer / tape / carrier assembly onto the substrate support. The Rapier etch tool is supplied with an ICP plasma generator, but the experiments described herein were performed without using the ICP source power. In other words, the Rapier tool was operated in RIE mode where the plasma was generated only by the RF power supplied to the wafer support. No ashing or polymer stripping steps were performed prior to the smoothing step. The scallop dimensions were determined by SEM measurement. The silicon wafer had a photoresist mask deposited thereon and a layer of SiO2 approximately 3 mm thick below the silicon. The silicon thickness varied between 50 and 90 mm.

[0054] Table 2 shows the reduction in scallop height as a function of platen power. A strong dependence of the scallop etch rate on the RF platen power was observed, where increasing the platen power by a factor of 4.3 increased the etch rate by a factor of 6.

[0055] Platen Power (W) Time (min) Sector Measurement Value (nm) 0 250 700 45 0 3000 7.5 0

[0056] Table 2. Reduction of the sector part varies with the RF power of the platen.

[0057] The height of the sector part in the sidewall can vary within the etched feature, especially if the length of the isotropic etch varies during the etching of the feature. Table 3 shows the effect of the sector part size on the smoothing time in the case of the variation of the sector part size in the etched trench. Near the opening of the mask at the top of the trench, a sector part size of approximately 327 nm is produced, while the etch rate is increased to produce a larger sector part with a height of approximately 934 nm further away from the top of the trench. An even larger sector part with a height of approximately 1235 nm is produced near the oxide layer at the bottom of the trench. All the initial sector parts are much larger than those mentioned in Table 2. However, after 3 minutes of smoothing, the height of even the deepest sector part at the bottom of the trench is reduced by 90%. As the process is extended, there is some oxide loss.

[0058]

[0059] Table 3. Reduction values of the sector part with different sector part sizes in the trench.

[0060] The smoothing step in the examples described above is performed on the fully formed plasma etched trench. In an alternative embodiment, the smoothing process can run during the feature etching process. Ideally, the same etching module runs both the etching step and the smoothing step, but in principle two chambers can be used. One advantage of the present invention is that both the etching step and the smoothing step can be easily performed in a single etching device. In one such variant, the initial etching step is performed to an intermediate etch depth, followed by the smoothing step. Subsequently, a second etching step is performed to reach the full etch depth, followed by a final smoothing step. In other variants, more than two etching steps are performed, with a smoothing step after each etching step. For this method, the nature of the mask needs to be considered, especially in the case of a photoresist mask, since the smoothing step will consume some of the mask. However, the guidelines provided above will enable a person skilled in the art to adapt the smoothing process to suit a given application. For example, if there is concern about the loss of the substrate during the final smoothing step, such as when it lands on a thin SiO2 layer or a sensitive cut tape, then this method may be beneficial.

Claims

1. A method of processing a semiconductor substrate having an etched feature including a sidewall having a scalloped profile, the method comprising the steps of: placing the semiconductor substrate having an etched feature including a sidewall having a scalloped profile on a substrate support in an etching chamber; and The processing step is performed by generating a plasma in a gaseous atmosphere comprising Ar, O2 and at least one perfluorocarbon and simultaneously applying an RF signal having RF power to the substrate support, wherein the plasma (i) deposits a protective layer at least partially formed of the perfluorocarbon on the sidewall, and (ii) etches the sidewall to smooth the scalloped profile of the sidewall. 2 . The method of claim 1 , wherein the treating step is performed at a pressure in the etching chamber in a range of 100 to 300 mTorr.

3. A method according to claim 1 or claim 2, wherein the treating step is performed using an RF power in the range of 1,500W to 5,000W.

4. The method of any one of claims 1 to 3, wherein the at least one fluorocarbon comprises one or more of C4F8, C5F8, and C4F6.

5. A method according to any preceding claim, wherein the treating step is performed in a gaseous atmosphere consisting essentially of Ar, O2 and at least one perfluorocarbon.

6. A method according to any preceding claim, wherein the treating step is performed with Ar introduced into the etching chamber at a flow rate in the range of 100 to 500 seem.

7. A method according to any preceding claim, wherein the treating step is performed with O2 introduced into the etching chamber at a flow rate in the range of 30 to 100 sccm.

8. The method of any preceding claim, wherein the treating step is performed with the at least one fluorocarbon introduced into the etching chamber at a flow rate in the range of 10 to 70 seem.

9. A method according to any preceding claim, wherein the treating step is performed with the substrate support maintained at a temperature in the range 0 to 20°C.

10. A method according to any preceding claim, wherein the semiconductor substrate is a silicon substrate.

11. The method of any preceding claim, wherein the etched features are vias, trenches and / or etched features having a depth of 10 microns or more.

12. A method according to any preceding claim, wherein the semiconductor substrate has a mask formed on a surface thereof, the mask having holes defining openings of the etched features.

13. A method according to any preceding claim, wherein the protective layer is a polymer.

14. A method according to any preceding claim, wherein the scalloped profile comprises a plurality of scallops, each scallop having an associated height, and smoothing the scalloped profile of the sidewall comprises reducing the height of the scallops.

15. The method according to claim 14, wherein the height of the sectors is reduced by at least 50%, preferably by at least 75%, more preferably by at least 90%.

16. A method for etching and processing a semiconductor substrate, comprising the steps of: placing the semiconductor substrate on a substrate support in an etching chamber; performing an etching step by generating a plasma and etching a feature in the semiconductor substrate using the plasma, the etched feature including a sidewall having a scalloped profile; and The processing step is performed by generating a plasma in a gaseous atmosphere comprising Ar, O2 and at least one perfluorocarbon and simultaneously applying an RF signal having RF power to the substrate support, wherein the plasma (i) deposits a protective layer at least partially formed of the perfluorocarbon on the sidewall, and (ii) etches the sidewall to smooth the scalloped profile of the sidewall.

17. The method according to claim 16, comprising the following additional steps: performing a second etching step by generating a plasma and using the plasma to deepen the etched feature by etching another portion deeper into the semiconductor substrate, the another portion including a sidewall having a scalloped profile; and The second processing step is performed by generating a plasma in a gaseous atmosphere comprising Ar, O2 and at least one perfluorocarbon and simultaneously applying an RF signal having RF power to the substrate support, wherein the plasma (i) deposits a protective layer at least partially formed of the perfluorocarbon on the sidewall of the other portion, and (ii) etches the sidewall of the other portion to smooth the scalloped profile of the sidewall of the other portion.

18. The method of claim 17, wherein the step of performing a second etching step is alternated with the step of performing a second processing step.

19. An etching apparatus for processing a semiconductor substrate, comprising: Etching chamber; a substrate support positioned in the etching chamber; an RF source configured to supply an RF signal having RF power to the substrate support; at least one inlet for introducing a plurality of gases into the etching chamber; as well as A controller configured to control the device to perform a method according to any preceding claim.

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