Switching transistor based on local diffusion of heavy metal ions and preparation method thereof

Abstract

The invention discloses a heavy metal ion local diffusion-based switch transistor and a preparation method thereof, and aims to overcome the defect of product parameter degradation caused by heavy metal doping of a switch transistor prepared in the prior art. The preparation method comprises the following steps: removing a heavy metal ion structure outside a P-type doped region and an N-type doped region of a wafer to be processed to obtain a wafer locally coated with heavy metal ions; cleaning and wiping the wafer locally coated with the heavy metal ions to obtain a wafer with a clean surface; carrying out annealing heat treatment on the heavy metal ion coating layer of the wafer with the clean surface to obtain a heavy metal diffusion wafer; slightly corroding and rinsing the surface of the heavy metal diffusion wafer to obtain a high-cleanliness wafer; and performing electrode deposition on the high-cleanliness wafer to obtain the switch transistor. The switching characteristic of the switching transistor is effectively improved, and the problem of product parameter degradation caused by heavy metal doping is solved.

Description

Technical Field

[0001] The present invention relates to the field of microelectronic manufacturing processes, and particularly to a switching transistor based on local diffusion of heavy metal ions and a preparation method thereof. Background Art

[0002] In the field of microelectronic manufacturing processes, the switching speed of transistors has always been the focus of scientific research and industry. At present, the traditional manufacturing process of switching transistors mostly adopts the method of single heavy metal ion doping, and its process flow mainly includes four stages: first, evaporate a layer of heavy metal ions on the back of the wafer through PVD, then perform high-temperature annealing to achieve the redistribution of heavy metal ions, then corrode the heavy metal ions precipitated on the back of the wafer by chemical methods, and finally form a back electrode through back thinning and back metallization. This process has improved the switching speed of transistors to a certain extent and meets the manufacturing requirements of ordinary switching transistors.

[0003] However, with the increasing demand for ultra-fast switching transistors, the limitations of traditional processes have gradually emerged. The traditional process is highly dependent on process control capabilities. Especially when pursuing an ultra-fast switching time below 50 ns, due to the limitation of the solid solubility of heavy metal ions in silicon, it is difficult to achieve the required high-concentration doping. In addition, the diffusion of large-area heavy metal ions will also cause the degradation of the reverse leakage current and saturation voltage drop parameters of the switching transistor, directly affecting the performance and reliability of the product, and restricting its promotion in high-end application fields.

[0004] In summary, there is an urgent need for a new technical solution to solve the process problems of ultra-fast switching transistors to meet the needs of the market, industry, and users for high-performance transistors. Therefore, how to overcome the technical bottleneck of improving the switching speed of transistors in the existing silicon manufacturing process and avoid parameter degradation problems has become a key problem that needs to be solved urgently by those skilled in the art. Summary of the Invention

[0005] The purpose of the present invention is to provide a switching transistor based on local diffusion of heavy metal ions and a preparation method thereof, so as to overcome the deficiency of product parameter degradation caused by heavy metal doping of switching transistors prepared by the prior art.

[0006] To achieve the above purpose, the present invention adopts the following technical solutions:

[0007] In the first aspect, the present invention provides a preparation method of a switching transistor based on local diffusion of heavy metal ions, which is characterized by including:

[0008] Remove the heavy metal ion structure outside the P-type doping region and N-type doping region of the wafer to be processed, and obtain a wafer with local heavy metal ions coated.

[0009] Clean and wipe the wafer with locally coated heavy metal ions to obtain a wafer with a clean surface;

[0010] Anneal and heat-treat the heavy metal ion coating layer on the wafer with a clean surface to obtain a wafer with heavy metal diffusion;

[0011] Slightly corrode and rinse the surface of the wafer with heavy metal diffusion to obtain a wafer with high cleanliness;

[0012] Deposit electrodes on the wafer with high cleanliness to obtain a switching transistor.

[0013] Remove the heavy metal ion structure outside the P-type and N-type doping regions of the wafer to be processed to obtain a wafer with locally coated heavy metal ions, including:

[0014] Use lithography technology to form a photoresist area on the surfaces of the P-type and N-type doping regions;

[0015] Corrode and remove the heavy metal ion structure in the non-photoresist area through a mixed solution of nitric acid and hydrochloric acid, where the volume ratio of nitric acid to hydrochloric acid is 3:1 to 10:1, the corrosion temperature is 100°C ± 10°C, and the corrosion time is 20 minutes to 60 minutes.

[0016] Clean and wipe the wafer with locally coated heavy metal ions, including:

[0017] Clean the surface of the wafer with a hydrofluoric acid solution, where the volume ratio of hydrofluoric acid to water is 50:1 to 200:1, and the cleaning time is within 1 minute;

[0018] Clean the surface of the wafer through a wafer wiping device or manual wafer wiping to remove residual particulate matter and carbides.

[0019] Anneal and heat-treat the heavy metal ion coating layer on the wafer with a clean surface, including:

[0020] Anneal at 900°C ± 100°C for 20 minutes to 60 minutes to uniformly diffuse the heavy metal ions into the P-type and N-type doping regions.

[0021] The specific conditions for the annealing heat treatment include:

[0022] The annealing atmosphere is nitrogen or an inert gas;

[0023] After annealing, the diffusion depth of the heavy metal ions in the P-type and N-type doping regions is 0.5 μm to 2 μm.

[0024] Slightly corrode and rinse the surface of the wafer with heavy metal diffusion, including:

[0025] The surface of the wafer is slightly etched with a hydrofluoric acid solution, where the volume ratio of hydrofluoric acid to water is from 10:1 to 100:1, and the etching time is within 2 minutes, to remove the oxide layer formed during the annealing process and the oxide layer formed by the natural oxidation of silicon in air.

[0026] Electrode deposition is performed on the high-purity wafer, specifically including:

[0027] An electrode metal is deposited on the wafer surface using an evaporation device or a sputtering device, and the electrode metal includes aluminum, copper, gold, chromium-nickel-silver, titanium-nickel-gold, or chromium-nickel-gold;

[0028] The deposition thickness of the electrode metal is 3 μm to 10 μm.

[0029] The specific conditions for electrode deposition include:

[0030] The deposition method of the electrode metal is physical vapor deposition or chemical vapor deposition;

[0031] During the deposition process, the wafer temperature is 200 °C to 400 °C;

[0032] The deposition rate of the electrode metal is 0.5 nm / s to 2 nm / s.

[0033] The structure of the wafer to be processed includes:

[0034] An epitaxial layer is grown on a silicon-based substrate, and a P-type doped region with a depth of 3 μm to 5 μm and an N-type doped region with a depth of 2 μm to 4 μm are formed on the epitaxial layer;

[0035] The P-type doped region and the N-type doped region are surrounded by a SiO2 step with a height of 1.0 nm to 1.5 μm;

[0036] The surfaces of the P-type doped region and the N-type doped region are treated with an oxide layer and coated with heavy metal ions, and the coating thickness of the heavy metal ions is 150 nm to 300 nm.

[0037] In a second aspect, the present invention provides a switching transistor based on the local diffusion of heavy metal ions. The switching transistor is obtained by the above preparation method and includes:

[0038] P-type and N-type doped regions on a silicon-based substrate, where heavy metal ions are uniformly distributed in the doped regions;

[0039] The surfaces of the P-type and N-type doped regions are covered with an electrode metal, and the thickness of the electrode metal is 3 μm to 10 μm;

[0040] The switching time of the switching transistor is less than 50 ns, and the reverse leakage current and saturation voltage drop parameters are superior to those of transistors prepared by traditional processes.

[0041] Compared with the prior art, the present invention has the following beneficial technical effects:

[0042] The present invention provides a method for fabricating an ultra-fast switching transistor based on local diffusion of heavy metal ions. Through innovative process design, the switching speed of the transistor is significantly improved, and at the same time, the problem of parameter degradation in traditional processes is solved. The present invention ensures that heavy metal ions only act in the required areas. When removing the heavy metal coating outside the P-type and N-type doping regions, a mixed solution of nitric acid and hydrochloric acid is used for selective etching to efficiently remove the excess heavy metal coating without damaging other materials. Subsequently, through hydrofluoric acid cleaning and wafer wiping treatment, surface residual impurities and oxide layers are removed to ensure the cleanliness of the wafer surface and prepare for the annealing process. During the annealing process, heavy metal ions uniformly diffuse into the silicon material at high temperature to reach the required concentration and depth, significantly improving the switching performance.

[0043] In addition, the present invention ensures a high cleanliness of the device surface through multiple cleaning processes to avoid the influence of oxide layers and impurities on the performance. After annealing, a slight etching and rinsing with hydrofluoric acid solution is used to remove the oxide layer formed during annealing to ensure the flatness and cleanliness of the wafer surface. Finally, high-quality metal electrodes are formed through the electrode deposition process to complete the fabrication of the transistor. The entire process flow is clear and highly operable, suitable for large-scale production, and meets the requirements of industrial manufacturing.

[0044] The beneficial effects of the present invention are not only reflected in the improvement of the switching speed, but also significantly improve the reliability and stability of the device. The local diffusion technology avoids the problem of parameter degradation caused by large-area heavy metal doping in traditional processes, making the reverse leakage current and saturation voltage drop parameters of the transistor superior to those of the devices fabricated by traditional processes. At the same time, this method has a wide range of applications, not only for the manufacture of ultra-fast switching transistors, but also for the fabrication of ordinary switching transistors, and has broad application prospects.

[0045] In summary, the present invention provides an efficient and reliable method for fabricating an ultra-fast switching transistor through local heavy metal ion diffusion technology. This method significantly improves the switching speed, solves the problem of parameter degradation in traditional processes, and has the advantages of strong process controllability, high device reliability, and wide application range, providing a new solution for the manufacture of ultra-fast switching transistors. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 It is a schematic flow chart of a method for fabricating a switching transistor based on local diffusion of heavy metal ions in an embodiment of the present invention.

[0047] Figure 2 It is a schematic structural diagram of a wafer required for a method for fabricating a switching transistor based on local diffusion of heavy metal ions in an embodiment of the present invention.

[0048] Figure 3 Schematic diagram of a high - cleanliness wafer structure in the preparation process of a switching transistor based on local diffusion of heavy metal ions in an embodiment of the present invention.

[0049] Figure 4 Schematic diagram of a switching transistor structure based on local diffusion of heavy metal ions in an embodiment of the present invention. Detailed implementation manners

[0050] The theoretical research on the switching speed of transistors in silicon manufacturing processes has long received extensive attention in the scientific research community. However, for the process implementation methods related to reducing the switching time of transistors, a set of mature and highly practical technical methods has not yet been formed.

[0051] In traditional switching transistor manufacturing processes, a single heavy metal ion is mostly selected to improve the switching speed of the transistor. The process implementation is divided into four stages: In the first stage, a layer of heavy metal ions is first evaporated on the back of the wafer through PVD; in the second stage, high - temperature annealing is used to achieve the redistribution of heavy metal ions; in the third stage, the heavy metal ions precipitated on the back of the wafer are etched by chemical methods; in the fourth stage, back - side thinning and back - side metallization are carried out to form a back electrode. However, the manufacturing process of this method highly depends on the process control ability. Especially for transistors with ultra - fast switching time requirements, the concentration of heavy metal ions needs to be increased. Due to the limitation of the solid solubility of heavy metal ions in silicon, it is difficult to meet the requirements of ultra - fast transistors with a switching time below 50 ns. At the same time, due to the diffusion of heavy metal ions over a large area, the reverse leakage current and saturation voltage drop parameters of the switching transistor degenerate, directly affecting the performance of the product. Therefore, there is an urgent need to develop a complete set of processes to solve the reliability and practicality of ultra - fast switching transistors, that is, to perfectly solve the process problems of heavy metal ion doping without damaging the device reliability.

[0052] The present invention is proposed based on such a background, aiming to provide a new preparation method for ultra - fast switching transistors to effectively improve the switching performance of transistors, solve the problem of product parameter degradation caused by traditional processes, and ensure the operability of the process and the reliability of the product, meeting the high - standard requirements of silicon wafer engineering manufacturing.

[0053] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0054] It should be noted that the structure of the wafer to be processed used in a preferred embodiment of the present invention has the following characteristics:

[0055] An epitaxial layer is grown on a silicon-based substrate wafer. A P-type doped region with a depth of 3 μm to 5 μm and an N-type doped region with a depth of 2 μm to 4 μm are fabricated on the epitaxy.

[0056] The P-type doped region and the N-type doped region are surrounded by SiO2 steps with a height of 1.0 nm to 1.5 μm.

[0057] The surfaces of the P-type doped region and the N-type doped region have been treated with a passivation layer.

[0058] An effective heavy metal ion coating has been formed on the P-type doped region and the N-type doped region.

[0059] The heavy metal ion coating material of the P-type doped region and the N-type doped region can be a single material structure or a multi-material structure. The overall heavy metal ion coating can be 150 μm to 300 μm. The single material structure includes heavy metal ions such as copper, silver, gold, nickel, chromium, molybdenum, etc.; the multi-layer structure includes metal alloy structures.

[0060] Refer to Figure 1 shown is a method for fabricating a switching transistor based on local diffusion of heavy metal ions in a specific embodiment provided by the present invention, including:

[0061] S101, removing the heavy metal ion structure outside the P-type doped region and the N-type doped region of the wafer to be processed, and obtaining a wafer with locally coated heavy metal ions. Specifically, it includes:

[0062] Using photolithography technology to form a photoresist area on the surfaces of the P-type and N-type doped regions. By using photolithography technology in silicon manufacturing processes, a photoresist area is formed on the surfaces of the P-type doped region and the N-type doped region, and an area without photoresist is formed outside the P-type doped region and the N-type doped region.

[0063] Corroding and removing the heavy metal ion structure in the area without photoresist through a mixed solution of nitric acid and hydrochloric acid, where the volume ratio of nitric acid to hydrochloric acid is 3:1 to 10:1, the corrosion temperature is 100 °C ± 10 °C, and the corrosion time is 20 minutes to 60 minutes. Utilizing the corrosion masking effect of the photoresist, a mixed solution of nitric acid and hydrochloric acid is used to perform large-area chemical stripping corrosion on the heavy metal coating outside the P-type doped region and the N-type doped region. This corrosion process method has high selectivity and can effectively remove heavy metal materials without causing loss of organic insulating materials; using plasma in an oxygen atmosphere to perform large-area physical stripping removal on the organic insulating medium outside the P-type doped region and the N-type doped region, and the loss of the heavy metal coating on the surfaces of the P-type doped region and the N-type doped region will not occur during the removal process.

[0064] S102, cleaning and wiping the wafer with locally coated heavy metal ions to obtain a wafer with a clean surface. Specifically, it includes:

[0065] Clean the surface of the wafer using a hydrofluoric acid solution with a volume ratio of hydrofluoric acid to water of 50:1 to 200:1, and the cleaning time is within 1 minute. Use a mixed solution of HF acid and water to etch the natural oxide layer on the surface of the wafer and remove the thin oxide layer formed by plasma.

[0066] Clean the surface of the wafer through a wafer cleaning device or manual wafer cleaning to remove residual particulate matter and carbides. Use manual hand cleaning or a wafer cleaning device to perform surface treatment on the surface of the wafer to effectively remove the residues of organic insulating materials with strong adhesion.

[0067] S103, perform annealing heat treatment on the heavy metal ion coating layer of the wafer with a clean surface to obtain a heavy metal diffusion wafer. Use a high-temperature annealing process to diffuse the heavy metal coating layer to reach a certain concentration and depth, specifically including:

[0068] Anneal at 900°C ± 100°C for 20 minutes to 60 minutes to uniformly diffuse the heavy metal ions into the P-type and N-type doping regions.

[0069] The specific conditions for the annealing heat treatment include:

[0070] The annealing atmosphere is nitrogen or an inert gas;

[0071] After annealing, the diffusion depth of the heavy metal ions in the P-type and N-type doping regions is 0.5 μm to 2 μm.

[0072] S104, perform mild etching and rinsing on the surface of the heavy metal diffusion wafer to obtain a wafer with high cleanliness. Specifically including:

[0073] Use a hydrofluoric acid solution to mildly etch the surface of the wafer with a volume ratio of hydrofluoric acid to water of 10:1 to 100:1, and the etching time is within 2 minutes, to remove the thermal oxide layer formed during the high-temperature annealing process and the oxide layer formed by the oxidation reaction of silicon in the air.

[0074] S105, deposit electrodes on the wafer with high cleanliness to obtain a switching transistor. After obtaining a trench interface with high cleanliness and high flatness, continuously perform the process of depositing electrode metal. The electrode metal can be selected from metal materials such as Al, Al / Cu, CrNiAg, TiNiAu, and CrNiAu. Specifically including:

[0075] Use an evaporation device or a sputtering device to deposit electrode metal on the surface of the wafer. The electrode metal includes aluminum, copper, gold, chromium nickel silver, titanium nickel gold, or chromium nickel gold;

[0076] The deposition thickness of the electrode metal is 3 μm to 10 μm.

[0077] The specific conditions for the electrode deposition include:

[0078] The deposition method of the electrode metal is physical vapor deposition or chemical vapor deposition;

[0079] During the deposition process, the wafer temperature is 200°C to 400°C;

[0080] The deposition rate of the electrode metal is 0.5 nm / s to 2 nm / s.

[0081] In a specific embodiment of the present invention, a preferred solution is also provided. Next, it will be combined with Figures 2 to 4 to illustrate this preferred embodiment.

[0082] In a specific embodiment of the present invention, the implementation conditions of the preparation method of the switching transistor based on the local diffusion of heavy metal ions are as Figure 2 shown, including:

[0083] An epitaxial layer is grown on a silicon-based substrate wafer, and a P-type doped region with a depth of 3 μm to 5 μm and an N-type doped region with a depth of 2 μm to 4 μm are formed on the epitaxy;

[0084] The P-type doped region and the N-type doped region are surrounded by SiO2 steps with a height of 1.0 nm to 1.5 μm;

[0085] The surfaces of the P-type doped region and the N-type doped region have been subjected to an oxide layer treatment;

[0086] An effective heavy metal ion coating has been formed on the P-type doped region and the N-type doped region;

[0087] The heavy metal ion coating substance of the P-type doped region and the N-type doped region can be a single substance structure or a multi-substance structure. The overall heavy metal ion coating can be 150 μm to 300 μm. The single substance structure includes heavy metal ions such as copper, silver, gold, nickel, chromium, molybdenum, etc.; the multi-layer structure includes a metal alloy structure.

[0088] Using the photolithography technology in the silicon manufacturing process, a photoresist area is formed on the surfaces of the P-type doped region and the N-type doped region, and an area without photoresist is formed outside the P-type doped region and the N-type doped region. Utilizing the etching and masking effect of the photoresist, a mixed solution of nitric acid and hydrochloric acid is used to chemically strip and corrode the heavy metal coating layer outside the P-type doped region and the N-type doped region on a large scale. The ratio of HNO3:HCl solution can be 3:1 to 10:1, the solution temperature can be controlled, and the temperature of the acid solution is 100°C ± 10°C. The processing duration can be 20 minutes to 1 hour, with the principle of completely stripping the heavy metal coating layer outside the P-type doped region and the N-type doped region. This step is mainly used for large-scale stripping of the heavy metal coating layer. Since the heavy metal coating layer can undergo chemical reactions under high temperature and strong acid, the heavy metal coating layer is stripped. This corrosion process method has high selectivity, can effectively remove heavy metal materials, but will not cause loss of organic insulating materials; in an oxygen atmosphere, plasma is used to physically strip and remove the organic insulating medium outside the P-type doped region and the N-type doped region on a large scale, and the loss of the heavy metal coating layer on the surfaces of the P-type doped region and the N-type doped region will not occur during the removal process.

[0089] In an oxygen atmosphere, plasma is used to physically strip and remove the organic insulating medium outside the P-type doped region and the N-type doped region on a large scale. The plasma application power is between 350W and 500W, and the processing duration can be 20 minutes to 40 minutes, with the principle of completely stripping the large-area organic insulating material outside the P-type doped region and the N-type doped region. This stripping process can effectively remove the organic insulating material, and the loss of the heavy metal coating layer on the surfaces of the P-type doped region and the N-type doped region will not occur during the removal process.

[0090] The surface of the groove area is cleaned using manual wiping or a wiping device to remove relatively stubborn particulate matter and carbides. This step needs to be continuously implemented after using the mixed solution of nitric acid and hydrochloric acid. Compared with the acid solution of the mixed solution of nitric acid and hydrochloric acid used alone, the particles and other impurities remaining near the steps of the P-type doped region and the N-type doped region can be effectively removed. If the wafer is left standing for too long after spin-drying, the surface residual impurities cannot be effectively removed.

[0091] The surface of the wafer is slightly etched and rinsed with an HF acid solution to remove two types of oxide layers: one is the oxide layer formed by plasma etching in an oxygen atmosphere; the other is the oxide layer formed by the oxidation reaction of silicon in the air. The ratio of the HF acid to water solution is 50:1 to 200:1, at room temperature of 25°C ± 5°C, within 1 minute.

[0092] The heavy metal coating layer is diffused by using a high-temperature annealing process to reach a certain concentration and depth. The annealing temperature is 900°C ± 100°C, and the annealing time is 20 minutes to 60 minutes, based on the principle that the heavy metal coating layer in the P-type doping region and the N-type doping region is completely diffused into the silicon body. This annealing process can effectively achieve the diffusion of heavy metal ions without causing structural loss outside the P-type doping region and the N-type doping region.

[0093] The surface of the wafer is slightly etched and rinsed with an HF acid solution to remove two types of oxide layers: one is the oxide layer formed by high-temperature annealing; the other is the oxide layer formed by the oxidation reaction of silicon in the air. The solution ratio of HF acid to water is 10:1 to 100:1, at room temperature of 25°C ± 5°C, within 2 minutes, and at this time, a wafer with high cleanliness as shown in Figure 3 is obtained.

[0094] After obtaining a trench interface with high cleanliness and high flatness, the process of depositing electrode metal is continuously carried out, and finally, a switching transistor as shown in reference to Figure 4 is obtained. The electrode metal can be selected from metal materials such as Al, Al / Cu, CrNiAg, TiNiAu, and CrNiAu. The thickness of the deposited metal can be 3μm to 10μm. Either an evaporation device or a sputtering device can be selected, and the set parameters shall be based on the specific settings of the machine.

[0095] In the embodiment of the present invention, by using the above-mentioned complete set of process flows, compared with the preparation process of traditional switching transistors, the switching characteristics of the switching transistors are effectively improved, and the problem of product parameter degradation caused by heavy metal doping is solved. This method can be effectively applied to the engineering manufacturing process of silicon wafers.

[0096] In a second aspect, the present invention provides a switching transistor based on local diffusion of heavy metal ions. The switching transistor is obtained by the above-mentioned preparation method and includes:

[0097] P-type doping region and N-type doping region on a silicon-based substrate, and heavy metal ions are uniformly distributed in the doping regions;

[0098] The surfaces of the P-type and N-type doping regions are covered with electrode metal, and the thickness of the electrode metal is 3μm to 10μm;

[0099] The switching time of the switching transistor is less than 50ns, and the reverse leakage current and saturation voltage drop parameters are better than those of transistors prepared by traditional processes.

[0100] The foregoing has shown and described the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above-mentioned embodiments, and the above-mentioned embodiments and the descriptions in the specification are only preferred examples of the present invention, and are not used to limit the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements all fall within the scope of the present invention claimed. The scope of the present invention claimed is defined by the appended claims and their equivalents.

Claims

1. A method for preparing a switching transistor based on local diffusion of heavy metal ions, characterized in that: include: Removing the heavy metal ion structure outside the P-type doping area and the N-type doping area of ​​the wafer to be processed to obtain a wafer partially coated with heavy metal ions; The wafer partially coated with heavy metal ions is cleaned and wiped to obtain a wafer with a clean surface; Performing annealing heat treatment on the heavy metal ion coating layer of the clean surface wafer to obtain a heavy metal diffused wafer; Slightly corrode and rinse the surface of heavy metal diffusion wafers to obtain high-cleanliness wafers; Electrode deposition is performed on high-cleanliness wafers to obtain switching transistors.

2. The method for preparing a switching transistor based on local diffusion of heavy metal ions according to claim 1, characterized in that: The method of removing the heavy metal ion structure outside the P-type doping region and the N-type doping region of the wafer to be processed to obtain a wafer partially coated with heavy metal ions comprises: Using photolithography technology to form a glue area on the surface of the P-type and N-type doped areas; The heavy metal ion structure without glue area is removed by etching with a mixed solution of nitric acid and hydrochloric acid, wherein the volume ratio of nitric acid to hydrochloric acid is 3:1 to 10:1, the corrosion temperature is 100°C ± 10°C, and the corrosion time is 20 minutes to 60 minutes.

3. The method for preparing a switching transistor based on local diffusion of heavy metal ions according to claim 1, characterized in that: The method of cleaning and wiping the wafer partially coated with heavy metal ions comprises: The wafer surface is cleaned using a hydrofluoric acid solution, the volume ratio of hydrofluoric acid to water is 50:1 to 200:1, and the cleaning time is within 1 minute; Clean the wafer surface using a wiping device or manually to remove residual particles and carbides.

4. The method for preparing a switching transistor based on local diffusion of heavy metal ions according to claim 1, characterized in that: The annealing heat treatment of the heavy metal ion coating layer of the clean surface wafer comprises: Annealing is performed at 900° C.±100° C. for 20 minutes to 60 minutes to allow the heavy metal ions to diffuse uniformly into the P-type and N-type doped regions.

5. The method for preparing a switching transistor based on local diffusion of heavy metal ions according to claim 4, characterized in that: The specific conditions of the annealing heat treatment include: The annealing atmosphere is nitrogen or inert gas; After annealing, the diffusion depth of heavy metal ions in the P-type and N-type doping regions is 0.5 μm to 2 μm.

6. The method for preparing a switching transistor based on local diffusion of heavy metal ions according to claim 1, characterized in that: The lightly corroding and rinsing the surface of the heavy metal diffusion wafer comprises: The wafer surface is lightly etched using a hydrofluoric acid solution with a volume ratio of hydrofluoric acid to water of 10:1 to 100:1 for less than 2 minutes to remove the oxide layer formed during the annealing process and the oxide layer formed by natural oxidation of silicon in the air.

7. The method for preparing a switching transistor based on local diffusion of heavy metal ions according to claim 1, characterized in that: The electrode deposition on the high cleanliness wafer specifically includes: Depositing electrode metal on the surface of the wafer using an evaporation device or a sputtering device, the electrode metal comprising aluminum, copper, gold, chromium-nickel-silver, titanium-nickel-gold or chromium-nickel-gold; The electrode metal is deposited to a thickness of 3 μm to 10 μm.

8. The method for preparing a switching transistor based on local diffusion of heavy metal ions according to claim 7, characterized in that: The specific conditions for electrode deposition include: The electrode metal is deposited by physical vapor deposition or chemical vapor deposition; During deposition, the wafer temperature is 200°C to 400°C; The deposition rate of the electrode metal is 0.5 nm / s to 2 nm / s.

9. The method for preparing a switching transistor based on local diffusion of heavy metal ions according to claim 1, characterized in that: The structure of the wafer to be processed includes: An epitaxial layer is grown on a silicon-based substrate, and a P-type doping region with a depth of 3 μm to 5 μm and an N-type doping region with a depth of 2 μm to 4 μm are formed on the epitaxial layer; The P-type doped region and the N-type doped region are surrounded by SiO2 steps with a height of 1.0nm to 1.5μm; The surfaces of the P-type doping region and the N-type doping region are treated with an oxide layer and coated with heavy metal ions, and the coating thickness of the heavy metal ions is 150nm to 300nm.

10. A switching transistor based on local diffusion of heavy metal ions, characterized in that: Obtained by the preparation method according to any one of claims 1 to 9, the switching transistor comprises: P-type doping region and N-type doping region on the silicon substrate, heavy metal ions are uniformly distributed in the doping region; The surface of the P-type and N-type doped regions is covered with electrode metal, and the thickness of the electrode metal is 3 μm to 10 μm; The switching time of the switch transistor is less than 50ns, and the reverse leakage current and saturation voltage drop parameters are better than those of transistors prepared by traditional processes.

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