Magnetic detection circuit and sewing machine

By using a common amplifier and switching circuit design in the magnetic detection circuit, the problems of many parts, large substrate area and difficult to eliminate errors in the prior art are solved, and the effects of part reduction, error reduction and circuit simplification are achieved.

CN120214657APending Publication Date: 2025-06-27JUKI CORP
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Patent Information

Application Number
CN202411837250.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-12-27
Filing Date
2024-12-13
Publication Date
2025-06-27

AI Technical Summary

Technical Problem

The existing magnetic detection circuit has a large number of parts and a large substrate area. Due to the combination of deviations of the amplifier, it is difficult to effectively eliminate errors.

Method used

A magnetic detection circuit design including a detection circuit part, a power supply part, a switching circuit, an amplifier circuit and an operation part is adopted. The removal of offset signals is achieved through a common amplifier and a switching circuit, and the number of parts and substrate area are reduced.

Benefits of technology

It realizes the reduction of the number of magnetic detection circuit parts and substrate area, reduces errors, and simplifies the circuit structure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a magnetic detection circuit and a sewing machine, which can reduce the number of parts and the area of a substrate and reduce errors. The magnetic detection circuit includes: a detection circuit unit including first and second Hall elements and having a common terminal pair connected to both the first and second Hall elements, a first terminal pair dedicated to the first Hall element, and a second terminal pair dedicated to the second Hall element; a power supply unit that applies power to the detection circuit unit; a switching circuit that switches connections between the power supply unit and the common terminal pair, the first terminal pair, and the second terminal pair so as to detect an offset signal component; the amplifier circuit is used for amplifying the output voltage output by the self-switching circuit; and a calculation unit that performs an offset cancellation operation for canceling offset signal components of the first and second Hall elements on the basis of the output voltage of the amplifier circuit. The amplifier circuit has one common amplifier connectable to each of the common terminal pair, the first terminal pair, and the second terminal pair via a switching circuit.
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Description

Technical Field

[0001] The technology disclosed in this specification relates to a magnetic detection circuit and a sewing machine. Background Art

[0002] In Patent Document 1, an offset cancellation circuit that cancels the offset component of a Hall element in a magnetic detection circuit using two Hall elements is disclosed. In Patent Document 1, the two Hall elements have: a common terminal where a pair of terminals are connected to each other, and a plurality of independent terminals where a pair of terminals are independent of each other. The magnetic detection circuit of Patent Document 1 includes three amplifiers: two first amplifiers respectively connected to the independent terminals of the first Hall element and the second Hall element, and one second amplifier connected to the common terminal of the two Hall elements. The magnetic detection circuit of Patent Document 1 includes: a power supply, a plurality of switches for switching the connection between the power supply and each terminal of the two Hall elements, and an adder.

[0003] In Patent Document 1, the adder adds the output voltage from the first amplifier when the power supply is applied to the common terminal of the first Hall element and the output voltage from the second amplifier when the power supply is applied to the independent terminal of the first Hall element, thereby canceling the offset component of the first Hall element. Similarly, the adder adds the output voltage from the first amplifier when the power supply is applied to the common terminal of the second Hall element and the output voltage from the second amplifier when the power supply is applied to the independent terminal of the second Hall element, thereby canceling the offset component of the second Hall element.

[0004] [Prior Art Documents]

[0005] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent No. 4663561 Gazette Summary of the Invention

[0007] [Problems to be Solved by the Invention]

[0008] In the said Patent Document 1, one amplifier circuit is formed in each of the independent terminals of the first Hall element, the independent terminals of the second Hall element, and the common terminal of each Hall element, for a total of three amplifier circuits, so the number of parts is large and the substrate area is large. In addition, since the deviations (individual differences) of the three amplifiers are compoundly related, it is difficult to eliminate the error caused by the deviation of the amplifier.

[0009] The object of the technology disclosed in this specification is to reduce the number of parts and the substrate area of the magnetic detection circuit and to achieve error reduction.

[0010] [Technical Means for Solving the Problem]

[0011] This specification discloses a magnetic detection circuit. The magnetic detection circuit includes: a detection circuit section including a first Hall element and a second Hall element, and having a common terminal pair connected to both the first Hall element and the second Hall element, a dedicated first terminal pair of the first Hall element, and a dedicated second terminal pair of the second Hall element; a power supply section that applies power to the detection circuit section; a switching circuit that switches the connection between the power supply section and the common terminal pair, the first terminal pair, and the second terminal pair to detect an offset signal component; an amplifier circuit that amplifies the output voltage output from the switching circuit; and an arithmetic section that performs an offset cancellation operation for removing the offset signal components of the first Hall element and the second Hall element based on the output voltage of the amplifier circuit. The amplifier circuit has a common amplifier that can be connected to each of the common terminal pair, the first terminal pair, and the second terminal pair via the switching circuit.

[0012] This specification discloses a sewing machine. The sewing machine includes: a sewing machine main body; a magnet provided on a movable part of the sewing machine main body; the magnetic detection circuit that detects the magnetic force generated from the magnet; and a displacement detection section that detects the displacement of the movable part based on the output of the magnetic detection circuit.

[0013] [Effects of the Invention]

[0014] According to the technology disclosed in this specification, the number of parts and the substrate area of the magnetic detection circuit can be reduced and error reduction can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a diagram showing the magnetic detection circuit of the embodiment.

[0016] Figure 2 is a circuit diagram showing the respective terminals of the Hall element of the embodiment.

[0017] Figure 3 is a diagram for explaining the switching modes of switches SW1 to SW6 of the switching circuit.

[0018] Figure 4 is a flowchart for explaining the magnetic detection method using the magnetic detection circuit of the embodiment.

[0019] Figure 5 is a diagram showing the switch switching state when obtaining the first voltage.

[0020] Figure 6 is a diagram showing the switch switching state when obtaining the third voltage.

[0021] Figure 7This is a diagram of a sewing machine showing an embodiment.

[0022] Figure 8 This is a schematic explanatory diagram showing a movable part and a magnetic detection circuit of an embodiment.

[0023] [Description of reference symbols]

[0024] 1: Magnetic detection circuit

[0025] 2: Detection circuit section

[0026] 3: Power supply section

[0027] 4: Switching circuit

[0028] 5: Amplifier circuit

[0029] 5A: Voltage adjustment section

[0030] 5B: Temperature detection section

[0031] 5C: Temperature compensation section

[0032] 6: Arithmetic section

[0033] 7: First Hall element

[0034] 8: Second Hall element

[0035] 9: Common terminal pair

[0036] 10: First terminal pair

[0037] 11: Second terminal pair

[0038] 12: Common amplifier

[0039] 13: AD conversion section

[0040] 14: Adjustment arithmetic section

[0041] 15: Removal arithmetic section

[0042] 16: Detection value arithmetic section

[0043] 17: Output section

[0044] 18: Switching circuit control section

[0045] 21: Sewing machine main body

[0046] 22: Sewing machine workbench

[0047] 23A: Arm

[0048] 23B: Base

[0049] 23C: Machine base

[0050] 23D: Machine head

[0051] 23: Sewing machine frame

[0052] 24: Sewing machine needle

[0053] 25: Needle bar

[0054] 26: Balance

[0055] 27: Needle plate

[0056] 28: Presser foot

[0057] 28A: Presser foot bar

[0058] 28B: Bracket

[0059] 29: Thread regulator

[0060] 30: Feed teeth

[0061] 31: Sewing machine motor

[0062] 32: Pressing motor

[0063] 33: Magnet

[0064] 40: Control device

[0065] 41: Displacement detection unit

[0066] 100: Sewing machine

[0067] At: Correction value

[0068] Av: Magnification

[0069] K: Sewing object

[0070] MV: Movable part

[0071] t1, t2, t3, t4: Terminals

[0072] V1: First Hall voltage

[0073] V2: Second Hall voltage

[0074] Vh1: First voltage

[0075] Vh2: Second voltage

[0076] Vh3: Third voltage

[0077] Vh4: Fourth voltage

[0078] V off : Bias voltage

[0079] V out : Output value Detailed implementation mode

[0080] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings, but the present disclosure is not limited to the embodiments.

[0081] [Magnetic detection circuit]

[0082] Figure 1 FIG. is a diagram showing the magnetic detection circuit 1 of the embodiment. The magnetic detection circuit 1 of the embodiment is a circuit constituting a magnetic sensor that detects magnetism through a Hall element. The magnetic detection circuit 1 includes a detection circuit unit 2, a power supply unit 3, a switching circuit 4, an amplifier circuit 5, and an arithmetic unit 6. The detection circuit unit 2, the power supply unit 3, the switching circuit 4, the amplifier circuit 5, and the arithmetic unit 6 are provided on a circuit board (not shown).

[0083] (Detection circuit unit)

[0084] The detection circuit unit 2 includes a plurality of Hall elements, and generates a detection signal of a magnetic field through the Hall elements. The detection circuit unit 2 includes a Hall integrated circuit (IC) on which a plurality of Hall elements are mounted. The detection circuit unit 2 includes a first Hall element 7 and a second Hall element 8. The detection circuit unit 2 has a plurality of terminal pairs for electrically connecting the plurality of Hall elements. The detection circuit unit 2 has a common terminal pair 9, a first terminal pair 10, and a second terminal pair 11. The common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 each include a pair (two) of terminals.

[0085] Figure 2 FIG. is a circuit diagram showing the respective terminals of the Hall element of the embodiment. The first Hall element 7 and the second Hall element 8 can be equivalently represented by Figure 2 the bridge circuits as shown. The Hall element has four terminals t1, t2, t3, and t4. The wire connected to the terminal t1 is connected in parallel to the two terminals t2 and t3, and the wires extending from the terminals t2 and t3 merge and are connected to the terminal t4. In Figure 2 the example of, power supply (V CC ) is applied to the terminal t1, and the current flows toward the ground GND connected to the terminal t4. If a magnetic field is applied in the direction penetrating the Hall element (the direction orthogonal to the Figure 2 paper surface), a voltage will be generated between the terminals t2 and t3 at the midpoint of the bridge. The voltage between the terminals t2 - t3 (the first voltage Vh1 and the second voltage Vh2 in Figure 2 ) becomes an output signal corresponding to the magnetic field. The first Hall element 7 and the second Hall element 8 are Hall elements of the same specification, and the input / output resistances are substantially equal.

[0086] The output voltage of the Hall element includes an offset signal component caused by the imbalance of the bridge resistors, the stress of the package, the stress during installation, etc. When the resistance values of the four resistance components of the Hall element in Figure 2 are all equal, the offset signal component is zero, but in reality they are not consistent, resulting in an offset component. In the embodiment, an offset cancellation process for canceling the offset component included in the output voltage of the Hall element (the first Hall element 7 and the second Hall element 8) is performed. The details of the offset cancellation process will be described later.

[0087] In Figure 1 shown in the detection circuit unit 2, two Figure 2 shown Hall elements are connected in parallel, namely the first Hall element 7 and the second Hall element 8. The common terminal pair 9 is a terminal pair connected to both the first Hall element 7 and the second Hall element 8. One terminal in the common terminal pair 9 is connected in parallel to the respective terminals t1 of the first Hall element 7 and the second Hall element 8, for example. The other terminal in the common terminal pair 9 is connected in parallel to the respective terminals t4 of the first Hall element 7 and the second Hall element 8, for example. Therefore, if the power supply V CC and the ground GND are respectively connected to the common terminal pair 9, both the first Hall element 7 and the second Hall element 8 are in the Figure 2 shown connection state. In the Figure 2 shown connection state, the common terminal pair 9 functions as an input terminal pair for applying power.

[0088] The first terminal pair 10 is a dedicated terminal pair for the first Hall element 7. The second terminal pair 11 is a dedicated terminal pair for the second Hall element 8. Here, the so-called dedicated terminal pair is different from the common terminal pair 9, and it means that it is only connected to one of the first Hall element 7 and the second Hall element 8 and not to the other. One terminal in the first terminal pair 10 is connected to the terminal t2 of the first Hall element 7, and the other terminal in the first terminal pair 10 is connected to the terminal t3 of the first Hall element 7. The first terminal pair 10 is also not connected to any terminal of the second Hall element 8. Therefore, in the Figure 2 shown connection state, the first terminal pair 10 functions as an output terminal pair for the magnetic detection signal of the first Hall element 7. Similarly, one terminal in the second terminal pair 11 is connected to the terminal t2 of the second Hall element 8, and the other terminal in the second terminal pair 11 is connected to the terminal t3 of the second Hall element 8. The second terminal pair 11 is also not connected to any terminal of the first Hall element 7. Therefore, in the Figure 2 shown connection state, the second terminal pair 11 functions as an output terminal pair for the magnetic detection signal of the second Hall element 8.

[0089] In addition, in the offset cancellation process described later, power is applied to the first terminal pair 10 or the second terminal pair 11 by the switching circuit 4, and the voltage from the common terminal pair 9 is measured. In this case, the first terminal pair 10 or the second terminal pair 11 functions as an input terminal pair, and the common terminal pair 9 functions as an output terminal pair. Therefore, these terminal pairs function both as input terminal pairs and as output terminal pairs.

[0090] (Power supply unit)

[0091] The power supply unit 3 supplies power to the detection circuit unit 2. The power supply unit 3 is connected to the detection circuit unit 2 via the switching circuit 4. The power supply unit 3 is selectively connected to any one of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 through the switching circuit 4. The power supply unit 3 connects one terminal of the connected terminal pair to the power supply V CC and connects the other terminal of the connected terminal pair to the ground GND to apply power (that is, to make current flow through the Hall element).

[0092] (Switching circuit)

[0093] The switching circuit 4 is connected to the power supply unit 3, the detection circuit unit 2, and the amplifier circuit 5 respectively. The switching circuit 4 includes a plurality of switches. In Figure 1 the example, the switching circuit 4 includes six switches, namely switch SW1, switch SW2, switch SW3, switch SW4, switch SW5, and switch SW6. In addition, in Figure 1 for convenience, the terminal pair is represented as a whole, but in fact, the terminal pair includes two terminals and is presented as a circuit provided with a plurality of wirings individually connected to each terminal. Therefore, these switches SW1 to SW6 actually also include one or more switches.

[0094] In Figure 1 the example, switches SW1 to SW6 are on / off switches. Switches SW1, SW2, and SW3 are input selection switches for selecting the object to which the power supply unit 3 is connected (that is, the object to which power is applied). Switches SW1, SW2, and SW3 are switched alternately so that any one is turned on and the other two are turned off. If switch SW1 is turned on, the power supply unit 3 is connected to the first terminal pair 10. If switch SW2 is turned on, the power supply unit 3 is connected to the second terminal pair 11. If switch SW3 is turned on, the power supply unit 3 is connected to the common terminal pair 9.

[0095] The switches SW4, SW5, and SW6 are output selection switches for selecting the object connected to the amplifier circuit 5 (i.e., the object for measuring the output voltage). The switches SW4, SW5, and SW6 are switched alternately so that any one of them is turned on and the other two are turned off. If the switch SW4 is turned on, the first terminal pair 10 is connected to the amplifier circuit 5. If the switch SW5 is turned on, the second terminal pair 11 is connected to the amplifier circuit 5. If the switch SW6 is turned on, the common terminal pair 9 is connected to the amplifier circuit 5.

[0096] The switching circuit 4 switches the connections between the power supply unit 3 and the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 to detect the offset signal component. Specifically, the switching circuit 4 switches the switches SW1 to SW6 so as to output the first voltage Vh1 of the first terminal pair 10 when the power supply is applied to the common terminal pair 9, the second voltage Vh2 of the second terminal pair 11 when the power supply is applied to the common terminal pair 9, the third voltage Vh3 of the common terminal pair 9 when the power supply is applied to the first terminal pair 10, and the fourth voltage Vh4 of the common terminal pair 9 when the power supply is applied to the second terminal pair 11 to the amplifier circuit 5.

[0097] Figure 3 It is a diagram for explaining the switching modes of the switches SW1 to SW6 of the switching circuit 4. The first voltage Vh1 is measured by turning on the switches SW3 and SW4. In this case, the power supply is applied from the power supply unit 3 to the common terminal pair 9, and the voltage of the first terminal pair 10 (i.e., the first voltage Vh1) is output to the amplifier circuit 5. The second voltage Vh2 is measured by turning on the switches SW3 and SW5. In this case, the power supply is applied from the power supply unit 3 to the common terminal pair 9, and the voltage of the second terminal pair 11 (i.e., the second voltage Vh2) is output to the amplifier circuit 5. The third voltage Vh3 is measured by turning on the switches SW1 and SW6. In this case, the power supply is applied from the power supply unit 3 to the first terminal pair 10, and the voltage of the common terminal pair 9 (i.e., the third voltage Vh3) is output to the amplifier circuit 5. The fourth voltage Vh4 is measured by turning on the switches SW2 and SW6. In this case, the power supply is applied from the power supply unit 3 to the second terminal pair 11, and the voltage of the common terminal pair 9 (i.e., the fourth voltage Vh4) is output to the amplifier circuit 5.

[0098] The switching circuit 4 receives the switching control signal from the operation unit 6 and switches the switches SW1 to SW6 according to the received switching control signal. The switching circuit 4 is controlled to periodically switch the on / off states of the switches in the four modes shown Figure 3 in sequence.

[0099] (Amplifier Circuit)

[0100] The amplifier circuit 5 amplifies the output voltage output from the switching circuit 4. In the embodiment, the amplifier circuit 5 has a common amplifier 12 that can be connected to each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 via the switching circuit 4. That is, one common amplifier 12 amplifies the output signals (the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, the fourth voltage Vh4) of each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11. Therefore, compared with the case where amplifiers are individually provided for each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11, the number of amplifiers or the installation area of the amplifier circuit 5 is reduced.

[0101] The common amplifier 12 amplifies the input signal at a prescribed amplification factor and outputs it. The input of the common amplifier 12 is connected in parallel to the switches SW4, SW5, and SW6 of the switching circuit 4. The common amplifier 12 is connected to the first terminal pair 10 via the switch SW4, connected to the second terminal pair 11 via the switch SW5, and connected to the common terminal pair 9 via the switch SW6. Therefore, as Figure 3 shown, by switching the switches of the switching circuit 4, the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 are selectively input to the common amplifier 12.

[0102] The common amplifier 12 amplifies each of the first voltage Vh1 of the first terminal pair 10 when power is applied to the common terminal pair 9, the second voltage Vh2 of the second terminal pair 11 when power is applied to the common terminal pair 9, the third voltage Vh3 of the common terminal pair 9 when power is applied to the first terminal pair 10, and the fourth voltage Vh4 of the common terminal pair 9 when power is applied to the second terminal pair 11 at the same amplification factor (Av + At) and outputs them to the arithmetic unit 6. The set value of the amplification factor of the common amplifier 12 is set as Av. The correction value At will be described later. In addition, the correction value At varies according to the temperature. The common amplifier 12 amplifies a set of four voltages (the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, the fourth voltage Vh4) regarded as being at the same time at the same amplification factor (Av + At).

[0103] The common amplifier 12 is connected to the arithmetic unit 6. The output voltage of the common amplifier 12 is input to the analog-to-digital (AD) conversion unit 13 of the arithmetic unit 6 and is converted into a digital signal. In the AD conversion process performed by the AD conversion unit 13, for a minute input voltage below the voltage range that can be linearly converted, the error sometimes increases. Therefore, in the embodiment, the amplifier circuit 5 has a voltage adjustment unit 5A that adjusts the voltage output from the common amplifier 12 to a range corresponding to the input voltage characteristics of the AD conversion unit 13. The voltage adjustment unit 5A applies a preset bias voltage V off to the output voltage of the common amplifier 12. The voltage obtained by adding the bias voltage V off to the output voltage of the common amplifier 12 is input to the AD conversion unit 13.

[0104] In addition, the sensitivity characteristics of the first Hall element 7 and the second Hall element 8 change according to temperature. Therefore, the magnetic detection circuit 1 of the embodiment further includes a temperature detection unit 5B. The temperature detection unit 5B includes, for example, a thermistor. Moreover, the amplifier circuit 5 has a temperature compensation unit 5C. The temperature compensation unit 5C adjusts the magnification of the common amplifier 12 according to the output of the temperature detection unit 5B. The temperature compensation unit 5C generates a correction value At of the magnification corresponding to the output of the temperature detection unit 5B. The temperature compensation unit 5C adds the generated correction value At to the magnification Av of the common amplifier 12. The common amplifier 12 amplifies the input signal at a compensation magnification (Av + At) obtained by adding the correction value At of the temperature compensation unit 5C to the preset magnification Av. The temperature compensation unit 5C generates a correction value At that reduces the change in the output voltage caused by the temperature characteristics of the Hall elements (the first Hall element 7 and the second Hall element 8). For example, when the output voltage of the Hall element decreases as the temperature rises, the temperature compensation unit 5C increases the correction value At as the temperature rises. The influence of the change in the sensitivity characteristics corresponding to the temperature of the Hall element is reduced according to the change in the magnification of the common amplifier 12.

[0105] (Arithmetic unit)

[0106] The arithmetic unit 6 includes an AD conversion unit 13, an adjustment arithmetic unit 14, a removal arithmetic unit 15, a detected value arithmetic unit 16, an output unit 17, and a switching circuit control unit 18. The arithmetic unit 6 is a computer having a processor such as a micro processing unit (MPU), a non-volatile memory such as a read only memory (ROM), a volatile memory such as a random access memory (RAM), and an input / output circuit. The arithmetic unit 6 implements the respective functions of the AD conversion unit 13, the adjustment arithmetic unit 14, the removal arithmetic unit 15, the detected value arithmetic unit 16, and the switching circuit control unit 18 by the processor executing a program stored in the memory. The output unit 17 is implemented by the processor controlling the input / output circuit. The arithmetic unit 6 may also include the AD conversion unit 13, the adjustment arithmetic unit 14, the removal arithmetic unit 15, the detected value arithmetic unit 16, and the switching circuit control unit 18 as individual hardware.

[0107] The AD conversion unit 13 inputs the output signal of the common amplifier 12. The AD conversion unit 13 performs AD conversion on each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 amplified by the common amplifier 12. The AD conversion unit 13 converts each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 amplified by the common amplifier 12 into a voltage value of a digital signal.

[0108] The adjustment arithmetic unit 14 makes the magnitudes of the offset signal components of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 after AD conversion equal. When the input / output resistances of the first Hall element 7 and the second Hall element 8 are equal, the Hall voltage and the offset component included in the third voltage Vh3 are each 1 / 2 of the Hall voltage and the offset signal component included in the first voltage Vh1, and the Hall voltage and the offset component included in the fourth voltage Vh4 are each 1 / 2 of the Hall voltage and the offset signal component included in the second voltage Vh2. Therefore, the adjustment arithmetic unit 14 doubles the voltage values of the third voltage Vh3 and the fourth voltage Vh4, respectively. In addition, in the embodiment, the bias voltage V off is applied to the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 by the voltage adjustment unit 5A in the amplifier circuit 5. Therefore, the adjustment arithmetic unit 14 subtracts the bias voltage V off from each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4. Then, the adjustment arithmetic unit 14 doubles the third voltage Vh3 and the fourth voltage Vh4 after the bias voltage V off has been subtracted.

[0109] The removal operation unit 15 removes the offset signal components of the same magnitude through an offset cancellation operation. Here, the signs of the offset signal components included in the first voltage Vh1 and the offset signal components included in the third voltage Vh3 are opposite to each other. Therefore, the removal operation unit 15 obtains the addition average of the first voltage Vh1 and the third voltage Vh3 operated by the adjustment operation unit 14 and uses it as the first Hall voltage V1 of the first Hall element 7. The first Hall voltage V1 is represented by the following formula (1).

[0110] V1 = {(Vh1 - V off ) + 2 × (Vh3 - V off )} / 2 ··· (1)

[0111] Here, (Vh1 - V off ) is the first voltage Vh1 from which the bias voltage V off has been subtracted, representing the operation result obtained by the adjustment operation unit 14. 2 × (Vh3 - V off ) represents the operation result obtained by the adjustment operation unit 14 after doubling the third voltage Vh3 from which the bias voltage V off has been subtracted.

[0112] Similarly, the signs of the offset signal components included in the second voltage Vh2 and the offset signal components included in the fourth voltage Vh4 are opposite to each other. The removal operation unit 15 obtains the addition average of the second voltage Vh2 and the fourth voltage Vh4 operated by the adjustment operation unit 14 and uses it as the second Hall voltage V2 of the second Hall element 8. The second Hall voltage V2 is represented by the following formula (2).

[0113] V2 = {(Vh2 - V off ) + 2 × (Vh4 - V off )} / 2 ··· (2)

[0114] Here, (Vh2 - V off ) is the second voltage Vh2 from which the bias voltage V off has been subtracted, representing the operation result obtained by the adjustment operation unit 14. 2 × (Vh4 - V off ) represents the operation result obtained by the adjustment operation unit 14 after doubling the fourth voltage Vh4 from which the bias voltage V off has been subtracted.

[0115] By removing the offset cancellation operation of the operation unit 15, for the first Hall element 7, the offset signal components included in the first voltage Vh1 and the offset signal components included in the third voltage Vh3 cancel each other out and are removed. For the second Hall element 8, the offset signal components included in the second voltage Vh2 and the offset signal components included in the fourth voltage Vh4 cancel each other out and are removed. The first Hall voltage V1 is the magnetic detection signal of the first Hall element 7 after removing the offset signal components. The second Hall voltage V2 is the magnetic detection signal of the second Hall element 8 after removing the offset signal components.

[0116] The detection value operation unit 16 calculates the detection value of the magnetic detection circuit 1 by performing an operation based on the first Hall voltage V1 and the second Hall voltage V2. In the embodiment, the detection value operation unit 16 calculates the voltage ratio based on the first Hall voltage V1 and the second Hall voltage V2. The voltage ratio is represented by the following formula (3).

[0117] Voltage ratio (V out ) = A × (V1 - V2) / (V1 + V2) + V DD / 2 ··· (3)

[0118] Here, A is a preset coefficient (constant). V DD is the voltage value of the drive voltage input to the operation unit 6. The voltage ratio of formula (3) obtains the gradient distribution of the magnetic field applied to each Hall element based on the detection values (the first Hall voltage V1, the second Hall voltage V2) of the first Hall element 7 and the second Hall element 8, and represents the position of the magnetic source. In formula (3), at the neutral position where the magnetic field from the magnetic source acts equally on the first Hall element 7 and the second Hall element 8, the voltage ratio = V DD / 2, which can be used as the origin. As the magnetic source approaches the first Hall element 7, the voltage ratio changes in the positive direction from the origin, and as the magnetic source approaches the second Hall element 8, the voltage ratio changes in the negative direction from the origin. Therefore, the position of the magnetic source can be grasped according to the voltage ratio.

[0119] The output unit 17 outputs the operation result of the detection value operation unit 16 as the output signal of the magnetic detection circuit 1. That is, the output unit 17 outputs the value of the voltage ratio obtained by using formula (3) as the output value V out Output. In this way, the operation unit 6 calculates the first Hall voltage V1 and the second Hall voltage V2 from which the offset signal components are removed by the offset cancellation operation, and outputs the voltage ratio based on the first Hall voltage V1 and the second Hall voltage V2.

[0120] The switching circuit control unit 18 controls the control operation of the switching circuit 4. The switching circuit control unit 18 controls the on / off of each of the switches SW1 to SW6 of the switching circuit 4 by respectively outputting switching control signals to the switches SW1 to SW6 of the switching circuit 4. The switching circuit control unit 18 sequentially outputs switching control signals for realizing Figure 3 the four modes shown. The switching circuit control unit 18 periodically executes the input of the switching control signals for realizing the four modes. Thereby, the arithmetic unit 6 periodically acquires the voltage values of the amplified first voltage Vh1, second voltage Vh2, third voltage Vh3, and fourth voltage Vh4, and outputs an output value V as a detection result at a predetermined period out . The position of the magnetic source at each detection time can be grasped by the output value V out .

[0121] (Magnetic detection method)

[0122] Figure 4 is a flowchart for explaining the magnetic detection method using the magnetic detection circuit 1 of the embodiment. Figure 5 is a diagram showing the switch switching state when the first voltage Vh1 is acquired. Figure 6 is a diagram showing the switch switching state when the third voltage Vh3 is acquired. Hereinafter, the operation of the magnetic detection circuit 1 will be described.

[0123] First, the arithmetic unit 6 respectively acquires the first voltage Vh1, second voltage Vh2, third voltage Vh3, and fourth voltage Vh4 (step S10). The switching circuit control unit 18 sends switching control signals to the switching circuit 4 to switch the switches SW1 to SW6 of the switching circuit 4 to Figure 3 the four modes shown. For example, the first voltage Vh1 is acquired by turning on the switches SW3 and SW4 and turning off the other switches.

[0124] As Figure 5 shown, the power supply unit 3 is connected to the common terminal pair 9 via the switch SW3, and power is applied to the common terminal pair 9 of the first Hall element 7 and the second Hall element 8. The first terminal pair 10 is connected to the common amplifier 12 via the switch SW4, and the first voltage Vh1 of the first Hall element 7 is input to the common amplifier 12. The arithmetic unit 6 acquires the first voltage Vh1 amplified by the common amplifier 12. If the switch SW4 is turned off and the switch SW5 is turned on in the state of Figure 5 , the second terminal pair 11 is connected to the common amplifier 12, and the second voltage Vh2 of the second Hall element 8 is input to the common amplifier 12.

[0125] The third voltage Vh3 is acquired by turning on the switches SW1 and SW6 and turning off the other switches. As Figure 6As shown, the power supply unit 3 is connected to the first terminal pair 10 via the switch SW1, and power is applied to the first terminal pair 10 of the first Hall element 7. The common terminal pair 9 is connected to the common amplifier 12 via the switch SW6, and the third voltage Vh3 of the first Hall element 7 is input to the common amplifier 12. The operation unit 6 obtains the third voltage Vh3 amplified by the common amplifier 12. If the switch SW1 is turned off and the switch SW2 is turned on, the second terminal pair 11 is connected to the power supply unit 3, and the fourth voltage Vh4 of the second Hall element 8 is input to the common amplifier 12 via the common terminal pair 9.

[0126] The calculation unit 6 obtains the first voltage Vh1, the second voltage Vh2, the third voltage Vh3 and the fourth voltage Vh4 during the period considered to be substantially the same time. The first voltage Vh1, the second voltage Vh2, the third voltage Vh3 and the fourth voltage Vh4 are AD converted by the AD conversion unit 13 and stored in the memory.

[0127] Next, the adjustment operation unit 14 makes the Hall voltage and offset signal components of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 after A / D conversion consistent (step S11). The adjustment operation unit 14 subtracts the bias voltage V from each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4. off On the basis of , the third voltage Vh3 and the fourth voltage Vh4 are set to 2 times. Thus, the magnitudes (absolute values) of the Hall voltage and offset signal components of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3 and the fourth voltage Vh4 are equal.

[0128] Next, the removal operation unit 15 removes the offset signal component of the same magnitude by performing an offset cancellation operation (step S12). The removal operation unit 15 obtains the first Hall voltage V1 from which the offset signal component has been removed by using equation (1). The removal operation unit 15 obtains the second Hall voltage V2 from which the offset signal component has been removed by using equation (2).

[0129] Next, the detection value calculation unit 16 calculates the detection value of the magnetic detection circuit 1 by calculating the voltage ratio of the first Hall voltage V1 and the second Hall voltage V2 (step S13). The detection value calculation unit 16 obtains the voltage ratio of the first Hall voltage V1 and the second Hall voltage V2 by equation (3) and outputs it as the output value V out The calculation unit 6 outputs the output value V through the output unit 17. out Thus, magnetic detection is performed by the magnetic detection circuit 1.

[0130] [Sewing machine]

[0131] Next, an application example of the magnetic detection circuit 1 of the embodiment will be described. In the embodiment, an example in which the magnetic detection circuit 1 is applied to a sewing machine 100 will be described.

[0132] Figure 7 FIG. is a diagram showing the sewing machine 100 of the embodiment. The sewing machine 100 is a so-called lock stitch sewing machine. As Figure 7 shown, the sewing machine 100 includes a sewing machine main body 21 and a control device 40. The sewing machine main body 21 has a sewing machine frame 23 provided on a sewing machine table 22.

[0133] The sewing machine frame 23 has an arm 23A, a bed 23B, a base 23C, and a head 23D. The arm 23A is long in the left-right direction. The bed 23B is disposed below the arm 23A. The bed 23B is long in the left-right direction. The bed 23B faces the arm 23A. The base 23C connects the right end portion of the arm 23A and the bed 23B. The base 23C is long in the up-down direction. The head 23D is provided at the left end portion of the arm 23A. The head 23D protrudes downward from the left end portion of the arm 23A.

[0134] The sewing machine main body 21 includes a needle bar 25, a tension 26, a needle plate 27, a presser foot 28, a thread regulator 29, feed teeth 30, a sewing machine motor 31, and a pressing motor 32.

[0135] The needle bar 25 holds the sewing needle 24. The needle bar 25 reciprocates in the up-down direction. The needle bar 25 is supported by the head 23D. The sewing needle 24 has a thread-passing hole through which the upper thread passes. The sewing needle 24 holds the upper thread on the inner surface of the thread-passing hole. By the reciprocating movement of the needle bar 25 in the up-down direction, the sewing needle 24 reciprocates in the up-down direction while holding the upper thread.

[0136] The tension 26 supplies the upper thread to the sewing needle 24. The tension 26 reciprocates in the up-down direction. The tension 26 is supported by the arm 23A. The tension 26 reciprocates in the up-down direction while holding the upper thread. The tension 26 has a holding hole through which the upper thread passes. The tension 26 holds the upper thread on the inner surface of the holding hole. The tension 26 draws out the upper thread used in the sewing of the sewing object K (see Figure 8 ) or pulls up the upper thread by reciprocating in the up-down direction.

[0137] The needle plate 27 is disposed below the needle bar 25. The needle plate 27 supports the sewing object K from below. The needle plate 27 supports the sewing object K below the needle bar 25. The sewing machine needle 24 held by the needle bar 25 faces the needle plate 27. The needle plate 27 has a needle hole through which the sewing machine needle 24 can pass. The sewing machine needle 24 that has penetrated the sewing object K supported by the needle plate 27 passes through the needle hole. A bobbin is disposed below the needle plate 27. The bobbin supplies the lower thread to the sewing object K.

[0138] The presser foot 28 presses the sewing object K supported by the needle plate 27 from above. The presser foot 28 is disposed at least partially around the sewing machine needle 24. The presser foot 28 is supported by the machine head 23D. The presser foot 28 can move in the vertical direction.

[0139] The thread regulator 29 applies tension to the upper thread supplied to the sewing machine needle 24 between the balance 26 and the needle bar 25. The thread regulator 29 is supported by the machine head 23D.

[0140] The feed teeth 30 act to convey the sewing object K supported by the needle plate 27 forward. The feed teeth 30 move along a prescribed feed track, thereby conveying the sewing object K forward. The feed teeth 30 are disposed below the needle plate 27. The feed teeth 30 move along the feed track and thereby emerge from and disappear into an opening provided in the needle plate 27. When conveying the sewing object K, at least a part of the feed teeth 30 protrudes upward from the upper surface of the needle plate 27 through the opening provided in the needle plate 27.

[0141] The sewing machine motor 31 generates power for operating the needle bar 25, the feed teeth 30, and the bobbin respectively. The sewing machine motor 31 generates power for reciprocally moving the needle bar 25 in the vertical direction. The sewing machine motor 31 generates power for rotating the bobbin. The sewing machine motor 31 generates power for moving the feed teeth 30 along the feed track. The sewing machine motor 31 includes, for example, a pulse motor. The sewing machine motor 31 is supported at the right part of the arm 23A.

[0142] The pressing motor 32 generates power for operating the presser foot 28. The pressing motor 32 generates power for reciprocally moving the presser foot 28 in the vertical direction. The pressing motor 32 is connected to a presser foot bar 28A (see Figure 8 ) that supports the presser foot 28 via a link mechanism. The pressing motor 32 includes, for example, a pulse motor. The sewing machine motor 31 is provided inside the arm 23A.

[0143] The control device 40 includes a computer system. The computer system has: a processor such as a Central Processing Unit (CPU), a main memory including a non-volatile memory such as a ROM and a volatile memory such as a RAM, a memory such as a hard disk drive or a flash memory, and an interface including an input / output circuit. The control device 40 controls the operation of the sewing machine 100.

[0144] Figure 8 FIG. is a schematic explanatory diagram showing the movable part MV and the magnetic detection circuit 1 of the embodiment. In the embodiment, the sewing machine main body 21 includes: a magnet 33 provided in the movable part MV of the sewing machine main body 21; a magnetic detection circuit 1 for detecting the magnetic force generated from the magnet 33; and a displacement detection part 41 for detecting the displacement of the movable part MV based on the output of the magnetic detection circuit 1.

[0145] The movable part MV is not particularly limited as long as it is a part whose position changes as the sewing machine 100 operates. The movable part MV can be a part that moves by a drive source such as a motor, a part that moves as the medium (sewing thread, lubricating oil, etc.) used by the sewing machine 100 moves, or a part that moves by the operator of the sewing machine 100 using the sewing operation.

[0146] In Figure 8 the example, the movable part MV includes the presser foot 28 of the sewing machine main body 21. The presser foot 28 is provided at the lower end of the presser bar 28A and moves in the height direction (vertical direction) together with the presser bar 28A. The presser foot 28 linearly moves in the height direction (vertical direction) between the raised position and the pressing position by pressing the motor 32. The presser foot 28 is disposed at a position separated upward from the needle plate 27 in the raised position. The presser foot 28 is disposed at a position where it can contact the needle plate 27 in the pressing position. By being disposed in the pressing position, the presser foot 28 presses the sewing object K supported by the needle plate 27 in a manner of sandwiching it between the presser foot 28 and the needle plate 27. In the pressing position, the height position of the presser foot 28 is displaced according to the thickness of the sewing object K. When there is no sewing object K on the needle plate 27, the presser foot 28 is disposed on the surface of the needle plate 27. When there is a sewing object K on the needle plate 27, the presser foot 28 is displaced upward from the needle plate 27 by an amount corresponding to the thickness of the sewing object K. The greater the thickness of the sewing object K, the greater the displacement amount of the presser foot 28. In the embodiment, the magnetic detection circuit 1 is used to detect the displacement of the presser foot 28 in the height direction (vertical direction) in the pressing position.

[0147] Specifically, the magnet 33 is fixed to the presser foot 28 which is a movable part MV via the press bar 28A. The magnet 33 is installed in the press bar 28A via the bracket 28B inside the head 23D of the sewing machine main body 21. The magnet 33 moves up and down integrally with the presser foot 28.

[0148] The magnetic detection circuit 1 is arranged near the magnet 33 inside the head 23D of the sewing machine main body 21. The magnetic detection circuit 1 is arranged such that the first Hall element 7 and the second Hall element 8 are located near the magnet 33. The first Hall element 7 and the second Hall element 8 are arranged along the vertical direction. A magnetic field generated from the magnet 33 is applied to the first Hall element 7 and the second Hall element 8. Thereby, the magnetic detection circuit 1 detects the magnetic force generated from the magnet 33 and outputs a value V corresponding to the magnetic force out to the displacement detection unit 41.

[0149] The displacement detection unit 41 is provided in the control device 40. The displacement detection unit 41 is realized based on a program stored in the main memory and executed by the processor of the control device 40. The displacement detection unit 41 obtains the position of the magnet 33 in the height direction based on the output value V of the magnetic detection circuit 1 out and can obtain the displacement of the presser foot 28 in the height direction (vertical direction) based on the known positional relationship between the magnet 33 and the presser foot 28.

[0150] The control device 40 adjusts the parameters of the sewing operation of the sewing machine main body 21 according to the displacement of the presser foot 28 in the height direction obtained by the displacement detection unit 41. The displacement of the presser foot 28 in the height direction at the pressing position represents the thickness of the sewing object K. The control device 40 adjusts parameters such as the sewing speed, the number of stitches, and the stitch pitch of the sewing machine main body 21 to values suitable for the thickness of the sewing object K according to the displacement of the presser foot 28, for example.

[0151] In addition, the movable part MV can also be a float indicating the amount of lubricating oil, for example. Although not shown in the figure, in the sewing machine main body 21, lubricating oil is sometimes circulated to sliding parts such as the bobbin case. In this case, in the sewing machine main body 21, there are provided: an oil storage part such as an oil pan or an oil tank, an oil pump for delivering lubricating oil to the sliding part, and an oil flow path connecting the sliding part and the oil storage part. The float is arranged in the oil storage part and moves up and down according to the amount of oil in the oil storage part. The magnetic detection circuit 1 detects the magnetism of the magnet 33 provided on the float and outputs the value V out to the displacement detection unit 41. The displacement detection unit 41 obtains the position of the magnet 33 in the height direction, that is, the amount of lubricating oil, based on the output value V of the magnetic detection circuit 1 out

[0152] [Effect]

[0153] As described above, according to the embodiment, the magnetic detection circuit 1 includes: a detection circuit unit 2 including a first Hall element 7 and a second Hall element 8, and having a common terminal pair 9 connected to both the first Hall element 7 and the second Hall element 8, a dedicated first terminal pair 10 of the first Hall element 7, and a dedicated second terminal pair 11 of the second Hall element 8; a power supply unit 3 that applies power to the detection circuit unit 2; a switching circuit 4 that switches the connection between the power supply unit 3 and the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 to detect an offset signal component; an amplifier circuit 5 that amplifies the output voltage output from the switching circuit 4; and an arithmetic unit 6 that performs an offset cancellation operation for removing the offset signal components of the first Hall element 7 and the second Hall element 8 based on the output voltage of the amplifier circuit 5. The amplifier circuit 5 has a common amplifier 12 that can be connected to each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 via the switching circuit 4. Thus, compared with the case where an amplifier is provided for each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11, only one common amplifier 12 needs to be provided, so that the number of components and the substrate area can be reduced accordingly. In addition, when an amplifier is provided for each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11, there are deviations (individual differences) between the amplifiers, so it is difficult to appropriately remove the offset signal component and it is difficult to reduce the error caused by the amplifier. On the other hand, in the embodiment, only one common amplifier 12 is provided, so there is no need to consider the individual differences between the amplifiers. Thus, according to the embodiment, the number of components and the substrate area of the magnetic detection circuit 1 can be reduced and error reduction can be achieved.

[0154] In addition, the common amplifier 12 amplifies each of a first voltage Vh1 of the first terminal pair 10 when power is applied to the common terminal pair 9, a second voltage Vh2 of the second terminal pair 11 when power is applied to the common terminal pair 9, a third voltage Vh3 of the common terminal pair 9 when power is applied to the first terminal pair 10, and a fourth voltage Vh4 of the common terminal pair 9 when power is applied to the second terminal pair 11 at the same magnification and outputs them to the arithmetic unit 6. That is, there is no need to amplify the first voltage Vh1 and the second voltage Vh2, the third voltage Vh3 and the fourth voltage Vh4 at different magnifications in order to make the magnitudes of the offset signal components consistent. Therefore, the circuit structure can be simplified, and the number of components and the substrate area of the magnetic detection circuit 1 can be effectively reduced.

[0155] In addition, the arithmetic unit 6 includes: an AD conversion unit 13 that performs AD conversion on each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 amplified by the common amplifier 12; an adjustment arithmetic unit 14 that makes the magnitudes of the offset signal components of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 after AD conversion the same; and a removal arithmetic unit 15 that removes the offset signal components of the same magnitude through offset cancellation arithmetic. Thus, for the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 after A / D conversion, offset cancellation arithmetic is performed on the basis of making the magnitudes of the offset signal components the same. As a result, there is no need to separately provide an amplifier circuit for making the magnitudes of the offset signal components the same, so that the number of components and the substrate area of the magnetic detection circuit 1 can be effectively reduced.

[0156] The amplifier circuit 5 has a voltage adjustment unit 5A that adjusts the voltage output from the common amplifier 12 to a range corresponding to the input voltage characteristics of the AD conversion unit 13. Thus, a voltage within a range consistent with the input voltage characteristics of the AD conversion unit 13 can be input, so that it is possible to easily achieve a reduction in errors related to AD conversion. In addition, the magnetic detection circuit 1 further includes a temperature detection unit 5B, and the amplifier circuit 5 has a temperature compensation unit 5C that adjusts the amplification factor of the common amplifier 12 according to the output of the temperature detection unit 5B. Here, in the case where an amplifier is provided for each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11, temperature compensation is performed separately for each amplifier, and it is necessary to consider the deviation of the temperature compensation for each amplifier. In contrast, in the embodiment, temperature compensation is performed by one common amplifier 12, so that it is possible to easily achieve a reduction in errors caused by temperature changes.

[0157] In addition, the arithmetic unit 6 calculates a first Hall voltage V1 and a second Hall voltage V2 from which the offset signal components have been removed through offset cancellation arithmetic, and outputs a voltage ratio (output value V out ) based on the first Hall voltage V1 and the second Hall voltage V2. Thus, the position of the magnetic source relative to the Hall element can be detected by the voltage ratio. In the embodiment, the voltage ratio is obtained from the voltage values (the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4) that have been amplified by the same common amplifier 12 and subjected to offset cancellation. Therefore, between the first Hall voltage V1 and the second Hall voltage V2, there is no amplification deviation or temperature compensation deviation of the amplifier as in the case of using individual amplifiers. Therefore, it is possible to easily achieve a reduction in errors.

[0158] In addition, according to an embodiment, the sewing machine 100 includes: a sewing machine main body 21; a magnet 33 provided on a movable part MV of the sewing machine main body 21; a magnetic detection circuit 1 that detects the magnetic force generated from the magnet 33; and a displacement detection unit 41 that detects the displacement of the movable part MV based on the output of the magnetic detection circuit 1. Thus, the displacement of the sewing machine 100 can be detected using the magnetic detection circuit 1, and the magnetic detection circuit 1 can reduce the number of parts and the substrate area, and achieve error reduction. For example, in an industrial sewing machine or the like, even in the case of temperature rise due to continuous operation or when it is required to equalize the quality among multiple sewing machines 100, it is suitable to use the magnetic detection circuit 1 of the present embodiment that can achieve effective error reduction and reduce individual differences.

[0159] In addition, the movable part MV includes a presser foot 28 of the sewing machine main body 21, and the displacement detection unit 41 detects the displacement of the presser foot 28 in the height direction. Thus, the thickness of the sewing object K can be detected based on the displacement of the presser foot 28 in the height direction. The thickness of the sewing object K greatly affects the quality of the sewn clothing obtained by the sewing machine 100. By reducing the detection error of the thickness of the sewing object K using the magnetic detection circuit 1 of the present embodiment, stable sewing with high quality can be achieved.

[0160] [Another embodiment]

[0161] In the above embodiment, an example of providing a voltage adjustment unit 5A in the amplifier circuit 5 is shown, but the voltage adjustment unit 5A may not be provided. In addition, in the above embodiment, an example of providing a temperature compensation unit 5C in the amplifier circuit 5 is shown, but the temperature compensation unit 5C may not be provided.

[0162] In addition, in the above embodiment, an example of using the voltage ratio based on the first Hall voltage V1 and the second Hall voltage V2 as the output value V out is shown, but the magnetic detection circuit 1 may also use other calculation values other than the voltage ratio as the output value V out for output. The magnetic detection circuit 1 may also output the values of the first Hall voltage V1 and the second Hall voltage V2 separately.

[0163] In addition, in the above embodiment, an example of applying the magnetic detection circuit 1 to the sewing machine 100 is shown, but the magnetic detection circuit 1 can be used for any purpose other than sewing machines.

Claims

1. A magnetic detection circuit, comprising: a detection circuit unit including a first Hall element and a second Hall element and having a common terminal pair connected to both the first Hall element and the second Hall element, a first terminal pair dedicated to the first Hall element, and a second terminal pair dedicated to the second Hall element; A power supply unit, which applies power to the detection circuit unit; a switching circuit that switches the connection between the power supply unit and the common terminal pair, the first terminal pair, and the second terminal pair to detect an offset signal component; an amplifier circuit for amplifying an output voltage outputted from the switching circuit; as well as a calculation unit that performs an offset cancellation calculation to remove offset signal components of the first Hall element and the second Hall element based on an output voltage of the amplifier circuit, The amplifier circuit includes one common amplifier that can be connected to each of the common terminal pair, the first terminal pair, and the second terminal pair via the switching circuit.

2. The magnetic detection circuit according to claim 1, wherein: The common amplifier is a first voltage of the first terminal pair when power is applied to the common terminal pair, a second voltage of the second terminal pair when power is applied to the common terminal pair, a third voltage of the common terminal pair when power is applied to the first terminal pair, The fourth voltage of the common terminal pair when power is applied to the second terminal pair The signals are amplified at the same amplification factor and output to the calculation unit.

3. The magnetic detection circuit according to claim 2, wherein: The computing unit comprises: an analog-to-digital conversion unit that performs analog-to-digital conversion on each of the first voltage, the second voltage, the third voltage, and the fourth voltage amplified by the common amplifier; adjusting the calculation unit so that the magnitudes of the offset signal components of the first voltage, the second voltage, the third voltage, and the fourth voltage after analog-to-digital conversion are consistent; and The removal operation unit removes the offset signal component having the same magnitude by the offset cancellation operation.

4. The magnetic detection circuit according to claim 3, wherein: The amplifier circuit includes a voltage adjustment unit that adjusts a voltage output from the common amplifier to a range corresponding to an input voltage characteristic of the analog-to-digital conversion unit.

5. The magnetic detection circuit according to claim 1, further comprising a temperature detection unit, The amplifier circuit includes a temperature compensating unit that adjusts an amplification factor of the common amplifier based on an output of the temperature detecting unit.

6. The magnetic detection circuit according to claim 1, wherein: The calculation unit calculates a first Hall voltage and a second Hall voltage from which the offset signal component is removed by the offset cancellation calculation, and outputs a voltage ratio based on the first Hall voltage and the second Hall voltage.

7. A sewing machine comprising: Sewing machine body; A magnet, arranged on a movable part of the sewing machine body; The magnetic detection circuit according to any one of claims 1 to 6, detecting the magnetic force generated by the magnet; as well as The displacement detection unit detects the displacement of the movable unit based on the output of the magnetic detection circuit.

8. The sewing machine according to claim 7, wherein: The movable part includes a presser foot of the sewing machine body, The displacement detection section detects displacement of the presser foot in a height direction.