Single event effect test method for nonvolatile memory

Abstract

The invention provides a single event effect test method of a nonvolatile memory, and in order to comprehensively understand the single event effect of the nonvolatile memory such as Flash, RRAM, MRAM and the like through a single event effect test, the single event effect of the nonvolatile memory is researched in four modes. Comprising an unbiased mode, a static mode, a continuous read cycle mode and a write-read cycle mode. The invention provides a specific single-particle test process and method suitable for nonvolatile memories such as Flash, RRAM and MRAM, the single-particle radiation characteristics of the nonvolatile memories can be comprehensively evaluated, the defect that an error circuit module is difficult to determine during reason analysis due to the fact that the test vector is single and the error type is covered in the conventional test is overcome, and the test efficiency is improved. The method has the remarkable advantages of comprehensive detection, high accuracy, good real-time performance and high convenience.

Description

Technical Field

[0001] The invention belongs to the technical field of single particle effect test, and in particular relates to a single particle effect test method for a non-volatile memory. Background Art

[0002] Non-volatile memory has important and extensive applications in the aerospace field due to its non-volatility, large storage capacity and low power consumption. However, the complex space environment poses a great challenge to the reliability of non-volatile memory. Traditional non-volatile memory Flash memory is not immune to radiation effects, especially single particle effects. On the contrary, due to its complex CMOS control circuit and different functional modules, Flash will frequently experience single particle effects in space. New non-volatile memory RRAM, MRAM, PCM, FRAM and other memories have natural radiation resistance in principle, but their storage units still have problems under radiation. For example, RRAM units have problems such as poor stability of high and low resistance states after irradiation, changes in material properties, and operating voltage drift. Different types of devices also have different radiation resistance capabilities. In addition, the normal operation of new non-volatile memory is also inseparable from the cooperation of peripheral CMOS circuits. Therefore, both traditional non-volatile memory and new non-volatile memory face the problem of single particle radiation when used in space.

[0003] In order to ensure the stability and reliability of non-volatile memories such as Flash, RRAM, and MRAM in the space environment, single-particle effect tests need to be conducted on non-volatile memories before they are used in space, and radiation resistance assessments need to be performed, so as to provide targeted reinforcement to ensure that non-volatile memories can be used reliably in space. In order to ensure the correctness of the test results, how to scientifically and effectively test the single-particle effects of non-volatile memories is an urgent problem to be solved. Summary of the invention

[0004] In order to overcome the deficiencies in the prior art, the inventors have conducted intensive research and provided a single particle effect test method for a non-volatile memory, which can effectively test the single particle effect of the non-volatile memory.

[0005] The technical solution provided by the present invention is as follows:

[0006] A single event effect test method for a non-volatile memory, comprising:

[0007] Performing single event effect testing on non-volatile memory in at least one of an unbiased mode, a static mode, a continuous read cycle mode, and a write-read-read cycle mode;

[0008] Single event effects testing of non-volatile memories in unbiased mode, including:

[0009] S1.1, Check the functions of the test system and the non-volatile memory under test;

[0010] S1.2, Write the first data pattern into the non-volatile memory;

[0011] S1.3, Irradiate the non-volatile memory in portions without applying an electrical bias. After the irradiation fluence reaches the fluence of the preset step size, turn off the irradiation source and apply an electrical bias to the non-volatile memory for readback. Compare the readback data with the first data pattern and output error-related information in real time;

[0012] S1.4, Repeat step S1.3 until the number of errors occurred exceeds the preset number of errors, or stop the test when the total fluence of the current irradiation reaches the preset total fluence;

[0013] Conduct a single-event effect test on the non-volatile memory in the static mode, including:

[0014] S2.1, Check the functions of the test system and the non-volatile memory under test;

[0015] S2.2, Write the first data pattern into the non-volatile memory;

[0016] S2.3, Irradiate the non-volatile memory under the condition of static bias, monitor the static current in real time. After the irradiation fluence reaches the fluence of the preset step size, turn off the irradiation source and read back the non-volatile memory. Compare the readback data with the first data pattern and output error-related information;

[0017] S2.4, Determine whether to reset or restart the non-volatile memory according to the monitored static current and error-related information, and repeat step S2.3 or stop the test; if it is determined to repeat step S2.3, stop the test when the total fluence of the current irradiation reaches the preset total fluence;

[0018] Conduct a single-event effect test on the non-volatile memory in the continuous read cycle mode, including:

[0019] S3.1, Check the functions of the test system and the non-volatile memory under test;

[0020] S3.2, Write the first data pattern into the non-volatile memory;

[0021] S3.3, Irradiate the non-volatile memory in the continuous read cycle mode, monitor the dynamic current in real time, compare the data read back each time with the first data pattern, and output error-related information in real time;

[0022] S3.4. Determine whether to reset or restart the non-volatile memory according to the monitored dynamic current and error-related information, and repeat step S3.3 or stop the test; if it is determined to repeat step S3.3, stop the test when the total fluence of the current irradiation reaches the preset total fluence.

[0023] Perform a single-event effect test on the non-volatile memory in the write-read-read cycle mode, including:

[0024] S4.1. Check the functions of the test system and the non-volatile memory to be tested.

[0025] S4.2. Irradiate the non-volatile memory in the write-read-read cycle mode, monitor the dynamic current in real time, compare the data read back each time with the first data pattern, and output error-related information in real time.

[0026] S4.3. Determine whether to reset or restart the non-volatile memory according to the monitored dynamic current and error-related information, and repeat step S4.2 or stop the test; if it is determined to repeat step S4.2, stop the test when the total fluence of the current irradiation reaches the preset total fluence.

[0027] A single-event effect test method for a non-volatile memory provided by the present invention has the following beneficial effects:

[0028] (1) A single-event effect test method for a non-volatile memory provided by the present invention proposes four working modes according to the working state types of non-volatile memories such as Flash, RRAM, and MRAM in the actual space environment. The unbiased mode can study the single-event radiation effect of the non-volatile memory in the unbiased mode, that is, the single-event radiation sensitivity of the non-volatile memory cell itself. The static mode can study the single-event radiation effect of the non-volatile memory in the static bias mode. The continuous read cycle mode can study the sensitivity of different circuit modules to single-event radiation during the read process of the non-volatile memory; the write-read-read cycle mode can study the sensitivity of different circuit modules to single-event radiation during the write process of the non-volatile memory. The method of reading twice continuously can better characterize the single-event radiation sensitivity of the write process of the non-volatile memory. Through the single-event tests of the four modes, the single-event radiation effect of the non-volatile memory can be accurately and comprehensively obtained, improving the accuracy of the test results.

[0029] (2) A single-event effect test method for a non-volatile memory provided by the present invention can improve the test accuracy and sensitivity by using a high clock frequency, complex data patterns, and a comprehensive test mode. The sub-region output method is beneficial to saving test time and quickly understanding the overall error situation of the non-volatile memory. Description of the Drawings

[0030] Figure 1Flow chart of unbiased mode test for the present invention;

[0031] Figure 2 Schematic diagram of the test system for the present invention

[0032] Figure 3 Flow chart of the test for the static mode of the present invention;

[0033] Figure 4 Flow chart of the test for the continuous read cycle mode of the present invention;

[0034] Figure 5 Flow chart of the test for the write-read-read cycle mode of the present invention. Detailed implementation manners

[0035] The following is a detailed description of the present invention, and the features and advantages of the present invention will become clearer and more definite with these descriptions.

[0036] The special term "exemplary" here means "serving as an example, embodiment or illustration". Any embodiment described as "exemplary" here does not have to be construed as superior or better than other embodiments.

[0037] The present invention provides a method for single event effect test of non-volatile memories. The non-volatile memories include but are not limited to Flash, RRAM, MRAM, PCM, FRAM, etc. The specific technical solutions include:

[0038] Both the storage array and the peripheral CMOS circuit of the non-volatile memory may be affected by single particle radiation and generate radiation effects, and the interaction between the storage array and the peripheral CMOS circuit will also be affected by radiation effects. In order to comprehensively understand the single event effect of the non-volatile memory through the single event effect test, the present invention adopts four modes to study the single event effect of the non-volatile memory, including unbiased mode, static mode, continuous read cycle mode and write-read-read cycle mode. In the unbiased mode, after the total fluence reaches a certain preset step fluence, data is read back and corresponding measures are taken according to the reading results; in the static mode, the static current is monitored in real time and corresponding measures are taken according to the current situation, and after the total fluence reaches a certain preset step fluence, data is read back and corresponding measures are taken according to the reading results; in the continuous read cycle mode and the write-read-read cycle mode, the dynamic current and the read data are monitored in real time, and corresponding measures are taken according to different situations; in the write-read-read cycle mode, the dynamic current and the read data are monitored in real time, and corresponding measures are taken according to different situations.

[0039] I. Unbiased mode

[0040] Figure 1The present invention provides a test flow chart of an unbiased mode in a single-particle effect test method of a non-volatile memory. The test method in the unbiased mode includes:

[0041] S1.1: Check the correctness of the functions of the test system and the non-volatile memory chip under test (hereinafter referred to as DUT, Device Under Test).

[0042] The test system is used to implement the single event effect test of non-volatile memory. The test system schematic diagram is shown in Figure 2 As shown in the figure, the system mainly consists of DUT, main control FPGA (field programmable gate array), programmable power supply and host computer. The chip under test is a device with the entire internal bare core exposed after acid corrosion on the back of the chip. The programmable power supply supplies power to the chip under test and the main control FPGA on the test board, and monitors and limits the current of the chip under test and the main control FPGA respectively. The programmable power supply is connected to the host computer through a network cable and sends the current information to the host computer in real time. The host computer sends different test instructions to the chip under test by controlling the FPGA. The test signal is provided by the main control FPGA. During the experiment, the readback data of the chip under test will be sent to the main control FPGA in real time for comparison. After the comparison is completed, the main control FPGA will send the statistical data to the host computer, and the host computer will display the current and data conditions in real time.

[0043] S1.2: Writing a first data pattern in the DUT; specifically;

[0044] The DUT is divided into three areas. The first "1 / 2" area is an "increasing oblique triangle", that is, the first page is oblique triangle data, the data of the first address is "0x00", and the address data thereafter increases in sequence. The data value of each address is the data value of the previous address plus 1, and the data of the last address is "0xFF"; the first address data of the second page is the first address data of the previous page plus 1, and the addresses thereafter increase in sequence, and the data of the last address is "0x00"; the data of the third page and the following pages are analogous. This method ensures that the data graphics between each page of the first "1 / 2" area are different. The area of ​​the second "1 / 2" is divided into two parts, one "1 / 4" area is "all 11" data, and the other "1 / 4" area is "all 00" data. Among them, a page refers to a smaller logical partition in the memory, and a page usually has a storage capacity of 2Kb.

[0045] S1.3: The DUT is irradiated in batches without power bias. When the irradiation dose reaches a preset step dose, the irradiation source is turned off and the DUT is read back with power bias. The read-back data is compared with the first data graph, and error-related information is output.

[0046] For different single-event effect tests, different irradiation sources are selected for irradiation. For proton single-event effect tests, a proton irradiation source is selected; for neutron single-event effect tests, a neutron irradiation source is selected; for heavy-ion single-event effect tests, a heavy-ion irradiation source is selected.

[0047] Error-related information includes: device ID information, status register information, addresses of all errors, error data, number of errors, and number of read cycles when a read error occurs. An example is shown in Table 1 below.

[0048] Table 1

[0049]

[0050] The fluence of the preset step size is determined according to the type of non-volatile memory to be tested and different single-event effect tests. For example, it is 1E7 n / cm 2 .

[0051] S1.4: Repeat step S1.3 until the number of errors that occur reaches the preset number of errors, or stop the test when the total fluence of the current irradiation reaches the preset total fluence.

[0052] The preset number of errors and the preset total fluence are determined according to the type of non-volatile memory to be tested and different single-event effect tests. For example, the preset number of errors is 100 bytes, and the preset total fluence is 1E8 n / cm 2 .

[0053] II. Static mode

[0054] Figure 3 is the test flow chart of the static mode in a single-event effect test method for a non-volatile memory provided by the present invention. The test method in the static mode includes:

[0055] S2.1: Check the correctness of the test system and the functions of the DUT.

[0056] S2.2: Write the first data pattern into the DUT.

[0057] S2.3: Irradiate the DUT under static bias conditions, monitor the static current in real time. After the fluence of the irradiation reaches the fluence of the preset step size, turn off the irradiation source and perform a read-back on the DUT, compare the read-back data with the first data pattern, and output error-related information.

[0058] S2.4: Determine whether to reset or restart the DUT according to the monitored static current and error-related information, and repeat step S2.3 or stop the test; if it is determined to repeat step S2.3, stop the test when the total fluence of the current irradiation reaches the preset total fluence.

[0059] (i) If the static current exceeds the preset current value a, reset the DUT. If the static current returns to normal after reset, repeat step S2.3. If the static current does not return to normal after reset, restart the DUT. If the static current returns to normal after restart, repeat step S2.3. If the static current does not return to normal after restart, stop the test.

[0060] (ii) If the static current does not exceed the preset current value a or the number of errors counted during readback is 0, take no action.

[0061] (iii) If the number of errors counted during readback ≥ 1, perform multiple reads and count the error-related information. After reading, perform a reset operation on the DUT. If the chip returns to normal after reset, repeat step S2.3. If the errors still exist after reset, perform a restart operation. If the data returns to normal after restart or the cumulative number of errors does not exceed the preset number of errors, repeat step S2.3. If the errors still exist after restart and the cumulative number of errors exceeds the preset number of errors, stop the test.

[0062] The static bias refers to the state where the DUT is only connected to power and ground, other pins are connected according to the default connection method, and no instructions are input.

[0063] The fluence of the preset step size is determined according to the type of non-volatile memory to be tested and different single-event effect tests, such as 1E7 n / cm 2 .

[0064] The form of the first data pattern and the error-related information is the same as that in the unbiased mode. The fluence of the preset step size, the preset number of errors, and the preset total fluence are determined according to the actual test situation; the preset current value a is several times (such as 10 times) the normal static current of the non-volatile memory and is determined according to the type of non-volatile memory to be tested.

[0065] III. Continuous read cycle mode

[0066] Figure 4 is the test flow chart of the continuous read cycle mode in a single-event effect test method for a non-volatile memory provided by the present invention, including:

[0067] S3.1: Check the correctness of the test system and the DUT function.

[0068] S3.2: Write the first data pattern into the DUT.

[0069] S3.3: Irradiate the DUT in the continuous read cycle mode, monitor the dynamic current in real time, compare the data read each time with the first data pattern, and output the error-related information in real time.

[0070] S3.4: Determine whether to reset or restart the DUT based on the monitored dynamic current and error-related information, and repeat step S3.3 or stop the test; if it is determined to repeat step S3.3, stop the test when the total fluence of the current irradiation reaches the preset total fluence.

[0071] (i) If the dynamic current is abnormal and exceeds the preset current value b, stop irradiation, exit the continuous read cycle mode and perform a reset operation, re-enter the continuous read cycle instruction. If the dynamic current returns to normal, repeat step S3.3; if the dynamic current does not return to normal, restart the DUT and re-enter the continuous read instruction. If the dynamic current returns to normal, repeat step S3.3; if the dynamic current does not return to normal, stop the test.

[0072] (ii) If the number of errors counted in a single cycle is 0 or ≥1 and the number of consecutive error cycles ≤ the preset error cycle number, take no action.

[0073] (iii) If the number of errors counted in a single cycle is ≥1 and the number of consecutive error cycles > the preset error cycle number, stop irradiation, exit the continuous read cycle mode, re-enter the continuous read cycle instruction. If the data returns to normal, continue with step S3.3; if the error still exists, restart the DUT and re-enter the continuous read instruction. If the data returns to normal, continue with step S3.3; if the error still exists, stop the test.

[0074] The continuous read cycle mode is to read all DUT data at the highest clock frequency that the non-volatile memory can reach, and read cyclically. Each time the read data is compared with the first data pattern, and the read cycle count and time are output in real time. When an error occurs during the read, error-related information is output in real time.

[0075] The continuous read cycle mode uses a relatively high clock frequency, and the interval between each read-back is the interval time of the maximum clock frequency that the non-volatile memory can reach. The high clock frequency and short time can improve the capture ability of the non-volatile memory for single-event effects and the accuracy of the test results.

[0076] The method of real-time output of error-related information is the sub-region output method: for the three data regions of the first data pattern, the error-related information of the first N, such as 100 bytes, of each data region is output. If outputting all error information when an error occurs takes a lot of time, it not only wastes test machine time but also is not easy to quickly understand the error situation of the entire DUT. This method of outputting error-related information is beneficial to saving machine time and enabling experimenters to quickly understand the error situation of the entire DUT.

[0077] The form of the first data pattern and error-related information is the same as the unbiased pattern. The preset error cycle number and the preset total fluence are determined according to the actual test situation. For example, the preset error cycle number is 5. The preset current value b is several times (such as 10 times) the normal dynamic current of the non-volatile memory and is determined according to the type of the non-volatile memory to be tested.

[0078] IV. Write-Read-Read Cycle Mode

[0079] Figure 4 It is the test flow chart of the write-read-read cycle mode in the single-event effect test method of a non-volatile memory provided by the present invention, including:

[0080] S4.1: Check the correctness of the test system and the DUT function;

[0081] S4.2: Irradiate the DUT in the write-read-read cycle mode, monitor the dynamic current in real time, compare the data read back each time with the first data pattern, and output error-related information in real time;

[0082] S4.3: Determine whether to reset or restart the DUT according to the monitored dynamic current and error-related information, and repeat step S4.2 or stop the test; if it is determined to repeat step S4.2, stop the test when the total fluence of the current irradiation reaches the preset total fluence.

[0083] (i) If the dynamic current is abnormal and exceeds the preset current value c, stop the irradiation, exit the write-read-read cycle mode, re-enter the write-read-read cycle instruction. If the current returns to normal, repeat step S4.2. If the dynamic current is still abnormal, restart the non-volatile memory and re-enter the write-read-read cycle mode instruction. If the dynamic current returns to normal, repeat step S4.2. If the dynamic current is still abnormal, stop the test;

[0084] (ii) If the number of errors counted in a single cycle is 0 or ≥1 and the number of consecutive error cycles ≤ the preset error cycle number, no measures are taken;

[0085] (iii) If the number of errors counted in a single cycle ≥1 and the number of consecutive error cycles > the preset error cycle number, stop the irradiation, exit the write-read-read cycle mode, re-enter the write-read-read cycle instruction. If the data returns to normal, continue with step S4.2. If the error still exists, restart the DUT and re-enter the continuous read instruction. If the data returns to normal, continue with step S4.2. If the error still exists, stop the test.

[0086] The write-read-read loop pattern performs an operation of writing once and reading twice on the DUT. The data written continuously twice is different, and two data patterns are alternately written, namely the first data pattern and the second data pattern. The two consecutive reads need to be compared with the data pattern written in this loop respectively and output error-related information, and this process is carried out in a loop. The form of the first data pattern is the same as the unbiased pattern; the second data pattern is that for the first 1 / 2 of the pages of the non-volatile memory, all "5A" data is written, for the next 1 / 4 of the pages, all "00" data is written, and for the last 1 / 4 of the pages, all "11" data is written. The time interval for each read-back or write is the interval time of the maximum clock frequency that the non-volatile memory can reach.

[0087] In one cycle, if an error occurs only during one of the reads, this error is excluded. If the error results in both reads are the same, such errors are counted as single-event radiation effects of the DUT during the write process.

[0088] The interval between the write-read-read operations is the interval time of the maximum clock frequency that the non-volatile memory can reach. A high clock frequency and a short time can improve the capture ability of the non-volatile memory for single-event effects and the accuracy of the test results.

[0089] Under this write-read-read loop pattern, the form of the error-related information is the same as the unbiased pattern. The preset error cycle number and the preset total fluence are determined according to the actual test situation. For example, the preset error cycle number is 5; the preset current value c is several times, such as 10 times, the normal dynamic current of the non-volatile memory, and is determined according to the type of the non-volatile memory to be tested.

[0090] A test method for single-event effects of a non-volatile memory proposed by the present invention first proposes four working modes according to the working state types of non-volatile memories such as Flash, RRAM, and MRAM in the actual space environment. The unbiased mode can study the single-event radiation effects of non-volatile memories in the unbiased mode, that is, the single-event radiation sensitivity of the storage cells of the non-volatile memory itself. The static mode can study the single-event radiation effects of non-volatile memories in the static bias mode. The continuous read loop mode can study the sensitivity of different circuit modules of non-volatile memories to single-event radiation during the read process, including modules such as the read control circuit, sense amplifier circuit, cache circuit, and storage array, etc.; the write-read-read loop mode can study the sensitivity of different circuit modules of non-volatile memories to single-event radiation during the write process, including modules such as the write control circuit, power supply module, write circuit, and storage array, etc.

[0091] In addition, high clock frequencies and complex data patterns can improve the test accuracy and sensitivity. The sub-region output method is conducive to saving test time and quickly understanding the overall error situation of non-volatile memories. Through single-particle tests in four modes, the single-particle radiation effects of non-volatile memories can be accurately and comprehensively obtained, improving the accuracy of test results.

[0092] The present invention has been described in detail above in conjunction with specific embodiments and exemplary examples, but these descriptions should not be construed as limiting the present invention. Those skilled in the art understand that without departing from the spirit and scope of the present invention, various equivalent substitutions, modifications or improvements can be made to the technical solutions and implementation manners of the present invention, and these all fall within the scope of the present invention. The protection scope of the present invention is subject to the appended claims.

[0093] The content not described in detail in the specification of the present invention belongs to the well-known technology of those skilled in the art.

Claims

1. A single event effect test method for non-volatile memory, characterized in that: include: Performing single event effect testing on non-volatile memory in at least one of an unbiased mode, a static mode, a continuous read cycle mode, and a write-read-read cycle mode; Single event effects testing of non-volatile memories in unbiased mode, including: S1.1, check the functions of the test system and the non-volatile memory to be tested; S1.2, writing a first data pattern into a non-volatile memory; S1.3, irradiating the non-volatile memory in batches without applying power bias, and after the irradiation flux reaches the flux of the preset step length, turning off the irradiation source and reading back the non-volatile memory with power bias, comparing the read-back data with the first data graph, and outputting error-related information in real time; S1.4, repeat step S1.3 until the number of errors that occur statistically exceeds the preset number of errors, or the current total irradiation dose reaches the preset total dose, and then stop the test; Single event effects testing of non-volatile memories in static mode, including: S2.1, check the functions of the test system and the non-volatile memory to be tested; S2.2, writing a first data pattern into a non-volatile memory; S2.3, irradiating the non-volatile memory under a static bias condition, monitoring the static current in real time, and after the irradiation flux reaches a preset step flux, turning off the irradiation source and reading back the non-volatile memory, comparing the read-back data with the first data graph, and outputting error-related information; S2.4, based on the monitored static current and error-related information, determine whether to reset or restart the non-volatile memory, and repeat step S2.3 or stop the test; if it is determined to repeat step S2.3, stop the test when the total injection amount of the current irradiation reaches the preset total injection amount; Single event effects testing of non-volatile memories in continuous read cycle mode, including: S3.1, check the functions of the test system and the non-volatile memory to be tested; S3.2, writing a first data pattern into a non-volatile memory; S3.3, irradiating the non-volatile memory in a continuous read cycle mode, monitoring the dynamic current in real time, comparing the data read back each time with the first data graph, and outputting error related information in real time; S3.4, determining whether to reset or restart the non-volatile memory according to the monitored dynamic current and error-related information, and repeating step S3.3 or stopping the test; if it is determined to repeat step S3.3, the test is stopped when the total injection amount of the current irradiation reaches the preset total injection amount; Single event effects testing of non-volatile memory in write-read-read cycle mode, including: S4.1, check the functions of the test system and the non-volatile memory to be tested; S4.2, irradiating the non-volatile memory in a write-read-read cycle mode, monitoring the dynamic current in real time, comparing the data read back each time with the first data graph, and outputting error-related information in real time; S4.3, based on the monitored dynamic current and error-related information, determine whether to reset or restart the non-volatile memory, and repeat step S4.2 or stop the test; if it is determined to repeat step S4.2, stop the test when the current total irradiation injection reaches the preset total injection.

2. The single event effect test method of non-volatile memory according to claim 1, characterized in that: In the unbiased mode, static mode, continuous read cycle mode and write-read-read cycle mode, the first data graph is: the non-volatile memory is divided into three areas, in the first "1 / 2" area, the first page is oblique triangle data, the data of the first address is "0x00", and the subsequent address data increases in sequence, the data value of each address is the data value of the previous address plus 1, and the data of the tail address is "0xFF"; the first address data of the second page is the first address data of the previous page plus 1, and the subsequent addresses increase in sequence, and the data of the tail address is "0x00"; the data of the third page and subsequent pages are deduced in this way. This method ensures that the data graphs between each page of the first "1 / 2" area are different, and the latter "1 / 2" area is divided into two parts, one "1 / 4" area is "all 11" data, and the other "1 / 4" area is "all 00" data.

3. The single event effect test method of non-volatile memory according to claim 1, characterized in that: In the unbiased mode, static mode, continuous read cycle mode and write-read-read cycle mode, the error-related information includes: device ID information, status register information, addresses of all errors, error data, error quantity and read cycle times when a read error occurs.

4. The single event effect test method of non-volatile memory according to claim 1, characterized in that: The step S2.4 determines whether to reset or restart the non-volatile memory according to the monitored static current and error-related information, and repeats step S2.3 or stops the test, including: If the quiescent current exceeds the preset current value, the non-volatile memory is reset. If the quiescent current returns to normal after the reset, step S2.3 is repeated. If the quiescent current does not return to normal after the reset, the non-volatile memory is restarted. If the quiescent current returns to normal after the restart, step S2.3 is repeated. If the quiescent current does not return to normal after the restart, the test is stopped. If the number of errors that occur during the readback is ≥ 1, perform multiple readings and count the error-related information. After reading, reset the non-volatile memory. If the chip returns to normal after the reset, repeat step S2.

3. If the error still exists after the reset, restart the operation. If the data returns to normal after the restart or the cumulative number of errors does not exceed the preset error number, repeat step S2.

3. If the error still exists after the restart and the cumulative number of errors exceeds the preset error number, stop the test; If the static current does not exceed the preset current value or the number of errors that occur during the readback statistics is 0, no operation is performed on the non-volatile memory and step S2.3 is repeated.

5. The single event effect test method of non-volatile memory according to claim 1, characterized in that: The step S3.4 determines whether to reset or restart the non-volatile memory according to the monitored dynamic current and error-related information, and repeats step S3.3 or stops the test, including: If the dynamic current is abnormal and exceeds the preset current value, stop irradiation, exit the continuous read cycle mode and perform a reset operation, re-enter the continuous read cycle instruction, if the dynamic current returns to normal, repeat step S3.3, if the dynamic current does not return to normal, restart the non-volatile memory and re-enter the continuous read instruction, if the dynamic current returns to normal, repeat step S3.3, if the dynamic current does not return to normal, stop the test; If the number of errors in a single cycle is 0 or ≥1 and the number of consecutive error cycles is ≤ the preset number of error cycles, no action will be taken; If the number of errors occurring in a single cycle is ≥ 1 and the number of consecutive error cycles is greater than the preset number of error cycles, stop irradiation, exit the continuous read cycle mode, re-enter the continuous read cycle instruction, and if the data returns to normal, continue with step S3.

3. If the error still exists, restart the non-volatile memory and re-enter the continuous read instruction. If the data returns to normal, continue with step S3.

3. If the error still exists, stop the test.

6. The single event effect test method of non-volatile memory according to claim 1, characterized in that: In the continuous read cycle mode, the method for outputting error-related information in real time is a region-by-region output method, specifically: for each data region of the first data graph, the error-related information of the first N bytes of each data region is output, where N is a positive integer.

7. The single event effect test method of non-volatile memory according to claim 1, characterized in that: The step S4.3 determines whether to reset or restart the non-volatile memory according to the monitored dynamic current and error-related information, and repeats step S4.2 or stops the test, including: If the dynamic current is abnormal and reaches the preset current value, stop irradiation, exit the write-read-read cycle mode, re-enter the write-read-read cycle command, and repeat step S4.2 if the current returns to normal. If the dynamic current is still abnormal, restart the non-volatile memory and re-enter the write-read-read cycle mode command. If the dynamic current returns to normal, repeat step S4.

2. If the dynamic current is still abnormal, stop the test; If the number of errors in a single cycle is 0 or ≥1 and the number of consecutive error cycles is ≤ the preset number of error cycles, no action will be taken; If the number of errors occurring in a single cycle is ≥ 1 and the number of consecutive error cycles is greater than the preset number of error cycles, stop irradiation, exit the write-read-read cycle mode, re-enter the write-read-read cycle instruction, and if the data returns to normal, continue with step S4.

2. If the error still exists, restart the non-volatile memory and re-enter the continuous read instruction. If the data returns to normal, continue with step S4.

2. If the error still exists, stop the test.

8. The single event effect test method of non-volatile memory according to claim 1, characterized in that: The write-read-read cycle mode is an operation of writing once and reading twice to the non-volatile memory, the data written twice are different, two data patterns are written alternately, namely the first data pattern and the second data pattern, the two consecutive reads need to be compared with the data pattern written in this cycle and error related information is output, and this process is repeated.

9. The single event effect test method of non-volatile memory according to claim 8, characterized in that: The second data pattern is that the first 1 / 2 page of the non-volatile memory is written with all "5A" data, the second 1 / 4 page is written with all "00" data, and the last 1 / 4 page is written with all "11" data.

10. The single event effect test method of non-volatile memory according to claim 1, characterized in that: In the continuous read cycle mode, the time interval of each read-back is the interval time of the maximum clock frequency that the non-volatile memory can reach; and / or In the write-read-read cycle mode, the time interval between each read-back or write is the time interval of the maximum clock frequency that the non-volatile memory can achieve.

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