Partition processing method for copper layer of circuit board and circuit board

Abstract

The invention provides a copper layer partition processing method of a circuit board and the circuit board. The copper layer partition processing method of the circuit board comprises the following steps: performing lamination processing on a to-be-laminated assembly to obtain a circuit board semi-finished product; wherein a conductive copper layer is formed on one end plate surface of the circuit board semi-finished product; performing partition processing on the conductive copper layer to divide the conductive copper layer into a high-current region and an impedance control region; wherein the high-current region is electrically connected with the impedance control region; performing dry film covering treatment on the high-current area; carrying out micro-etching copper reduction treatment on the impedance control region; and performing solder resist spraying treatment on the circuit board semi-finished product to obtain the circuit board. According to the copper layer partition processing method of the circuit board, the manufacturing difficulty of an electronic product is relatively low.

Description

Technical Field

[0001] The present disclosure relates to the technical field of circuit boards, and in particular, to a method for processing copper layer partitioning of a circuit board and a circuit board. Background Art

[0002] A circuit board is an electronic component that realizes electrical connection between electronic components by patterning and laying conductive copper foils on the surface of an insulating material. Circuit boards are widely used in electronic products, computers, new energy vehicles, medical devices, drones, aerospace and other fields. Circuit boards are obtained by using circuit board processing methods.

[0003] In the market, during the startup and acceleration of electronic products, a relatively large current is often required for driving, and impedance control is also required to realize information acquisition and transmission; as is well known, for a circuit board that needs to withstand a large current, a thick copper layer is used for the circuit board. However, since the greater the thickness of the copper layer, the higher the difficulty of impedance control of the circuit board; therefore, in the related art, the high-current (i.e., high-current) module and the impedance control module are usually split into two independent circuit board modules for processing to meet the requirements of compatibility between the high current and impedance control of electronic products.

[0004] However, with the increasing development of electronic products, the market has continuously increased the requirements for the precision of electronic products, making electronic products tend to be miniaturized, resulting in it being difficult for electronic products to have sufficient space to accommodate two or more circuit boards, making it difficult for electronic products to meet the requirements of compatibility between high current and impedance control, thus making the manufacturing difficulty of electronic products relatively high. Summary of the Invention

[0005] An object of the present disclosure is to overcome the deficiencies in the prior art and provide a method for processing copper layer partitioning of a circuit board and a circuit board that make the manufacturing difficulty of electronic products relatively low.

[0006] The object of the present disclosure is achieved by the following technical solutions:

[0007] A method for processing copper layer partitioning of a circuit board includes:

[0008] Performing lamination processing on a component to be laminated to obtain a semi-finished circuit board; wherein, one end surface of the semi-finished circuit board is formed with a conductive copper layer;

[0009] Performing partitioning processing on the conductive copper layer to divide it into a high-current area and an impedance control area; wherein, the high-current area is electrically connected to the impedance control area;

[0010] Performing dry film covering processing on the high-current area;

[0011] Performing micro-etching copper reduction processing on the impedance control area;

[0012] Perform solder mask spraying treatment on the semi-finished circuit board to obtain a circuit board.

[0013] In one embodiment, the steps of performing lamination treatment on the component to be laminated to obtain a semi-finished circuit board include: respectively cutting a copper clad laminate and a PP coil to obtain a plurality of substrates and a plurality of prepregs; performing inner layer circuit treatment on each of the substrates; performing lamination and positioning treatment on the plurality of substrates, the plurality of prepregs and copper foil to form the component to be laminated; and performing lamination treatment on the component to be laminated to obtain the semi-finished circuit board.

[0014] In one embodiment, the steps of performing inner layer circuit treatment on each of the substrates include: performing film pressing treatment on each of the substrates; performing exposure treatment on each of the substrates after film pressing; performing development treatment on each of the substrates after exposure; and performing inner layer circuit etching treatment on each of the substrates after development to form an inner layer circuit pattern.

[0015] In one embodiment, after the step of performing micro-etching and copper reduction treatment on the impedance control area, the method for copper layer zoning treatment of the circuit board further includes: performing film stripping treatment on the high current area; performing drilling treatment on the semi-finished circuit board to form through holes to be copper-plated; and performing chemical copper plating treatment on the through holes to be copper-plated to form copper-plated through holes.

[0016] In one embodiment, the step of performing drilling treatment on the semi-finished circuit board to form through holes to be copper-plated specifically is: using a drilling device to perform drilling treatment on the semi-finished circuit board to form through holes to be copper-plated.

[0017] In one embodiment, after the step of performing chemical copper plating treatment on the through holes to be copper-plated to form copper-plated through holes, the method for copper layer zoning treatment of the circuit board further includes: performing electroplating treatment on the semi-finished circuit board.

[0018] In one embodiment, the steps of performing electroplating treatment on the semi-finished circuit board include: performing acid pickling treatment on the semi-finished circuit board; performing full board electroplating treatment on the semi-finished circuit board after acid pickling; performing micro-etching treatment on the semi-finished circuit board after full board electroplating; performing tin plating treatment on the semi-finished circuit board after micro-etching; and performing pattern electroplating treatment on the semi-finished circuit board after tin plating.

[0019] In one embodiment, after the step of performing electroplating treatment on the semi-finished circuit board and before the step of performing solder mask spraying treatment on the semi-finished circuit board, the method for copper layer zoning treatment of the circuit board further includes: performing selective etching treatment on the semi-finished circuit board.

[0020] In one embodiment, the steps of performing selective etching treatment on the semi-finished circuit board include: performing dry film covering treatment on the impedance control area after micro-etching and copper reduction; performing first etching treatment on the high current area with etching parameters; performing stripping treatment on the impedance control area after micro-etching and copper reduction; and performing second etching treatment on the semi-finished circuit board with the etching parameters.

[0021] A circuit board is obtained by processing a copper layer of the circuit board using the copper layer zoning method of any of the above embodiments.

[0022] Compared with the prior art, the present disclosure has at least the following advantages:

[0023] The copper layer zoning method of the circuit board of the present disclosure first performs lamination treatment on the component to be laminated to obtain a semi-finished circuit board; a conductive copper layer is formed on one end surface of the semi-finished circuit board to make the thickness of the conductive copper layer on one end surface uniform; then, the conductive copper layer is zoned to be divided into a high current area and an impedance control area; the high current area is electrically connected to the impedance control area; then, dry film covering treatment is performed on the high current area so that the dry film covers the conductive copper layer in the high current area, thereby separating the conductive copper layer in the high current area from the conductive copper layer in the impedance control area by the dry film, and at the same time, the dry film wraps and protects the conductive copper layer in the high current area to avoid the problem that the micro-etching solution acts on the conductive copper layer in the high current area during the subsequent micro-etching and copper reduction treatment, so as to facilitate the subsequent micro-etching and copper reduction treatment; then, micro-etching and copper reduction treatment is performed on the impedance control area so that the micro-etching solution acts on the conductive copper layer in the impedance control area, and the conductive copper layer in the impedance control area is thinned under the action of the micro-etching solution, so that the thickness of the conductive copper layer in the impedance control area after micro-etching and copper reduction is less than the thickness of the conductive copper layer in the high current area, and the thickness of the conductive copper layer on one end surface becomes inconsistent under the action of the micro-etching and copper reduction treatment; then, solder mask spraying treatment is performed on the semi-finished circuit board so that the solder mask ink forms a protective film on the surface of the semi-finished circuit board to obtain a circuit board.

[0024] Since the thickness of the conductive copper layer in the impedance control area after micro-etching and copper reduction is less than the thickness of the conductive copper layer in the high current area, it not only meets the requirement of the thick copper layer of the circuit board for withstanding large currents, but also the thickness of the conductive copper layer in the impedance control area after micro-etching and copper reduction is relatively small, making the impedance control of the circuit board relatively easy, and also meeting the requirement of the thin copper layer of the circuit board for impedance control, so that the circuit board simultaneously meets the requirements of high current and impedance control compatibility. Therefore, applying the circuit board obtained by the copper layer zoning method of the circuit board to electronic products can enable the electronic products to meet the requirements of high current and impedance control compatibility, so that the electronic products meet the requirements of precision.

[0025] Since an electronic product can meet the requirements of high current and impedance control by using a single circuit board, the miniaturization of the electronic product is achieved, thus avoiding the problem in the prior art that it is difficult for an electronic product to have sufficient space to accommodate two or more circuit boards, and making it easier for an electronic product to have sufficient space to accommodate a single circuit board. That is to say, when the circuit board obtained by the copper layer zoning processing method of the present disclosure is applied to an electronic product, it is easier for the electronic product to meet the requirements of high current and impedance control, thereby making the manufacturing difficulty of the electronic product lower. Brief Description of the Drawings

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present disclosure, and thus should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0027] Figure 1 It is a flowchart of the copper layer zoning processing method of a circuit board for an embodiment. Detailed Embodiments

[0028] To facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure content of the present disclosure understood more thoroughly and comprehensively.

[0029] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or there can also be an intermediate element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intermediate element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are only for the purpose of illustration and do not represent the only implementation manner.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present disclosure belongs. The terms used in the specification of the present disclosure herein are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0031] The present disclosure provides a method for copper layer zoning treatment of a circuit board, including: performing lamination treatment on a component to be laminated to obtain a semi-finished circuit board; wherein, a conductive copper layer is formed on one end surface of the semi-finished circuit board; performing zoning treatment on the conductive copper layer to divide it into a high-current area and an impedance control area; wherein, the high-current area is electrically connected to the impedance control area; performing dry film covering treatment on the high-current area; performing micro-etching copper reduction treatment on the impedance control area; performing solder mask spraying treatment on the semi-finished circuit board to obtain a circuit board.

[0032] For the above method for copper layer zoning treatment of a circuit board, first, perform lamination treatment on the component to be laminated to obtain a semi-finished circuit board; a conductive copper layer is formed on one end surface of the semi-finished circuit board to make the thickness of the conductive copper layer on one end surface uniform; then, perform zoning treatment on the conductive copper layer to divide it into a high-current area and an impedance control area; the high-current area is electrically connected to the impedance control area; then, perform dry film covering treatment on the high-current area so that the dry film covers the conductive copper layer in the high-current area, thereby making the dry film used to separate the conductive copper layer in the high-current area from the conductive copper layer in the impedance control area, and at the same time, the dry film covers and protects the conductive copper layer in the high-current area to avoid the problem that the micro-etching solution in the subsequent micro-etching copper reduction treatment acts on the conductive copper layer in the high-current area, facilitating the subsequent micro-etching copper reduction treatment; then, perform micro-etching copper reduction treatment on the impedance control area so that the micro-etching solution acts on the conductive copper layer in the impedance control area, making the conductive copper layer in the impedance control area thinner under the action of the micro-etching solution, so that the thickness of the conductive copper layer in the impedance control area after micro-etching copper reduction is less than the thickness of the conductive copper layer in the high-current area, making the thickness of the conductive copper layer on one end surface inconsistent under the action of the micro-etching copper reduction treatment; then, perform solder mask spraying treatment on the semi-finished circuit board so that the solder mask ink forms a protective film on the surface of the semi-finished circuit board to obtain a circuit board;

[0033] Since the thickness of the conductive copper layer in the impedance control area after micro-etching copper reduction is less than the thickness of the conductive copper layer in the high-current area, it not only meets the requirement of the thick copper layer setting for the circuit board that can withstand large currents, but also the thickness of the conductive copper layer in the impedance control area after micro-etching copper reduction is relatively small, making the impedance control difficulty of the circuit board lower, and also meeting the requirement of the thin copper layer setting for the circuit board with impedance control, so that the circuit board simultaneously meets the requirements of high-current and impedance control compatibility. Therefore, applying the circuit board obtained by the method for copper layer zoning treatment of the circuit board to electronic products can enable the electronic products to meet the requirements of high-current and impedance control compatibility, so that the electronic products meet the requirements of precision;

[0034] Since a single circuit board can meet the requirements of high current and impedance control in electronic products, it makes the electronic products miniaturized, thus avoiding the problem in the prior art that it is difficult for electronic products to have sufficient space to accommodate two or more circuit boards, and making it easier for electronic products to have sufficient space to accommodate a single circuit board. That is to say, when the circuit board obtained by the copper layer zoning processing method of the present disclosure is applied to an electronic product, it is easier for the electronic product to meet the requirements of high current and impedance control compatibility, thereby reducing the manufacturing difficulty of the electronic product.

[0035] To better understand the technical solutions and beneficial effects of the present disclosure, the following further elaborates on the present disclosure in conjunction with specific embodiments:

[0036] As Figure 1 shown, a copper layer zoning processing method for a circuit board in an embodiment is used to obtain a circuit board. Further, the copper layer zoning processing method for the circuit board includes some or all of the following steps:

[0037] S101, perform a lamination process on the component to be laminated to obtain a circuit board semi-finished product; wherein, a conductive copper layer is formed on one end surface of the circuit board semi-finished product.

[0038] In this embodiment, a conductive copper layer is formed on one end surface of the circuit board semi-finished product to make the thickness of the conductive copper layer on one end surface uniform.

[0039] S103, perform a zoning process on the conductive copper layer to divide it into a high current area and an impedance control area; wherein, the high current area is electrically connected to the impedance control area.

[0040] In this embodiment, the conductive copper layer is zoned to be divided into a high current area and an impedance control area. At this time, the thickness of the conductive copper layer in the high current area is the same as that of the conductive copper layer in the impedance control area.

[0041] S105, perform a dry film covering process on the high current area.

[0042] In this embodiment, a dry film covering process is performed on the high current area, so that the dry film covers the conductive copper layer in the high current area, thereby separating the conductive copper layer in the high current area from the conductive copper layer in the impedance control area by the dry film, and at the same time, the dry film wraps and protects the conductive copper layer in the high current area to avoid the problem that the micro-etching solution in the subsequent micro-etching copper reduction process acts on the conductive copper layer in the high current area, facilitating the subsequent micro-etching copper reduction process. The range of the high current is I, I≥1.5A; therefore, the high current area is a copper layer area capable of passing a current carrying capacity ≥1.5A.

[0043] S107, perform a micro-etching copper reduction process on the impedance control area.

[0044] In this embodiment, a micro-etching copper reduction treatment is performed on the impedance control area, so that the micro-etching solution acts on the conductive copper layer in the impedance control area, and the conductive copper layer in the impedance control area is thinned under the action of the micro-etching solution, so that the thickness of the conductive copper layer in the impedance control area after the micro-etching copper reduction is less than the thickness of the conductive copper layer in the high-current area, making the thickness of the conductive copper layer on one end surface of the circuit board inconsistent under the action of the micro-etching copper reduction treatment. Further, the thickness of the conductive copper layer in the impedance control area after the micro-etching copper reduction is x, and the thickness of the conductive copper layer in the high-current area is y, where y≥2x, making the thickness of the conductive copper layer in the impedance control area after the micro-etching copper reduction less than the thickness of the conductive copper layer in the high-current area, meeting the requirement of the thin copper layer setting of the impedance-controlled circuit board, so that the circuit board simultaneously meets the requirements of high-current and impedance control compatibility; in this embodiment, x = 1 oz and y = 2 oz. The range of the current value flowing through the impedance control area is: 0.5 - 1 A.

[0045] S109, perform a solder mask spraying treatment on the circuit board semi-finished product to obtain a circuit board.

[0046] In this embodiment, a solder mask spraying treatment is performed on the circuit board semi-finished product, so that a solder mask ink forms a protective film on the surface of the circuit board semi-finished product to obtain a circuit board.

[0047] For the above copper layer zoning treatment method of the circuit board, first perform a lamination treatment on the component to be laminated to obtain a circuit board semi-finished product; a conductive copper layer is formed on one end surface of the circuit board semi-finished product, and the thickness of the conductive copper layer on one end surface is made consistent; then, perform a zoning treatment on the conductive copper layer to divide it into a high-current area and an impedance control area; the high-current area and the impedance control area are electrically connected; then, perform a dry film covering treatment on the high-current area, so that the dry film covers the conductive copper layer in the high-current area, so that the dry film is used to separate the conductive copper layer in the high-current area from the conductive copper layer in the impedance control area, and at the same time, the dry film wraps and protects the conductive copper layer in the high-current area, avoiding the problem that the micro-etching solution in the subsequent micro-etching copper reduction treatment acts on the conductive copper layer in the high-current area, facilitating the subsequent micro-etching copper reduction treatment; then, perform a micro-etching copper reduction treatment on the impedance control area, so that the micro-etching solution acts on the conductive copper layer in the impedance control area, and the conductive copper layer in the impedance control area is thinned under the action of the micro-etching solution, so that the thickness of the conductive copper layer in the impedance control area after the micro-etching copper reduction is less than the thickness of the conductive copper layer in the high-current area, making the thickness of the conductive copper layer on one end surface inconsistent under the action of the micro-etching copper reduction treatment; then, perform a solder mask spraying treatment on the circuit board semi-finished product, so that a solder mask ink forms a protective film on the surface of the circuit board semi-finished product to obtain a circuit board;

[0048] Since the thickness of the conductive copper layer in the impedance control area after micro-etching and copper reduction is less than that in the high-current area, it not only meets the requirement of setting a thick copper layer for a circuit board that can withstand high currents, but also, due to the relatively small thickness of the conductive copper layer in the impedance control area after micro-etching and copper reduction, the difficulty of impedance control for the circuit board is relatively low, which also meets the requirement of setting a thin copper layer for a circuit board with impedance control. As a result, the circuit board meets the requirement of compatibility between high current and impedance control. Therefore, applying the circuit board obtained by the method of partitioning the copper layer of the circuit board to electronic products can enable the electronic products to meet the requirement of compatibility between high current and impedance control, so as to make the electronic products meet the requirement of precision.

[0049] Since a single circuit board of an electronic product can meet the requirement of compatibility between high current and impedance control, the electronic product is miniaturized, thus avoiding the problem in the prior art that it is difficult for an electronic product to have sufficient space to accommodate two or more circuit boards, and making it easier for the electronic product to have sufficient space to accommodate a single circuit board. That is to say, when the circuit board obtained by the method of partitioning the copper layer of the circuit board of the present disclosure is applied to an electronic product, it is easier for the electronic product to meet the requirement of compatibility between high current and impedance control, thereby reducing the manufacturing difficulty of the electronic product.

[0050] In one embodiment, the steps of performing lamination processing on a component to be laminated to obtain a circuit board semi-finished product include: First, respectively perform cutting processing on a copper clad laminate and a PP (Polypropylene) coil to obtain a plurality of substrates and a plurality of prepregs, that is, perform cutting processing on the copper clad laminate to obtain a plurality of substrates, and each substrate provides mechanical support; then perform cutting processing on the PP coil to obtain a plurality of prepregs, and each prepreg plays a bonding role to improve the reliability of the circuit board; then perform inner layer circuit processing on each of the substrates to improve the signal transmission speed of the circuit board; then perform lamination and positioning processing on the plurality of substrates, the plurality of prepregs and copper foil to form the component to be laminated, that is, place at least one prepreg between two adjacent substrates, and the copper foil is laminated on the topmost substrate, that is, the copper foil is located on the topmost substrate to form the component to be laminated. In this way, when laminating, each prepreg can be melted to fill the gap between two adjacent substrates, which is used to ensure the tight combination between two adjacent substrates, making the structural strength of the circuit board relatively high; then perform lamination processing on the component to be laminated to obtain the circuit board semi-finished product, and the copper foil is laminated on one end surface of the component to be laminated to form a conductive copper layer. Since the thickness of the copper foil used during lamination processing is the same on the same surface, the thickness of the conductive copper layer on one end surface is consistent.

[0051] In one embodiment, the steps of performing inner layer circuit processing on each of the substrates include: First, perform a film pressing process on each of the substrates so that the dry film completely covers the surface of each substrate; then, perform an exposure process on each of the substrates after film pressing, and transfer a predetermined circuit pattern to each substrate through a photochemical reaction to form the required circuit pattern; then, perform a developing process on each of the substrates after exposure, and use a developer to wash away the dry film that has not been exposed to ensure the accuracy of the circuit pattern; then, perform an inner layer circuit etching process on each of the substrates after developing, and use an etching solution to remove the copper layer without dry film protection to form an inner layer circuit pattern and improve the electrical connection reliability of the circuit board.

[0052] In one embodiment, after the step of performing micro-etching copper reduction treatment on the impedance control area, the method for processing the copper layer partition of the circuit board further includes: First, perform a film stripping process on the high current area to remove the dry film for subsequent processing; then, perform a drilling process on the semi-finished circuit board to form a through-hole to be copper-plated to achieve the basic function of electrical connection between different layers of the circuit board; then, perform a chemical copper plating process on the through-hole to be copper-plated to form a copper-plated through-hole, and coat the hole wall of the through-hole to be copper-plated with a copper layer to form a copper-plated through-hole, realizing the electrical connection between the circuit patterns on the inner and outer layers of the circuit board and improving the electrical connection reliability of the circuit board.

[0053] In one embodiment, the step of performing a drilling process on the semi-finished circuit board to form a through-hole to be copper-plated specifically is: Use a drilling device to perform a drilling process on the semi-finished circuit board to form a through-hole to be copper-plated. In this embodiment, the drilling device is a drilling machine. Using the drilling device to perform a drilling process on the semi-finished circuit board improves the processing efficiency of the circuit board.

[0054] In one embodiment, after the step of performing a chemical copper plating process on the through-hole to be copper-plated to form a copper-plated through-hole, the method for processing the copper layer partition of the circuit board further includes: Perform an electroplating process on the semi-finished circuit board, and coat a layer of electroplating layer on the copper layer of the hole wall of the copper-plated through-hole to prevent the copper layer from oxidizing.

[0055] In one embodiment, the steps of electroplating the semi-finished circuit board include: First, perform acid pickling on the semi-finished circuit board to remove the oxide on the board surface and activate the board surface; After that, perform full-panel electroplating on the semi-finished circuit board after acid pickling, and deposit a layer of electroplated layer on the copper layer of the via hole wall of the copper deposition through hole to prevent the copper layer from oxidizing; After that, perform micro-etching on the semi-finished circuit board after full-panel electroplating to increase the adhesion of the electroplated layer for subsequent processing; After that, perform tin plating on the semi-finished circuit board after micro-etching to enhance the soldering performance of the circuit board; After that, perform pattern electroplating on the semi-finished circuit board after tin plating to deposit a layer of electroplated layer on the copper layer of the circuit pattern to improve the conductivity of the circuit board.

[0056] In one embodiment, after the steps of electroplating the semi-finished circuit board and before the steps of solder mask spraying on the semi-finished circuit board, the method for partitioning the copper layer of the circuit board further includes: performing selective etching on the semi-finished circuit board to improve the electrical connection reliability of the circuit board.

[0057] In one embodiment, the steps of performing selective etching on the semi-finished circuit board include: First, perform dry film covering on the impedance control area after micro-etching and copper reduction to separate the impedance control area from the high-current area for subsequent processing; After that, perform the first etching on the high-current area with the etching parameters so that the conductive copper layer in the high-current area is etched under the etching parameters of the etching solution; After that, perform film stripping on the impedance control area after micro-etching and copper reduction to remove the dry film; After that, perform the second etching on the semi-finished circuit board with the etching parameters. Under the etching parameters of the etching solution, the conductive copper layer in the high-current area has been etched and will not be etched again. In the second etching process, the etching solution only acts on the conductive copper layer in the impedance control area under the etching parameters to complete the etching of the conductive copper layer in the impedance control area, so that the etching parameters of the conductive copper layer in the impedance control area are the same as those of the conductive copper layer in the high-current area, which is convenient for controlling the etching degree of the circuit board and making the etching uniformity of the circuit board better.

[0058] In this embodiment, under the action of the same etching solution, the etching parameters of copper layers with different thicknesses are inconsistent. Therefore, the staff can select the corresponding etching parameters according to the required copper layer thickness. For example, when the copper layer thickness is 1 oz to 2 oz, the etching rate is 3.0 to 5.0 m / min.

[0059] Further, in one of the embodiments, the steps of performing solder mask spraying on the semi-finished circuit board include: performing solder mask spraying on the semi-finished circuit board to form a solder mask layer in the gaps of the semi-finished circuit board; performing surface treatment on the conductive copper layer and the solder mask layer to form a solder paste layer on the conductive copper layer. In this embodiment, after the conductive copper layer is formed, in order to reduce the short circuit between the circuits in the conductive copper layer, a solder mask layer is provided in the gaps of the conductive copper layer. The solder mask layer is a glue layer with insulating properties to avoid short circuits inside the outer layer circuits. And the surface treatment is to treat the conductive copper layer to form a solder paste layer on the conductive copper layer, so that the conductive copper layer is covered with solder paste, improving the conductivity and solderability of the solder pads of the circuit board.

[0060] In order to reduce the short circuit probability of the inner layer circuits of the produced circuit board, that is, to reduce the scrap probability of the circuit board, before the step of performing lamination treatment on each of the substrates, the copper layer zoning method of the circuit board further includes:

[0061] First, perform drilling on each substrate to form blind holes;

[0062] After that, obtain the illumination reflection time of the blind holes on each substrate;

[0063] After that, compare the illumination reflection time with a preset reflection time to obtain a reflection error value; specifically, perform a subtraction operation on the illumination reflection time and the preset reflection time.

[0064] After that, determine whether the reflection error value is outside the deviation threshold; if so, send a defective product alarm signal to the monitoring system.

[0065] In this embodiment, the deviation threshold is -0.01 s to 0.01 s. The illumination reflection time is obtained by an infrared emission and reception receiver. That is, the output end of the infrared emission and reception receiver is aligned with the blind hole of each substrate, and infrared light is emitted to the bottom of the blind hole. According to the time when the reflected infrared light is received, it is determined whether the blind hole penetrates the substrate. When the blind hole does not penetrate the substrate, the blind hole has a bottom on the substrate. The infrared light emitted by the output end of the infrared emission and reception receiver returns along the original path after hitting the bottom of the blind hole, that is, the infrared emission and reception receiver receives the reflected infrared light. When the blind hole penetrates the substrate, the infrared emission and reception receiver cannot receive the reflected infrared light, that is, the illumination reflection time is infinite at this time. Among them, the preset reflection time is the reflection time when the infrared emission and reception receiver receives the reflected infrared light on one side of the substrate while the other side of the substrate serves as the bottom of the blind hole. In this way, by comparing the illumination reflection time with the preset reflection time, a reflection error value is obtained, and the reflection error value is the determined reflection time difference of the infrared light, which is convenient for determining whether the blind hole is penetrated. When the reflection error value is greater than 0.01 s, it indicates that the reflection time of the infrared light is greater than the preset reflection time, that is, it indicates that the bottom of the blind hole is outside the substrate, which also means that the blind hole penetrates the substrate. The circuit board at this time is an unqualified circuit board and cannot be used as a normal circuit board. By sending a defective product alarm signal to the monitoring system, it is convenient for the monitoring system to detect unqualified circuit boards in time, so as to facilitate the timely removal of unqualified products and improve the qualification rate of the circuit board.

[0066] Furthermore, in one embodiment, before the step of performing solder mask spraying treatment on the semi-finished circuit board, the method for partitioning the copper layer of the circuit board further includes: performing copper plating treatment on the conductive copper layer to form an outer layer circuit pattern, so that the electrical connection reliability of the circuit board is better.

[0067] Further, in one embodiment, the step of performing copper plating treatment on the conductive copper layer includes: first, a dry film is set on the conductive copper layer; then, the conductive copper layer is etched; then, the dry film on the conductive copper layer is removed to form an outer layer circuit pattern. In this embodiment, the dry film covers the conductive copper layer and selects the etching area of the conductive copper layer, which is convenient for forming the required outer layer circuit pattern on the conductive copper layer. Among them, the dry film has the property of anti-etching. That is, during the etching process of the conductive copper layer, the conductive copper layer covered by the dry film will be retained, while the conductive copper layer not covered by the dry film will be etched and removed by the cleaning solution, so that an outer layer circuit pattern with a specified pattern shape is etched on the final conductive copper layer.

[0068] Further, in one embodiment, after the step of acid leaching the semi-finished circuit board, and before the step of full-panel electroplating the acid-leached semi-finished circuit board, the method for copper layer zoning treatment of the circuit board further includes: performing electroless copper plating on the semi-finished circuit board to form a first copper layer on the semi-finished circuit board.

[0069] Further, perform full-panel electroplating on the semi-finished circuit board to form a second copper layer on the first copper layer, so that the second copper layer overlaps and covers the surface of the first copper layer, so that the semi-finished circuit board meets the finished product requirements through three steps of electroless copper plating, full-panel electroplating, and pattern electroplating, making the electrical connection reliability of the circuit board better.

[0070] Furthermore, in one embodiment, after the step of copper plating on the conductive copper layer, the method for copper layer zoning treatment of the circuit board further includes: performing character processing on the semi-finished circuit board.

[0071] In this embodiment, performing character processing on the semi-finished circuit board means printing character marks and cutting alignment lines on the semi-finished circuit board. When printing the character marks, the cutting alignment lines are formed synchronously, without the need to separately design the forming process of the cutting alignment lines, simplifying the overall process of the circuit board, and at the same time facilitating the subsequent sub-board processing process of the circuit board. It can be understood that the character marks can be characters such as resistors, capacitors, or positive and negative poles. Further, the number of cutting alignment lines is multiple, and the multiple cutting alignment lines are distributed in a grid pattern. The multiple cutting alignment lines include M horizontal cutting alignment lines and N vertical cutting alignment lines. The M horizontal cutting alignment lines are arranged side by side at intervals, and the N vertical cutting alignment lines are arranged side by side at intervals. Each horizontal cutting alignment line has an intersection point with the N vertical cutting alignment lines respectively, and each longitudinal cutting alignment line has an intersection point with the M vertical cutting alignment lines respectively, making the division of the board body to be sub-divided by the cutting alignment lines clearer, improving the convenience and processing accuracy of the sub-board processing of the circuit board, and also facilitating accurately identifying the contour of the cutting alignment lines during subsequent sub-boarding.

[0072] Further, after the step of performing character processing on the semi-finished circuit board, the method for copper layer zoning treatment of the circuit board further includes: identifying the cutting alignment lines of the semi-finished circuit board; then performing pre-drilling processing on the peripheral part of the semi-finished circuit board according to the cutting alignment lines to process pre-drilled holes on the semi-finished circuit board, and the cutting alignment lines also pass through the centers of the pre-drilled holes; then performing V-cut sub-boarding on the semi-finished circuit board along the cutting alignment lines.

[0073] In this embodiment, the cutting alignment line of the semi-finished circuit board is identified, that is, the process of finding the cutting alignment line of the semi-finished circuit board. It can be understood that the identification of the cutting alignment line of the semi-finished circuit board can be carried out by manual visual inspection or by machine acquisition and identification, such as using a CCD camera or a CMOS camera for acquisition and identification. Then, pre-drilling is performed on the peripheral edge of the semi-finished circuit board according to the cutting alignment line, that is, pre-drilling is performed at the intersection point of the cutting alignment line and the peripheral edge of the semi-finished circuit board, that is, pre-drilled holes are processed on the semi-finished circuit board through the cutting alignment line. Then, the semi-finished circuit board is V-cut along the cutting alignment line to obtain at least two sub-boards, which is easy to realize automatic board splitting.

[0074] The present disclosure also provides a circuit board obtained by processing the copper layer of the circuit board in any of the above embodiments.

[0075] Compared with the prior art, the present disclosure has at least the following advantages:

[0076] In the copper layer zoning processing method of the circuit board of the present disclosure, first, the component to be laminated is laminated to obtain a semi-finished circuit board; a conductive copper layer is formed on one end surface of the semi-finished circuit board, so that the thickness of the conductive copper layer on one end surface is consistent; then, the conductive copper layer is zoned to be divided into a high-current area and an impedance control area; the high-current area is electrically connected to the impedance control area; then, a dry film covering process is performed on the high-current area, so that the dry film covers the conductive copper layer in the high-current area, so that the dry film is used to separate the conductive copper layer in the high-current area from the conductive copper layer in the impedance control area, and at the same time, the dry film coats and protects the conductive copper layer in the high-current area, avoiding the problem that the micro-etching solution acts on the conductive copper layer in the high-current area during the subsequent micro-etching copper reduction process, so as to facilitate the subsequent micro-etching copper reduction process; then, a micro-etching copper reduction process is performed on the impedance control area, so that the micro-etching solution acts on the conductive copper layer in the impedance control area, so that the conductive copper layer in the impedance control area is thinned under the action of the micro-etching solution, so that the thickness of the conductive copper layer in the impedance control area after micro-etching copper reduction is less than the thickness of the conductive copper layer in the high-current area, so that the thickness of the conductive copper layer on one end surface is inconsistent under the action of the micro-etching copper reduction process; then, a solder mask spraying process is performed on the semi-finished circuit board, so that the solder mask ink forms a protective film on the surface of the semi-finished circuit board to obtain a circuit board.

[0077] Since the thickness of the conductive copper layer in the impedance control area after micro-etching and copper reduction is less than that in the high-current area, it not only meets the requirement of the thick copper layer for the circuit board that can withstand high current, but also the thickness of the conductive copper layer in the impedance control area after micro-etching and copper reduction is relatively small, making the impedance control of the circuit board easier, and also meeting the requirement of the thin copper layer for the impedance control circuit board. Thus, the circuit board obtained by the copper layer zoning treatment method of the circuit board can meet the requirements of high current and impedance control compatibility when applied to electronic products, enabling the electronic products to meet the requirements of precision.

[0078] Since a single circuit board of the electronic product can meet the requirements of high current and impedance control compatibility, it makes the electronic product miniaturized, thus avoiding the problem in the prior art that it is difficult for the electronic product to have sufficient space to accommodate two or more circuit boards, and making it easier for the electronic product to have sufficient space to accommodate a single circuit board. That is to say, when the circuit board obtained by the copper layer zoning treatment method of the present disclosure is applied to the electronic product, it makes it easier for the electronic product to meet the requirements of high current and impedance control compatibility, thus reducing the manufacturing difficulty of the electronic product.

[0079] The above embodiments only represent several implementation manners of the present disclosure, and the description thereof is relatively specific and detailed, but it should not be construed as a limitation to the scope of the disclosed patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present disclosure, several modifications and improvements can still be made, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure patent shall be subject to the appended claims.

Claims

1. A method for processing the copper layer of a circuit board by partitioning, characterized in that: include: Performing a pressing process on the components to be pressed to obtain a semi-finished circuit board; wherein a conductive copper layer is formed on one end surface of the semi-finished circuit board; The conductive copper layer is partitioned into a high current area and an impedance control area; wherein the high current area is electrically connected to the impedance control area; Performing dry film covering treatment on the high current area; Performing micro-etching and copper reduction treatment on the impedance control area; The semi-finished circuit board is subjected to solder resist spraying treatment to obtain a circuit board.

2. The method for processing the copper layer of a circuit board according to claim 1, characterized in that: The steps of pressing the components to be pressed to obtain a semi-finished circuit board include: The copper clad laminate and the PP coil are cut respectively to obtain a plurality of substrates and a plurality of prepregs; Performing inner layer circuit processing on each of the substrates; Performing stacking and positioning processing on the plurality of substrates, the plurality of prepregs and the copper foil to form the assembly to be pressed; The components to be pressed are pressed to obtain the semi-finished circuit board.

3. The method for processing the copper layer of a circuit board according to claim 2, characterized in that: The step of performing inner layer circuit processing on each substrate comprises: Performing lamination treatment on each of the substrates; performing exposure processing on each of the substrates after lamination; Performing a development process on each of the exposed substrates; The inner layer circuit etching process is performed on each of the developed substrates to form an inner layer circuit pattern.

4. The method for processing the copper layer of a circuit board according to claim 1, characterized in that: After the step of performing micro-etching and copper reduction treatment on the impedance control area, the copper layer zoning treatment method of the circuit board further includes: Performing film stripping treatment on the high current area; Drilling the semi-finished circuit board to form through holes to be copper-plated; The through hole to be copper-plated is subjected to chemical copper plating treatment to form a copper-plated through hole.

5. The method for processing the copper layer of a circuit board according to claim 4, characterized in that: The steps of drilling the semi-finished circuit board to form through holes to be copper-plated are as follows: The semi-finished circuit board is drilled by using a drilling device to form through holes to be deposited with copper.

6. The method for processing the copper layer of a circuit board according to claim 4, characterized in that: After the step of performing chemical copper deposition treatment on the through hole to be copper deposited to form the copper deposited through hole, the copper layer partitioning treatment method of the circuit board further includes: The semi-finished circuit board is electroplated.

7. The method for processing the copper layer of a circuit board according to claim 6, characterized in that: The step of electroplating the semi-finished circuit board comprises: Performing acid leaching treatment on the semi-finished circuit board product; Performing full-board electroplating treatment on the semi-finished circuit board after acid immersion; Performing micro-etching treatment on the semi-finished circuit board after full-board electroplating; Performing tin plating on the semi-finished circuit board after micro-etching; The tin-plated semi-finished circuit board is subjected to pattern electroplating treatment.

8. The method for processing the copper layer of a circuit board according to claim 6, characterized in that: After the step of electroplating the semi-finished circuit board, and before the step of spraying the semi-finished circuit board with solder resist, the method for zoning the copper layer of the circuit board further includes: The semi-finished circuit board product is selectively etched.

9. The method for processing the copper layer of a circuit board according to claim 8, characterized in that: The step of selectively etching the semi-finished circuit board comprises: Performing dry film covering treatment on the impedance control area after micro-etching and copper reduction; Performing a first etching process on the high current region using etching parameters; Performing film stripping treatment on the impedance control area after micro-etching and copper reduction; The etching parameters are used to perform a second etching process on the semi-finished circuit board product.

10. A circuit board, characterized in that: The copper layer of the circuit board is processed by the partitioning processing method of any one of claims 1 to 9.

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