Anti-eos high-performance LED epitaxial structure and preparation method thereof

Abstract

The application relates to the technical field of semiconductors, in particular to an anti-EOS high-performance LED epitaxial structure and a preparation method thereof. The epitaxial structure comprises a substrate, a buffer layer, a non-doped UGaN layer, a high-resistance SiC transition layer, an N-type GaN layer, a SiC / AlN / AlGaN superlattice layer, a multi-quantum well (MQW) active layer, a P-type AlGaN layer and a P-type GaN layer which are sequentially grown on the substrate. The high-resistance SiC transition layer is inserted below the N-type GaN layer, a high-resistance area is introduced in the current path, so as to limit the current peak value; the SiC / AlN / AlGaN superlattice layer is inserted below the MQW layer, the stress buffer effect and the interface optimization characteristics of the superlattice structure are utilized, the transient current peak value is effectively inhibited, the uniformity of the current distribution is improved, the anti-EOS capability of the LED is remarkably improved, the defect density is reduced, and the reliability of the device is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to an EOS-resistant high-performance LED epitaxial structure and its fabrication method. Background Technology

[0002] LED devices are susceptible to electrical overstress (EOS) damage in practical applications, leading to increased leakage current, decreased luminous efficacy, or even permanent failure. Traditional solutions typically mitigate EOS problems by optimizing electrode structure, adding protection circuits, or improving material doping processes, but these methods suffer from drawbacks such as complex processes, high costs, or limited effectiveness.

[0003] Existing LED epitaxial structures typically consist of a substrate, a buffer layer, an NGAN layer, and an MQW active layer.

[0004] Composed of PGAN layers (such as) Figure 1 (As shown). There is a lack of research on improving the performance of EOS.

[0005] Traditional LED epitaxial structures lack effective current limiting mechanisms, making it difficult to suppress transient current peaks. Existing current limiting layer designs (such as high-resistivity GaN layers) often lead to increased device resistance, affecting luminous efficiency, and lack comprehensive consideration for thermal management and current uniformity, resulting in insufficient device reliability. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention proposes a high-performance LED epitaxial structure resistant to EOS and its fabrication method, thereby enhancing EOS resistance.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] An EOS-resistant high-performance LED epitaxial structure includes a substrate on which a buffer layer, an undoped UGaN layer, a high-resistivity SiC transition layer, an N-type GaN layer, a SiC / AlN / AlGaN superlattice layer, a multi-quantum-well active layer, a P-type AlGaN layer, and a P-type GaN layer are sequentially grown.

[0009] Preferably, the substrate is sapphire, SiC, or Si.

[0010] Preferably, the buffer layer is low-temperature AlN or GaN.

[0011] Preferably, the thickness of the high-resistivity SiC transition layer is 15 nm.

[0012] Preferably, the SiC layer in the superlattice layer has a thickness of 1-5 nm, the AlN layer has a thickness of 1-3 nm, and the AlGaN layer has a thickness of 3-10 nm; the total thickness of the superlattice layer is 50-300 nm.

[0013] Furthermore, the SiC / AlN / AlGaN superlattice layer has 5-30 periods.

[0014] Preferably, the SiC / AlN / AlGaN superlattice layer has 10-20 periods.

[0015] A method for fabricating an EOS-resistant high-performance LED epitaxial structure specifically includes the following steps:

[0016] Step 1: Provide a substrate;

[0017] Step 2: Grow a buffer layer and an undoped UGaN layer sequentially on the substrate;

[0018] Step 3: Grow a high-resistivity SiC transition layer on the undoped UGaN layer; the growth temperature is controlled at 800-1000℃, the pressure is 200-500 Torr, and the doping concentration is 1E18-5E19 cm⁻³ for the SiC layer doped with carbon or silicon.

[0019] Step 4: Grow an N-type GaN layer on the high-resistivity SiC transition layer;

[0020] Step 5: Grow a SiC / AlN / AlGaN superlattice layer on the N-type GaN layer; the SiC layer is doped with carbon or silicon at a concentration of 1E18-5E19 cm⁻³; the AlGaN layer is doped with silicon or magnesium at a concentration of 5E17-1E19 cm⁻³; the growth temperature is controlled at 900-1100℃ and the pressure at 200-500 Torr; the composition of each layer is precisely controlled by adjusting the flow rates of Al source, Ga source, NH3 and SiH4.

[0021] Step 6: Grow a multi-quantum-well active layer, a P-type AlGaN layer, and a P-type GaN layer sequentially on the SiC / AlN / AlGaN superlattice layer.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] This invention inserts a high-resistivity SiC transition layer below the NGaN layer to introduce a high-resistivity region in the current path, thereby limiting the current peak. It also inserts a SiC / AlN / AlGaN superlattice layer below the MQW layer. Through the stress buffering effect and interface optimization characteristics of the superlattice structure, it effectively suppresses transient current peaks, improves the uniformity of current distribution, significantly enhances the LED's resistance to EOS, and reduces defect density, thereby improving device reliability. Attached Figure Description

[0024] Figure 1 This is a diagram of the existing extensional structure.

[0025] Figure 2 This is a diagram of the extensional structure of the present invention. Detailed Implementation

[0026] To further illustrate the technical means and effects of the present invention in achieving its intended purpose, the following detailed description of the specific implementation methods, structures, features, and effects of the present invention, in conjunction with the accompanying drawings and preferred embodiments, is provided below.

[0027] like Figure 2 As shown, the present invention discloses an EOS-resistant high-performance LED epitaxial structure, wherein a buffer layer (such as low-temperature AlN or GaN) and an undoped U are sequentially grown on a substrate (such as sapphire, SiC, or Si). - GaN layer, high-resistivity SiC transition layer, N - GaN layer, SiC / AlN / AlGaN superlattice layer, MQW active layer, P - AlGaN layer, P - GaN layer.

[0028] Design mechanism and growth conditions of this invention:

[0029] 1. High-resistivity SiC transition layer:

[0030] Silicon carbide (SiC) is a wide bandgap semiconductor material whose high resistivity effectively restricts current flow. Placing a SiC transition layer at the bottom of an n-type GaN layer effectively introduces a high-resistivity region into the current path, thereby limiting the current peak. Its high thermal conductivity aids in heat dissipation and improves device thermal management. Its high breakdown field strength enables it to withstand high voltages, improving the device's breakdown voltage capability. Since SiC and GaN have similar lattice constants, optimizing the interface quality between SiC and GaN reduces the interface state density, thus mitigating the negative impact of the current-limiting layer on device performance.

[0031] The SiC layer thickness is 15 nm, the growth temperature is controlled at 800-1000℃, the pressure is 200-500 Torr, and the doping concentration is 1E18-5E19 cm⁻³, with carbon (C) or silicon (Si) doped into the SiC layer.

[0032] 2. SiC / AlN / AlGaN superlattice current-spreading layer:

[0033] The high resistance of the SiC layer effectively limits the current peak and prevents EOS damage; the high thermal conductivity of the AlN layer helps dissipate heat and reduce the device operating temperature; the AlGaN layer modulates the band structure and improves the uniformity of current distribution. By comprehensively improving current limiting, thermal management and uniformity, the reliability and lifespan of the device are significantly improved.

[0034] Specific parameters of the superlattice layer: Single-period structure: composed of SiC layer (thickness 1-5 nm), AlN layer (thickness 1-3 nm), and Al(x)Ga(1-x)N layer (x=0.2-0.8, thickness 3-10 nm); number of periods: 10-15; total superlattice thickness: 50-300 nm. Doping concentration: SiC layer is doped with carbon (C) or silicon (Si), concentration 1E18-5E19 cm⁻³; AlGaN layer is doped with silicon (Si) or magnesium (Mg), concentration 5E17-1E19 cm⁻³. Growth temperature is controlled at 900-1100℃, pressure at 200-500 Torr; precise control of the composition of each layer is achieved by adjusting the flow rates of Al source, Ga source, NH3, and SiH4; gradient growth or interrupted growth method is used at the superlattice interface to reduce interface defects.

Claims

1. An anti-EOS high performance LED epitaxial structure comprising a substrate, characterized in that: A buffer layer, an undoped UGaN layer, a high-resistivity SiC transition layer, and an N-type GaN layer are sequentially grown on a substrate; a SiC / AlN / AlGaN superlattice layer, a multi-quantum-well active layer, a P-type AlGaN layer, and a P-type GaN layer are also grown. The high-resistivity SiC transition layer has a thickness of 15 nm, and the SiC layer in the superlattice layer has a thickness of 1-5 nm, the AlN layer has a thickness of 1-3 nm, and the AlGaN layer has a thickness of 3-10 nm. The total thickness of the superlattice layer is 50-300 nm.

2. A high performance LED epitaxial structure against EOS according to claim 1, characterized in that: The substrate is sapphire, SiC, or Si.

3. The anti-EOS high performance LED epitaxial structure of claim 1, wherein: The buffer layer is made of low-temperature AlN or GaN.

4. The anti-EOS high performance LED epitaxial structure of claim 1, wherein: The SiC / AlN / AlGaN superlattice layer has 5-30 periods.

5. An anti-EOS high performance LED epitaxial structure according to claim 4, wherein: The SiC / AlN / AlGaN superlattice layer has 10-20 periods.

6. A method for fabricating an EOS-resistant high-performance LED epitaxial structure, specifically comprising the following steps: Step 1: Provide a substrate; Step 2: Grow a buffer layer and an undoped UGaN layer sequentially on the substrate; Step 3: Grow a high-resistivity SiC transition layer on the undoped UGaN layer; the growth temperature is controlled at 800-1000℃, the pressure is 200-500 Torr, and the doping concentration is 1E18-5E19 cm⁻³ for the SiC layer doped with carbon or silicon. Step 4: Grow an N-type GaN layer on the high-resistivity SiC transition layer; Step 5: Grow a SiC / AlN / AlGaN superlattice layer on the N-type GaN layer; the SiC layer is doped with carbon or silicon at a concentration of 1E18-5E19 cm⁻³; the AlGaN layer is doped with silicon or magnesium at a concentration of 5E17-1E19 cm⁻³; the growth temperature is controlled at 900-1100℃ and the pressure at 200-500 Torr; the composition of each layer is precisely controlled by adjusting the flow rates of Al source, Ga source, NH3 and SiH4. Step 6: Grow a multi-quantum-well active layer, a P-type AlGaN layer, and a P-type GaN layer sequentially on the SiC / AlN / AlGaN superlattice layer.

Images