Power supply detection circuit and electronic product
By using the reference module and transistor conversion module in the power supply detection circuit to generate the reference voltage and directly compare it with the power supply voltage, the problems of high power consumption and large area in the prior art are solved, and the power supply detection with low power consumption and high precision is achieved, which reduces the area consumption of the resistor string and improves the accuracy of the flip threshold.
Patent Information
- Application Number
- CN202510222122.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-27
- Publication Date
- 2025-07-01
AI Technical Summary
The existing power detection circuit has high power consumption and large area, making it difficult to take into account both power consumption and area.
The first reference module, the first voltage conversion module, the operational amplifier, the second voltage conversion module, the voltage detection module and the comparison module are adopted to generate a reference voltage through the transistor gate source voltage and directly compare it with the power supply voltage to avoid voltage division using resistor strings.
It realizes low power consumption and high precision power detection, reduces the area consumption of the resistor string, and improves the accuracy of the flip threshold, which is insensitive to changes in temperature and process angles.
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Figure CN120233268A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of integrated circuit design, and in particular to a power supply detection circuit and an electronic product. Background Art
[0002] In a mixed-signal integrated circuit system, it is necessary to monitor the power supply or other voltage signals that may fluctuate. The power-on reset circuit (POR) and the brownout detection circuit (BOD) are common voltage monitoring methods. Among them, the power-on reset circuit outputs a low level (or high level) when the voltage is less than a specific value. As the voltage rises, when it is greater than the value, it outputs a high level (or low level) as a digital reset signal; the power-off detection circuit outputs a high level (or low level) when the voltage is greater than a set value. As the voltage drops, when the voltage value is less than the set value, it outputs a low level (or high level).
[0003] Normally, the power supply detection with accurate threshold is to add the power supply voltage to a set of resistor strings, divide the voltage, send the voltage obtained by the voltage division to the comparator and compare it with a reference voltage. When the voltage division reaches the reference voltage, it can be considered that the power supply voltage has reached the corresponding flip threshold and output the corresponding level. The problem with this is that the resistor string consumes a lot of static power and consumes a lot of area.
[0004] In order to solve this problem, a switch control component and a voltage latch circuit are added to the above solution. When the power supply voltage is detected to be powered on or power-off detection is completed, the connection between the voltage divider resistor string and the power supply voltage is disconnected to save power consumption, and the latch is used to maintain the output signal of the corresponding level. Although the resistor string is turned off after the detection is completed, saving this part of power consumption, the problem of the large area of the resistor string cannot be completely solved.
[0005] Therefore, how to balance power consumption and area in a power detection circuit has become one of the problems that technical personnel in this field need to solve urgently.
[0006] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention
[0007] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a power detection circuit and an electronic product, which are used to solve the problems of high power consumption and large area of the power detection circuit in the prior art.
[0008] To achieve the above and other related objectives, the present invention provides a power supply detection circuit, which at least includes:
[0009] A first reference module, a first voltage conversion module, a second voltage conversion module, an operational amplifier, a voltage detection module, and a comparison module;
[0010] The first reference module is used to provide a first reference voltage;
[0011] The first voltage conversion module is connected to the output terminal of the first reference module and generates a first reference voltage based on the reference voltage and the gate-source voltage of the transistor;
[0012] The first input terminal of the operational amplifier is connected to the output terminal of the first voltage conversion module, the second input terminal is connected to the second voltage conversion module, and the voltage at the first input terminal of the operational amplifier is equal to the voltage at the second input terminal;
[0013] The second voltage conversion module obtains the first reference voltage, amplifies the first reference voltage by a preset ratio, and obtains a second reference voltage;
[0014] The voltage detection module detects the power supply voltage and obtains a power supply detection voltage;
[0015] The comparison module is connected to the output terminals of the second voltage conversion module and the voltage detection module, and compares the power supply detection voltage with the second reference voltage.
[0016] Optionally, the first reference voltage satisfies: VREF - n*VGS, where VREF is the reference voltage, VGS is the gate-source voltage of the transistor, and n is a natural number greater than or equal to 1.
[0017] More optionally, the first voltage conversion module includes a first current source, a first PMOS (Positive Channel Metal Oxide Semiconductor) transistor, a first diode-connected structure, and a second current source; wherein, the first diode-connected structure includes (n + 1) PMOS transistors in diode-connected form, and the gates and drains of the series-connected PMOS transistors are connected together;
[0018] The first PMOS transistor is controlled by the first reference voltage and is connected between the output terminal of the first current source and the reference ground;
[0019] The first diode-connected structure and the second current source are connected in series between the output terminal of the first current source and the reference ground;
[0020] Among them, the connection node of the first diode connection structure and the second current source outputs the first reference voltage.
[0021] More optionally, the first PMOS transistor and each PMOS transistor in the first diode connection structure have the same current, aspect ratio, and gate-source voltage.
[0022] More optionally, the power supply detection voltage satisfies: VDD - m*VGS, where m = A*n, VDD is the power supply voltage, m is a natural number greater than or equal to 1, and A is the preset ratio.
[0023] More optionally, the voltage detection module includes a second diode connection structure and a third current source, where the second diode connection structure includes m PMOS transistors connected in diode configuration, and the gates and drains of each PMOS transistor are connected together;
[0024] One end of the second diode connection structure is connected to the power supply voltage, and the other end is grounded via the third current source; the connection node of the second diode connection structure and the third current source outputs the power supply detection voltage.
[0025] More optionally, each transistor in the voltage detection module and each transistor in the first voltage conversion module have the same current, aspect ratio, and gate-source voltage.
[0026] Optionally, the second voltage conversion module includes a second PMOS transistor, a third PMOS transistor, and a fourth PMOS transistor;
[0027] The source of the second PMOS transistor is connected to the power supply voltage, the gate is connected to the output terminal of the operational amplifier, and the drain is connected to the source of the third PMOS transistor and outputs the second reference voltage;
[0028] The gate and drain of the third PMOS transistor are connected to the second input terminal of the operational amplifier;
[0029] The source of the fourth PMOS transistor is connected to the drain of the third PMOS transistor, and the gate and drain are grounded.
[0030] More optionally, the third PMOS transistor and the fourth PMOS transistor have the same gate-source voltage.
[0031] More optionally, the comparison module is set as a hysteresis comparator, and power-on detection and power-off detection are realized based on the two threshold voltages of the hysteresis comparator.
[0032] More optionally, the power-on reset circuit further includes a second reference module and a switching switch, and the second reference module provides a second reference voltage;
[0033] The output ends of the first reference module and the second reference module are connected to the first voltage conversion module via the switching switch, and the first voltage conversion module is based on the first reference voltage or the second reference voltage; the switching switch is controlled by the output signal of the comparison module;
[0034] Wherein, the first reference voltage and the second reference voltage are respectively used for power-on detection and power-off detection.
[0035] To achieve the above object and other related objects, the present invention further provides an electronic product, which at least includes:
[0036] A functional circuit and the above power supply detection circuit;
[0037] The power supply detection circuit detects the power supply voltage and generates a detection signal for power-on or power-off;
[0038] The functional circuit is connected to the output end of the power supply detection circuit and operates based on the power-on or power-off situation detected by the power supply detection circuit.
[0039] As described above, the power supply detection circuit and the electronic product of the present invention have the following beneficial effects:
[0040] The power supply detection circuit and the electronic product of the present invention can be well applied in low-power and high-precision designs. Compared with the previous method of using a resistor string for voltage division, problems such as large area and high power consumption of the resistor string are avoided; the reference level is directly compared with the power supply voltage after being converted by the MOS transistor inside the circuit, and it is less sensitive to changes in temperature and process corners, and the flip threshold can be made more accurate. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] Figure 1 It shows a schematic diagram of the power supply detection circuit of the present invention.
[0042] Figure 2 It shows the power supply detection circuit of an embodiment of the present invention.
[0043] Figure 3 It shows another schematic diagram of the power supply detection circuit of the present invention.
[0044] Figure 4 It shows the power supply detection circuit of another embodiment of the present invention.
[0045] DESCRIPTION OF REFERENCE NUMERALS
[0046] 1 Power supply detection circuit
[0047] 11 First reference module
[0048] 12 First voltage conversion module
[0049] 121 First diode connection structure
[0050] 13 Operational amplifier
[0051] 14 Second voltage conversion module
[0052] 15 Voltage detection module
[0053] 151 Second diode connection structure
[0054] 16 Comparison module
[0055] 17 Second reference module
[0056] 18 Switching switch Detailed implementation manners
[0057] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0058] Please refer to Figures 1 to 4 . It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and ratios of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.
[0059] As Figure 1 shown, the present invention provides a power supply detection circuit 1, and the power supply detection circuit 1 includes:
[0060] A first reference module 11, a first voltage conversion module 12, an operational amplifier 13, a second voltage conversion module 14, a voltage detection module 15, and a comparison module 16.
[0061] As Figure 1 shown, the first reference module 11 is used to provide a first reference voltage Vref1.
[0062] Specifically, the first reference module 11 can adopt any circuit structure that can provide a reference voltage, including but not limited to a bandgap reference circuit.
[0063] As Figure 1 shown, the first voltage conversion module 12 is connected to the output end of the first reference module 11, and generates a first reference voltage V1 based on the reference voltage and the transistor gate-source voltage.
[0064] Specifically, the first voltage conversion module 12 converts the first reference voltage Vref1 through a transistor to obtain a first reference voltage V1. In this embodiment, the first reference voltage V1 satisfies: VREF - n*VGS, where VREF is the reference voltage (i.e., the first reference voltage Vref1), VGS is the gate-source voltage of the transistor, and n is a natural number greater than or equal to 1. As Figure 2 shown, as an example, the first voltage conversion module 12 includes a first current source I1, a first PMOS transistor MP1, a first diode-connected structure 121, and a second current source I2; wherein, the first diode-connected structure 121 includes (n + 1) diode-connected PMOS transistors, that is, the gates and drains of each PMOS transistor are connected together. The first PMOS transistor MP1 is controlled by the first reference voltage Vref1 and is connected between the output terminal of the first current source I1 and the reference ground; that is, one end of the first current source I1 is connected to the power supply voltage VDD, the other end is connected to the source of the first PMOS transistor MP1, the drain of the first PMOS transistor MP1 is grounded, and the gate is connected to the first reference voltage Vref1. The first diode-connected structure 121 and the second current source I2 are connected in series between the output terminal of the first current source I1 and the reference ground; in this example, n is set to 1, and the PMOS transistors of the first series structure 121 are denoted as the fifth PMOS transistor MP5 and the sixth PMOS transistor MP6; then the source of the fifth PMOS transistor is connected to the output terminal of the first current source I1 (the source of the first PMOS transistor), the gate and drain are connected to the source of the sixth PMOS transistor MP6, and the gate and drain of the sixth PMOS transistor MP6 are grounded via the second current source I2. The connection node of the first diode-connected structure 121 and the second current source I2 outputs the first reference voltage V1.
[0065] In this example, the first PMOS transistor MP1 has the same gate-source voltage as each PMOS transistor in the first diode structure 121, which is VGS. Thus, the first reference voltage V1 can be conveniently obtained by adjusting the number of PMOS transistors in the first series structure 121. In this embodiment, the first PMOS transistor MP1 has the same size (width-to-length ratio) as the fifth PMOS transistor MP5 and the sixth PMOS transistor MP6, the current of the first current source I1 is twice that of the second current source I2, the current 2*IB flowing through the first current source I1 flows through two branches, the current flowing through the second current source I2 is IB, and the current flowing through the first PMOS transistor MP1 is also IB. On the premise that the sizes and bias currents of the first PMOS transistor MP1, the fifth PMOS transistor MP5, and the sixth PMOS transistor MP6 are exactly the same, ignoring the channel length modulation effect, according to the following formula, it can be obtained that they have the same gate-source voltage VGS:
[0066]
[0067] Among them, I D is the drain current of the PMOS transistor, μ p is the carrier mobility of the PMOS transistor, C ox is the gate oxide capacitance per unit area of the PMOS transistor, is the width-to-length ratio of the PMOS transistor, V GS is the gate-source voltage of the PMOS transistor, V TH is the threshold voltage of the PMOS transistor.
[0068] The source voltages of the first PMOS transistor MP1 and the fifth PMOS transistor MP5 are equal to Vref1 + VGS, the drain voltage of the fifth PMOS transistor MP5 is equal to Vref1, and the drain voltage of the sixth PMOS transistor MP6 is equal to Vref1 - VGS.
[0069] As Figure 1 shown, the first input terminal of the operational amplifier 13 is connected to the output terminal of the first voltage conversion module 12, the second input terminal is connected to the second voltage conversion module 14, and the voltage at the first input terminal of the operational amplifier 13 is equal to the voltage at the second input terminal.
[0070] Specifically, as Figure 2As shown, in this embodiment, the operational amplifier 13 includes a fourth current source I4, a ninth PMOS transistor MP9, a tenth PMOS transistor MP10, an eleventh PMOS transistor MP11, a twelfth PMOS transistor MP12, a first NMOS transistor MN1, a second NMOS transistor MN2, a third NMOS transistor MN3, and a fourth NMOS transistor MN4. One end of the fourth current source I4 is connected to the power supply voltage VDD, and the other end is connected to the sources of the ninth PMOS transistor MP9 and the tenth PMOS transistor MP10. The fourth current source I4 enables the ninth PMOS transistor MP9, the tenth PMOS transistor MP10, the first NMOS transistor MN1, and the third NMOS transistor MN3 to operate at normal quiescent operating points. The gate of the ninth PMOS transistor MP9 serves as the first input terminal of the operational amplifier 13 and is connected to the first reference voltage V1, and the drain is connected to the gate and the drain of the first NMOS transistor MN1. The source of the first NMOS transistor MN1 is grounded. The source of the second NMOS transistor MN2 is grounded, the gate is connected to the gate of the first NMOS transistor MN1, and the drain is connected to the drain of the eleventh PMOS transistor MP11. The gate and the drain of the eleventh PMOS transistor MP11 are connected to the gate of the twelfth PMOS transistor MP12, and the source is connected to the power supply voltage VDD. The gate of the tenth PMOS transistor MP10 serves as the second input terminal of the operational amplifier 13 and is connected to the second voltage conversion module 14, and the drain is connected to the gate and the drain of the third NMOS transistor MN3. The source of the third NMOS transistor MN3 is grounded. The source of the fourth NMOS transistor MN4 is grounded, the gate is connected to the gate of the third NMOS transistor MN3, and the drain is connected to the drain of the twelfth PMOS transistor MP12. The source of the twelfth PMOS transistor MP12 is connected to the power supply voltage VDD.
[0071] It should be noted that when the operational amplifier gain of the operational amplifier 13 is sufficient, its two input terminals have the same voltage; that is, the gate voltage of the tenth PMOS transistor MP10 is equal to the gate voltage of the ninth PMOS transistor MP9, which is equal to Vref1 - VGS. Any operational amplifier structure that can provide a large enough gain to make the voltage at the first input terminal equal to the voltage at the second input terminal (achieving the function of voltage clamping) is applicable to the present invention, not limited to this embodiment.
[0072] As Figure 1 shown, the second voltage conversion module 14 obtains the first reference voltage V1, amplifies the first reference voltage V1 by a preset ratio, and obtains the second reference voltage V2.
[0073] Specifically, in this embodiment, the second reference voltage V2 is twice the first reference voltage V1 (i.e., the preset ratio A = 2). In actual use, this preset ratio can be set as needed, and this embodiment is not limiting. As an example, the second voltage conversion module 14 includes a second PMOS transistor MP2, a third PMOS transistor MP3, and a fourth PMOS transistor MP4. The source of the second PMOS transistor MP2 is connected to the power supply voltage VDD, the gate is connected to the output terminal of the operational amplifier 13 (the drains of the fourth NMOS transistor MN4 and the twelfth PMOS transistor MP12), and the drain is connected to the source of the third PMOS transistor MP3 and outputs the second reference voltage V2; the gate and drain of the third PMOS transistor MP3 are connected to the second input terminal of the operational amplifier 13; the source of the fourth PMOS transistor MP4 is connected to the drain of the third PMOS transistor MP3, and the gate and drain are grounded.
[0074] In this example, the third PMOS transistor MP3 and the fourth PMOS transistor MP4 have the same gate-source voltage. Thus, the preset ratio can be conveniently set by adjusting the number of transistors between the output node of the second voltage conversion module 14 and the reference ground, and then the second reference voltage V2 can be obtained. In this embodiment, the third PMOS transistor MP3 and the fourth PMOS transistor MP4 are in diode connection mode and have the same size (width-to-length ratio), and the currents flowing through the third PMOS transistor MP3 and the fourth PMOS transistor MP4 are also the same. Therefore, they have the same gate-source voltage; the gate-source voltage of the fourth PMOS transistor MP4 is equal to the voltage of the second input terminal of the operational amplifier 13 (i.e., Vref1 - VGS), and the voltage of the source of the third PMOS transistor MP3 (i.e., the NETB point) is equal to 2 * VGS PM3 , and is also equal to 2 * (Vref1 - VGS).
[0075] As Figure 1 shown, the voltage detection module 15 detects the power supply voltage VDD to obtain a power supply detection voltage.
[0076] Specifically, the voltage detection module 15 converts the power supply voltage VDD through transistors. In this embodiment, the power supply detection voltage satisfies: VDD - m * VGS, where m = A * n, VDD is the power supply voltage, m is a natural number greater than or equal to 1, and A is the preset ratio. In this example, m = 2. In actual use, m, A, and n can be set as needed as long as the above relationship is satisfied. As Figure 2As shown, by way of example, the voltage detection module 15 includes a second diode-connected structure 151 and a third current source I3. Among them, the second diode-connected structure 151 includes m PMOS transistors in diode-connected form, and the gates and drains of each PMOS transistor are connected together. One end of the second diode-connected structure 151 is connected to the power supply voltage VDD, and the other end is grounded via the third current source I3; in this example, m = 2, and the PMOS transistors of the second diode-connected structure 151 are denoted as the seventh PMOS transistor MP7 and the eighth PMOS transistor MP8; then, the source of the seventh PMOS transistor MP7 is connected to the power supply voltage VDD, the gate and drain are connected to the source of the eighth PMOS transistor MP8, and the gate and drain of the eighth PMOS transistor MP8 are connected to the third current source I3. The connection node of the second diode-connected structure 151 and the third current source I3 (i.e., the NETA point) outputs the power supply detection voltage.
[0077] In this example, each transistor in the voltage detection module 15 has the same gate-source voltage as each transistor in the first voltage conversion module 12, that is, the first PMOS transistor MP1, the fifth PMOS transistor MP5, the sixth PMOS transistor MP6, the seventh PMOS transistor MP7, and the eighth PMOS transistor MP8 have the same gate-source voltage. In this embodiment, the first PMOS transistor MP1, the fifth PMOS transistor MP5, the sixth PMOS transistor MP6, the seventh PMOS transistor MP7, and the eighth PMOS transistor MP8 have the same size (width-to-length ratio), the current of the third current source I3 is IB, and based on the above formula (1), they have the same gate-source voltage VGS. The drain voltage of the seventh PMOS transistor MP7 is equal to VDD - VGS, and the drain voltage of the eighth PMOS transistor MP8 (i.e., the NETA point) is equal to VDD - 2*VGS.
[0078] As Figure 1 shown, the comparison module 16 is connected to the output ends of the second voltage conversion module 14 and the voltage detection module 15, compares the power supply detection voltage with the second reference voltage, and outputs a comparison result VOUT.
[0079] As an implementation, the comparison module 16 is used to implement single power-on detection or power-off detection. At this time, the comparison module 16 is an ordinary single-threshold comparator. The non-inverting input terminal of the comparison module is connected to the power detection voltage, and the inverting input terminal is connected to the second reference voltage. Since the voltage at the NETA point is equal to VDD - 2VGS and the voltage at the NETB point is equal to 2Vref1 - 2VGS, and NETA and NETB are used as the positive and negative input terminals of the comparison module 16. When the power supply voltage VDD is greater than 2*Vref1 (i.e., the voltage at the NETA point is greater than the voltage at the NETB point), the comparison module 16 outputs a high level to implement power-on detection. As an example, by setting the first reference voltage Vref1 to 1 / 2 of the power-on flip level, the power-on reset function can be implemented. Alternatively, when the power supply voltage VDD is less than 2*Vref1, the comparison module 16 outputs a low level to implement power-off detection. It should be noted that the case where VDD is equal to 2Vref1 is generally not considered. If they are exactly equal, in an ideal situation without considering the offset in the circuit, the comparison module 16 still outputs a low level.
[0080] As another implementation, the comparison module 16 is used to implement both power-on detection and power-off detection simultaneously. In one example, the comparison module 16 is an ordinary single-threshold comparator. At this time, the flip thresholds for power-on and power-off are the same value. In another example, the flip thresholds for power-on and power-off are different values. At this time, the comparison module 16 is set as a hysteresis comparator, and the power-on detection and power-off detection are respectively implemented based on the two threshold voltages of the hysteresis comparator. In yet another example, the flip thresholds for power-on and power-off are different values, such as Figure 3 and Figure 4As shown, at this time, the power supply detection circuit 1 further includes a second reference module 17 and a switching switch 18. The second reference module 17 provides a second reference voltage Vref2; the output ends of the first reference module 11 and the second reference module 17 are connected to the input end of the first voltage conversion module 12 via the switching switch 18, and the first voltage conversion module 12 is based on the first reference voltage Vref1 or the second reference voltage Vref2; the switching switch 18 is controlled by the output signal of the comparison module 16; wherein, the first reference voltage Vref1 and the second reference voltage Vref2 are respectively used for power-on detection and power-off detection. When the second reference voltage Vref2 is input into the first voltage conversion module 12, the corresponding reference voltage VREF is the second reference voltage Vref2. Assume that the first reference voltage Vref1 is used for power-on detection and the second reference voltage Vref2 is used for power-off detection. Then, when the system starts to work, the first reference voltage Vref1 is connected to the first voltage conversion module 12 through the switching switch 18, and a corresponding second reference voltage V2 is generated. At this time, the second reference voltage V2 is equal to 2*(Vref1 - VGS). When the power supply voltage VDD is greater than 2*Vref1, the comparison module 16 outputs a high level, and this high level is used to reset the subsequent circuit to establish the initial state of some nodes inside the circuit (i.e., power-on detection); at the same time, the switching switch 18 is switched to connect the second reference voltage Vref2 and the first voltage conversion module 12. The power supply detection circuit 1 generates a corresponding second reference voltage V2 based on the second reference voltage Vref2. At this time, the second reference voltage V2 is equal to 2*(Vref2 - VGS). When the power supply voltage VDD is less than 2*Vref2, the comparison module 16 outputs a low level, and this low level prompts the subsequent circuit that the power supply has lost power. The subsequent circuit can perform operations such as storing important data to avoid losing information (i.e., power-off detection); at the same time, the switching switch 18 is switched to connect the first reference voltage Vref1 and the first voltage conversion module 12 to perform the next power-on detection.
[0081] Compared with the traditional power supply detection circuit, the present invention does not use a resistor string for voltage division, saving a large amount of area; only MOS transistors are used, which can be well applied in low-power designs. In addition, the flip point voltage is directly generated by comparing the power supply voltage with the reference voltage, and does not depend on the threshold voltage of the transistor, etc., with higher accuracy.
[0082] The present invention also provides an electronic product, which at least includes: a functional circuit and the power supply detection circuit 1 of the present invention. Among them, the power supply detection circuit 1 detects the power supply voltage and generates a detection signal for power-on or power-off; the functional circuit is connected to the output end of the power supply detection circuit 1 and works based on the power-on or power-off situation detected by the power supply detection circuit 1.
[0083] In summary, the present invention provides a power detection circuit and an electronic product. The power detection circuit includes: a first reference module, a first voltage conversion module, a second voltage conversion module, an operational amplifier, a voltage detection module, and a comparison module; the first reference module is used to provide a first reference voltage; the first voltage conversion module is connected to the output end of the first reference module and generates a first reference voltage based on the reference voltage and the transistor gate-source voltage; the first input end of the operational amplifier is connected to the output end of the first voltage conversion module, the second input end is connected to the second voltage conversion module, and the voltage at the first input end of the operational amplifier is equal to the voltage at the second input end; the second voltage conversion module obtains the first reference voltage, amplifies the first reference voltage by a preset ratio to obtain a second reference voltage; the voltage detection module detects the power supply voltage to obtain a power supply detection voltage; the comparison module is connected to the output ends of the second voltage conversion module and the voltage detection module, and compares the power supply detection voltage with the second reference voltage. The power detection circuit and the electronic product of the present invention are applicable to low-power and high-precision applications, have a small area, and are insensitive to changes in temperature and process corners. Therefore, the present invention effectively overcomes various disadvantages in the prior art and has high industrial utilization value.
[0084] The above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present invention should still be covered by the claims of the present invention.
Claims
1. A power supply detection circuit, characterized in that: The power detection circuit at least comprises: A first reference module, a first voltage conversion module, a second voltage conversion module, an operational amplifier, a voltage detection module and a comparison module; The first reference module is used to provide a first reference voltage; The first voltage conversion module is connected to the output end of the first reference module, and generates a first reference voltage based on the reference voltage and the transistor gate-source voltage; The first input terminal of the operational amplifier is connected to the output terminal of the first voltage conversion module, the second input terminal is connected to the second voltage conversion module, and the voltage of the first input terminal of the operational amplifier is equal to the voltage of the second input terminal; The second voltage conversion module obtains the first reference voltage, and amplifies the first reference voltage at a preset ratio to obtain a second reference voltage; The voltage detection module detects the power supply voltage to obtain a power supply detection voltage; The comparison module is connected to the second voltage conversion module and the output end of the voltage detection module, and compares the power detection voltage with the second reference voltage.
2. The power detection circuit according to claim 1, characterized in that: The first reference voltage satisfies: VREF-n*VGS, wherein VREF is the reference voltage, VGS is the gate-source voltage of the transistor, and n is a natural number greater than or equal to 1.
3. The power detection circuit according to claim 2, characterized in that: The first voltage conversion module includes a first current source, a first PMOS transistor, a first diode connection structure and a second current source; wherein the first diode connection structure includes (n+1) PMOS transistors in a diode connection form; The first PMOS tube is controlled by the first reference voltage and connected between the output end of the first current source and a reference ground; The first diode connection structure and the second current source are connected in series between the output end of the first current source and a reference ground; Wherein, a connection node between the first diode connection structure and the second current source outputs the first reference voltage.
4. The power detection circuit according to claim 3, characterized in that: The first PMOS tube and each PMOS tube in the first diode connection structure have the same current, width-to-length ratio and gate-source voltage.
5. The power detection circuit according to claim 2, characterized in that: The power supply detection voltage satisfies: VDD-m*VGS, m=A*n, wherein VDD is the power supply voltage, m is a natural number greater than or equal to 1, and A is the preset ratio.
6. The power detection circuit according to claim 5, characterized in that: The voltage detection module includes a second diode connection structure and a third current source, wherein the second diode connection structure includes m diode-connected PMOS tubes; One end of the second diode connection structure is connected to the power supply voltage, and the other end is grounded via the third current source; a connection node between the second diode connection structure and the third current source outputs the power supply detection voltage.
7. The power detection circuit according to claim 6, characterized in that: Each transistor in the voltage detection module and each transistor in the first voltage conversion module have the same current, width-to-length ratio and gate-source voltage.
8. The power detection circuit according to claim 1, characterized in that: The second voltage conversion module includes a second PMOS tube, a third PMOS tube and a fourth PMOS tube; The source of the second PMOS tube is connected to the power supply voltage, the gate is connected to the output end of the operational amplifier, and the drain is connected to the source of the third PMOS tube and outputs the second reference voltage; The gate and drain of the third PMOS tube are connected to the second input terminal of the operational amplifier; The source of the fourth PMOS tube is connected to the drain of the third PMOS tube, and the gate and the drain are grounded.
9. The power detection circuit according to claim 8, characterized in that: The third PMOS tube and the fourth PMOS tube have the same gate-source voltage.
10. The power detection circuit according to any one of claims 1 to 9, characterized in that: The comparison module is configured as a hysteresis comparator, and power-on detection and power-off detection are implemented based on two threshold voltages of the hysteresis comparator.
11. The power detection circuit according to any one of claims 1 to 9, characterized in that: The power-on reset circuit also includes a second reference module and a switch, wherein the second reference module provides a second reference voltage; The output ends of the first reference module and the second reference module are connected to the first voltage conversion module via the switching switch, and the first voltage conversion module uses the first reference voltage or the second reference voltage as a reference; The switching switch is controlled by the output signal of the comparison module; The first reference voltage and the second reference voltage are used for power-on detection and power-off detection respectively.
12. An electronic product, characterized in that: The electronic product at least includes: A functional circuit and a power supply detection circuit as claimed in any one of claims 1 to 11; The power supply detection circuit detects the power supply voltage and generates a power-on or power-off detection signal; The functional circuit is connected to the output end of the power detection circuit and operates based on the power-on or power-off condition detected by the power detection circuit.