Single Project Chip File Management Method, Electronic Device and Medium

Abstract

The present invention relates to the field of chip technology, and in particular to a single-project chip file management method, an electronic device, and a medium. The method includes: Step S1, updating and recording the file version information and the IP version information corresponding to the file in real time according to the changes of the chip files, and storing all versions of all chip files in the file library; Step S2, sequentially obtaining the chip file management information corresponding to each project stage according to the characteristics of the chip to be tested in the order of the chip development project stages, where A m is the chip file management information for the m-th chip development project stage; Step S3, generating single-project chip file management information {A1, A2,..., A m ,..., A M} based on the chip file management information corresponding to each project stage. The present invention reduces the error probability in the chip development process and improves the chip development efficiency.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular, to a single-project chip file management method, an electronic device, and a medium. Background Art

[0002] In the process of chip development, multiple chip files are involved. As the chip development process progresses, the chip files will be updated to different versions. The chip also includes component modules at different levels, and each component module will have different versions. Different levels of modules correspond to different files, and different versions of the same module correspond to different versions of the same file. In the process of chip development, for different chip features, it is necessary to select chip files of different modules to construct chip design files of different versions. However, due to the huge amount of chip files and the fast update speed, when performing operations such as verification for a chip feature, if the chip files involved are updated during the execution process, it is very likely to cause errors in chip development, and it is difficult to determine the cause of the error, thereby reducing the chip development efficiency. It can be seen from this that how to provide a chip file management method to reduce the error probability in the chip development process and thus improve the chip development efficiency has become an urgent technical problem to be solved. Summary of the Invention

[0003] The purpose of the present invention is to provide a single-project chip file management method, an electronic device, and a medium, which reduce the error probability in the chip development process and improve the chip development efficiency.

[0004] According to the first aspect of the present invention, a single-project chip file management method is provided, including:

[0005] Step S1: Update and record the file version information and the IP version information corresponding to the file in real time according to the changes of the chip files. The chip includes N IPs, and each IP corresponds to at least one file. Store all versions of all chip files in the file library;

[0006] Step S2: Obtain the chip file management information corresponding to each project stage in sequence according to the chip development project stage order according to the chip feature to be tested;

[0007] A m is the chip file management information for the m-th chip development project stage, where the value range of m is from 1 to M, and M is the total number of chip development project stages;

[0008] A m ={A1 m ,A2 m ,A3 m}, A1 m is the chip feature to be tested corresponding to A m ; A2m is A m The corresponding chip version number, A3 m is A m The corresponding file version information;

[0009] A3 m ={A1 3m ,A2 3m ,...,A i 3m ,..,A h(m) 3m},A i 3m is A m The file version information required for the i-th IP corresponding to A, A i 3m including A m The version number of the i-th IP corresponding to A, the required file identifier, and the version number corresponding to the required file identifier. The value range of i is from 1 to h(m), and h(m) is the total number of IPs corresponding to A m The total number of corresponding IPs, h(m) ≤ N, where N is the total number of IPs included in the chip. The file required for the i-th IP is all or part of the files in the corresponding chip IP;

[0010] Step S3, generating single-project chip file management information {A1, A2,..., A m ,..., A M} based on the chip file management information corresponding to each project phase.

[0011] According to the second aspect of the present invention, there is provided an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores instructions executable by the at least one processor, and the instructions are configured to execute the method described in the first aspect of the present invention.

[0012] According to the third aspect of the present invention, there is provided a computer-readable storage medium storing computer-executable instructions, and the computer instructions are used to execute the method described in the first aspect of the present invention.

[0013] Compared with the prior art, the present invention has obvious advantages and beneficial effects. By means of the above technical solutions, a single-project chip file management method, an electronic device, and a medium provided by the present invention can achieve considerable technical progressiveness and practicality, and have broad industrial utilization value. It has at least the following beneficial effects:

[0014] The present invention updates and records the file version information and the IP version information corresponding to the file in real time according to the changes of the chip files, and then sequentially obtains the chip file management information corresponding to each project stage according to the characteristics of the chip to be tested in the order of the chip development project stages, so as to generate the chip file management information of the entire single project, accurately record the file management information corresponding to each project stage, reduce the error probability in the chip development process, and improve the chip development efficiency. Brief Description of the Drawings

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0016] Figure 1 It is a flowchart of a single-project chip file management method provided by an embodiment of the present invention. Detailed Embodiments

[0017] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0018] An embodiment of the present invention provides a single-project chip file management method, as Figure 1 shown, including:

[0019] Step S1: Update and record the file version information and the IP version information corresponding to the file in real time according to the changes of the chip files. The chip includes N IPs, and each IP corresponds to at least one file. All versions of all chip files are stored in the file library.

[0020] Among them, the chip can specifically be a GPU chip.

[0021] Step S2: Sequentially obtain the chip file management information corresponding to each project stage according to the characteristics of the chip to be tested in the order of the chip development project stages. A m is the chip file management information of the m-th chip development project stage, where the value range of m is from 1 to M, and M is the total number of chip development project stages. A m ={A1 m , A2 m , A3 m}, and A1 m is A mThe corresponding characteristics of the chip to be tested, A2 m is A m The corresponding chip version number, A3 m is A m The corresponding file version information, A3 m ={A1 3m , A2 3m ,..., A i 3m ,.., A h(m) 3m}, A i 3m is A m The file version information required for the i-th IP corresponding to the corresponding chip to be tested, A i 3m includes A m The version number of the i-th IP corresponding to the corresponding chip, as well as the required file identifier and the version number corresponding to the required file identifier. The value range of i is from 1 to h(m), and h(m) is A m The total number of corresponding IPs, h(m) ≤ N, where N is the total number of IPs included in the chip. The file required for the i-th IP is all or part of the files in the corresponding chip IP.

[0022] It should be noted that when obtaining the corresponding chip file management information based on a characteristic of the chip to be tested, only the files corresponding to the chip IP corresponding to the characteristic of the chip to be tested need to be obtained. That is, the files to be obtained may be all the chip files corresponding to all the chip IPs or part of the chip files corresponding to part of the chip IPs. By generating the chip file management information corresponding to each project stage, the chip file management information corresponding to each characteristic of the chip to be tested can be determined, and it can be sorted in the order of the project stages.

[0023] Step S3: Generate single-project chip file management information {A1, A2,..., A m ,..., A M} based on the chip file management information corresponding to each project stage.

[0024] It should be noted that by generating the single-project chip file management information {A1, A2,..., A m ,..., A M}, the chip development process can be accurately and clearly recorded. In addition, the chip file version information corresponding to each characteristic of the chip to be tested and each project stage can be clarified, so that the operation of each characteristic of the chip to be tested and each project stage will not be affected by the update of the chip IP version, reducing the error probability in the chip development process, thereby improving the chip development efficiency.

[0025] As an embodiment, the step S1 includes:

[0026] Step S11: Scan all chip files. If a chip file is updated, update the version number corresponding to the chip file. If there is an updated chip file in the IP, update the version number of the IP.

[0027] Among them, when updating the version number corresponding to the chip file, record the version number of the chip file before the update in the version information of the updated chip file. It should be noted that by recording the version number of the chip file before the update in the version information of the updated chip file, when problems occur in the updated chip file, the version information of the chip file before the update can be quickly and accurately traced, improving the debugging efficiency of the chip.

[0028] When updating the version number of the IP, record the version number of the IP before the update in the updated IP version information. It should be noted that by recording the version number of the IP before the update in the updated IP version information, when problems occur in the updated IP, the version information of the IP before the update can be quickly and accurately traced, improving the debugging efficiency of the chip IP.

[0029] As an embodiment, before the step S11, it further includes:

[0030] Step S10: Obtain the IP set {IP1, IP2,..., IP n ,..., IP N} corresponding to the chip. IP n is the nth IP of the chip, and the value range of N is from 1 to N, where N is the total number of IPs included in the chip.

[0031] Step S20: Obtain the current file version information {SV1, PV1, PV2,..., PV n ,..., PV N , SV2} of the chip in the initial state.

[0032] Among them, SV1 is the current version number corresponding to the chip, and SV2 is the associated version number corresponding to SV1. It should be noted that the chip of version SV1 is updated from the chip of version SV2. The initial value of SV2 is empty, and the initial value of SV1 is 1. It can be understood that the initial value of SV1 being 1 is a preferred embodiment, and the initial value of SV1 can also be set to 0 or other values. PV n is the version information corresponding to IP n , and PV n = {PV1 n , PV2 n , PV3 n}. PV1 n is the version number of IP n in the chip, and PV1n The initial value of n is 1. It can be understood that PV1 n The initial value of n is IP n 's file list, PV3 n is the associated version number of PV1 n , PV3 n is initially empty. It should be noted that in the chip, PV1 n version of IP n is updated by PV3 n version of IP n .

[0033] PV2 n ={FV1 n , FV2 n ,..., FV i n ,..., FV f(n) n}, FV i n is the i-th file information in PV2 n . The value range of i is from 1 to f(n), and f(n) is the total number of files in PV2 n . It should be noted that the total number of files corresponding to the IP in different chips may be different. FV i n =(FV1 i n , FV2 i n ), FV1 i n is the file identifier corresponding to FV i n , FV2 i n is the version number corresponding to FV i n . The initial value of FV2 i n is the version number corresponding to FV1 i n in the initial state. It can be understood that the version number corresponding to FV1 i n in the initial state may be 1 or other values.

[0034] As an embodiment, step S11 includes:

[0035] Step S111, scan all files. If FV1 in If the corresponding file is updated, then update FV2 i n =FV2 i n +1.

[0036] Step S112: If there is at least one updated FV2 in PV n then first update PV3 i n =PV1 n and then update PV1 n =PV1 n +1. n +1.

[0037] Step S113: If there is at least one updated PV1 n then first update SV2 = SV1, and then update SV1 = SV1 + 1, generating the updated {SV1, PV1, PV2,..., PV n ,..., PV N , SV2}.

[0038] It should be noted that through the update process of steps S111 - S113, by scanning the file, monitoring the changes of the file, and then updating the versions of the IP and the chip layer by layer according to the version changes of the file, the automated management of the chip file version is realized, the difficulty of chip file version management is reduced, and the accuracy of chip file version management is improved. In addition, the embodiment of the present invention also records the associated version numbers corresponding to each version number of the IP and the chip, which is convenient for debugging and tracking.

[0039] As an embodiment, after step S3, it further includes:

[0040] Step S4: Query {A1, A2,..., A m ,..., A M} based on the characteristics of the target chip to be tested and / or the target chip version number, and determine the target A3 m .

[0041] Among them, specifically, it can query {A1, A2,..., A m ,..., A M} only based on the characteristics of the target chip to be tested, or query {A1, A2,..., A m ,..., A M} only based on the target chip version number, or also based on a set of characteristics of the target chip to be tested and the target chip version number at the same time.

[0042] It should be noted that {A1, A2,..., A m ,..., A M}Arrange as needed according to the stage of the project, clearly record the file management information corresponding to each stage, and build the relationship between chip characteristics and file management information, so that when executing the file list corresponding to a certain chip characteristic, it will not be affected by the update of other files, thereby reducing the occurrence of errors and improving the efficiency of chip development.

[0043] Step S5: Based on target A3 m Generate a target chip file list.

[0044] As an embodiment, step S5 includes:

[0045] Step S51, analyze the target {A1 3m ,A2 3m ,...,A i 3m ,..,A h(m) 3m Each target A in i 3m , determine each target A i 3m The corresponding file identifier and file version number.

[0046] Step S52: Based on each target A i 3m The corresponding file identifier and file version number are obtained from the file library to generate a target chip file list.

[0047] It should be noted that by parsing the target 3m ,A2 3m ,...,A i 3m ,..,A h(m) 3m}Able to determine each target A i 3m The corresponding file identifier and file version number, and the file library records all versions of all chip files, so it can be directly based on target A i 3m The corresponding file identifier and file version number are used to quickly and accurately obtain the corresponding file from the file library and generate a target chip file list.

[0048] Note that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts depict the steps as sequential processes, many of the steps can be implemented in parallel, concurrently, or simultaneously. In addition, the order of the steps can be rearranged. The process can be terminated when its operations are completed, but it can also have additional steps not included in the figures. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.

[0049] An embodiment of the present invention further provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are configured to execute the method described in the embodiment of the present invention.

[0050] An embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions for executing the method described in the embodiment of the present invention.

[0051] In the embodiment of the present invention, the file version information and the IP version information corresponding to the file are updated and recorded in real time through the change of the chip file, and then according to the characteristics of the chip to be tested, the chip file management information corresponding to each project stage is sequentially obtained in the order of the chip development project stages, so as to generate the chip file management information of the entire single project, accurately recording the file management information corresponding to each project stage. The present invention reduces the error probability in the chip development process and improves the chip development efficiency.

[0052] The above are only the preferred embodiments of the present invention, and do not impose any form of limitation on the present invention. Although the present invention has been disclosed above with the preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some changes or modifications to the above-disclosed technical content to be equivalent embodiments within the scope of the technical solution of the present invention. However, as long as the content does not depart from the technical solution of the present invention, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A single-project chip file management method, characterized in that, Including: Step S1: Update and record the file version information and the corresponding IP version information in real time according to the changes of the chip files. The chip includes N IPs, and each IP corresponds to at least one file. Store all versions of all chip files in the file library. Step S2: Obtain the chip file management information corresponding to each project stage in sequence according to the characteristics of the chip to be tested in the order of the chip development project stages. A m Chip file management information for the m-th chip development project phase, where m ranges from 1 to M, and M is the total number of chip development project phases; A m ={A1 m ,A2 m ,A3 m}, A1 m is the characteristic of the chip under test corresponding to A m , A2 m is the chip version number corresponding to A m , A3 m is the file version information corresponding to A m ; A3 m ={A1 3m ,A2 3m ,...,A i 3m ,..,A h(m) 3m}, A i 3m is the file version information required for the i-th IP corresponding to A m , including the version number of the i-th IP corresponding to A, the required file identifier, and the version number corresponding to the required file identifier. The value range of i is from 1 to h(m), where h(m) is the total number of IPs corresponding to A i 3m , and includes m , the version number of the i-th IP corresponding to A, the required file identifier, and the version number corresponding to the required file identifier. The value range of i is from 1 to h(m), where h(m) is the total number of IPs corresponding to A m , h(m) ≤ N, where N is the total number of IPs included in the chip. The file required for the i-th IP is all or part of the corresponding chip IP Step S3: Generate single-project chip file management information {A1, A2,..., A m ,..., A M} based on the chip file management information corresponding to each project phase.

2. The method according to claim 1, wherein The step S1 includes: Step S11: Scan all chip files. If a chip file is updated, update the version number corresponding to the chip file. If there is an updated chip file in the IP, update the version number of the IP.

3. The method according to claim 2, wherein In the step S11, when updating the version number corresponding to the chip file, record the version number of the chip file before the update in the version information of the updated chip file.

4. The method according to claim 2, wherein In the step S11, when updating the version number of the IP, record the version number of the IP before the update in the updated IP version information.

5. The method according to claim 1, wherein After the step S3, it further includes: Step S4, query {A1, A2,..., A m ,..., A M} based on the characteristics of the target chip to be tested and / or the target chip version number, and determine the target A3 m ; Step S5. Based on target A3 m Generate a list of target chip files.

6. The method according to claim 5, characterized in that The step S5 includes: Step S51: Parse each target {A1 3m , A2 3m ,..., A i 3m ,.., A h(m) 3m} in sequence, and determine the file identifier and file version number corresponding to each target A i 3m ; i 3m ​ Step S52: Based on each target A i 3m Obtain the corresponding files from the file library according to the corresponding file identifiers and file version numbers, and generate a target chip file list.

7. An electronic device, characterized in that, Including: At least one processor; And a memory communicatively connected to the at least one processor; Wherein, the memory stores instructions executable by the at least one processor, and the instructions are configured to execute the method according to any one of the foregoing claims 1-6.

8. A computer-readable storage medium, characterized in that, Store computer-executable instructions, and the computer-executable instructions are used to execute the method according to any one of the foregoing claims 1-6.

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