Solder composition, method of preparing solder composition, and method of manufacturing semiconductor package using solder composition

Abstract

A solder composition, a method of preparing the same, and a method of manufacturing a semiconductor package using the same are provided. The solder composition includes a solder paste including a tin (Sn)-bismuth (Bi) alloy and / or a tin (Sn)-silver (Ag)-copper (Cu) alloy, and a plurality of nanoparticles dispersed in the solder paste, in which each nanoparticle includes a spherical core, the core includes a metal oxide, and the metal oxide has a density of 7 g / cm3 or more and a melting point of 2000 DEG C or more.

Description

[0001] This application is based on and claims priority to Korean Patent Application No. 10-2024-0001066, filed with the Korean Intellectual Property Office on January 3, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] The present disclosure relates to a solder composition, a method of preparing the solder composition, and a method of manufacturing a semiconductor package using the solder composition. Background Art

[0003] In the past few decades, discoveries in technology, materials, and manufacturing processes have enabled the rapid development of computing power and wireless communication technology. As a result, high integration of high-performance transistors has been achieved, and according to Moore's law, the integration speed approximately doubles every 18 months. Reducing the weight, thickness, length, and size of a system and improving power efficiency are permanent goals of the semiconductor manufacturing industry, and at this time when economic and physical process limitations are reached, 3D integrated packaging has been proposed as an effective solution.

[0004] The development of 3D integrated devices began with complementary metal oxide semiconductor (CMOS) integrated devices proposed in 1980 and has since advanced through 30 years of continuous research and development. Examples of 3D integration technologies include the integration of logic circuits and memory circuits, sensor packaging, and heterogeneous integration of microelectromechanical systems (MEMS) and CMOS. Three-dimensional integration technology can not only reduce the form factor but also achieve high reliability, low power consumption, and low manufacturing cost. Summary of the Invention

[0005] The present inventive concept relates to a solder composition, a method of preparing the solder composition, and a method of manufacturing a semiconductor package using the solder composition.

[0006] Embodiments of the present inventive concept provide a solder composition having improved performance and reliability.

[0007] Embodiments of the present inventive concept provide a method of preparing a solder composition having improved performance and reliability.

[0008] Embodiments of the present inventive concept provide a method of manufacturing a semiconductor package having improved performance and reliability.

[0009] According to one aspect of the inventive concept, a solder composition is provided. The solder composition includes: a solder paste including at least one alloy selected from a tin (Sn)-bismuth (Bi) alloy and / or a tin (Sn)-silver (Ag)-copper (Cu) alloy; and a plurality of nanoparticles dispersed in the solder paste, wherein each nanoparticle of the plurality of nanoparticles includes a spherical core including a metal oxide, and the metal oxide has a density of 7 g / cm 3 or higher and a melting point of 2000 °C or higher.

[0010] According to another aspect of the inventive concept, a method of preparing a solder composition is provided. The method of preparing a solder composition includes: synthesizing nanoparticles including a core; and mixing the nanoparticles with a solder paste, wherein the step of synthesizing the nanoparticles includes synthesizing the core using a hydrothermal synthesis process, and the core includes a metal oxide.

[0011] According to another aspect of the inventive concept, a method of manufacturing a semiconductor package is provided. The method of manufacturing a semiconductor package includes: preparing a solder composition including a plurality of nanoparticles; providing a substrate; and bonding a semiconductor chip onto the substrate using the solder composition, wherein the plurality of nanoparticles includes nanoparticles, and each nanoparticle of the plurality of nanoparticles includes a spherical core and a metal coating layer surrounding the core, and wherein the preparation of the solder composition includes: synthesizing the core using a hydrothermal synthesis process and forming a metal coating layer surrounding the core to form nanoparticles; and mixing the plurality of nanoparticles with a solder paste, wherein the solder paste includes at least one alloy selected from a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy, the core includes a metal oxide, and the metal oxide has a density of 7 g / cm 3 or higher and a melting point of 2000 °C or higher. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0013] Figure 1 is a cross-sectional view of a semiconductor package manufactured using the solder composition according to an embodiment.

[0014] Figure 2 is a flowchart showing a method of preparing a solder composition according to an embodiment.

[0015] Figure 3 is a flowchart of some operations of a method of preparing a solder composition according to an embodiment.

[0016] Figures 4A to 4D is an electron microscope image of CeO2 and CeO2 / Ag nanoparticles synthesized according to a method of preparing a solder composition according to an embodiment.

[0017] Figure 5A and Figure 5B is a bar graph showing the particle sizes of CeO2 and CeO2 / Ag nanoparticles synthesized according to the method for preparing a solder composition in accordance with an embodiment.

[0018] Figures 6A to 6D is an image showing enlarged transmission electron microscope (TEM) images and energy dispersive spectroscopy (EDS) composition analysis results of CeO2 and CeO2 / Ag nanoparticles synthesized according to the method for preparing a solder composition in accordance with an embodiment.

[0019] Figure 7A and Figure 7B are X-ray diffraction (XRD) patterns of CeO2 and CeO2 / Ag nanoparticles synthesized according to the method for preparing a solder composition in accordance with an embodiment.

[0020] Figure 8 is a flowchart showing the method for manufacturing a semiconductor package in accordance with an embodiment. Detailed Description of the Embodiments

[0021] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Items described herein in the singular form may be provided in the plural form. Accordingly, unless the context otherwise indicates, a description of a single item provided in the plural should be understood to apply to the remaining plural items.

[0022] When referring to orientation, layout, position, shape, size, composition, quantity, or other metrics, terms such as "identical," "equal," "planar," or "coplanar" as used herein need not mean exactly the same orientation, layout, position, shape, size, composition, quantity, or other metrics, but are intended to cover almost the same orientation, layout, position, shape, size, composition, quantity, or other metrics within the typical variations that may occur due to conventional manufacturing processes. Unless the context or other statements otherwise indicate, the term "substantially" may be used herein to emphasize this meaning. For example, an item described as "substantially identical," "substantially equal," "substantially planar," or "substantially spherical" may be exactly identical, equal, planar, or spherical, or may be identical, equal, planar, or spherical within acceptable variations, such as those that may occur due to the manufacturing process.

[0023] Throughout the specification, when a component is described as "including" a specific element or group of elements, it should be understood that, unless the context otherwise indicates, the component is formed only of the said element or group of elements, or the said element or group of elements may be combined with additional elements to form the component.

[0024] For ease of description, spatial relative terms such as "under", "below", "lower", "above", "upper", "top", "bottom", "front", "rear", etc. may be used herein to describe, for example, the positional relationships as shown in the figures. It will be understood that the spatial relative terms include different orientations of the device in addition to the orientations depicted in the figures.

[0025] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the invention.

[0026] Figure 1 is a cross-sectional view of a semiconductor package 10 manufactured using a solder composition according to an embodiment.

[0027] Referring to Figure 1 , the semiconductor package 10 may include a substrate 20 and a semiconductor chip 30 bonded to the substrate 20.

[0028] In some embodiments, the substrate 20, which may be a package substrate, may include a lower insulating layer 21, an interconnect layer 23, and an upper insulating layer 25.

[0029] In some embodiments, the interconnect layer 23 may include silicon (Si). In an exemplary embodiment, the interconnect layer 23 may be formed of an intrinsic semiconductor material (e.g., a crystalline semiconductor) such as a single element (such as germanium (Ge) or silicon (Si)), or a compound semiconductor (such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), and indium phosphide (InP)). The intrinsic semiconductor material of the interconnect layer 23 may be doped with charge carrier dopants. In an exemplary embodiment, the interconnect layer 23 may have a silicon-on-insulator (SOI) structure. For example, the interconnect layer 23 may include a buried oxide (BOX) layer. The interconnect layer 23 may include conductive regions (e.g., doped impurity wells), or may be patterned with impurities. In addition, the interconnect layer 23 may have various device isolation structures (such as a shallow trench isolation (STI) structure).

[0030] In some embodiments, the interconnect layer 23 may include a plurality of various types of individual devices and interlayer insulating layers. The individual devices may be various microelectronic devices (such as metal oxide semiconductor field effect transistors (MOSFETs) (such as CMOS transistors), large scale integration (LSI) devices, flash memories, dynamic random access memories (DRAMs), static random access memories (SRAMs), electrically erasable programmable read only memories (EEPROMs), phase change random access memories (PRAMs), magnetic random access memories (MRAMs), or resistive random access memories (RRAMs), image sensors (such as CMOS image sensors (CISs)), MEMS, active components, passive components, etc.). The individual devices may be formed in the interconnect layer 23 in a cell region, and the individual devices may be electrically connected to the conductive regions of the interconnect layer 23. The interconnect layer 23 may further include conductive interconnects or conductive plugs that electrically connect at least two of the individual devices or electrically connect the individual devices to the conductive regions of the interconnect layer 23. In addition, each of the individual devices may be electrically separated from other adjacent individual devices by an insulating film.

[0031] In some embodiments, the interconnect layer 23 may include a plurality of interconnect structures for connecting individual devices to other interconnects formed in the interconnect layer 23. The interconnect structures may include metal interconnect patterns extending in a horizontal direction and via plugs extending in a vertical direction. The metal interconnect patterns and the via plugs may include a barrier film and a conductive layer. The barrier film for interconnects may include at least one material selected from titanium (Ti), titanium nitride (TiN), tantalum (Ta), and tantalum nitride (TaN). The conductive layer may include at least one metal selected from tungsten (W), aluminum (Al), and copper (Cu). The interconnect structures may be a multilayer structure in which two or more metal interconnect patterns and two or more via plugs are alternately stacked.

[0032] In some embodiments, the interconnect layer 23 may have a lower surface and an upper surface facing each other, the lower insulating layer 21 may be disposed on the lower surface of the interconnect layer 23, and the upper insulating layer 25 may be disposed on the upper surface of the interconnect layer 23. In this specification, the lower surface and the upper surface of the substrate 20 refer to the surfaces perpendicular to the stacking direction (vertical direction, i.e., the Z direction) of the substrate 20. Specifically, the lower surface may refer to the surface having a lower vertical level than the upper surface, and the upper surface may refer to the surface having a higher vertical level than the lower surface. The lower insulating layer 21 and the upper insulating layer 25 may be protective layers to protect the interconnect layer 23 and the interconnect structures formed in the interconnect layer 23 from external impacts or moisture. In some embodiments, the lower insulating layer 21 and the upper insulating layer 25 may include at least one of silicon nitride, silicon oxide, and silicon oxynitride.

[0033] In some embodiments, the lower pad 22 may be disposed on the lower surface of the interconnect layer 23. The side surface of the lower pad 22 may be covered by the lower insulating layer 21. One surface of the lower pad 22 may be coplanar with the upper surface of the lower insulating layer 21 and may be exposed to the outside.

[0034] In some embodiments, the upper pad 26 may be disposed on the upper surface of the interconnect layer 23. The side surface of the upper pad 26 may be covered by the upper insulating layer 25. One surface of the upper pad 26 may be coplanar with the upper surface of the upper insulating layer 25 and may be exposed to the outside. The conductive solder 35 may be disposed on the upper pad 26 to electrically connect the substrate 20 to the semiconductor chip 30.

[0035] According to some embodiments, the lower pad 22 and the upper pad 26 may also include at least one metal selected from tungsten (W), aluminum (Al), and copper (Cu).

[0036] The semiconductor chip 30 may be disposed on the substrate 20. The conductive solder 35 may be disposed between the semiconductor chip 30 and the substrate 20.

[0037] In some embodiments, the semiconductor chip 30 may be, for example, a memory semiconductor chip. The memory semiconductor chip may be, for example, a volatile memory semiconductor chip (such as DRAM or SRAM), or a non-volatile memory semiconductor chip (such as PRAM, MRAM, FeRAM, or ReRAM).

[0038] In some embodiments, the semiconductor chip 30 may include silicon (Si). Optionally, the semiconductor chip 30 may be formed of an intrinsic semiconductor material (such as germanium (Ge) or silicon (Si)), or a compound semiconductor (such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), and indium phosphide (InP)). The semiconductor chip 30 may have an SOI structure. In addition, the semiconductor chip 30 may have various device isolation structures (such as an STI structure).

[0039] In some embodiments, the conductive solder 35 may be disposed between the semiconductor chip 30 and the substrate 20 to bond the semiconductor chip 30 to the substrate 20.

[0040] In some embodiments, the conductive solder 35 may include a solder material. In some embodiments, the conductive solder 35 may include one or more of tin (Sn), indium (In), bismuth (Bi), antimony (Sb), copper (Cu), silver (Ag), zinc (Zn), lead (Pb), and / or their alloys. For example, in some embodiments, the conductive solder 35 may include one or more of Sn, Pb, Sn-Pb, Sn-Ag, Sn-Au, Sn-Cu, Sn-Bi, Sn-Zn, Sn-Ag-Cu, Sn-Ag-Bi, Sn-Ag-Zn, Sn-Cu-Bi, Sn-Cu-Zn, Sn-Bi-Zn, etc.

[0041] In some embodiments, a solder composition in which a plurality of nanoparticles 33 are mixed with a solder paste may be used to fabricate the conductive solder 35. The nanoparticles 33 may be dispersed in the solder paste to form the solder composition.

[0042] Specifically, the solder composition may include a solder paste and a plurality of nanoparticles 33 dispersed in the solder paste. Each of the nanoparticles 33 may include a core 31 and a metal coating layer 32 surrounding the core 31. The core 31 may include a metal oxide. In an exemplary embodiment, the core 31 may be substantially spherical or spherical.

[0043] For example, the solder paste may include at least one alloy selected from a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy.

[0044] For example, the metal oxide constituting the core 31 may have a density of 7 g / cm 3 or higher and a melting point of 2000 °C or higher. For example, the metal oxide constituting the core 31 may include at least one metal oxide selected from cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

[0045] For example, the diameter of the core 31 may be 10 nm to 1000 nm. According to another exemplary embodiment, the diameter of the core 31 is 100 nm to 500 nm, or 200 nm to 300 nm. For example, the particle size distribution of the size (or diameter) of the core 31 of each nanoparticle 33 may be 20% or less. According to these embodiments, the particle sizes are within 20% of each other's size. According to a further exemplary embodiment, the particle size distribution of the size of the core 31 of each nanoparticle 33 is 10% or less. According to these embodiments, the particle sizes are within 10% of each other's size.

[0046] According to an exemplary embodiment, the plurality of nanoparticles 33 may be included at 0.1 wt% to 1 wt% of the solder composition.

[0047] According to an exemplary embodiment, for each of the plurality of nanoparticles, the thickness of the metal coating layer 32 may be 1 / 5 or less of the diameter of the core 31. The thickness of the metal coating layer will be understood to refer to the size of the coating layer with respect to the surface (e.g., spherical) on which the coating layer is formed. It should be understood that the thickness of the layer may vary and thus have several different thicknesses depending on the respective positions. For example, for each of the plurality of nanoparticles, the metal coating layer 32 may include one or more metals selected from silver (Ag), nickel (Ni), gold (Au), tin (Sn), copper (Cu), and cobalt (Co).

[0048] In some embodiments, the core 31 may be synthesized using a hydrothermal synthesis process. Referring below to Figure 2 and the following drawings, a method of preparing a solder composition including the core 31 will be described in detail.

[0049] In some embodiments, such as Figure 1 shown in, the bumps 36 may be further provided between the semiconductor chip 30 and the conductive solder 35. Together with the conductive solder 35, the bumps 36 may mediate the electrical connection between the semiconductor chip 30 and the substrate 20. The bumps 36 together with the conductive solder 35 may form a conductive column. The bumps 36 may include at least one metal selected from tungsten (W), aluminum (Al), and copper (Cu). The bumps 36 in the embodiments of the present invention may be in the form of columns or pads separately provided from the conductive solder 35.

[0050] Figure 2 is a flowchart showing a method (S100) of preparing a solder composition according to an embodiment. Figure 3 is a flowchart of some operations of a method (S100) of preparing a solder composition according to an embodiment.

[0051] Referring to Figure 2 , an operation (S110) of synthesizing the nanoparticles 33 (see Figure 1 ) is performed. As described above, the nanoparticles 33 include a core 31 (see Figure 1 ) and a metal coating layer 32 surrounding the core 31 (see Figure 1 ).

[0052] First, as Figure 2 shown in, an operation (S111) of synthesizing the core 31 using a hydrothermal synthesis process is performed.

[0053] Specifically, referring to Figure 3 , the operation (S111) of synthesizing the core 31 using a hydrothermal synthesis process includes an operation (S111_1) of preparing a metal precursor solution by stirring a metal precursor and a solvent and an operation (S111_2) of synthesizing metal oxide particles using the metal precursor solution with a hydrothermal synthesis process.

[0054] First, an operation of preparing a metal precursor solution by stirring a metal precursor and a solvent is performed (S111_1). For example, a metal precursor solution is prepared by stirring a metal precursor, a ligand, and a solvent.

[0055] In an exemplary embodiment, the metal precursor may include, for example, at least one selected from a cerium (Ce) precursor, a hafnium (Hf) precursor, a europium (Eu) precursor, a samarium (Sm) precursor, a dysprosium (Dy) precursor, a terbium (Tb) precursor, an erbium (Er) precursor, a ytterbium (Yb) precursor, a thulium (Tm) precursor, and a neodymium (Nd) precursor.

[0056] Next, using a hydrothermal synthesis process, an operation of synthesizing metal oxide particles is performed (S111_2) with the metal precursor solution prepared in the operation of preparing the metal precursor solution (S111_1).

[0057] For example, the hydrothermal synthesis process may be carried out at a temperature of 100 °C to 300 °C. For example, the hydrothermal synthesis process may be carried out for 1 hour to 20 hours. By way of non-limiting exemplary embodiments, the hydrothermal synthesis process may be carried out at a temperature of 130 °C to 180 °C. According to the exemplary embodiment, the hydrothermal synthesis process may be carried out for 16 hours to 20 hours. Optionally, the hydrothermal synthesis process may be carried out for 1 hour to 5 hours.

[0058] The core 31 may be manufactured by synthesizing metal oxide particles.

[0059] In some embodiments, the diameter of the core 31 synthesized in the operation (S111) of synthesizing the core using a hydrothermal synthesis process according to the inventive concept may be 10 nm to 1000 nm. In some embodiments, the size of the core 31 synthesized in the operation (S111) of synthesizing the core using a hydrothermal synthesis process is relatively uniform. For example, the particle size distribution of the size of the core 31 synthesized in the operation (S111) of synthesizing the core using a hydrothermal synthesis process may be 20% or less. For example, the particle size distribution of the size of the core 31 synthesized in the operation (S111) of synthesizing the core using a hydrothermal synthesis process may be 10% or less.

[0060] Returning for reference Figure 2 , an operation of forming a metal coating layer 32 surrounding the core 31 may be performed (S112). Specifically, after forming a metal seed layer on the core 31, a process of coating the core 31 with a metal may be performed.

[0061] The metal coating layer 32 may include, for example, one or more metals selected from silver (Ag), nickel (Ni), gold (Au), tin (Sn), copper (Cu), and cobalt (Co).

[0062] In some embodiments, the thickness of the metal coating layer 32 may be 1 / 5 or less of the diameter of the core 31. For example, when the diameter of the core 31 is 10 nm, the thickness of the metal coating layer 32 may be 2 nm or less. For example, when the diameter of the core 31 is 1000 nm, the thickness of the metal coating layer 32 may be 200 nm or less.

[0063] Through the operation (S110) of synthesizing the composite nanoparticles according to the embodiment, nanoparticles 33 including a core 31 and a metal coating layer 32 surrounding or coating the core 31 are synthesized.

[0064] Returning to the reference Figure 2 , an operation (S120) of mixing the nanoparticles 33 with the solder paste is performed.

[0065] In some embodiments, the solder paste may include one or more alloys selected from a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy.

[0066] In some embodiments, in order to mix the nanoparticles 33 with the solder paste, the mixture of the nanoparticles 33 and the solder paste may be stirred. In some embodiments, the nanoparticles 33 may be mixed with the solder paste such that they are included in an amount of 0.1 wt% to 1 wt% of the solder component.

[0067] Figures 4A to 4D are electron microscope images of CeO2 and CeO2 / Ag nanoparticles synthesized according to the method for preparing a solder composition according to the exemplary embodiment. Figure 5A and Figure 5B are bar graphs showing the diameters of CeO2 and CeO2 / Ag nanoparticles synthesized according to the method for preparing a solder composition according to the embodiment. Figures 6A to 6D is an image showing enlarged transmission electron microscope (TEM) images and energy dispersive spectroscopy (EDS) composition analysis results of CeO2 and CeO2 / Ag nanoparticles synthesized according to the method for preparing a solder composition according to the embodiment. Figure 7A Figures and 7B are X-ray diffraction (XRD) patterns of CeO2 and CeO2 / Ag nanoparticles synthesized according to the method for preparing a solder composition according to the embodiment.

[0068] Here, the structure and effects of the inventive concept are described in more detail through examples and comparative examples, but these examples are only intended to provide a clearer understanding of the inventive concept and are not intended to limit the scope of the inventive concept.

[0069] In some embodiments, CeO2 nanoparticles are synthesized as described in Example 1. In some embodiments, CeO2 / Ag nanoparticles are synthesized as described in Example 2.

[0070] Example 1: Cerium(III) nitrate hexahydrate (Ce(NO3)3·6H 2O) and polyvinylpyrrolidone (PVP) with a molecular weight of 1300K were hydrothermally synthesized at a ratio of 1:3 at 160 °C for 18 hours.

[0071] Example 2: 1 g of the CeO2 nanoparticles from Example 1 was dispersed in 250 ml of deionized (DI) water, and then 50 ml of 0.1 M NaOH was added to adjust the pH to 12. After forming an Ag seed layer on the surface of the CeO2 nanoparticles using silver nitrate (AgNO3), AgNO3 was additionally injected to coat the surface with Ag.

[0072] Thus, CeO2 nanoparticles and CeO2 / Ag nanoparticles as shown in Figures 4A to 4D can be synthesized.

[0073] Specifically, Figure 4A is a TEM image of the CeO2 nanoparticles of Example 1. Figure 4B is an SEM image of the CeO2 nanoparticles of Example 1. Figure 4C is a TEM image of the CeO2 / Ag nanoparticles of Example 2. Figure 4D is an SEM image of the CeO2 / Ag nanoparticles of Example 2.

[0074] As shown in Figures 4A to 4D , it can be seen that by using the hydrothermal synthesis process according to the embodiments to synthesize the CeO2 nanoparticles and CeO2 / Ag nanoparticles of Example 1 and Example 2, nanoparticles with a diameter of 500 nm or less were synthesized.

[0075] Next, referring to Figure 5A and 5B , the size distribution of the CeO2 nanoparticles and CeO2 / Ag nanoparticles of Example 1 and Example 2 synthesized using the hydrothermal synthesis process according to the embodiments can be identified. Specifically, Figure 5A is a histogram showing the diameter distribution of the CeO2 nanoparticles of Example 1. Figure 5B is a histogram showing the diameter distribution of the CeO 2 / Ag nanoparticles of Example 2.

[0076] As shown in Figure 5A , it can be seen that the average diameter D avg of the CeO2 nanoparticles of Example 1 is about 329.5 nm, and the distribution is about 10%. As shown in Figure 5B , it can be seen that the average diameter D avg of the CeO2 / Ag nanoparticles of Example 2 is about 327.4 nm, and the distribution is about 10%.

[0077] According to the method (S100) for preparing a solder composition according to an embodiment, by synthesizing nuclei using a hydrothermal synthesis process, nanoparticles having a particle size distribution of 20% or less can be manufactured. In an exemplary embodiment, by synthesizing nuclei using a hydrothermal synthesis process according to the method (S100) for preparing a solder composition, nanoparticles having a particle size distribution of 10% or less can be manufactured. Accordingly, nanoparticles having an improved particle size distribution can be manufactured.

[0078] Referring to Figures 6A to 6D , it can be seen that the CeO2 / Ag nanoparticles of Example 2 were synthesized. Specifically, Figure 6A is Figure 4C an enlarged TEM image of the CeO2 / Ag nanoparticles in Figures 6B to 6D is an image showing the results of EDS composition analysis respectively labeled with cerium (Ce), oxygen (O), and silver (Ag) of the image using Figure 6A .

[0079] Referring to Figure 7A and Figure 7B , it can be seen that the CeO2 nanoparticles of Example 1 and the CeO2 / Ag nanoparticles of Example 2 were synthesized. Figure 7A and Figure 7B are XRD analysis diagrams of the CeO2 nanoparticles of Example 1 and the CeO2 / Ag nanoparticles of Example 2, respectively.

[0080] As Figure 7A shows, the CeO2 peak can be identified by XRD analysis of the CeO2 nanoparticles of Example 1. As Figure 7B shows, the CeO2 peak and the Ag peak can be respectively identified by XRD analysis of the CeO2 / Ag nanoparticles of Example 2.

[0081] The nanoparticles of Example 1 and Example 2 were mixed with a solder paste, and a thermal cycle (TC) evaluation was performed compared with Comparative Examples 1 to 3. (See Table 1 below) Comparative Examples 1 to 3 are cases where nanoparticles were not mixed with the solder paste (Comparative Example 1) and cases where ZnSe nanoparticles and In2O3 nanoparticles were respectively mixed with the solder paste (Comparative Examples 2 and 3). In Comparative Examples 2 and 3, nanoparticles without a metal coating layer were mixed with the solder paste.

[0082] [Table 1]

[0083] Referring to Table 1, in the case of Comparative Example 1 where no nanoparticles were mixed, after 500 cycles, the shear strength decreased from 74.6 MPa to 69.6 MPa, a decrease of approximately -7%.

[0084] In Comparative Example 2, ZnSe nanoparticles having a density of 5.27 g / cm 3 and a melting point of 1525 °C were mixed with the solder paste, and as a result of performing 500 cycles, the shear strength decreased from 74.7 MPa to 66 MPa, a decrease of approximately -12%.

[0085] In Comparative Example 3, In2O3 nanoparticles having a density of 7.18 g / cm 3 and a melting point of 1910 °C were mixed with the solder paste, and as a result of performing 500 cycles, the shear strength decreased from 75.1 MPa to 67.7 MPa, a decrease of approximately -10%.

[0086] In Example 1, CeO2 nanoparticles having a density of 7.22 g / cm 3 and a melting point of 2400 °C were mixed with the solder paste, and as a result of performing 500 cycles, the shear strength decreased from 71.8 MPa to 68.6 MPa, a decrease of approximately -5%.

[0087] In Example 2, CeO2 / Ag nanoparticles including an Ag-coated CeO2 core and having a density of 7.22 g / cm 3 and a melting point of 2400 °C were mixed with the solder paste, and as a result of performing 500 cycles, the shear strength decreased from 70.3 MPa to 68.1 MPa, a decrease of approximately -3%.

[0088] As a result of the TC tests of Example 1, Example 2, and Comparative Examples 1 to 3 described above, it can be seen that, compared with the case of Comparative Example 1, the reduction rate of the shear strength decreased in the case of Example 1 in which CeO2 nanoparticles were mixed. Furthermore, it can be seen that the reduction rate of the shear strength further decreased in the case of Example 2 in which CeO2 / Ag nanoparticles including an Ag-coated CeO2 core were mixed.

[0089] It can be seen that the ZnSe nanoparticles of Comparative Example 2 have a density of less than 7 g / cm 3 and a melting point of less than 2000 °C, and compared with the case of Comparative Example 1 in which no nanoparticles were mixed and the cases of Example 1 in which CeO2 nanoparticles were mixed and Example 2 in which CeO2 / Ag nanoparticles were mixed, the reduction rate of the shear strength of Comparative Example 2 increased.

[0090] Similarly, the In2O3 nanoparticles of Comparative Example 3 have a melting point of 2000 °C or lower, and it can be seen that, compared with Comparative Example 1 in which no nanoparticles were mixed and the cases of Example 1 in which CeO2 nanoparticles were mixed and Example 2 in which CeO2 / Ag nanoparticles were mixed, the reduction rate of the shear strength of Comparative Example 3 increased.

[0091] It can be seen that in the case of comparing Comparative Example 2 and Comparative Example 3, there is no effect of improving the reliability of the solder composition.

[0092] Since the solder composition according to the examples herein includes metal oxides having a high density (7 g / cm 3 or higher) and a high melting point (2000 °C or higher), the phenomenon of separation of multiple nanoparticles from the solder composition can be improved. Therefore, the shear strength properties of the solder composition can be improved. Accordingly, according to the embodiments, a solder composition having improved performance and reliability can be provided.

[0093] Since the solder composition according to the embodiments further includes a metal coating layer surrounding the core, a solder composition including nanoparticles having improved wetting characteristics with the solder paste is provided. Therefore, the shear strength properties of the solder composition are improved. Accordingly, according to the exemplary embodiments, a solder composition having improved performance and reliability is provided.

[0094] Since the method for preparing a solder composition according to the embodiments synthesizes nanoparticles including metal oxides having a high density (7 g / cm 3 or higher) and a high melting point (2000 °C or higher), the phenomenon of separation of the nanoparticles from the solder composition is improved. Therefore, the shear strength properties of the solder composition are improved. According to the embodiments, a method for preparing a solder composition having improved performance and reliability can be provided.

[0095] Since the solder composition according to the embodiments further includes a metal coating layer surrounding the core, a method for preparing a solder composition can be provided, the solder composition producing nanoparticles having improved wetting characteristics with the solder paste. Therefore, the shear strength properties of the solder composition can be improved. That is, according to the embodiments, a method for preparing a solder composition having improved performance and reliability can be provided.

[0096] According to the exemplary embodiments, metal oxides that can be used as the core of the nanoparticles and have a high density (7 g / cm 3 or higher) and a high melting point (2000 °C or higher) are shown in Table 2 below.

[0097] [Table 2]

[0098] According to the exemplary embodiments, the core of the nanoparticles of the solder composition according to the embodiments includes one or more metal oxides selected from cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

[0099] The core of the nanoparticles synthesized by the method for preparing a solder composition according to an embodiment may include one or more selected from cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

[0100] Figure 8 FIG. is a flowchart showing a method (S200) of manufacturing a semiconductor package according to an embodiment.

[0101] Referring to Figure 8 , an operation (S205) of preparing a solder composition including nanoparticles is performed. In the method (S200) of manufacturing a semiconductor package, the operation (S205) of preparing a solder composition including nanoparticles may include, for example, the method (S100) of preparing a solder composition as described above with reference to Figure 2 and Figure 3 .

[0102] In an embodiment where the operation (S205) of preparing a solder composition is the operation (S100) of preparing a solder composition including nanoparticles, the method may include an operation (S111) of synthesizing a core using a hydrothermal synthesis process, an operation (S112) of forming a metal coating layer around the core, and an operation (S120) of mixing the nanoparticles with a solder paste. The operation (S111) of synthesizing the core 31 using a hydrothermal synthesis process may include, for example, an operation (S111_1) of preparing a metal precursor solution by stirring a metal precursor and a solvent, and an operation (S111_2) of synthesizing metal oxide particles using the metal precursor solution with a hydrothermal synthesis process.

[0103] Subsequently, an operation (S210) of providing a substrate may be performed. For example, the substrate 20 as described above with reference to Figure 1 may be provided.

[0104] Next, an operation (S220) of bonding a semiconductor chip to the substrate using the solder composition may be performed. For example, the semiconductor chip 30 as described above with reference to Figure 1 may be bonded to the substrate 20.

[0105] According to an exemplary embodiment, a solder composition is prepared by the operation (S205). The operation (S220) may include, for example, the solder composition prepared by the operation (S100) of preparing a solder composition including a plurality of nanoparticles may be applied under the semiconductor chip 30 that may be disposed on the substrate 20, and thereafter, the substrate 20 may be bonded to the semiconductor chip 30 by applying heat and / or pressure to the semiconductor chip 30.

[0106] For example, a bump 36 coated with a solder composition prepared by an operation (S100) of preparing a solder composition including a plurality of nanoparticles (see Figure 1 ) can be attached under a semiconductor chip 30, and the semiconductor chip 30 with the bump attached thereto can be disposed on a substrate 20, and then the substrate 20 can be bonded to the semiconductor chip 30 by applying heat and / or pressure.

[0107] The semiconductor package 10 described above can be manufactured by the method (S200) of manufacturing a semiconductor package described above with reference to Figure 8 . Figure 1 According to an embodiment, a method (S200) of manufacturing a semiconductor package using a solder composition including a plurality of nanoparticles can be provided. According to an exemplary embodiment, a method (S200) of manufacturing a semiconductor package having improved performance and reliability can be provided.

[0108] Although the inventive concept has been specifically shown and described with reference to embodiments thereof, it will be understood that various changes in form and detail may be made therein without departing from the spirit and scope of the appended claims.

[0109] ​

Claims

1. A solder composition, comprising: A solder paste, comprising at least one alloy selected from the group consisting of a tin-bismuth alloy and a tin-silver-copper alloy; And A plurality of nanoparticles dispersed in the solder paste, Wherein each nanoparticle of the plurality of nanoparticles comprises a spherical core, Wherein the core comprises a metal oxide, and Among them, the metal oxide has a density of 7 g / cm 3 or higher and a melting point of 2000 °C or higher.

2. The solder composition according to claim 1, wherein, The core is synthesized by a hydrothermal synthesis process.

3. The solder composition according to claim 1, wherein, The core comprises at least one metal oxide selected from the group consisting of cerium oxide, hafnium oxide, europium oxide, samarium oxide, dysprosium oxide, terbium oxide, erbium oxide, ytterbium oxide, thulium oxide, and neodymium oxide.

4. The solder composition according to claim 1, wherein Each core has a diameter of 10 nm to 1000 nm.

5. The solder composition according to claim 4, wherein, The particle size distribution of the diameter of the core is 20% or less, such that the core sizes are within 20% of each other's sizes.

6. The solder composition according to claim 1, wherein, The plurality of nanoparticles are included in an amount of 0.1 wt% to 1 wt% of the solder composition.

7. The solder composition according to claim 1, wherein, Each nanoparticle of the plurality of nanoparticles further comprises a metal coating layer surrounding the core.

8. The solder composition according to claim 7, wherein, For each nanoparticle of the plurality of nanoparticles, the thickness of the metal coating layer is less than 1 / 5 of the diameter of the core.

9. The solder composition according to claim 7, wherein, For each nanoparticle of the plurality of nanoparticles, the metal coating layer comprises one or more metals selected from the group consisting of silver, nickel, gold, tin, copper, and cobalt.

10. A method for preparing a solder composition, the method comprising: Synthesizing nanoparticles comprising a core; And Mixing the nanoparticles with a solder paste, Wherein the step of synthesizing the nanoparticles comprises synthesizing the core by a hydrothermal synthesis process, and wherein the core comprises a metal oxide.

11. The method according to claim 10, wherein The step of synthesizing the core comprises: Preparing a metal precursor solution by stirring a metal precursor and a solvent; and Synthesizing metal oxide particles from the metal precursor solution by a hydrothermal synthesis process, Wherein the hydrothermal synthesis process is carried out at a temperature of 100 °C to 300 °C for 1 hour to 20 hours.

12. The method according to claim 10, wherein, The metal oxide has a density of 7 g / cm 3 or higher and a melting point of 2000 °C or higher.

13. The method according to claim 10, wherein, The core comprises at least one metal oxide selected from the group consisting of cerium oxide, hafnium oxide, europium oxide, samarium oxide, dysprosium oxide, terbium oxide, erbium oxide, ytterbium oxide, thulium oxide, and neodymium oxide.

14. The method according to claim 10, wherein The step of synthesizing the nanoparticles further comprises: forming a metal coating layer surrounding the core.

15. The method according to claim 14, wherein, The metal coating layer comprises one or more metals selected from the group consisting of silver, nickel, gold, tin, copper, and cobalt.

16. The method according to claim 10, wherein The solder paste comprises at least one alloy selected from the group consisting of a tin-bismuth alloy and a tin-silver-copper alloy.

17. A method for manufacturing a semiconductor package, the method comprising: Preparing a solder composition comprising a plurality of nanoparticles; Providing a substrate; And Bonding a semiconductor chip to the substrate using the solder composition, Wherein each nanoparticle of the plurality of nanoparticles comprises a spherical core and a metal coating layer surrounding the core, Wherein the step of preparing the solder composition comprises: Synthesizing the core by a hydrothermal synthesis process and forming a metal coating layer surrounding the core to form the plurality of nanoparticles; and Mixing the plurality of nanoparticles with a solder paste, Wherein the solder paste comprises at least one alloy selected from the group consisting of a tin-bismuth alloy and a tin-silver-copper alloy, Wherein the core comprises a metal oxide, and Among them, the metal oxide has a density of 7 g / cm 3 or higher and a melting point of 2000 °C or higher.

18. The method according to claim 17, wherein the step of synthesizing the core comprises: preparing a metal precursor solution by stirring a metal precursor and a solvent; and synthesizing metal oxide particles from the metal precursor solution using a hydrothermal synthesis process, wherein the hydrothermal synthesis process is carried out at a temperature of 100 °C to 300 °C for 1 hour to 20 hours.

19. The method according to claim 17, wherein, The core comprises at least one metal oxide selected from the group consisting of cerium oxide, hafnium oxide, europium oxide, samarium oxide, dysprosium oxide, terbium oxide, erbium oxide, ytterbium oxide, thulium oxide, and neodymium oxide.

20. The method according to claim 17, wherein The metal coating layer comprises one or more metals selected from the group consisting of silver, nickel, gold, tin, copper, and cobalt.

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