Field effect transistor noise Verilog-A model implementation method considering noise correlation
By converting drain channel noise and gate induction noise into irrelevant noise sources and introducing imaginary terms, the problem of insufficient noise correlation characterization under high frequency conditions is solved, and a high-precision noise model is achieved.
Patent Information
- Application Number
- CN202510748021.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-06
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2045-06-06
AI Technical Summary
The existing Verilog-A model is difficult to accurately characterize the correlation of field-effect transistor noise under high frequency conditions, resulting in insufficient accuracy of the noise model.
By converting the correlation between drain channel noise and gate induced noise into three irrelevant noise sources, and introducing imaginary terms in the frequency domain using the transmission matrix theory and the time domain derivative function, a field effect transistor Verilog-A model considering the noise correlation is established.
The accurate representation of noise correlation in Verilog-A language is realized, and the accuracy of noise model in high-frequency applications is improved.
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Figure CN120257918A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of transistor noise, and in particular to a method for implementing a field effect transistor noise Verilog-A model considering noise correlation. Background Art
[0002] As one of the core components of microwave integrated circuits, the noise characteristics of transistors will directly affect the performance of circuits and systems, especially for high-frequency design applications. Therefore, establishing an accurate microwave noise model is crucial for the optimal design of the noise characteristics of microwave integrated circuits. Verilog-A is a standard programming language for transistor models. Designers can write model equations based on Verilog-A to define the behavioral characteristics of devices. Its powerful characterization ability has made this technology widely used in the modeling of semiconductor devices. However, in actual noise modeling, limited by the existing Verilog-A programming syntax regulations, it is difficult to directly define the noise correlation using equivalent circuit elements combined with analytical formulas in traditional commercial integrated circuit simulation software, especially the definition of the imaginary part term and the frequency-related term, etc. This results in a lack of an effective method to describe the correlation between internal noise sources of transistors when using Verilog-A to describe transistor behavior. Therefore, it is urgent to carry out research on a method for characterizing transistor noise correlation implemented based on the Verilog-A language.
[0003] Currently, scholars at home and abroad have carried out a series of research works on implementing transistor noise correlation modeling based on Verilog-A. In 2005, Colin C. McAndrew et al. from NXP Semiconductors in the United States first used Verilog-A to partially implement the function of noise correlation characterization in a compact model, and introduced the uncorrelated coefficient cbar and the complex form of the correlation factor c to describe the uncorrelated and correlated components of the gate noise and drain noise of MOSFETs. However, the frequency component is not introduced into the real part cr of the correlation factor in this method, resulting in the model being unable to characterize the frequency correlation of the gate noise. At the same time, the magnitude of the correlated noise power spectral density is not considered in this method. In 2006, Michael Schröter et al. from the Dresden University of Technology in Germany separated the correlated noise sources into correlated and uncorrelated parts and characterized them separately based on the power spectral density matrix in Verilog-A. However, ω was incorrectly introduced in the matrix diagonalization process in this method 4terms, resulting in a higher predicted minimum noise figure under high-frequency conditions. In 2010, Ramses van der Toorn et al. from Delft University of Technology in the Netherlands characterized the noise correlation between the base and the collector through a controlled current source defined based on a complex correlation coefficient, and introduced the coefficient jw for the magnitude of the controlled current source with the help of the time derivative function (ddt), thereby realizing the characterization of frequency correlation. However, this method introduces an additional imaginary component j to the real part of the controlled source, resulting in its failure to accurately characterize the noise correlation between the base and the collector. In 2012, Anindya Mukherjee et al. from Infineon Technologies AG in Germany eliminated the error term of ω 4 on the basis of the research of Michael Schröter et al. However, in this method, in order to simplify the modeling, the correlation between the base noise source and the collector noise source is not fully characterized. In 2015, Anjan Chakravorty et al. from the Indian Institute of Technology modeled the noise correlation by orthogonally decomposing the power spectral density matrix into a correlated part and an uncorrelated part. However, in this method, in order to avoid introducing imaginary numbers j in the characterization of the noise correlation part during the Verilog-A implementation process, cn is assumed to be real, which ignores the contribution of the imaginary part of the correlation, resulting in insufficient accuracy of this method in high-frequency application scenarios.
[0004] The above Verilog-A implementation methods all attempt to model the noise correlation of transistors to a certain extent. However, due to the simplified assumptions of the correlation factors or the difficulty of introducing frequency parameters, imaginary components, etc. into the noise correlation factor part in Verilog-A, the accurate characterization of the noise power spectrum correlation has not been achieved, resulting in insufficient accuracy of the noise model in high-frequency applications. How to comprehensively and accurately describe the noise correlation based on Verilog-A is still an urgent problem to be solved in high-precision microwave noise modeling.
[0005] Therefore, it is an urgent problem for those skilled in the art to propose a method for implementing a Verilog-A model of the noise of a field-effect transistor considering noise correlation to solve the difficulties existing in the prior art. Summary of the Invention
[0006] In view of this, the present invention provides a method for implementing a Verilog-A model of the noise of a field-effect transistor considering noise correlation, which breaks through the problem that the traditional Verilog-A-based modeling method is difficult to characterize the imaginary component and its frequency correlation of the noise correlation factor, and realizes the accurate characterization of the noise correlation in the Verilog-A language.
[0007] In order to achieve the above object, the present invention adopts the following technical solutions: A method for implementing a field-effect transistor noise Verilog-A model considering noise correlation, comprising the following steps: S1. Characterize the intrinsic noise of the transistor by the drain-channel noise, gate-induced noise, and the correlation between the drain-channel noise and the gate-induced noise; Among them, the drain-channel noise is described by an equivalent noise current source connected in parallel at the drain end, and the gate-induced noise is described by an equivalent noise current source connected in parallel at the gate end. The correlation between the drain-channel noise and the gate-induced noise is described by a correlation noise factor C; S2. Based on the transmission matrix theory, convert two correlated drain-channel noise sources and gate-induced noise sources into three uncorrelated noise sources, namely the drain noise source , the gate noise source , and the gate correction noise source , so as to obtain the final noise module; S3. Embed the final noise module into the transistor Verilog-A model, combine the predefined nonlinear model module in the transistor Verilog-A model, and obtain a transistor noise Verilog-A model that integrates noise and nonlinear characteristics by superimposing the equivalent noise current component in the definition of the intrinsic key branch current; S4. Compare and verify the established transistor Verilog-A model that integrates noise and nonlinear characteristics with the noise definition components in the commercial integrated circuit simulation software.
[0008] Optionally, based on the transmission matrix theory in S2, convert two correlated drain-channel noise sources and gate-induced noise sources into three uncorrelated noise sources, namely the drain noise source , the gate noise source , and the gate correction noise source , so as to obtain the specific content of the final noise module as follows: S21: Calculate the drain noise source ; S22: Calculate the gate noise source and the gate correction noise source ; S23: Calculate the gate noise equivalent noise current and the drain noise equivalent noise current to obtain the final noise module.
[0009] Optionally, S21 calculates the drain noise source The specific calculation content is as follows: Drain noise source The corresponding power spectral density magnitude is defined as , and the expression is: ; Wherein, is the thermodynamic temperature, is the Boltzmann constant, is the fitting parameter related to the drain channel noise; From the power spectral density of the drain noise source the equivalent current of the drain noise source is further calculated , and the expression is: ; Wherein, is the power spectral density of the drain noise source, is the drain identification string, is the white noise function in Verilog-A used to calculate the equivalent noise current magnitude of a specific branch under noise power injection.
[0010] Optionally, in S22, the specific calculation content for the gate noise source and the gate correction noise source is as follows: S221: The calculation of the gate noise source is divided into the gate noise power spectrum calculation and the gate noise source irrelevance correction term calculation; For the gate noise power spectrum calculation, the gate noise power spectral density is defined as , and the expression is: ; Wherein, is the thermodynamic temperature, is the Boltzmann constant, is the fitting parameter related to the gate-induced noise; For the gate noise source irrelevance correction term calculation, by defining the non-correlation coefficient to assist in correcting , and the expression is: ; Wherein, is the correlation noise factor. When the noise sources are completely correlated, , the irrelevant part is zero. When the two noise sources are completely uncorrelated, , indicating that the two noise sources are completely independent; is the square root operation function; S222: Gate correction noise source The calculation is divided into real - term calculation and imaginary - term calculation; For the gate - corrected noise source in the real - term calculation, the frequency - reading function $realfreq is used to introduce frequency dependence to the real part of the equivalent current $i_{gn - dn - tran}$ of the gate - corrected noise source The expression is: ; where $k_c$ is the coupling coefficient, and $realfreq$ is the frequency - reading function used to read the simulation frequency; For the gate - corrected noise source in the imaginary - term calculation, the time - derivative function $ddt$ is used to introduce frequency dependence and the imaginary unit $j$ to the imaginary part of the equivalent noise current $i_{gn - dn - tran}$ of the gate - corrected noise source. The expression is: ; where $k_i$ is the coupling coefficient, and $ddt()$ is the time - derivative function used to perform time - domain differentiation.
[0011] Optionally, in S23, the calculation of the equivalent noise current of the gate noise and the equivalent noise current of the drain noise to obtain the specific content of the final noise module is: The magnitudes of the equivalent noise currents of the gate noise and the drain noise are respectively: ; ; where $g_i$, $s_i$, and $d_i$ are the node names of the gate, source, and drain respectively; Thus, the final noise module is obtained.
[0012] Optionally, in S3, the final noise module, that is, the equivalent noise currents of the gate noise and the drain noise, is embedded into the transistor Verilog - A model. Combining with the pre - defined non - linear model module in the transistor Verilog - A model, by loading the equivalent branch current of the gate noise between the gate and source nodes, and the equivalent branch current of the drain noise between the drain and source nodes, the final gate - source and drain - source branch currents are: ; ; where and are respectively the magnitudes of the equivalent noise currents of the gate noise and the drain noise, and are respectively the non - linear gate - source current and non - linear drain - source current models; Thus, a transistor noise Verilog-A model that incorporates noise and nonlinear characteristics is obtained.
[0013] As can be seen from the above technical solutions, compared with the prior art, the present invention provides a method for implementing a field-effect transistor noise Verilog-A model that takes into account noise correlation, and has the following beneficial effects: In the present invention, two correlated drain-channel noise sources and gate-induced noise sources in the traditional noise model are converted into three uncorrelated noise sources, namely the drain noise source , the gate noise source , and the gate correction noise source . By means of the time-domain derivative function, an imaginary term is introduced in the frequency domain, and the actual simulation frequency is extracted to accurately represent the real and imaginary components of the gate correction noise source . This breaks through the problem that the traditional Verilog-A-based modeling method is difficult to represent the imaginary components of noise correlation factors and their frequency correlation, and realizes the accurate representation of noise correlation in the Verilog-A language. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the provided drawings.
[0015] Figure 1 It is a flowchart of a method for implementing a field-effect transistor noise Verilog-A model that takes into account noise correlation provided by the present invention; Figure 2 It is an equivalent circuit topology diagram of the Pucel noise model provided by the present invention; Figure 3 It is a schematic diagram of converting two correlated drain-channel noise sources and gate-induced noise sources into three uncorrelated noise sources provided by the present invention, where the three uncorrelated noise sources include a drain noise source, a gate noise source, and a gate correction noise source; Figure 4 It is provided by the present invention V ds =1V simulation result comparison, 4a is the minimum noise figure NFmin result comparison diagram, 4b is the noise resistance Rn result comparison diagram, 4c is the amplitude and phase result comparison diagram of the optimal source reflection coefficient Sopt ; Figure 5Provided by the present invention V ds =2V simulation result comparison, 5a is the minimum noise figure NFmin Result comparison diagram, 5b is the noise resistance Rn Result comparison diagram, 5c is the optimal source reflection coefficient Sopt Amplitude and phase result comparison diagram of Specific implementation manners
[0016] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0017] Refer to Figure 1 As shown, the present invention discloses a method for implementing a field-effect transistor noise Verilog-A model considering noise correlation, including the following steps: S1. Characterize the intrinsic part noise of the transistor by the drain channel noise, gate-induced noise, and the correlation between the drain channel noise and the gate-induced noise; Among them, the drain channel noise is described by an equivalent noise current source connected in parallel at the drain end, the gate-induced noise is described by an equivalent noise current source connected in parallel at the gate end, and the correlation between the drain channel noise and the gate-induced noise is described by a correlation noise factor C; S2. Based on the transfer matrix theory, convert two correlated drain channel noise sources and gate-induced noise sources into three uncorrelated noise sources, namely the drain noise source , the gate noise source and the gate correction noise source , so as to obtain the final noise module; S3. Embed the final noise module into the transistor Verilog-A model, combine the pre-defined non-linear model module in the transistor Verilog-A model, and obtain the transistor noise Verilog-A model that integrates noise and non-linear characteristics by superimposing equivalent noise current components in the definition of the intrinsic key branch current; S4. Compare and verify the established transistor Verilog-A model that integrates noise and non-linear characteristics in combination with the noise definition components in the commercial integrated circuit simulation software.
[0018] Further, in S2, based on the transfer matrix theory, two correlated drain channel noise sources and gate-induced noise sources is converted into three independent noise sources, namely the drain noise source , the gate noise source and the gate correction noise source , so the specific content of the final noise module is as follows: S21: Calculate the drain noise source ; S22: Calculate the gate noise source and the gate correction noise source ; S23: Calculate the equivalent noise current of the gate noise and the equivalent noise current of the drain noise to obtain the final noise module.
[0019] Furthermore, the specific content of S21's calculation of the drain noise source is as follows: The power spectral density magnitude of the drain noise source is defined as , and the expression is: ; where is the thermodynamic temperature, is the Boltzmann constant, is the fitting parameter related to the drain channel noise; The equivalent current of the drain noise source is further calculated from the power spectral density of the drain noise source , and the expression is: ; where is the power spectral density of the drain noise source, is the drain identification string, is the white noise function in Verilog-A used to calculate the equivalent noise current magnitude of a specific branch under noise power injection.
[0020] Furthermore, the specific content of the calculation of the gate noise source and the gate correction noise source in S22 is as follows: S221: The calculation of the gate noise source is divided into the calculation of the gate noise power spectrum and the calculation of the independence correction term of the gate noise source; For the calculation of the gate noise power spectrum, the gate noise power spectral density is defined as , and the expression is: ; wherein, is the thermodynamic temperature, is the Boltzmann constant, is the fitting parameter related to the gate-induced noise; For the calculation of the non-correlation correction term of the gate noise source, by defining the non-correlation coefficient to assist in the correction of , the expression is: ; wherein, is the correlation noise factor. When the noise sources are completely correlated, , the uncorrelated part is zero. When the two noise sources are completely uncorrelated, , indicating that the two noise sources are completely independent; is the square root operation function; S222: Gate-corrected noise source The calculation is divided into the calculation of the real part and the calculation of the imaginary part; For the calculation of the real part of the gate-corrected noise source , the frequency reading function $realfreq is used to introduce frequency correlation to the real part of the equivalent current ign_dn_tran of the gate-corrected noise source , and the expression is: ; wherein, is the coupling coefficient, and $realfreq is the frequency reading function used to read the simulation frequency; For the calculation of the imaginary part of the gate-corrected noise source , the time derivative function ddt is used to introduce frequency correlation and the imaginary number j to the imaginary part of the equivalent noise current ign_dn_tran of the gate-corrected noise source, and the expression is: ; wherein, ki is the coupling coefficient, and ddt() is the time derivative function used to perform time domain differentiation.
[0021] Specifically, in S221, the equivalent current ign_tran of the gate noise source is calculated by combining the non-correlation coefficient cbar with the gate-induced noise power spectrum density NoisePwrG, and the expression is:
[0022] cbar wherein, cbaris the non - linear correlation coefficient, NoisePwerG is the gate - induced noise power spectral density, "gate" is the gate identification string, and white_noise is the white - noise function in Verilog - A used to calculate the equivalent noise current magnitude of a specific branch under noise power injection; The real and imaginary terms in S222 each contain two coupling coefficients kr and ki, and the expressions are respectively:
[0023]
[0024] where P is the drain - channel noise fitting parameter, R is the gate - induced noise fitting parameter, and are respectively the imaginary and real parts of the correlation noise factor C, gm is the transconductance, Cgs is the gate - source capacitance, sqrt () is the square - root operation function; Combining the real and imaginary terms, the equivalent current ign_dn_tran of the gate - corrected noise source is calculated, and the expression is:
[0025] where ign_dn_tran_r is the real - part term of the equivalent current of the gate - corrected noise source and ign_dn_tran_i is the imaginary - part term of the equivalent current of the gate - corrected noise source .
[0026] Furthermore, in S23, the equivalent noise current of the gate noise and the equivalent noise current of the drain noise are calculated, and the specific content of the final noise module is: The magnitudes of the equivalent noise currents of the gate noise and the drain noise are respectively: ; ; where gi, si, and di are respectively the node names of the gate, source, and drain; Thus, the final noise module is obtained.
[0027] Furthermore, in S3, the final noise module, that is, the equivalent noise currents of the gate noise and the drain noise, is embedded into the transistor Verilog - A model. Combining with the pre - defined non - linear model module in the transistor Verilog - A model, by loading the equivalent branch current of the gate noise between the gate and source nodes and the equivalent branch current of the drain noise between the drain and source nodes, the final gate - source and drain - source branch currents are: ; ; wherein, and are respectively the equivalent noise current magnitudes of gate noise and drain noise, and are respectively the nonlinear gate-source current and nonlinear drain-source current models; Thus, a transistor noise Verilog-A model integrating noise and nonlinear characteristics is obtained.
[0028] In a specific embodiment, it includes the following content: (1) Taking the Pucel noise model as an example, the topology of the equivalent circuit model of the Pucel noise model is as Figure 2 shown. In Figure 2 , the noise of the intrinsic part of the transistor is characterized by drain channel noise, gate-induced noise, and the correlation between the two kinds of noise. Among them, the drain channel noise is characterized by the equivalent noise current source connected in parallel at the drain end, and the gate-induced noise is characterized by the equivalent noise current source connected in parallel at the gate end.
[0029] (2) Considering that the correlation between two equivalent voltage / current sources cannot be directly defined based on an analytical formula in Verilog-A. Based on the transmission matrix theory, two correlated drain channel noise sources and gate-induced noise sources are converted into three uncorrelated noise sources, namely the drain noise source , the gate noise source , and the gate correction noise source . The conversion process is as Figure 3 shown.
[0030] ① The specific content of the calculation for the drain noise source is as follows: The power spectral density magnitude corresponding to the drain noise source is defined as , and the expression is: ; wherein, is the thermodynamic temperature, is the Boltzmann constant, is the fitting parameter related to the drain channel noise; The equivalent current of the drain noise source is further calculated from the power spectral density of the drain noise source, and the expression is: ; Among them, is the power spectral density of the drain noise source, is the drain identification string, and the white noise function in Verilog-A is used to calculate the equivalent noise current magnitude of a specific branch under noise power injection.
[0031] ② For the gate noise source and the gate correction noise source The specific content of the calculation is as follows: The calculation of the gate noise source is divided into the calculation of the gate noise power spectrum and the calculation of the non-correlation correction term of the gate noise source; For the calculation of the gate noise power spectrum, the gate noise power spectral density is defined as , and the expression is: ; Among them, is the thermodynamic temperature, is the Boltzmann constant, is the fitting parameter related to the gate-induced noise; For the calculation of the non-correlation correction term of the gate noise source, by defining the non-correlation coefficient to assist in correcting , the expression is: ; Among them, is the correlation noise factor. When the noise sources are completely correlated, , the non-correlated part is zero. When the two noise sources are completely uncorrelated, , indicating that the two noise sources are completely independent; is the square root operation function; From the non-correlation coefficient combined with the gate-induced noise power spectral density , the equivalent current of the gate noise source is calculated, and the expression is: ; Among them, is the non-linear correlation coefficient, is the gate-induced noise power spectral density, is the gate identification string, and the white noise function in Verilog-A is used to calculate the equivalent noise current magnitude of a specific branch under noise power injection; The calculation of the gate correction noise source is divided into the calculation of the real part and the calculation of the imaginary part; The real and imaginary terms respectively contain two coupling coefficients and , and the expressions are respectively: ; ; Among them, is the drain-channel noise fitting parameter, is the gate-induced noise fitting parameter, and are respectively the imaginary and real parts of the correlation noise factor , is the transconductance, is the gate-source capacitance, is the square root operation function; For the calculation of the real term of the gate-corrected noise source , the frequency reading function $realfreq is used to introduce frequency correlation to the real part of the equivalent current ign_dn_tran of the gate-corrected noise source , and the expression is: ; Among them, is the coupling coefficient, and $realfreq is the frequency reading function used to read the simulation frequency; For the calculation of the imaginary term of the gate-corrected noise source , the time derivative function ddt is used to introduce frequency correlation and the imaginary number j to the imaginary part of the equivalent noise current ign_dn_tran of the gate-corrected noise source, and the expression is: ; Among them, ki is the coupling coefficient, and ddt() is the time derivative function used to perform time domain differentiation; Combining the real and imaginary terms, the equivalent current ign_dn_tran of the gate-corrected noise source is calculated, and the expression is: ; Among them, ign_dn_tran_r is the real part term of the equivalent current of the gate-corrected noise source , and ign_dn_tran_i is the imaginary part term of the equivalent current of the gate-corrected noise source .
[0032] ③ Calculate the gate noise equivalent noise current and the drain noise equivalent noise current , and the specific content of the final noise module obtained is: The magnitudes of the equivalent noise currents of the gate noise and the drain noise are respectively: ; ; wherein, gi, si, and di are the node names of the gate, source, and drain respectively; Thus, the final noise module is obtained.
[0033] (3) By combining the pre-defined non-linear model module in the transistor Verilog-A model and superimposing the equivalent noise current component in the definition of the intrinsic key branch current, the transistor noise Verilog-A model integrating noise and non-linear characteristics can be obtained. Combining Figure 3 with the equivalent model topology shown, the equivalent branch current of the gate noise is loaded between the gate and source nodes, and the equivalent branch current of the drain noise is loaded between the drain and source nodes. The final gate-source and drain-source branch currents are respectively: ; ; wherein, and are respectively the magnitudes of the equivalent noise currents of the gate noise and the drain noise, and are respectively the non-linear gate-source current and non-linear drain-source current models; Thus, the transistor noise Verilog-A model integrating noise and non-linear characteristics is obtained.
[0034] In another specific embodiment, the transistor noise Verilog-A model integrating noise and non-linear characteristics is verified.
[0035] To verify the effectiveness of the method of the present invention, comparative experiments are respectively carried out by setting different control groups. The parameter values of the Pucel noise model adopted within each group are extracted based on a 4×25μm GaAs pHEMT device. Among them, the first group corresponds to the noise module established based on considering the transistor noise correlation in the present invention; the second group corresponds to the noise model established based on the traditional Verilog-A noise modeling method without considering noise correlation; the third group corresponds to the noise model established by combining the noise equivalent circuit topology built in the commercial integrated circuit simulation software with the noise correlation control.
[0036] The noise characteristics of each group under different biases are compared and verified, wherein the gate-source bias voltage range is V gs = 0.6~0.8V (step: 0.2V), and the drain-source bias voltage range is V ds= 1~2 V (step: 1 V), the frequency range is 20~40 GHz (step: 0.1 GHz). The verification parameters include the minimum noise figure NFmin , the noise resistance Rn , and the magnitude and phase of the optimum source reflection coefficient Sopt . The verification and comparison results are as shown in Figure 4 , Figure 5 . Among them, Figure 4 is the comparison of the simulation results for V ds = 1 V. 4a is the comparison diagram of the minimum noise figure NFmin results, 4b is the comparison diagram of the noise resistance Rn results, and 4c is the comparison diagram of the magnitude and phase results of the optimum source reflection coefficient Sopt ; Group A is the noise simulation results of the first group of models; Group B is the noise simulation results of the second group of models; Group C is the noise simulation results of the third group of models. Figure 5 is the comparison of the simulation results for V ds = 2 V. 5a is the comparison diagram of the minimum noise figure NFmin results, 5b is the comparison diagram of the noise resistance Rn results, and 5c is the comparison diagram of the magnitude and phase results of the optimum source reflection coefficient Sopt ; Group A is the noise simulation results of the first group of models; Group B is the noise simulation results of the second group of models; Group C is the noise simulation results of the third group of models.
[0037] To evaluate the influence of noise correlation on the noise modeling accuracy, the accuracy of each noise parameter of the Group B model under four bias conditions is calculated in the range of 20~40 GHz. The results are shown in Table 1, where Bias I: V gs = 0.6 V, V ds = 1 V; Bias II: V gs = 0.8 V, V ds = 1 V; Bias III: V gs = 0.6 V, V ds = 2 V, and Bias IV: V gs = 0.8 V, V ds = 2 V.
[0038] Table 1 Noise model error ; Among them, is the model simulation value; is the reference data (here, the simulation results of Group C are used as the reference data); N is the serial number of each frequency point within the frequency range.
[0039] From Figure 5 and Table 1, it can be seen that the deviation between the noise modeling and simulation results without considering noise correlation and those considering noise correlation is relatively large. Among them, the maximum minimum noise figure error reaches 49.50%, the maximum amplitude error of the optimal source reflection coefficient Sopt reaches 14.79%, and the lowest phase accuracy is only 29.35%, indicating that not considering noise correlation in noise modeling will bring significant errors. Therefore, considering noise correlation is a key technology for achieving accurate noise modeling. The simulation results of the noise model established based on the present invention are basically consistent with those of the noise model established by using the equivalent circuit topology and defining components in combination with noise correlation in commercial integrated circuit simulation software, verifying the effectiveness and accuracy of the present invention.
[0040] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the broadest scope consistent with the principles and novel features disclosed herein.
Claims
1. A method for implementing a field effect transistor noise Verilog-A model considering noise correlation, characterized in that It includes the following steps: S1. Characterize the intrinsic part noise of the transistor by the drain channel noise, gate-induced noise, and the correlation between the drain channel noise and the gate-induced noise; Among them, the drain-channel noise is described by an equivalent noise current source connected in parallel at the drain end The gate-induced noise is described by an equivalent noise current source connected in parallel at the gate end The correlation between the drain-channel noise and the gate-induced noise is described by the correlation noise factor C; S2. Based on the transmission matrix theory, convert two correlated drain channel noise sources and gate-induced noise sources into three uncorrelated noise sources, namely the drain noise source , the gate noise source and the gate correction noise source , thereby obtaining the final noise module; S3. Embed the final noise module into the transistor Verilog-A model, combine with the pre-defined non-linear model module in the transistor Verilog-A model, and obtain the transistor noise Verilog-A model that integrates noise and non-linear characteristics by superimposing the equivalent noise current component in the definition of the intrinsic key branch current; S4. Compare and verify the established transistor Verilog-A model that integrates noise and non-linear characteristics with the noise definition components in the commercial integrated circuit simulation software.
2. The method for implementing a field-effect transistor noise Verilog-A model considering noise correlation according to claim 1, wherein Based on the transfer matrix theory in S2, two related drain channel noise sources and gate-induced noise sources are converted into three uncorrelated noise sources, namely the drain noise source , the gate noise source and the gate correction noise source . Thus, the specific content of the final noise module is as follows: S21: Calculate the drain noise source ; S22: Calculate the gate noise source and the gate correction noise source ; S23: Calculate the gate noise equivalent noise current and the drain noise equivalent noise current to obtain the final noise module.
3. The method for implementing a field-effect transistor noise Verilog-A model considering noise correlation according to claim 2, wherein S21 for the drain noise source The specific content of the calculation is as follows: Drain noise source The corresponding power spectral density magnitude is defined as , and the expression is: ; wherein, is the thermodynamic temperature, is the Boltzmann constant, is the fitting parameter related to the drain-channel noise; From the power spectral density of the drain noise source The equivalent current of the drain noise source is further calculated as , and the expression is: ; Among them, is the power spectral density of the drain noise source, is the drain identification string, is the white noise function in Verilog-A used to calculate the equivalent noise current magnitude of a specific branch under noise power injection.
4. The method for implementing a field-effect transistor noise Verilog-A model considering noise correlation according to claim 2, wherein The specific content of calculating the gate noise source and the gate correction noise source in S22 is as follows: S221: Gate noise source The calculation is divided into the calculation of the gate noise power spectrum and the calculation of the irrelevant correction term of the gate noise source; For the calculation of the gate noise power spectrum, the gate noise power spectral density is defined as , and the expression is: ; wherein, is the thermodynamic temperature, is the Boltzmann constant, is the fitting parameter related to the gate-induced noise; For the calculation of the correction term for the independence of the gate noise source, the non-correlation coefficient is defined to assist in the correction of . The expression is as follows: ; Among them, is the relevant noise factor. When the noise sources are completely correlated, the irrelevant part is zero. When the two noise sources are completely uncorrelated, it indicates that the two noise sources are completely independent; is the square root operation function; S222: Gate correction noise source The calculation is divided into real-term calculation and imaginary-term calculation; For the real-term calculation of the gate correction noise source The frequency reading function $realfreq is used to introduce frequency dependence into the real part of the equivalent current ign_dn_tran of the gate correction noise source The expression is as follows: ; Among them, is the coupling coefficient, and $realfreq is the frequency reading function used to read the simulation frequency; For the calculation of the imaginary term of the gate correction noise source The time derivative function ddt is used to introduce frequency correlation and the imaginary number j into the imaginary part of the equivalent noise current ign_dn_tran of the gate correction noise source. The expression is as follows: ; wherein, ki is the coupling coefficient, and ddt() is the time derivative function for taking the derivative with respect to time domain.
5. The method for implementing a field-effect transistor noise Verilog-A model considering noise correlation according to claim 2, wherein The gate noise equivalent noise current in S23 and the drain noise equivalent noise current are calculated, and the specific content of the final noise module is as follows: The magnitudes of the equivalent noise currents of the gate noise and the drain noise are respectively: ; ; wherein, gi, si, and di are the node names of the gate, source, and drain respectively; Thus, the final noise module is obtained.
6. The method for implementing a field-effect transistor noise Verilog-A model considering noise correlation according to claim 1, wherein In S3, embed the final noise module, that is, the equivalent noise currents of the gate noise and the drain noise, into the transistor Verilog-A model, combine with the pre-defined non-linear model module in the transistor Verilog-A model, and by loading the equivalent branch current of the gate noise between the gate and source nodes, and the equivalent branch current of the drain noise between the drain and source nodes, the final gate-source and drain-source branch currents are: ; ; Among them, and are the equivalent noise current magnitudes of the gate noise and the drain noise respectively, and are the nonlinear gate-source current and nonlinear drain-source current models respectively; Thus, the transistor noise Verilog-A model that integrates noise and non-linear characteristics is obtained.
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