Low current stress and global soft switching operation control method for DC interconnection device

Abstract

The present invention discloses a low current stress and global soft switching operation control method for a DC interconnection device, comprising dividing the front and back half cycles of a switching cycle into a first interval and a second interval and a third interval and a fourth interval respectively; operating a first switching operation mode during forward transmission of the DC interconnection device, so that the current of the inductor L maintains a first state in the first interval, maintains a second state in the third interval, and maintains zero in the second and fourth intervals; operating a second switching operation mode during reverse transmission of the DC interconnection device, so that the current of the inductor L maintains a second state in the first interval, maintains the first state in the third interval, and maintains zero in the second and fourth intervals; both the first and second states divide the interval in which they are located into three sub-intervals to form an isosceles trapezoidal wave; in the first and second switching operation modes, the turning off and on of the IGBT tube and the turning on of the MOSFET tube are all completed in the second interval or the fourth interval.

Description

Technical Field

[0001] The present invention relates to the field of power electronic conversion technology, and in particular to a low current stress and global soft switching operation control method for a DC interconnection device. Background Art

[0002] With the widespread integration of DC sources and loads such as distributed photovoltaic power generation and electric vehicles into distribution networks, the efficiency of DC energy transmission in power systems has become a hot topic. As the provider of electrical isolation and DC voltage conversion, isolated bidirectional DC interconnects play an irreplaceable role in hybrid AC / DC distribution networks.

[0003] On the one hand, traditional single-phase-shift control methods present challenges in DC interconnects, such as a narrow soft-switching range and high current stress, making efficient power transmission across the full load range difficult. To address these issues, existing research has explored extended phase-shift control, dual-phase-shift control, triple-phase-shift control, and hybrid multi-control methods. Extended phase-shift control and dual-phase-shift control methods primarily analyze the operating modes of the DC interconnect and attempt to reduce current stress by finding an appropriate phase-shift ratio to improve transmission efficiency. However, finding an appropriate phase-shift ratio to reduce current stress can lead to difficulties in achieving full-range soft switching. Triple-phase-shift control and hybrid multi-control methods introduce multiple control variables to generate more operating modes, thereby reducing current stress and widening the soft-switching range. However, the excessive number of control variables significantly increases control complexity and places stricter demands on controller performance. Furthermore, in applications with large input voltage fluctuations, such as photovoltaic power generation and underground operations, the ability of the DC interconnect to tolerate input voltage fluctuations within a certain range while maintaining its original performance also requires careful consideration.

[0004] Therefore, a new technical solution is urgently needed to solve the technical problem of how to control the DC interconnection device to achieve global soft switching and efficient DC transmission with low current stress. Summary of the Invention

[0005] The present invention provides a method for controlling the low current stress and global soft switching operation of a DC interconnection device, which is used to solve the technical problem of how to control the DC interconnection device to achieve global soft switching and efficient DC transmission with low current stress.

[0006] To achieve the above objectives, the present invention provides a method for controlling low current stress and global soft switching operation of a DC interconnection device, comprising:

[0007] Divide the first and second half periods of a switching cycle into a first interval and a second interval and a third interval and a fourth interval respectively;

[0008] When the DC interconnection device is transmitting in the forward direction, the first switching operation mode is operated, so that the current of the inductor L is maintained in the first state in the first interval, in the second state in the third interval, and remains at zero in the second and fourth intervals. When the DC interconnection device is transmitting in the reverse direction, the second switching operation mode is operated, so that the current of the inductor L is maintained in the second state in the first interval, in the first state in the third interval, and remains at zero in the second and fourth intervals.

[0009] In both the first and second states, the interval is divided into the first, second, and third subintervals to form an isosceles trapezoidal wave. In the first state, the isosceles trapezoidal wave increases from 0, stabilizes, and gradually decreases to 0 in the first, second, and third subintervals, respectively. In the second state, the isosceles trapezoidal wave decreases from 0, stabilizes, and gradually increases to 0 in the first, second, and third subintervals, respectively.

[0010] In the first switching mode and the second switching mode, all the switching tubes and IGBT switching tubes of the output side bridge arm Q 1 and Q 2 shut down and open and MOSFET switch tube Q 3. Q 4. Q 5 and Q The opening of 6 was completed in the second or fourth interval.

[0011] Preferably, it also includes:

[0012] In the first switch operation mode and the second switch operation mode, the switch tube is controlled Q 3. Q 4. Q 5 and Q 6 and the opening and closing moments thereby controlling the duration division of the first subinterval, the second subinterval, and the third subinterval;

[0013] Control switch tube Q 3. Q 4. Q 5 and Q The opening and closing times of 6 include:

[0014] When the DC interconnection device operates in the first switch operation mode, the output voltage of the DC interconnection device is obtained. V o ; Output voltage V o The duty cycle is obtained by subtracting the preset output voltage reference value through the PI regulator. D 1; According to the duty cycle D 1Generate drive signal T 15 andT 16 , according to the driving signal T 15 and T 16 Drive the switch tubes separately Q 5 and Q 6. Drive signal T 15 and T 16 Lagging 180° respectively, the driving signal is obtained T 13 and T 14 , according to the driving signal T 13 and T 14 Drive the switch tubes separately Q 3 and Q 4;

[0015] When the DC interconnection device operates in the second switch operation mode, the input voltage of the DC interconnection device is obtained. V in ; The preset input voltage reference value and input voltage V in After the difference is made, the duty cycle is obtained through the PI regulator D 2. According to the duty cycle D 2Generate drive signal T 23 and T 24 , according to the driving signal T 23 and T 24 Drive the switch tubes separately Q 3 and Q 4. Drive signal T 23 and T 24 Lagging 180° respectively, the driving signal is obtained T 25 and T 26 , according to the driving signal T 25 and T 26 Drive the switch tubes separately Q 5 and Q 6.

[0016] Preferably, the first switch operating mode includes:

[0017] Switching tube Q1 is turned on at the beginning of the first interval and turned off at the end of the second interval; the switch tube Q 2 is turned on at the beginning of the third interval and turned off at the end of the fourth interval;

[0018] Switching tube Q 6 is turned on at the beginning of the first subinterval of the first interval and turned off at the end; the switch tube Q 5 is turned on at the beginning of the first subinterval of the first interval and is turned off at the end of the second subinterval of the first interval;

[0019] Switching tube Q 3 is turned on at the beginning of the first subinterval of the third interval and turned off at the end; Q 4 is turned on at the beginning of the first subinterval of the third interval and is turned off at the end of the second subinterval of the third interval;

[0020] During the entire switching cycle, the IGBT switch S 5 Keep on, IGBT switch tube S 1 、 S 2 、 S 3 and S 4 Keep them off.

[0021] Preferably, the second switch operating mode includes:

[0022] Switching tube Q 1. S 1 and S 4 The switch is turned on at the beginning of the first interval and turned off at the end of the second interval. Q 2. S 2 and S 3 It is turned on at the beginning of the third interval and turned off at the end of the fourth interval;

[0023] Switching tube Q 3. The switch is turned on at the beginning of the first subinterval of the first interval and turned off at the end; Q 4 is turned on at the beginning of the first subinterval of the first interval and is turned off at the end of the second subinterval of the first interval;

[0024] Switching tube Q 6 is turned on at the beginning of the first subinterval of the third interval and turned off at the end; Q 5 is turned on at the beginning of the first subinterval of the third interval and is turned off at the end of the second subinterval of the third interval;

[0025] During the entire switching cycle, the switch S 5 Keep it off.

[0026] Preferably, it also includes:

[0027] When the DC interconnect device operates in the first switching operating mode or the second switching operating mode, the voltage change of the inductor L is controlled by controlling the switching tube in the DC interconnect device to be turned on or off, so that the voltage of the inductor L maintains a first positive value, 0, and a first negative value in the first sub-interval, the second sub-interval, and the third sub-interval divided by the first state, and maintains a first negative value, 0, and a first positive value in the first sub-interval, the second sub-interval, and the third sub-interval divided by the second state, respectively. The current of the inductor L is thereby controlled to form an isosceles trapezoidal wave in the first and second states.

[0028] Preferably, it also includes:

[0029] First positive value The calculation formula can be expressed as:

[0030] ;

[0031] Then in the first sub-interval divided by the first state, the waveform of the current of the inductor L changing with time is Expressed as:

[0032] ;

[0033] in, Indicates the input voltage of the DC interconnection device; Indicates the output voltage of the DC interconnection device; Indicates the main transformer ratio; Indicates the auxiliary transformer ratio; Indicates the inductance value; Indicates real time; Indicates the start time of the first subinterval;

[0034] When the voltage of the inductor L is 0, the voltage of the inductor L is The calculation formula can be expressed as:

[0035] ;

[0036] The waveform of the current of the inductor L in the second sub-interval divided by the first state changing with time is Expressed as:

[0037] ;

[0038] in, Indicates the start time of the second subinterval; represents the current of the inductor L at the beginning of the second subinterval;

[0039] First negative value The calculation formula can be expressed as:

[0040] ;

[0041] The waveform of the current of the inductor L in the third sub-interval divided by the first state changing with time is Expressed as:

[0042] ;

[0043] in, Indicates the start time of the third subinterval; represents the current of the inductor L at the beginning of the third subinterval.

[0044] Preferably, it also includes:

[0045] The waveform of the current of the inductor L in the first sub-interval divided by the second state changes with time Expressed as:

[0046] ;

[0047] in, Waveform The current value of the waveform The current value remains stable.

[0048] The waveform of the current of the inductor L in the second sub-interval divided by the second state changes with time Expressed as:

[0049] ;

[0050] The waveform of the current of the inductor L in the third sub-interval divided by the second state changes with time Expressed as:

[0051] .

[0052] Preferably, it also includes:

[0053] In a DC interconnection device, the secondary side terminals of the main transformer are connected to the secondary side terminals of the auxiliary transformer. Then, there is a proportional relationship between the current of the inductor L and the input current of the auxiliary transformer.

[0054] The proportional relationship is determined by the turns ratio of the main transformer to the auxiliary transformer, including:

[0055] If the turns ratio of the main transformer and the auxiliary transformer are both 1: N 1 and 1:N 2, then the current of inductor L is and auxiliary transformer input current The proportional relationship between them is:

[0056] ;

[0057] That is, the current transmitted by the auxiliary transformer i 2 In the first and third intervals, an isosceles trapezoidal wave proportional to the isosceles trapezoidal wave of the current of the inductor L is formed.

[0058] Preferably, it also includes:

[0059] When the input voltage of the DC interconnection device in the forward direction exceeds the preset range, the switch tube in the first switch working mode is controlled to Q 5 and Q 6 Start and shut down at the same time, switch tube Q 3 and Q 4 is started and shut down simultaneously, so that the current of the inductor L maintains the third state in the first interval, maintains the fourth state in the third interval, and maintains 0 in the second and fourth intervals; the third and fourth states both divide the interval into a fourth sub-interval and a fifth sub-interval to form a triangular wave; in the third state, the triangular wave increases from 0 and gradually decreases to 0 in the fourth and fifth sub-intervals, respectively; in the fourth state, the triangular wave decreases from 0 and gradually increases to 0 in the fourth and fifth sub-intervals, respectively.

[0060] The present invention has the following beneficial effects:

[0061] The low current stress and global soft switching operation control method of the DC interconnection device of the present invention divides the front and back half cycles of a switching cycle into the first interval and the second interval and the third interval and the fourth interval respectively, and forms an isosceles trapezoidal wave of the inductor current in the first interval and the third interval. By optimizing the current waveform into an isosceles trapezoidal wave, the method of the present invention can greatly reduce the current stress and thus improve the transmission efficiency of the DC interconnection device. By keeping the inductor current at 0 in the second interval and the fourth interval, and controlling all the switch tubes and IGBT switch tubes of the output side bridge arm, the inductor current is controlled to be 0. Q 1 and Q 2 shut down and open and MOSFET switch tube Q 3. Q 4. Q 5 and Q 6 is opened in the second interval or the fourth interval, so that the method of the present invention realizes global soft switching, eliminates switching losses during the operation of the DC interconnection device, and further improves the transmission efficiency of the DC interconnection device.

[0062] In addition to the above-described objects, features and advantages, the present invention has other objects, features and advantages. The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] The accompanying drawings, which constitute part of the present invention, are provided to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are provided to explain the present invention and do not constitute an undue limitation of the present invention. In the accompanying drawings:

[0064] Figure 1 Schematic diagram of a DC interconnection device according to a preferred embodiment of the present invention.

[0065] Figure 2 It is a schematic diagram of a method flow of a preferred embodiment of the present invention.

[0066] Figure 3 It is a schematic diagram of the positive half-cycle working mode path during forward transmission of the DC interconnection device of the preferred embodiment of the present invention.

[0067] Figure 4 1 is a current flow diagram of working modes 1 to 4 in forward transmission of a preferred embodiment of the present invention. Figure 4 (a) is the current flow diagram of working mode 1 in forward transmission; Figure 4 (b) is the current flow diagram of working mode 2 in forward transmission; Figure 4 (c) is the current flow diagram of working mode 3 in forward transmission; Figure 4 (d) is the current flow diagram of working mode 4 in forward transmission.

[0068] Figure 5 It is a schematic diagram of the positive half-cycle working mode path during reverse transmission of the DC interconnection device of the preferred embodiment of the present invention.

[0069] Figure 6 1 is a schematic diagram of current flow in working modes 1 to 4 in reverse transmission according to a preferred embodiment of the present invention. Figure 6 (a) is the current flow diagram of working mode 1 in reverse transmission; Figure 6 (b) is the current flow diagram of working mode 2 in reverse transmission; Figure 6 (c) is the current flow diagram of working mode 3 in reverse transmission; Figure 6 (d) is the current flow diagram of working mode 4 in reverse transmission.

[0070] Figure 7 1 is a schematic diagram of the simulation results of the forward transmission and the voltage and current waveforms of each device in a preferred embodiment of the present invention. Figure 7 (a) is the waveform of the controlled output voltage in forward transmission; Figure 7 (b) is the main transformer input current waveform during forward transmission; Figure 7(c) is the auxiliary transformer input current waveform during forward transmission; Figure 7 (d) is the switch tube in forward transmission Q 1 Voltage and current waveforms between collector and emitter; Figure 7 (e) is the switch tube in forward transmission Q 5. Drain-source voltage and current waveforms; Figure 7 (f) is the switch tube in forward transmission Q 6. Drain-source voltage and current waveforms; Figure 7 (g) is the switch tube in forward transmission S 1 Voltage and current waveforms across an anti-parallel diode.

[0071] Figure 8 1 is a schematic diagram of the reverse transmission simulation results and the voltage and current waveforms of each device according to a preferred embodiment of the present invention. Figure 8 (a) is the waveform of the controlled output voltage in reverse transmission; Figure 8 (b) is the waveform of the main transformer input current in reverse transmission; Figure 8 (c) is the auxiliary transformer input current waveform during reverse transmission; Figure 8 (d) is the switch tube in reverse transmission Q 1 Voltage and current waveforms between collector and emitter; Figure 8 (e) is the switch tube in reverse transmission Q 3. Drain-source voltage and current waveforms; Figure 8 (f) is the switch tube in reverse transmission Q 4. Drain-source voltage and current waveforms; Figure 8 (g) is the switch tube in reverse transmission S 1 Collector and emitter voltage and current waveforms. DETAILED DESCRIPTION

[0072] The embodiments of the present invention are described in detail below with reference to the accompanying drawings. However, the present invention can be implemented in many different ways as defined and covered by the claims.

[0073] See also Figure 1 The DC interconnection device of the present invention includes an input side bridge arm, a transformer group and an output side bridge arm.

[0074] The input side bridge arm includes:

[0075] Input capacitance C 1 negative electrode and C 2. Positive node and diode D r1 、 D r2 Node connected; input capacitor C 1Positive electrode and main power bridge arm IGBT Q1. The collector node of the MOSFET is connected Q 3 Drain, input capacitor C 2 Negative pole and main power bridge arm IGBT Q The emitter node of MOSFET 2 is connected Q 6 Source; Capacitor C 3 Anode and diode D r1 Cathode node connected to MOSFET Q 4Drain, capacitor C 3Cathode and diode D r2 Anode node and MOSFET Q 6 drain connected to the main power bridge arm IGBT Q 1Emitter and IGBT Q 2's collector node ( Figure 1 Point A) is connected to the auxiliary transformer T r2 Same-name terminal, diode D r1 Anode and D r2 Cathode node ( Figure 1 Point B) is connected to the main transformer T r1 Primary side opposite end, MOSFET Q 4 Source and MOSFET Q 5. Drain connected to auxiliary transformer T r2 Auxiliary power bridge arm MOSFET Q 3. Q 4. Q 5. Q 6 The drain and source are connected in sequence.

[0076] The transformer group includes:

[0077] Main transformer T r1 The same-name terminal of the primary side and the inductor L One end is connected, T r1 Primary side opposite terminal and input capacitor C 1 negative electrode and C 2 positive nodes connected; auxiliary transformer T r2 The same-name end of the original side and L The other end is connected to the main power bridge arm Q 1 emitter and Q 2 collector nodes are connected, auxiliary power bridge arm Q 4 Source and Q 5 Drain Node ( Figure 1Point C) T r2 Original side synonym end; T r1 Secondary side synonyms and T r2 The turns ratio of the main transformer and the auxiliary transformer are 1: N 1 and 1: N 2.

[0078] The output side bridge arm includes:

[0079] The output side bridge arm adopts H5 inverter bridge structure and diode full bridge structure, specifically including: switch tube S 1Emitter and switch tube S 2 Collector node and main transformer T r1 The secondary side terminals are connected via an inductor, and the switch tube S 3Emitter and switch tube S 4 Collector node and auxiliary transformer T r2 The secondary side opposite terminals are connected through an inductor; the diode D r3 Anode and diode D r4 Cathode node and main transformer T r1 The secondary side is connected to the same end, the diode D r5 Anode and diode D r6 Cathode node and auxiliary transformer T r2 The secondary side opposite terminals are connected; the switch tube S 1. S 3 Collector node and diode D r3 、 D r5 The cathode nodes are all connected to S 5 collectors are connected, S 5Emitter and output capacitor C o The positive electrode of the switch is connected to S 2. S 4 emitter node and diode D r4 、 D r6 The anode nodes are connected to the output capacitor C o The negative pole is connected. S 1 、 S 2 、S 3 、 S 4 and S 5 All are IGBT switching tubes.

[0080] exist Figure 1 middle, V in Indicates input voltage; i in Indicates input current; i 1 represents inductance L Current; i 2 represents the auxiliary transformer current; i o Indicates output current; V o Indicates the output voltage.

[0081] Example 1:

[0082] See also Figure 2 In a preferred embodiment of the present invention, a method for controlling low current stress and global soft switching operation of a DC interconnection device is provided, comprising:

[0083] Divide the first and second half periods of a switching cycle into a first interval and a second interval and a third interval and a fourth interval respectively;

[0084] When the DC interconnection device is transmitting in the forward direction, the first switching operation mode is operated, so that the current of the inductor L is maintained in the first state in the first interval, in the second state in the third interval, and remains at zero in the second and fourth intervals. When the DC interconnection device is transmitting in the reverse direction, the second switching operation mode is operated, so that the current of the inductor L is maintained in the second state in the first interval, in the first state in the third interval, and remains at zero in the second and fourth intervals.

[0085] In both the first and second states, the interval is divided into the first, second, and third subintervals to form an isosceles trapezoidal wave. In the first state, the isosceles trapezoidal wave increases from 0, stabilizes, and gradually decreases to 0 in the first, second, and third subintervals, respectively. In the second state, the isosceles trapezoidal wave decreases from 0, stabilizes, and gradually increases to 0 in the first, second, and third subintervals, respectively.

[0086] In the first switching mode and the second switching mode, all the switching tubes and IGBT switching tubes of the output side bridge arm Q 1 and Q 2 shut down and open and MOSFET switch tube Q 3. Q 4. Q 5 andQ The opening of 6 was completed in the second or fourth interval.

[0087] In a preferred embodiment of the present invention, a switch tube is also included. Q 3. Q 4. Q 5 and Q 6. Duty cycle determination method:

[0088] In the first switch operation mode and the second switch operation mode, the switch tube is controlled Q 3. Q 4. Q 5 and Q 6 and the opening and closing moments thereby controlling the duration division of the first subinterval, the second subinterval, and the third subinterval;

[0089] Control switch tube Q 3. Q 4. Q 5 and Q The opening and closing times of 6 include:

[0090] When the DC interconnection device operates in the first switch operation mode, the output voltage of the DC interconnection device is obtained. V o ; Output voltage V o The duty cycle is obtained by subtracting the preset output voltage reference value through the PI regulator. D 1; According to the duty cycle D 1Generate drive signal T 15 and T 16 , according to the driving signal T 15 and T 16 Drive the switch tubes separately Q 5 and Q 6. Drive signal T 15 and T 16 Lagging 180° respectively, the driving signal is obtained T 13 and T 14 , according to the driving signal T 13 and T 14 Drive the switch tubes separately Q 3 and Q 4;

[0091] When the DC interconnection device operates in the second switch operation mode, the input voltage of the DC interconnection device is obtained.V in ; The preset input voltage reference value and input voltage V in After the difference is made, the duty cycle is obtained through the PI regulator D 2. According to the duty cycle D 2Generate drive signal T 23 and T 24 , according to the driving signal T 23 and T 24 Drive the switch tubes separately Q 3 and Q 4. Drive signal T 23 and T 24 Lagging 180° respectively, the driving signal is obtained T 25 and T 26 , according to the driving signal T 25 and T 26 Drive the switch tubes separately Q 5 and Q 6.

[0092] In a preferred embodiment of the present invention, the first switch operating mode includes:

[0093] Switching tube Q 1 is turned on at the beginning of the first interval and turned off at the end of the second interval; the switch tube Q 2 is turned on at the beginning of the third interval and turned off at the end of the fourth interval;

[0094] Switching tube Q 6 is turned on at the beginning of the first subinterval of the first interval and turned off at the end; the switch tube Q 5 is turned on at the beginning of the first subinterval of the first interval and is turned off at the end of the second subinterval of the first interval;

[0095] Switching tube Q 3 is turned on at the beginning of the first subinterval of the third interval and turned off at the end; Q 4 is turned on at the beginning of the first subinterval of the third interval and is turned off at the end of the second subinterval of the third interval;

[0096] During the entire switching cycle, the IGBT switch S 5 Keep on, IGBT switch tube S 1 、 S2 、 S 3 and S 4 Keep them off.

[0097] In a preferred embodiment of the present invention, the second switch operating mode includes:

[0098] Switching tube Q 1. S 1 and S 4 The switch is turned on at the beginning of the first interval and turned off at the end of the second interval. Q 2. S 2 and S 3 It is turned on at the beginning of the third interval and turned off at the end of the fourth interval;

[0099] Switching tube Q 3. The switch is turned on at the beginning of the first subinterval of the first interval and turned off at the end; Q 4 is turned on at the beginning of the first subinterval of the first interval and is turned off at the end of the second subinterval of the first interval;

[0100] Switching tube Q 6 is turned on at the beginning of the first subinterval of the third interval and turned off at the end; Q 5 is turned on at the beginning of the first subinterval of the third interval and is turned off at the end of the second subinterval of the third interval;

[0101] During the entire switching cycle, the switch S 5 Keep it off.

[0102] In a preferred embodiment of the present invention, the present invention further comprises:

[0103] When the DC interconnect device operates in the first switching operating mode or the second switching operating mode, the voltage change of the inductor L is controlled by controlling the switching tube in the DC interconnect device to be turned on or off, so that the voltage of the inductor L maintains a first positive value, 0, and a first negative value in the first sub-interval, the second sub-interval, and the third sub-interval divided by the first state, and maintains a first negative value, 0, and a first positive value in the first sub-interval, the second sub-interval, and the third sub-interval divided by the second state, respectively. The current of the inductor L is thereby controlled to form an isosceles trapezoidal wave in the first and second states.

[0104] In a preferred embodiment of the present invention, the present invention further comprises:

[0105] First positive value The calculation formula can be expressed as:

[0106] ;

[0107] Then in the first sub-interval divided by the first state, the waveform of the current of the inductor L changing with time is Expressed as:

[0108] ;

[0109] in, Indicates the input voltage of the DC interconnection device; Indicates the output voltage of the DC interconnection device; Indicates the main transformer ratio; Indicates the auxiliary transformer ratio; Indicates the inductance value; Indicates real time; Indicates the start time of the first subinterval;

[0110] When the voltage of the inductor L is 0, the voltage of the inductor L is The calculation formula can be expressed as:

[0111] ;

[0112] The waveform of the current of the inductor L in the second sub-interval divided by the first state changing with time is Expressed as:

[0113] ;

[0114] in, Indicates the start time of the second subinterval; represents the current of the inductor L at the beginning of the second subinterval;

[0115] First negative value The calculation formula can be expressed as:

[0116] ;

[0117] The waveform of the current of the inductor L in the third sub-interval divided by the first state changing with time is Expressed as:

[0118] ;

[0119] in, Indicates the start time of the third subinterval; represents the current of the inductor L at the beginning of the third subinterval.

[0120] In a preferred embodiment of the present invention, the present invention further comprises:

[0121] The waveform of the current of the inductor L in the first sub-interval divided by the second state changes with time Expressed as:

[0122] ;

[0123] in, M Waveform The current value of the waveform The current value remains stable.

[0124] The waveform of the current of the inductor L in the second sub-interval divided by the second state changes with time Expressed as:

[0125] ;

[0126] The waveform of the current of the inductor L in the third sub-interval divided by the second state changes with time Expressed as:

[0127] ;

[0128] In a preferred embodiment of the present invention, the present invention further comprises:

[0129] In a DC interconnection device, the secondary side terminals of the main transformer are connected to the secondary side terminals of the auxiliary transformer. Then, there is a proportional relationship between the current of the inductor L and the input current of the auxiliary transformer.

[0130] The proportional relationship is determined by the turns ratio of the main transformer to the auxiliary transformer, including:

[0131] If the turns ratio of the main transformer and the auxiliary transformer are both 1: N 1 and 1: N 2, then the current of inductor L is and auxiliary transformer input current The proportional relationship between them is:

[0132] ;

[0133] That is, the current transmitted by the auxiliary transformer In the first and third intervals, an isosceles trapezoidal wave proportional to the isosceles trapezoidal wave of the current in the inductor L is formed.

[0134] In a preferred embodiment of the present invention, the present invention further comprises:

[0135] When the input voltage of the DC interconnection device in the forward direction exceeds the preset range, the switch tube in the first switch working mode is controlled to Q 5 and Q 6 Start and shut down at the same time, switch tube Q 3 andQ 4 is started and shut down simultaneously, so that the current of the inductor L maintains the third state in the first interval, maintains the fourth state in the third interval, and maintains 0 in the second and fourth intervals; the third and fourth states both divide the interval into a fourth sub-interval and a fifth sub-interval to form a triangular wave; in the third state, the triangular wave increases from 0 and gradually decreases to 0 in the fourth and fifth sub-intervals, respectively; in the fourth state, the triangular wave decreases from 0 and gradually increases to 0 in the fourth and fifth sub-intervals, respectively.

[0136] The low current stress and global soft switching operation control method of the DC interconnection device of the present invention divides the front and back half cycles of a switching cycle into the first interval and the second interval and the third interval and the fourth interval respectively, and forms an isosceles trapezoidal wave of the inductor current in the first interval and the third interval. By optimizing the current waveform into an isosceles trapezoidal wave, the method of the present invention can greatly reduce the current stress and thus improve the transmission efficiency of the DC interconnection device. By keeping the inductor current at 0 in the second interval and the fourth interval, and controlling all the switch tubes and IGBT switch tubes of the output side bridge arm, the inductor current is controlled to be 0. Q 1 and Q 2 shut down and open and MOSFET switch tube Q 3. Q 4. Q 5 and Q 6 is opened and completed in the second interval or the fourth interval, so that the method of the present invention realizes global soft switching, completely eliminates the switching loss during the operation of the DC interconnection device, and further improves the transmission efficiency of the DC interconnection device.

[0137] Example 2:

[0138] In a preferred embodiment of the present invention, a DC interconnection device controlled based on the method of the present invention is analyzed:

[0139] 1. When the DC interconnection device performs forward energy transmission:

[0140] When energy flows forward, the primary switch tube Q 1. Q 2 are alternately turned on with a duty cycle of 50%, Q 3 to Q 6 According to the switch tube determined above Q 3. Q 4. Q 5 and Q The duty cycle of 6 is alternately turned on, and the secondary side switch tube S 5 is always in the on state, the switch tube S 1 to S 4 are all in the off state, and their anti-parallel diodes and full-bridge diodes transmit energy together.

[0141] Considering the high symmetry of the operating modes of the DC interconnection device, see Figure 3 , take the positive half-cycle working modal path as an example for analysis, and the same applies to the negative half-cycle.

[0142] (1) Working mode 1[ t 0, t 1]: t At time 0, as the starting point of a switching cycle, the switch tube Q 2 off, Q 1. Q 5. Q 6 conduction, by Figure 3 Given the current waveform, t There is no current flowing before time 0, and the switch Q 1. Q 5. Q 6. Achieve zero-current switching (ZCS) Q 2. Achieve ZCS shutdown.

[0143] The current flow diagram of working mode 1 is as follows Figure 4 As shown in (a), the inductor current increases linearly from zero and t 1 reaches the steady-state value at the same time, the secondary side switch tube S 1. S 4 Anti-parallel diodes and diodes D r3 、 D r6 The turns ratios of the main and auxiliary transformers are 1: N 1 and 1: N 2. Output voltage V o . Main transformer primary voltage V AB = V in / 2, auxiliary transformer primary voltage V BC = V in , and its corresponding secondary voltage is N 2 V in , so the secondary voltage of the main transformer is V o - N 2 V in .

[0144] (2) Working mode 2[ t 1, t 2]: Int 1 moment, the switch tube Q 6 Shutdown, current i 2 for Q 6. Drain-source capacitance is charged, when Q 6Drain-source capacitance is charged to V in / 2, the charging process ends and the current i 2Through the switch tube Q 5 and diode D r2 Continuous flow. Q 6 in current i 2 peak turn-off, giving Q 6 The drain-source capacitor charging time can be ignored. Since the capacitor voltage cannot change suddenly, the switch Q 6. Zero-voltage-switching (ZVS) shutdown can be achieved.

[0145] The current flow diagram of working mode 2 is as follows Figure 4 (b) The primary voltage of the main transformer is V in / 2, the primary voltage of the auxiliary transformer is V in / 2, and its corresponding secondary voltage is N 2 V in / 2, so the secondary voltage of the main transformer is V o - N 2 V in / 2.

[0146] (3) Working mode 3[ t 2, t 3]: In t 2. At this moment, the switch tube Q 5 Shutdown, current i 2 for Q 5. Drain-source capacitance is charged, when Q 5Drain-source capacitance is charged to V in / 2, the charging process ends and the current i 2Through the switch tube Q 3. Q 4 anti-parallel diodes are conducting and continuing current. Q 5 in current i 2 peak turn-off, giving Q 5. The time of drain-source capacitance charging can be ignored. Q 5. ZVS shutdown can be achieved.

[0147] The current flow diagram of working mode 3 is as follows Figure 4 As shown in (c), the primary voltage of the main transformer is V in / 2, the primary voltage of the auxiliary transformer is 0, so the secondary voltage of the main transformer is V o .

[0148] (4) Working mode 4[ t 3, t 4]: The current path in working mode 4 is as follows Figure 4 As shown in (d), t At moment 3, the inductor current drops to zero. S 1. S 4 anti-parallel diodes and diodes D r3 、 D r6 Natural shutdown, t 3 to t 4. At this moment, only the switch Q 1 and S 5 conduction. t 4. Switching tube Q 2. Q 3. Q 4 is turned on, switch tube Q 1 shuts down due to t 4 Before the moment, the circuit current is zero, and the switch tube Q 1 also achieves ZCS shutdown, Q 2. Q 3. Q 4. Achieve ZCS conduction.

[0149] 2. When the DC interconnection device performs reverse energy transmission:

[0150] When energy flows in the reverse direction, the primary side Q 1. Q 2 are alternately turned on with a duty cycle of 50%, Q 3 to Q 6. The switch tube is determined as above. Q 3. Q 4. Q 5 and Q 6 duty cycle alternately conducts, and the forward flow is initially turned on Q 6. Different, reverse flow is first turned on at the beginning Q 3. Secondary side S 5 The switch is always in the off state. S 1. S 4. S 2. S 3 respectively with the switch tubeQ 1. Q 2 The switch states remain consistent and are alternately turned on with a duty cycle of 50%.

[0151] Considering the high symmetry of the operating modes of the DC interconnection device, see Figure 5 , take the positive half-cycle working modal path as an example for analysis, and the same applies to the negative half-cycle.

[0152] (1) Working mode 1[ t 0, t 1]: t At time 0, as the starting point of a switching cycle, the switch tube Q 2 off, Q 1. Q 3. Q 4 conduction, by Figure 5 Given the current waveform, t There is no current flowing before time 0, and the switch Q 1. Q 3. Q 4. Achieve ZCS conduction, Q 2. Achieve ZCS shutdown.

[0153] The current flow diagram of working mode 1 is as follows Figure 6 As shown in (a), the inductor current decreases linearly from zero and t 1 reaches the steady-state value at the same time, the secondary side switch tube S 1. S 4 conduction, the primary voltage of the main transformer V AB = V in / 2, auxiliary transformer primary voltage V BC =0, so the secondary voltage of the main transformer is V o .

[0154] (2) Working mode 2[ t 1, t 2]: In t 1 moment, the switch tube Q 3 Shutdown, current i 2 for Q 3. Drain-source capacitance is charged, when Q 3Drain-source capacitance is charged to V in / 2, the charging process ends and the current i 2Through the switch tube Q 4 and diode D r1 Continuous flow. Q 3 in currenti 2 peak turn-off, giving Q 3. The drain-source capacitance charging process time can be ignored. Because the capacitor voltage cannot change suddenly, the switch tube Q 3. ZVS shutdown can be achieved.

[0155] The current flow diagram of working mode 2 is as follows Figure 6 (b) The primary voltage of the main transformer is V in / 2, the primary voltage of the auxiliary transformer is V in / 2, and its corresponding secondary voltage is N 2 V in / 2, so the secondary voltage of the main transformer is V o - N 2 V in / 2.

[0156] (3) Working mode 3[ t 2, t 3]: In t 2. At this moment, the switch tube Q 4 Shutdown, current i 2 for Q 4. Drain-source capacitance is charged, when Q 4Drain-source capacitance is charged to V in / 2, the charging process ends and the current i 2Through the switch tube Q 5. Q 6 The anti-parallel diodes are conducting and continuing the current. Q 4 in current i 2 peak turn-off, giving Q 4 The drain-source capacitor charging time can be ignored. Since the capacitor voltage cannot change suddenly, the switch Q 4. ZVS shutdown can be achieved.

[0157] The current flow diagram of working mode 3 is as follows Figure 6 As shown in (c), the primary voltage of the main transformer is V in / 2, the primary voltage of the auxiliary transformer is V in , so the secondary voltage of the main transformer is V o - N 2 V in .

[0158] (4) Working mode 4[ t 3, t4]: The current path in working mode 4 is as follows Figure 6 As shown in (d), t At time 3, the inductor current rises to zero, and the switch tube Q 3. Q The 4 anti-parallel diodes can all achieve natural shutdown. t 3 to t 4 moments, only Q 1 and S 1. S 4 The switch tube is turned on. t 4. At this moment, the primary side switch tube Q 2. Q 5. Q 6 is turned on, the switch tube Q 1 is turned off, the secondary side switch tube S 2. S 3Open, S 1. S 4 shut down due to t 4 Before the moment, the circuit current is zero, and the switch tube Q 1. S 1. S 4 also achieves ZCS shutdown, Q 2. Q 5. Q 6. S 2. S 3. Achieve ZCS conduction.

[0159] In forward and reverse transmission, the output current The expression is:

[0160] ;

[0161] in, Indicates the real-time current of the inductor L.

[0162] In summary, under forward transmission and reverse transmission, Q 1. Q 2. S 1. S 2. S 3. S 4 can achieve ZCS turn-on and turn-off. Q 3. Q 4 、 Q 5. Q 6 Can achieve ZVS, ZCS conduction, ZVS shutdown. In the energy forward flow mode, S 5 remains on, and no current flows through its anti-parallel diode; in the energy reverse flow mode, S5 is always kept off, and its anti-parallel diode can be turned on and off naturally.

[0163] Verification part:

[0164] In order to better prove the effectiveness of the method of the present invention, the following simulation examples are used for verification. Figure 1 The DC interconnection device topology shown in the figure is simulated in MATLAB / Simulink. The simulation parameters are shown in Table 1:

[0165] ;

[0166] 1. Energy forward transmission simulation results

[0167] Figure 7 The simulation results of the forward energy transmission of the DC interconnection device and the voltage and current waveforms of each device are displayed. The DC interconnection device simulation model adopts a voltage-type control strategy and adopts closed-loop control for the output voltage. Figure 7 (a) shows the waveform of the controlled output voltage. Figure 7 (b) shows the main transformer input current waveform, Figure 7 (c) shows the auxiliary transformer input current waveform. Figure 7 (a) It can be seen that the output voltage is well controlled, the voltage fluctuates around 2000V, and the fluctuation amplitude does not exceed 20V; Figure 7 (b) Figure 7 (c) The input currents to the main and auxiliary transformers are intermittent. This is consistent with the theoretical analysis, confirming its validity. Furthermore, the input current to the auxiliary transformer is much smaller than that to the main transformer, confirming the design principle that the main transformer transmits the majority of the power, while the auxiliary transformer transmits a smaller portion.

[0168] Figure 7 (d) Figure 7 (e) Figure 7 (f) Figure 7 (g) shows the voltage and current waveforms at both ends of each switch tube of the DC interconnection device in the forward energy flow mode. Figure 7 (d) shows the switch tube Q 1 The voltage and current between the collector and emitter, Figure 7 (e) Figure 7 (f) shows the switch tube Q 5. Q 6Drain-source voltage and current, Figure 7 (g) shows the switch tube S 1The voltage and current across the antiparallel diode.

[0169] from Figure 7 (d) It can be seen that in the switch tube Q Before 1 is turned on, the current flowing through it is zero, so the switch tube Q 1 can achieve ZCS conduction. Figure 7 (e) Figure 7 (f) It can be seen that in the switch tube Q 5. Q Before the switch is turned on, the current flowing through it is zero, so the switch Q 5. Q 6 can achieve ZCS conduction. Figure 7 (g) It can be seen that in the switch tube S 1 Before the anti-parallel diode is turned on and off, the current flowing through it is zero and there is no switching loss.

[0170] 2. Simulation results of reverse energy transfer

[0171] Figure 8 The simulation results of reverse energy transmission of DC interconnection device are shown. In this simulation model, the voltage type control strategy is also adopted, and the input voltage is controlled by closed loop. Figure 8 (a) shows the controlled input voltage waveform, Figure 8 (b) shows the main transformer input current waveform, Figure 8 (c) shows the auxiliary transformer input current waveform. Figure 8 (a) It can be seen that the input voltage is well controlled, the voltage fluctuates around 800V, and the fluctuation amplitude does not exceed 4V. Figure 8 (b) Figure 8 (c) It can be seen that the input current of the main transformer and the auxiliary transformer is intermittent, which is consistent with the theoretical analysis results and verifies the correctness of the theoretical analysis.

[0172] Figure 8 The voltage and current waveforms at both ends of each switch tube of the DC interconnect device in the forward energy flow mode are shown. Figure 8 (d) shows the switch tube Q 1 The voltage and current between the collector and emitter, Figure 8 (e) Figure 8 (f) shows the switch tube Q 3. Q 4Drain-source voltage and current, Figure 8 (g) shows the switch tube S 1Collector and emitter voltage and current.

[0173] from Figure 8 (d) Figure 8 (e) Figure 8 (f) Figure 8 (g) It can be seen that in the switch tubeQ 1. Q 3. Q 4. S Before 1 is turned on, the current flowing through it is zero, so the switch tube Q 1. Q 3. Q 4. S 1 can achieve ZCS conduction.

[0174] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A method for controlling low current stress and global soft switching operation of a DC interconnection device, characterized in that: include: Divide the first and second half periods of a switching cycle into a first interval and a second interval and a third interval and a fourth interval respectively; When the DC interconnection device is transmitting in the forward direction, the first switching operation mode is operated, so that the current of the inductor L is maintained in the first state in the first interval, in the second state in the third interval, and is maintained at zero in the second interval and the fourth interval; when the DC interconnection device is transmitting in the reverse direction, the second switching operation mode is operated, so that the current of the inductor L is maintained in the second state in the first interval, in the first state in the third interval, and is maintained at zero in the second interval and the fourth interval; Both the first state and the second state divide the interval into a first sub-interval, a second sub-interval, and a third sub-interval to form an isosceles trapezoidal wave; in the first state, the isosceles trapezoidal wave increases from 0, stabilizes, and gradually decreases to 0 in the first sub-interval, the second sub-interval, and the third sub-interval in sequence; in the second state, the isosceles trapezoidal wave decreases from 0, stabilizes, and gradually increases to 0 in the first sub-interval, the second sub-interval, and the third sub-interval in sequence; In the first switch operation mode and the second switch operation mode, all the switch tubes and IGBT switch tubes of the output side bridge arm Q 1 and Q 2 shut down and open and MOSFET switch tube Q 3. Q 4. Q 5 and Q The opening of 6 is completed in the second interval or the fourth interval; Among them, IGBT Q 1Emitter and IGBT Q 2 collector nodes are connected, IGBT Q 1. The collector node of the MOSFET is connected Q 3 drain, IGBT Q 2. The emitter node of MOSFET is connected Q 6 Source, MOSFET Q 3. Q 4. Q 5. Q 6. The drain and source are connected in sequence; In the first switch operation mode and the second switch operation mode, the switch tube is controlled Q 3. Q 4. Q 5 and Q 6 and thereby control the duration division of the first sub-interval, the second sub-interval and the third sub-interval; The control switch tube Q 3. Q 4. Q 5 and Q The opening and closing times of 6 include: When the DC interconnection device operates in the first switch operation mode, the output voltage of the DC interconnection device is obtained. V o ; Output voltage V o The duty cycle is obtained by subtracting the preset output voltage reference value through the PI regulator. D 1; According to the duty cycle D 1Generate drive signal T 15 and T 16 , according to the driving signal T 15 and T 16 Drive the switch tubes separately Q 5 and Q 6. Drive signal T 15 and T 16 Lagging 180° respectively, the driving signal is obtained T 13 and T 14 , according to the driving signal T 13 and T 14 Drive the switch tubes separately Q 3 and Q 4; When the DC interconnection device operates in the second switch operation mode, the input voltage of the DC interconnection device is obtained. V in ; Set the preset input voltage reference value and input voltage V in After the difference is made, the duty cycle is obtained through the PI regulator D 2; According to the duty cycle D 2Generate drive signal T 23 and T 24 , according to the driving signal T 23 and T 24 Drive the switch tubes separately Q 3 and Q 4. Drive signal T 23 and T 24 Lagging 180° respectively, the driving signal is obtained T 25 and T 26 , according to the driving signal T 25 and T 26 Drive the switch tubes separately Q 5 and Q 6.

2. The low current stress and global soft switching operation control method of a DC interconnection device according to claim 1, characterized in that: The first switch operation mode includes: Switching tube Q 1 is turned on at the beginning of the first interval and turned off at the end of the second interval; Q 2 is turned on at the beginning of the third interval and turned off at the end of the fourth interval; Switching tube Q 6 is turned on at the beginning of the first subinterval of the first interval and turned off at the end; Q 5 is turned on at the beginning of the first subinterval of the first interval and is turned off at the end of the second subinterval of the first interval; Switching tube Q 3 is turned on at the beginning of the first subinterval of the third interval and turned off at the end; Q 4 is turned on at the beginning of the first subinterval of the third interval and is turned off at the end of the second subinterval of the third interval; During the entire switching cycle, the IGBT switch S 5 Keep on, IGBT switch tube S 1 、 S 2 、 S 3 and S 4 Keep them off.

3. The low current stress and global soft switching operation control method of a DC interconnection device according to claim 2, characterized in that: The second switch operation mode includes: Switching tube Q 1. S 1 and S 4 The switch is turned on at the beginning of the first interval and turned off at the end of the second interval; Q 2. S 2 and S 3 opening at the beginning of the third interval and closing at the end of the fourth interval; Switching tube Q 3 is turned on at the beginning of the first subinterval of the first interval and turned off at the end; Q 4 is turned on at the beginning of the first subinterval of the first interval and is turned off at the end of the second subinterval of the first interval; Switching tube Q 6 is turned on at the beginning of the first subinterval of the third interval and turned off at the end; Q 5 is turned on at the beginning of the first sub-interval of the third interval and is turned off at the end of the second sub-interval of the third interval; During the entire switching cycle, the switch S 5 Keep it off.

4. The low current stress and global soft switching operation control method of a DC interconnection device according to claim 3, characterized in that: Also includes: When the DC interconnect device operates in the first switching operating mode or the second switching operating mode, the voltage change of the inductor L is controlled by controlling the switching tube in the DC interconnect device to be turned on or off, so that the voltage of the inductor L maintains a first positive value, 0, and a first negative value in the first sub-interval, the second sub-interval, and the third sub-interval divided by the first state, and maintains a first negative value, 0, and a first positive value in the first sub-interval, the second sub-interval, and the third sub-interval divided by the second state, respectively. The current of the inductor L is thereby controlled to form an isosceles trapezoidal wave in the first and second states.

5. The low current stress and global soft switching operation control method of a DC interconnection device according to claim 4, characterized in that: Also includes: The first positive value The calculation formula is expressed as: ； Then, in the first subinterval divided by the first state, the waveform of the current of the inductor L changing with time is Expressed as: ； in, Indicates the input voltage of the DC interconnection device; Indicates the output voltage of the DC interconnection device; Indicates the main transformer ratio; Indicates the auxiliary transformer ratio; Indicates the inductance value; Indicates real time; Indicates the start time of the first subinterval; When the voltage of the inductor L is 0, the voltage of the inductor L is The calculation formula is expressed as: ； The waveform of the current of the inductor L in the second sub-interval divided by the first state changing with time is Expressed as: ； in, Indicates the start time of the second subinterval; represents the current of the inductor L at the beginning of the second subinterval; The first negative value The calculation formula is expressed as: ； The waveform of the current of the inductor L in the third sub-interval divided by the first state changing with time is Expressed as: ； in, Indicates the start time of the third subinterval; represents the current of the inductor L at the beginning of the third subinterval.

6. The low current stress and global soft switching operation control method of a DC interconnection device according to claim 5, characterized in that: Also includes: The waveform of the current of the inductor L in the first subinterval divided by the second state changes with time Expressed as: ； in, Waveform The current value of the waveform The current value remains stable. The waveform of the current of the inductor L in the second sub-interval divided by the second state changes with time Expressed as: ； The waveform of the current of the inductor L in the third sub-interval divided by the second state changes with time Expressed as: 。 7. The low current stress and global soft switching operation control method of a DC interconnection device according to claim 6, characterized in that: Also includes: In the DC interconnection device, the secondary side terminals of the main transformer are connected to the secondary side terminals of the auxiliary transformer, and a proportional relationship exists between the current of the inductor L and the input current of the auxiliary transformer. The proportional relationship is determined by the turns ratio of the main transformer to the auxiliary transformer, including: If the turns ratio of the main transformer and the auxiliary transformer are both 1: N 1 and 1: N 2, then the current of the inductor L i 1 and auxiliary transformer input current i The proportional relationship between the two is: ； That is, the current transmitted by the auxiliary transformer i 2 In the first and third intervals, an isosceles trapezoidal wave proportional to the isosceles trapezoidal wave of the current of the inductor L is formed.

8. The low current stress and global soft switching operation control method of a DC interconnection device according to claim 7, characterized in that: Also includes: When the input voltage of the forward transmission of the DC interconnection device exceeds a preset range, the switch tube in the first switch working mode is controlled to Q 5 and Q 6 Start and shut down at the same time, switch tube Q 3 and Q 4 is started and shut down simultaneously, so that the current of the inductor L maintains a third state in the first interval, maintains a fourth state in the third interval, and maintains zero in the second interval and the fourth interval; the third state and the fourth state both divide the interval into a fourth sub-interval and a fifth sub-interval to form a triangular wave; in the third state, the triangular wave increases from 0 and gradually decreases to 0 in the fourth sub-interval and the fifth sub-interval, respectively; in the fourth state, the triangular wave decreases from 0 and gradually increases to 0 in the fourth sub-interval and the fifth sub-interval, respectively.

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