Method for welding integrated circuit (IC) test carrier plate and system mainboard

Abstract

The invention relates to the technical field of integrated circuit testing, and particularly discloses a method for welding an IC test carrier plate and a system mainboard, which comprises the following steps of: screening alternative ICs; manufacturing an adaptive IC Socket according to the alternative IC packaging information; designing a schematic diagram of the replacement IC support plate; pCBlayout is carried out according to the schematic diagram; outputting a Gerber file, performing cutting and inner and outer layer manufacturing procedures, and embedding a nut of which the height is consistent with the thickness of the carrier plate into the carrier plate during assembly; an original chip is disassembled, a bonding pad is cleaned, SMT welding is carried out after ball mounting is carried out on a carrier plate welding point, and 3D-X ray detection is carried out; the IC Socket is installed, positioned and locked from the upper portion according to the position, and the direction is confirmed; the replacement IC is placed in the Socket to be fixed, and the function and the performance are tested by using the original system mainboard environment. According to the invention, the testing convenience and accuracy are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit testing, and particularly relates to a welding method for an IC test carrier board and a system main board. Background Art

[0002] In the process of product design upgrade and iteration, the demand for chip localization, and the verification of self-developed chips, it is often necessary to test the performance parameters of alternative ICs to determine whether they meet the requirements of the existing printed circuit board. Currently, the common method of IC replacement is to select a pin to pin compatible package for IC replacement verification. Usually, the IC is directly welded to the existing system main board, or welded to a PCB carrier board with a comparable size and then welded to the system main board. However, when the selected IC is not pin to pin compatible, it is impossible to directly verify the alternative IC on the existing system main board. Moreover, for the verification of multiple chips of the same type, the existing method requires repeated welding of multiple carrier boards, which is extremely likely to damage the pads of the system main board, thereby causing damage to the system main board. Therefore, there is an urgent need for a new welding method to solve these problems. Summary of the Invention

[0003] The purpose of the present invention is to provide a welding method for an IC test carrier board and a system main board, and solve the following technical problems: The problems of verification and performance testing of non-PIN to PIN compatible ICs on the system main board, while avoiding damage to the system main board caused by multiple weldings, reducing the design and manufacturing costs in the product PCB stage, and shortening the product R & D cycle.

[0004] The purpose of the present invention can be achieved by the following technical solutions: A welding method for an IC test carrier board and a system main board includes the following steps: Alternative IC selection: Select an alternative IC based on the functions, resources, performance, cost, and power consumption of the designed chip; Socket customization: Manufacture a suitable IC Socket according to the packaging information of the alternative IC; Carrier board schematic design: Design the schematic diagram of the alternative IC carrier board, and the schematic diagram includes electrical connections with the original system main board and power supply, test, and clock circuits; Carrier board PCB design: Perform PCB layout according to the schematic diagram. The spacing and size of the welding pads between the IC carrier board and the system main board are the same as those of the pads of the replaced chip on the original system main board and are on the BOTTOM surface. If the Socket is not in the center, balance support pads are set. High devices are not arranged on the welding surface, the mounting holes are 90° counterbored holes, and the fan-out holes of the FPGA signal pins are designed with solder mask opening. Carrier PCB Manufacturing and Assembly: Output Gerber files. After cutting and inner / outer layer manufacturing processes, nuts with the same height as the carrier thickness are embedded in the carrier during assembly. Welding and Assembly of Carrier and System Main Board: Remove the original chip, clean the pads. After ball planting on the carrier solder joints, perform SMT welding and detect with 3D-Xray. Socket Installation: Install and lock the IC Socket in position from above, and confirm the direction. IC Testing: Place the replacement IC into the Socket and fix it, and test the functions and performance in the environment of the original system main board.

[0005] As a further solution of the present invention: In the step of selecting the replacement IC, the selected replacement IC is a non-PIN to PIN compatible IC.

[0006] As a further solution of the present invention: In the step of customizing the Socket, the IC Socket is a flip-top knob type IC Socket.

[0007] As a further solution of the present invention: The pads for welding balance support are used to prevent poor welding caused by stress.

[0008] As a further solution of the present invention: In the step of designing the carrier PCB, it also includes arranging positioning points for laser positioning, and the positioning points for laser positioning are used to improve welding accuracy.

[0009] As a further solution of the present invention: In the step of designing the carrier PCB, the 90° countersunk holes enable the nuts to be embedded in the holes without protruding from the PCB board, ensuring the flatness and weldability of the welding surface.

[0010] As a further solution of the present invention: In the step of manufacturing and assembling the carrier PCB, the inner layer manufacturing includes film pressing, exposure, development, etching, internal inspection, lamination, drilling and electroplating; the outer layer manufacturing process is the same as that of the inner layer.

[0011] An IC test carrier includes pads for welding with the system main board, nuts for installing the IC Socket, laser positioning points, 90° countersunk holes, and FPGA signal pin fan-out holes with solder mask design.

[0012] Advantages of the present invention: By designing an IC carrier board with a Socket and using an embedded nut to install the Socket, and cooperating with the design of auxiliary welding support solder joints, the present invention solves the problem that non-PIN to PIN compatible ICs cannot be directly welded and tested on the system main board. Whether the pin positions and quantities are different or the IC sizes are different, the connection with the system main board can be achieved through the circuit design transfer of the carrier board, broadening the range of testable ICs. Compared with the traditional method that can only test PIN to PIN compatible ICs, it has made significant progress; On the one hand, the IC carrier board adopts a 90° countersunk hole design to install the Socket, avoiding the protrusion of the nut from affecting welding and assembly, ensuring the flatness of the welding surface, and improving the welding quality and efficiency. On the other hand, an anti-solder mask design is carried out for the fan-out holes of the FPGA signal pins, and the test pen can be directly used to contact the fan-out holes on the IC carrier board for testing, simplifying the test process and improving the convenience and accuracy of testing. Description of the Drawings

[0013] The present invention will be further described below with reference to the accompanying drawings.

[0014] Figure 1 is a schematic diagram of the non-compatible BGA package PCB circuit module of the present invention; Figure 2 is a schematic diagram of the welding and assembly of the non-compatible BGA package PCB circuit module and the system board PCB of the present invention; Figure 3 is a side view of the assembly of the IC carrier board and the system main board of the present invention; Figure 4 is a side view of the assembly of the IC carrier board and the system main board of the present invention; Figure 5 is a schematic diagram of the overall solution of the present invention; Figure 6 is a diagram showing the replacement of the ASIC chip of the present invention; Figure 7 is a diagram of the original system main board FPGA chip; Figure 8 is a diagram showing the countersunk hole design of the IC carrier board; Figure 9 is a diagram showing the anti-solder mask design of the FPGA fan-out holes of the IC carrier board. Detailed Implementation Modes

[0015] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present invention.

[0016] Please refer to Figures 1 - 9 As shown, the present invention is a welding method for an IC test carrier board and a system main board, including the following steps: Step S1: Selection of the replacement IC. Select the IC type to be replaced according to the functional requirements, resource consumption, performance indicators, cost, and power consumption of the designed chip (as Figure 5 shown, an ASIC chip replaces the FPGA chip on the original system main board).

[0017] As Figure 6 shown, the packaging parameters of the ASIC chip are: size 19*19mm, pin pitch 0.8mm, and number of pins 528; As Figure 7 shown, the packaging parameters of the FPGA chip are: size 27*27mm, pin pitch 1.0mm, and number of pins 676; The specific method of the said step S1 is as follows: S1.1 Define the functional requirements of the chip: Function matching: Deeply understand the core functions undertaken by the original chip. For example, whether the microprocessor is used for data processing, the memory is used for data storage, or the analog chip is used for signal processing, etc. When looking for a replacement IC, the primary task is to ensure that it has the same or similar functions.

[0018] Interface compatibility: In addition to the core functions, also pay attention to the interface methods and standards between the chip and other circuit modules. Such as communication interface types (SPI, I2C, USB, etc.), level standards, pin definitions, etc. The replacement IC should be able to be well compatible with the interfaces of the existing system to avoid abnormal operation due to interface mismatch.

[0019] S1.2 Consider resource consumption: Memory and storage resources: If the chip requires a large amount of memory or storage resources to store data and programs during operation, then the replacement IC should have sufficient memory capacity and storage space to meet the operation requirements of the system.

[0020] Logic resources: For programmable logic devices (such as FPGA), consider the usage of logic resources such as the number of logic units and the number of lookup tables (LUT). The logic resources of the replacement IC should be able to support the implementation of the original design's logic functions.

[0021] S1.3 Pay attention to performance indicators: Processing speed: According to the system's requirements for data processing speed, select a replacement IC with an appropriate clock frequency and processing ability. For example, in applications with high real-time requirements, it is necessary to ensure that the replacement IC can complete data processing tasks within the specified time.

[0022] Accuracy and Resolution: For analog chips such as ADC (Analog-to-Digital Converter) and DAC (Digital-to-Analog Converter), accuracy and resolution are important performance indicators. The accuracy and resolution of the replacement IC should not be lower than those of the original chip to ensure the measurement and control accuracy of the system.

[0023] Bandwidth: In applications involving signal transmission and communication, the bandwidth of the chip determines the data transmission rate. The bandwidth of the replacement IC should meet the data transmission requirements of the system to avoid data transmission bottlenecks caused by insufficient bandwidth.

[0024] S1.4 Control Costs: Chip Price: The prices of ICs from different brands and models vary greatly. On the premise of meeting the functional and performance requirements, try to choose a replacement IC with a lower price to reduce the cost of the product.

[0025] Development Cost: In addition to the price of the chip itself, the development cost also needs to be considered. Some high-end chips may require specialized development tools and software, which will increase the development cost. Choosing a replacement IC that is easy to develop and debug can reduce the development time and cost.

[0026] Bulk Purchase Cost: If the product needs to be mass-produced, the cost of bulk purchasing chips is also an important factor. Negotiate the bulk purchase price with the supplier and choose a replacement IC with a price advantage.

[0027] S1.5 Reduce Power Consumption: Static Power Consumption: The power consumption of the chip in the standby or idle state is called static power consumption. For some devices that need to standby for a long time, such as Internet of Things devices, reducing the static power consumption can extend the battery life. Choosing a replacement IC with low static power consumption characteristics is the key.

[0028] Dynamic Power Consumption: The power consumption of the chip in the working state is called dynamic power consumption. Dynamic power consumption is related to factors such as the working frequency and load current of the chip. On the premise of meeting the performance requirements, choosing a low-power working mode and an appropriate working frequency can reduce the dynamic power consumption.

[0029] Power Management: Some chips have built-in power management functions such as power switches and voltage regulation. Choosing a replacement IC with good power management characteristics can further optimize the power consumption of the system.

[0030] S1.6 Other Supplementary Points: Reliability and Stability: Query the reliability data of the replacement IC, such as MTBF (Mean Time Between Failures), etc. At the same time, understand parameters such as its operating temperature range, humidity range, and anti-interference ability to ensure that it can work stably in the target application environment.

[0031] Supply channels and supply stability: Select suppliers with good supply channels and reputation to ensure stable supply of alternative ICs throughout the product life cycle and avoid production interruptions due to out-of-stock situations.

[0032] Technical support: Consider whether the supplier can provide timely and effective technical support, such as application guides, reference designs, technical documents, etc., which is very important for solving problems encountered during the development process.

[0033] Step S2: Customization of the Socket for the alternative IC. In this embodiment, an integrated circuit socket (IC Socket) is made according to the packaging information of the ASIC chip, such as the number of packaging pins, the arrangement of packaging pins, the pitch of packaging pins, the size of packaging pads, and the outline dimensions of the package. There are various forms of IC Sockets, and in this verification test scheme, a flip-top knob-type IC Socket is adopted, specifically as Figure 4 shown.

[0034] Step S3: Schematic design of the carrier board for the alternative IC. It includes the electrical connection between the alternative IC and the original system main board, the principle design of some power supply modules, test circuits, and clock circuits of the alternative IC.

[0035] Step S4: PCB design of the carrier board for the alternative IC. According to the schematic diagram in S3, the printed circuit board layout (PCB layout) of the integrated circuit (IC) carrier board is carried out.

[0036] In addition to the circuit design of the alternative IC, attention should also be paid to the pads used for welding the IC carrier board to the system main board. These pads are designed on the bottom (BOTTOM) surface of the IC carrier board, and the pad pitch and size are the same as those of the FPGA chip on the original system main board.

[0037] And the pads for welding balance support of the IC carrier board PCB (when the Socket is not at the center of the IC carrier board, these pads need to be designed to prevent poor welding due to stress).

[0038] During the PCB design stage of the IC carrier board, positioning points for laser positioning during welding should be placed.

[0039] When laying out the PCB of the alternative IC carrier board, it should be noted that high devices should be prohibited from being arranged on the side for welding with the system main board to prevent conflicts in the welding and assembly of the IC carrier board and the system main board caused by high devices.

[0040] Since the IC carrier board needs to be SMT soldered to the system main board, and the IC carrier board needs to be locked and fixed to the IC Socket with screws and nuts. In the conventional design, when installing through holes, the nuts will protrude from the PCB, resulting in the inability to solder and assemble the IC carrier board and the system main board. Therefore, the mounting holes of this IC carrier board adopt a 90° countersunk hole design. With the countersunk hole design, the nuts can be embedded in the holes without protruding from the PCB board, ensuring the flatness and solderability of the welding surface, as Figure 8 shown.

[0041] When designing the IC carrier board, a solder mask design is carried out for the fan-out holes of the programmable gate array (FPGA) signal pins, so that it is possible to directly use a test pen to contact the FPGA signal fan-out holes on the IC carrier board for testing, as Figure 9 shown.

[0042] Step S5: Replace the PCB manufacturing of the IC carrier board and the soldering and assembly of the carrier board IC. After the PCB of the IC carrier board is manufactured, when soldering and assembling the carrier board IC, nuts for Socket installation need to be embedded in the carrier board. The height of the nuts should be selected to be the same as the thickness of the IC carrier board and should not be greater than the board thickness of the IC carrier board to avoid affecting the soldering and assembly of the IC carrier board and the original system main board.

[0043] Replacement IC carrier board PCB manufacturing process: 1) Output Gerber files for production according to the PCB design documents.

[0044] 2) Cut the copper clad laminate into appropriate sizes according to the carrier board size.

[0045] 3) Inner layer production, including laminating --- exposure --- development --- etching --- internal inspection --- pressing --- drilling --- electroplating.

[0046] 4) Outer layer production, similar to the inner layer manufacturing process.

[0047] 5) Secondary electroplating and etching.

[0048] 6) Surface treatment and silk screen printing.

[0049] 7) Post-processing, including forming, testing, and packaging.

[0050] Step S6: Solder and assemble the IC carrier board and the system main board. Remove the FPGA chip on the system main board, clean the solder pads on the system main board, perform solder ball planting on the solder joints of the IC carrier board, and perform SMT soldering on the IC carrier board and the system main board. After soldering, 3D-X ray needs to be used for detection to ensure the welding quality and reliability.

[0051] Step S7: Install the IC Socket. The IC Socket will be installed and positioned from above the IC carrier according to the position of the IC Socket on the IC carrier, and locked in the embedded nut of S4 (it is necessary to confirm the installation direction before locking to ensure the correct direction of the IC pins), thus completing the installation of the Socket.

[0052] Step S8: After the IC Socket and the system motherboard are assembled, place the replacement IC correctly into the IC Socket and fix it according to the chip pin identification, and test the functions and performance indicators of the replacement IC through the original system motherboard environment and draw conclusions.

[0053] The above has described in detail an embodiment of the present invention, but the content described is only the preferred embodiment of the present invention and cannot be considered as used to limit the scope of implementation of the present invention. All equivalent changes and improvements made according to the scope of the application of the present invention should still fall within the scope covered by the patent of the present invention.

Claims

1. A welding method for an IC test carrier board and a system main board, characterized in that, It includes the following steps: Alternative IC selection: Screen alternative ICs based on the requirements of the designed chip; Socket customization: Manufacture a compatible IC Socket according to the package information of the alternative IC; Carrier board schematic design: Design the schematic of the carrier board for the alternative IC, and the schematic includes electrical connections with the original system motherboard, power supply, test, and clock circuits; Carrier board PCB design: Perform PCB layout according to the schematic. The spacing and size of the welding pads between the IC carrier board and the system motherboard are the same as those of the pads of the replaced chip on the original system motherboard and are on the BOTTOM side. If the Socket is not in the center, balance support pads are set. High devices are not arranged on the welding surface. The mounting holes are 90° countersunk holes, and the fan-out holes for the FPGA signal pins are designed with solder mask opening; Carrier board PCB manufacturing and assembly: Output Gerber files, and through processes such as cutting, inner and outer layer production, nuts with a height consistent with the thickness of the carrier board are embedded inside the carrier board during assembly; Welding and assembly of the carrier board and the system motherboard: Remove the original chip, clean the pads, implant solder balls on the solder joints of the carrier board and then perform SMT welding, and detect with 3D-X ray; Socket installation: Install and position the IC Socket from above and lock it, and confirm the direction; IC testing: Place the alternative IC in the Socket and fix it, and test the functions and performance in the environment of the original system motherboard.

2. The welding method of an IC test carrier board and a system main board according to claim 1, characterized in that In the step of alternative IC selection, the selected alternative IC is a non-PIN to PIN compatible IC.

3. A soldering method for an IC test carrier board and a system main board according to claim 1, characterized in that In the step of Socket customization, the IC Socket is a flip-top knob type IC Socket.

4. A soldering method for an IC test carrier board and a system main board according to claim 1, characterized in that, The pads for welding balance support are used to prevent poor welding caused by stress.

5. A welding method for an IC test carrier board and a system main board according to claim 1, characterized in that In the step of carrier board PCB design, it also includes arranging positioning points for laser positioning, and the positioning points for laser positioning are used to improve the welding accuracy.

6. A soldering method for an IC test carrier board and a system main board according to claim 1, characterized in that In the step of carrier board PCB design, the 90° countersunk holes enable the nuts to be embedded in the holes without protruding from the PCB board, ensuring the flatness and weldability of the welding surface.

7. A method for soldering an IC test carrier board to a system main board according to claim 1, characterized in that In the step of carrier PCB manufacturing and assembly, the inner layer production includes film pressing, exposure, development, etching, internal inspection, lamination, drilling, and electroplating; the outer layer production process is the same as that of the inner layer.

8. An IC test carrier plate, characterized in that, The IC test carrier board is designed and manufactured by using the IC test carrier board and system motherboard welding method described in any one of claims 1-7, and includes welding pads for welding with the system motherboard, nuts for installing the IC Socket, laser positioning points, 90° countersunk holes, and fan-out holes for FPGA signal pins with solder mask opening design.

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