Power semiconductor device high-temperature test switching clamp and test method

Abstract

The invention discloses a high-temperature test switching clamp for a power semiconductor device and a test method, and relates to the technical field of power electronics. The high-temperature test switching clamp comprises a circuit substrate, wherein a grid electrode bonding pad, a source electrode bonding pad and a drain electrode bonding pad are arranged on the first surface of the circuit substrate; conductive via holes are formed in the two ends of the source electrode bonding pad and the drain electrode bonding pad and are connected with the via holes in the two ends of the source electrode bonding pad and the drain electrode bonding pad through source electrode front face laid copper and drain electrode front face laid copper respectively; the second surface of the circuit substrate is provided with source electrode back surface laid copper at a position corresponding to the source electrode front surface laid copper, and the source electrode back surface laid copper, the via hole, the source electrode front surface laid copper and the source electrode bonding pad form a source electrode conductive path; the second surface is provided with drain electrode back surface laid copper at a position corresponding to the drain electrode front surface laid copper, and the drain electrode bonding pad, the drain electrode front surface laid copper, the via hole and the drain electrode back surface laid copper form a drain electrode conductive path; according to the technical scheme provided by the invention, the parasitic inductance in the loop is reduced, and the high-temperature test accuracy of the power semiconductor device is improved.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and particularly to a high-temperature test adapter fixture and a test method for a power semiconductor device. Background Art

[0002] The third-generation semiconductor devices have low on-resistance, high switching speed and frequency, and good high-temperature application characteristics. These characteristics effectively reduce the power density of power devices, reduce losses, and improve the electric energy conversion efficiency; when a silicon carbide device is applied at high temperature, its drive circuit also needs to be located in a high-temperature environment at the same time. This drive circuit belongs to the low-voltage, low-power, high-temperature scenario; due to the good high-temperature working ability of GaN HEMT devices, they can be applied in the high-temperature drive circuit of silicon carbide devices; when designing a circuit, the performance of GaN HEMT devices in a wide temperature range is very important. Therefore, their high-temperature dynamic and static test methods have attracted increasing attention.

[0003] For the existing tests of GaN devices in a wide temperature range, elastic pressing fixtures are often used to press them into the test circuit, or a wide-temperature test system based on a probe station is used; for the fixture based on elastic pressing, its pressure is difficult to accurately adjust. Excessive pressure will damage the GaN device with very low physical hardness, and too little pressure will result in insufficient electrical contact, introducing a large resistance and inductance at the contact point, affecting the test accuracy. At the same time, due to the extremely small size of the device, the pressing fixture often completely covers the entire device, making it difficult to observe the device morphology and difficult to monitor the actual temperature through infrared temperature measurement; the test system based on the probe station requires a completely customized design. Whether it is a double-pulse test or a static test, it is difficult to adapt to commercial test platforms and programs, with high prices, high technical thresholds, and very complex operations; some studies propose using a PCB adapter board to convert a conventional surface-mounted GaN device into a direct plug-in test device, which has reliable connection and can be quickly plugged and unplugged, and can avoid various problems of elastic pressing fixtures and probe station tests to a certain extent, simplifying the test complexity; however, introducing an additional PCB adapter board often causes parasitic inductance in the loop, reducing the accuracy of device testing. Especially in a high-temperature environment, the interference problem brought by parasitic inductance to the test will be more serious. Summary of the Invention

[0004] The present invention provides a high-temperature test adapter fixture and a test method for a power semiconductor device, aiming to improve the accuracy of high-temperature dynamic and static tests of power semiconductor devices on the basis of converting surface-mounted power semiconductor devices into direct plug-in test devices by using an adapter board.

[0005] The high-temperature test adapter fixture for a power semiconductor device provided by the present invention includes:

[0006] A circuit board having opposite first and second surfaces; the first surface is provided with a gate pad, a source pad, and a drain pad, and the source pad and the drain pad are adjacent and parallel to each other;

[0007] The circuit board is provided with conductive vias at both ends of the source pad and at both ends of the drain pad; the source pad and the vias provided at both ends thereof are connected by source-side copper plating, and the drain pad and the vias provided at both ends thereof are connected by drain-side copper plating;

[0008] The second surface is provided with source-backside copper plating at a position corresponding to the source-side copper plating; the source-backside copper plating, the via, the source-side copper plating, and the source pad form a source conduction path;

[0009] The second surface is provided with drain-backside copper plating at a position corresponding to the drain-side copper plating; the drain pad, the drain-side copper plating, the via, and the drain-backside copper plating form a drain conduction path.

[0010] Optionally, the high-temperature test adapter fixture for the power semiconductor device further includes:

[0011] A source pin pad and a drain pin pad, which are provided on the second surface and close to the edge of the circuit board; the source-backside copper plating is connected to the source pin pad, and the drain-backside copper plating is connected to the drain pin pad;

[0012] A source connection pin, which is welded to the source pin pad;

[0013] A drain connection pin, which is welded to the drain pin pad.

[0014] Optionally, the high-temperature test adapter fixture for the power semiconductor device further includes:

[0015] A gate pin pad, which is provided on the first surface and close to the edge of the circuit board;

[0016] A gate copper plating, which is provided on the first surface and connects the gate pad and the gate pin pad;

[0017] A gate connection pin, which is welded to the gate pin pad.

[0018] Optionally, the source pin pad, the drain pin pad, and the gate pin pad are close to the same side of the circuit board;

[0019] The source connection pin, the drain connection pin, and the gate connection pin are parallel and have the same orientation.

[0020] Optionally, a plurality of source pads and a plurality of drain pads are provided on the first surface, the source pads and the drain pads are arranged alternately, and vias for conducting electricity are provided at both ends of each source pad and each drain pad;

[0021] The copper plating on the back of the source and the copper plating on the back of the drain are in a comb shape;

[0022] The copper plating on the back of the source includes a plurality of first finger portions, and each of the first finger portions is arranged corresponding to the copper plating on the front of the source provided on the first surface;

[0023] The copper plating on the back of the drain includes a plurality of second finger portions, and each of the second finger portions is arranged corresponding to the copper plating on the front of the drain provided on the first surface;

[0024] The first finger portions and the second finger portions are arranged alternately.

[0025] Optionally, a heater is further included;

[0026] A connection hole is provided on the circuit board, and the heater is detachably connected to the circuit board through the connection hole.

[0027] Optionally, the inner wall of the via is plated with a conductive material;

[0028] Alternatively, the via is filled with a conductive material.

[0029] Optionally, the material of the circuit board is at least one of Rogers 4003C, Rogers 4350B, ISOLA P25 / P26, Arlon 84N / 86HP, and Shengyi S1000-2.

[0030] The present invention further provides a high-temperature testing method for a power semiconductor device, which uses the above-mentioned high-temperature testing adapter fixture for a power semiconductor device. The testing method includes the following steps:

[0031] Step 1: Solder the surface-mounted power semiconductor device onto the high-temperature testing adapter fixture. Among them, the gate, source, and drain of the surface-mounted power semiconductor device are respectively soldered to the gate pad, source pad, and drain pad of the adapter fixture;

[0032] Step 2: Insert the high-temperature testing adapter fixture soldered with the surface-mounted power semiconductor device into the testing equipment for testing;

[0033] Step 3: After the testing is completed, melt the solder used in the soldering operation in Step 1 and remove the surface-mounted power semiconductor device.

[0034] Optionally, the surface-mounted power semiconductor device is a gallium nitride device.

[0035] Optionally, the solder is at least one of Sn-90Pb, Sn-95Pb, and Sn-92.5Pb-2.5Ag.

[0036] As can be seen from the above technical solutions, the present invention has the following beneficial effects:

[0037] When the surface-mounted power semiconductor device is soldered on the high-temperature test adapter fixture provided by the present invention, during testing, the source back copper plating - the vias at both ends of the source pad - the source front copper plating - the source pad - the source of the device form a source conduction path, and the drain of the device - the drain pad - the drain front copper plating - the vias at both ends of the drain pad - the drain back copper plating form a drain conduction path; since conductive vias are provided at both ends of the source pad and the drain pad, on the source front copper plating, the current flows from the vias at both ends towards the source pad, and on the drain front copper plating, the current flows from the drain pad towards the vias at both ends. Therefore, the current directions on the source front copper plating and the adjacent drain front copper plating are opposite, which can form a mutual inductance cancellation effect, thereby reducing the parasitic inductance in the loop; in addition, the vias at one end of the source pad and the vias at the same end of the adjacent drain pad have opposite current directions in the vias, which is beneficial to reducing the self-parasitic inductance at the vias; therefore, through the high-temperature test adapter fixture provided by the present invention, R & D personnel can more accurately evaluate the performance of power semiconductor devices within a wide temperature range, providing strong support for subsequent product development and optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0039] Figure 1 It is a schematic diagram of the first surface structure of the circuit board of some embodiments of the high-temperature test adapter fixture for power semiconductor devices of the present invention (without laying the source front copper plating and the drain front copper plating);

[0040] Figure 2 It is a schematic diagram of the structure of the first surface of the circuit board of some embodiments of the high-temperature test adapter fixture for power semiconductor devices of the present invention (with the source front copper plating and the drain front copper plating laid);

[0041] Figure 3 is Figure 2 a schematic diagram of the second surface structure of the shown circuit board;

[0042] Figure 4 is with Figure 2Front structural schematic diagram of the high-temperature test adapter fixture for the power semiconductor device of the shown circuit board;

[0043] Figure 5 is Figure 4 Back structural schematic diagram of the high-temperature test adapter fixture for the shown power semiconductor device;

[0044] Figure 6 Front current path schematic diagram of the high-temperature test adapter fixture for the power semiconductor device when loading the device under test for testing;

[0045] Figure 7 Back current path schematic diagram of the high-temperature test adapter fixture for the power semiconductor device when loading the device under test for testing;

[0046] Figure 8 is the current flow direction schematic diagram of the via cross-section ( Figure 6 section A-A in

[0047] Explanation of the reference numerals in the attached drawings:

[0048] 1. Circuit board; 2. Gate pad; 3. Source pad; 4. Drain pad; 5. Via; 6. Gate front copper plating; 7. Gate pin pad; 8. Source front copper plating; 9. Drain front copper plating; 10. Source back copper plating; 11. Source pin pad; 12. Drain back copper plating; 13. Drain pin pad; 14. Gate connection pin; 15. Source connection pin; 16. Drain connection pin; 17. Connection hole. Detailed implementation manners

[0049] To make the invention objectives, features, and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the embodiments described below are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present invention.

[0050] The terms "first", "second", "third", "fourth", etc. (if any) in the description and drawings of this application are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of this application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that comprises a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0051] Embodiments of the present invention provide a high-temperature test adapter fixture for power semiconductor devices, aiming to improve the accuracy of high-temperature dynamic and static tests of power semiconductor devices on the basis of converting surface-mounted power semiconductor devices into through-hole test devices by using an adapter board.

[0052] Among them, the high-temperature dynamic test mainly includes high-temperature double-pulse tests. A double-pulse test platform is used to compare the parameters of different switching devices, and the main parameters during the switching process of various switching devices and whether the driving resistance is reasonably selected are obtained. Since double pulses are used to control the switching devices in the double-pulse test platform, the driving of the switching devices can also be evaluated according to the performance of the switching devices. The driving circuit design can be optimized according to the turn-on and turn-off waveforms of the switching devices to achieve the best turn-on and turn-off waveforms. The double-pulse test platform is currently mainly used to detect the oscillation of the switching waveform and obtain the turn-on and turn-off times. In addition, the double-pulse test can also test the characteristics of the diode connected in series with the switching transistor, so it can also be used to detect the safe operating area of the switching transistor and the diode. The double-pulse test platform refers to using one wide and one narrow pulse to test the dynamic characteristics of the device, and the optimal gate resistance of the device and the driving circuit of the test device can be obtained through the double-pulse test platform. In the double-pulse test platform, the first pulse requires the load current to rise to the current to be measured, and the intermediate interval only needs to ensure reliable turn-off of the switching transistor. The second pulse is generally a narrow pulse.

[0053] For the static characteristic test, a power analyzer is often used for testing, including items such as device transfer characteristics, output characteristics, capacitance characteristics, and threshold voltage.

[0054] For the tests within a wide temperature range, it is required that the test platform can heat the device. The common temperature range is 25°C - 150°C. However, in double-pulse tests, other components such as capacitors cannot withstand high temperatures. Therefore, only local heating of the device under test can be carried out to prevent heat from spreading to other components and causing burnout. For static tests, since the device needs to be reliably connected to the power analyzer and the power analyzer cannot be heated by heat conduction, and the device under test often needs to be replaced frequently, a test fixture is required to reduce the complexity of high-temperature tests.

[0055] Refer to Figures 1-5 , the high-temperature test adapter fixture for power semiconductor devices provided by the embodiments of the present invention includes:

[0056] A circuit board 1 having opposite first and second surfaces; the first surface is provided with a gate pad 2, a source pad 3, and a drain pad 4, and the source pad 3 and the drain pad 4 are adjacent and parallel.

[0057] The circuit board 1 is provided with conductive vias 5 at both ends of the source pad 3 and both ends of the drain pad 4. The number of vias 5 is not limited and can be selected according to actual needs; the source pad 3 and the vias 5 provided at both ends thereof are connected by a source-side copper pour 8, and the drain pad 4 and the vias 5 provided at both ends thereof are connected by a drain-side copper pour 9; the source-side copper pour 8 can cover the source pad 3 and the vias 5 provided at both ends thereof, and the drain-side copper pour 9 can cover the drain pad 4 and the vias 5 provided at both ends thereof to ensure the reliability of electrical connection.

[0058] Among them, in some implementable embodiments, the inner wall of the via 5 is plated with a conductive material to form a conductive channel, and the conductive material is usually a metal or an alloy; in some other implementable embodiments, the via 5 can also form a conductive channel by filling a conductive material, and the conductive material includes but is not limited to metal materials, metal matrix composites, conductive polymers, etc.

[0059] On the second surface of the circuit board 1, a source-back copper pour 10 is provided at a position corresponding to the source-side copper pour 8; the source-back copper pour 10, the vias 5 at both ends of the source pad 3, the source-side copper pour 8, and the source pad 3 form a source conduction path; on the second surface of the circuit board 1, a drain-back copper pour 12 is provided at a position corresponding to the drain-side copper pour 9; the drain pad 4, the drain-side copper pour 9, the vias 5 at both ends of the drain pad 4, and the drain-back copper pour 12 form a drain conduction path.

[0060] In the embodiments of the present invention, the number of source pads and drain pads on the circuit board is set corresponding to the number of source contacts and drain contacts of the device to be tested.

[0061] Refer to Figures 1-3, in some embodiments, a plurality of source pads 3 and a plurality of drain pads 4 are provided on the first surface of the circuit board 1. The source pads 3 and the drain pads 4 are arranged alternately, and vias 5 are provided at both ends of each source pad 3 and each drain pad 4; the source backside copper plating 10 and the drain backside copper plating 12 can be arranged in a comb shape; the source backside copper plating 10 includes a plurality of first finger portions ( Figure 3 finger electrodes of the source backside copper plating 10 in Figure 3 ), the drain backside copper plating 12 includes a plurality of second finger portions ( Figure 3 finger electrodes of the drain backside copper plating 12 in

[0062] Refer to Figure 3 , 5 ; each first finger portion is correspondingly arranged with the source front side copper plating 8 provided on the first surface and is connected to the vias at both ends of the source pad 3; each second finger portion is correspondingly arranged with the drain front side copper plating 9 provided on the first surface and is connected to the vias at both ends of the drain pad 4; the first finger portions and the second finger portions are arranged alternately.

[0062] Refer to Figure 3 , 5 , in the embodiment of the present invention, the high-temperature test adapter fixture for a power semiconductor device further includes a source pin pad 11 and a drain pin pad 13 provided on the second surface of the circuit board 1 and near the edge of the circuit board 1; the source backside copper plating 10 is connected to the source pin pad 11, and the drain backside copper plating 12 is connected to the drain pin pad 13; the source connection pin 15 is welded to the source pin pad 11, and the drain connection pin 16 is welded to the drain pin pad 13.

[0063] Refer to Figure 1 , 4 , in the embodiment of the present invention, the high-temperature test adapter fixture for a power semiconductor device further includes a gate pin pad 7 provided on the first surface of the circuit board 1 and near the edge of the circuit board 1; a gate copper plating 6, provided on the first surface of the circuit board 1, for connecting the gate pad 2 and the gate pin pad 7; the gate connection pin 14 is welded to the gate pin pad 7.

[0064] Among them, the source pin pad 11, the drain pin pad 13, and the gate pin pad 7 are close to the same side of the circuit board; the source connection pin 15, the drain connection pin 16, and the gate connection pin 14 are parallel and face the same direction; by welding the surface-mounted packaged power semiconductor device to this high-temperature test adapter fixture, it is converted into a through-hole test packaging structure, realizing reliable connection, fast plugging and unplugging, simplifying the test complexity, and at the same time being compatible with most power analyzers for static testing and double-pulse test circuits for dynamic testing, significantly improving the test flexibility and efficiency.

[0065] Refer to Figures 6-8 , Figure 6 is a schematic diagram of the front current path when the high-temperature test adapter fixture is loading the device under test for testing, Figure 7 is a schematic diagram of the back current path,Figure 8 is a schematic diagram of the current flow direction of the via cross-section ( Figure 6 the A-A cross-section in Figure 7 ), where the arrow indicates the current flow direction, and the "·" in

[0066] means that the current direction is perpendicular to the paper surface and outward, and the "×" means that the current direction is perpendicular to the paper surface and inward. Figures 6-8 As can be seen from Figure 6 , in the embodiment of the present invention, the patch-type power semiconductor device is welded on the high-temperature test transfer fixture provided by the present invention. During the test, the source connection pin - source pin pad - source back copper plating - vias at both ends of the source pad - source front copper plating - source pad - source of the device form a source conduction path, and the drain of the device - drain pad - drain front copper plating - vias at both ends of the drain pad - drain back copper plating - drain pin pad - drain connection pin form a drain conduction path; refer to Figure 8 , since conductive vias are provided at both ends of the source pad and the drain pad, on the source front copper plating, the current flows from the vias at both ends towards the source pad direction, and on the drain front copper plating, the current flows from the drain pad towards the vias at both ends. Therefore, the current directions on the source front copper plating and its adjacent drain front copper plating are opposite, forming a mutual inductance cancellation effect, thereby reducing the parasitic inductance in the loop; in addition, refer to

[0067] For a power semiconductor device provided with multiple staggered source and drain contacts, through the staggered layout of the corresponding pads, front copper plating, and back copper plating of the source and drain, the mutual inductance cancellation effect of the current on the source front copper plating and its adjacent drain front copper plating, and the mutual inductance cancellation effect of the current in the vias are more significant.

[0068] Therefore, through the high-temperature test transfer fixture provided by the embodiment of the present invention, the parasitic inductance in the loop during the high-temperature test of the power semiconductor device is effectively reduced, and the R & D personnel can more accurately evaluate the performance of the power semiconductor device within a wide temperature range, providing strong support for subsequent product development and optimization.

[0069] Refer to Figures 1-5 , in some embodiments, the circuit board 1 is provided with connection holes 17, and the high-temperature test transfer fixture further includes a heater (not shown in the figure, and the heater can select relevant mature products on the market), and the heater is detachably connected to the circuit board 1 through the connection holes 17.

[0070] The material selection of each part and the connection method of each part of the high-temperature test transfer fixture proposed in the embodiment of the present invention all adopt high-temperature standards to ensure that the device can be subjected to high-temperature tests at 25°C to 300°C.

[0071] Preferably, the circuit board of the high-temperature test adapter fixture can be made of high-temperature plates such as Rogers 4003C, Rogers 4350B, ISOLA P25 / P26, Arlon 84N / 86HP, and Shengyi S1000-2.

[0072] The present invention also provides a method for high-temperature testing of power semiconductor devices. The high-temperature test adapter fixture provided in the above embodiments is used to perform high-temperature dynamic or static tests on surface-mounted power semiconductor devices.

[0073] In some embodiments, the testing method includes the following steps:

[0074] Step 1: Solder the surface-mounted power semiconductor device onto the high-temperature test adapter fixture. Specifically, the gate, source, and drain of the surface-mounted power semiconductor device are respectively soldered onto the gate pad, source pad, and drain pad of the high-temperature test adapter fixture.

[0075] Among them, the solder can be selected from solders with a melting temperature greater than 300°C, such as Sn-90Pb, Sn-95Pb, and Sn-92.5Pb-2.5Ag.

[0076] Step 2: Insert the high-temperature test adapter fixture with the surface-mounted power semiconductor device soldered thereon into the test equipment for testing. The test items include, but are not limited to, high-temperature double-pulse testing and high-temperature static characteristic testing.

[0077] Step 3: After the test is completed, melt the solder used in the soldering operation in Step 1 and remove the surface-mounted power semiconductor device. The melting methods include, but are not limited to, melting with a hot stage, melting with an electric soldering iron, melting with a hot air gun, etc.; in addition to heating and melting, an ultrasonic disassembly device can also be used to remove the power semiconductor device.

[0078] The surface-mounted power semiconductor device and the high-temperature test adapter fixture provided in the embodiments of the present invention are connected by soldering, so that no external physical pressure needs to be applied to the components for testing, avoiding damage to the power semiconductor device, and the device can be completely exposed to facilitate accurate measurement of its real-time temperature during the experiment and observation of whether the device is overheated or burned out.

[0079] The high-temperature test adapter fixture provided by the embodiment of the present invention is applicable to the high-temperature test of GaN HEMT devices; GaN HEMT (gallium nitride high electron mobility transistor) devices are high-performance semiconductor devices based on gallium nitride materials, which have wide applications in the fields of high frequency, high voltage, high power, etc., and have good high-temperature working capabilities; by using the high-temperature test adapter fixture provided by the embodiment of the present invention, R & D personnel can more conveniently and accurately evaluate the performance of GaN HEMT devices within a wide temperature range.

[0080] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A high-temperature test adapter fixture for a power semiconductor device, characterized in that, Comprising: A circuit board having opposite first and second surfaces; the first surface is provided with a gate pad, a source pad and a drain pad, and the source pad and the drain pad are adjacent and parallel to each other; The circuit board is provided with conductive vias at both ends of the source pad and at both ends of the drain pad; the source pad and the vias provided at both ends thereof are connected by source-side copper plating, and the drain pad and the vias provided at both ends thereof are connected by drain-side copper plating; A source-back copper plating is provided on the second surface at a position corresponding to the source-side copper plating; the source-back copper plating, the via, the source-side copper plating, and the source pad form a source conduction path; A drain-back copper plating is provided on the second surface at a position corresponding to the drain-side copper plating; the drain pad, the drain-side copper plating, the via, and the drain-back copper plating form a drain conduction path.

2. The high-temperature test adapter fixture for a power semiconductor device according to claim 1, characterized in that Further comprising: A source pin pad and a drain pin pad, which are provided on the second surface and close to the edge of the circuit board; the source-back copper plating is connected to the source pin pad, and the drain-back copper plating is connected to the drain pin pad; A source connection pin, which is welded to the source pin pad; A drain connection pin, which is welded to the drain pin pad.

3. The high-temperature test adapter fixture for a power semiconductor device according to claim 2, characterized in that Further comprising: A gate pin pad, which is provided on the first surface and close to the edge of the circuit board; A gate copper plating, which is provided on the first surface and connects the gate pad and the gate pin pad; A gate connection pin, which is welded to the gate pin pad.

4. The high-temperature test adapter fixture for a power semiconductor device according to claim 3, characterized in that The source pin pad, the drain pin pad, and the gate pin pad are close to the same side of the circuit board; The source connection pin, the drain connection pin, and the gate connection pin are parallel and have the same orientation.

5. The high-temperature test adapter fixture for a power semiconductor device according to claim 2, characterized in that The first surface is provided with a plurality of source pads and a plurality of drain pads, and the source pads and the drain pads are arranged alternately. Conductive vias are provided at both ends of each source pad and each drain pad; The source-back copper plating and the drain-back copper plating are in a comb shape; The source-back copper plating includes a plurality of first finger portions, and each first finger portion is correspondingly arranged with the source-side copper plating provided on the first surface; The drain-back copper plating includes a plurality of second finger portions, and each second finger portion is correspondingly arranged with the drain-side copper plating provided on the first surface; The first finger portions and the second finger portions are arranged alternately.

6. The high-temperature test adapter fixture for a power semiconductor device according to claim 1, characterized in that Further comprising a heater; A connection hole is provided on the circuit board, and the heater is detachably connected to the circuit board through the connection hole.

7. The high-temperature test adapter fixture for a power semiconductor device according to claim 1, characterized in that, The inner wall of the via is plated with a conductive material; Alternatively, the via is filled with a conductive material.

8. The high-temperature test adapter fixture for a power semiconductor device according to claim 1, characterized in that The material of the circuit board is at least one of Rogers 4003C, Rogers 4350B, ISOLA P25 / P26, Arlon 84N / 86HP, and Shengyi S1000-2.

9. A high-temperature testing method for a power semiconductor device, which uses the high-temperature testing adapter fixture for a power semiconductor device according to any one of claims 1-8, is characterized in that Including the following steps: Step 1, welding a chip-type power semiconductor device to the high-temperature test adapter fixture; wherein, the gate, source, and drain of the chip-type power semiconductor device are respectively welded to the gate pad, source pad, and drain pad of the high-temperature test adapter fixture; Step 2: Insert the high-temperature test adapter fixture with the surface-mounted power semiconductor device soldered thereon into a test device for testing; Step 3: After the testing is completed, melt the solder used in the soldering operation in Step 1 and remove the surface-mounted power semiconductor device.

10. The high-temperature test method for a power semiconductor device according to claim 9, characterized in that, The solder is at least one of Sn-90Pb, Sn-95Pb, and Sn-92.5Pb-2.5Ag.

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