Air gate field plate structure and preparation method thereof

Abstract

The invention provides an air gate field plate structure and a preparation method thereof, and relates to the technical field of semiconductors. The air gate field plate structure comprises a substrate, a gate electrode and a first dielectric layer which are sequentially arranged from bottom to top, the first dielectric layer is integrally formed, covers the peripheral side of the grid electrode and covers the substrate, so that the first dielectric layer, the grid electrode and the substrate define an air layer; the first dielectric layer is thicker than the air layer. Through the first dielectric layer integrally formed on the grid electrode, self-sealing of the air grid electrode field plate area is realized, and the air grid electrode field plate area is prevented from being filled in a subsequent deposition process.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular, to an air-gate field plate structure and a preparation method thereof. Background Art

[0002] With the further development of the microelectronics industry, the working frequency of electronic products is getting higher and higher. To increase the working frequency of integrated circuits, one of the main development directions of integrated circuits is to reduce the parasitic capacitance Cgs between the gate and the source. To achieve this goal, many novel structures are adopted in transistor devices, such as the air-gate field plate dielectric gate structure. However, this structure brings many limitations to the processes after gate deposition.

[0003] The key to the air-gate field plate dielectric gate structure is that the main field plate dielectric material under the gate field plate is air. Due to the extremely low dielectric constant of air, the parasitic capacitance between the gate-source and gate-drain can be minimized without affecting the suppression effect of the gate field plate on channel defects and the adjustment effect on the channel electric field. This means that in the processes after the gate metal deposition, it is necessary to avoid material backfilling into the air layer under the gate field plate. For this problem, the conventional solution in the air-gate field plate dielectric gate structure process is to control the total thickness of the dielectric after gate deposition. However, this solution will lead to: 1. Limiting subsequent processes. If the subsequent dielectric is used as a capacitor dielectric in the later stage, the capacitance density will be too small; 2. Reducing the chip reliability. The relatively thin dielectric layer is difficult to effectively protect the chip in the use environment. Summary of the Invention

[0004] The purpose of this application is to provide an air-gate field plate structure and a preparation method thereof. By means of the first dielectric layer integrally formed on the gate, self-closure of the air-gate field plate area is achieved, and subsequent deposition processes are avoided from filling the air-gate field plate area.

[0005] In a first aspect, this application provides an air-gate field plate structure, which includes: a substrate, a gate, and a first dielectric layer arranged in sequence from bottom to top; a Schottky contact is formed between the gate and the substrate; the first dielectric layer is integrally formed, covering the outer peripheral side of the gate and covering the substrate, so that the first dielectric layer, the gate, and the substrate enclose an air layer; the thickness of the first dielectric layer is greater than the thickness of the air layer.

[0006] Further, a second dielectric layer with a gate window formed in the middle is arranged on the substrate; the gate is arranged in the gate window.

[0007] Further, the lateral distance of the gate field plate corresponding to the gate, and / or the thickness of the air layer, need to reach a certain threshold value to ensure that the lateral expansion of the first dielectric layer during deposition does not extend to the root of the gate.

[0008] Further, the ratio of half of the lateral distance of the above-mentioned gate field plate to the thickness of the air layer is greater than the tangent value of the climbing angle during the deposition of the first dielectric layer; the climbing angle is the angle formed by the side of the first dielectric layer close to the gate and the side of the substrate covered by the first dielectric layer.

[0009] Further, the above-mentioned gate field plate is of a rectangular structure or a regular trapezoidal structure; the lateral distance of the gate field plate is the length of the lower side of the gate field plate.

[0010] Further, in the extending direction of the gate, the first dielectric layer closes both ends of the gate, and the air layer forms a sealed air cavity.

[0011] Further, the materials of the above-mentioned first dielectric layer and the second dielectric layer include: silicon nitride, silicon oxide or aluminum oxide.

[0012] Further, the above-mentioned substrate material includes single crystal semiconductor, compound semiconductor or heterostructure.

[0013] In a second aspect, the present application also provides a method for manufacturing an air gate field plate structure, the method comprising: forming a gate on a substrate, the gate forming a Schottky contact with the substrate; depositing a first dielectric layer on the gate by a non-conformal deposition process so that the first dielectric layer covers the outer peripheral side of the gate and covers the substrate, so that the first dielectric layer, the gate and the substrate enclose an air layer, obtaining an air gate field plate structure.

[0014] Further, the above-mentioned non-conformal deposition process includes: sputtering process or electron beam evaporation process.

[0015] Further, the step of forming a gate on the substrate further includes: forming a second dielectric layer on the substrate; opening a gate window in the middle of the second dielectric layer; forming a gate in the gate window.

[0016] In the air gate field plate structure and its manufacturing method provided by the present application, the air gate field plate structure includes: a substrate, a gate and a first dielectric layer arranged in sequence from bottom to top; the first dielectric layer is integrally formed, covers the outer peripheral side of the gate, and covers the substrate, so that the first dielectric layer, the gate and the substrate enclose an air layer; the thickness of the first dielectric layer is greater than the thickness of the air layer. The present application realizes the self-sealing of the air gate field plate area through the first dielectric layer integrally formed on the gate, and avoids subsequent deposition processes from filling the air gate field plate area. Description of the Drawings

[0017] To more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0018] Figure 1 Schematic diagram of a structure of an air-gated field plate structure provided by an embodiment of the present application;

[0019] Figure 2 Schematic diagram of another structure of an air-gated field plate structure provided by an embodiment of the present application;

[0020] Figure 3 Flow chart of a preparation method of an air-gated field plate structure provided by an embodiment of the present application; Specific embodiments

[0021] The following will clearly and completely describe the technical solutions of the present application in conjunction with the embodiments. Obviously, the described embodiments are some embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope protected by the present application.

[0022] In the traditional air-gated field plate dielectric transistor structure, the total thickness of the dielectric is thinned to inhibit the backfilling effect of the dielectric deposition on the air layer under the field plate. However, this method will have a greater impact on the subsequent capacitor device manufacturing and reliability.

[0023] Based on this, the embodiments of the present application provide an air-gated field plate structure and a preparation method thereof. Through the first dielectric layer integrally formed on the gate, the self-closure of the air-gated field plate area is realized, avoiding the filling of the air-gated field plate area in the subsequent deposition process, so as to improve the reliability of device manufacturing. To facilitate the understanding of this embodiment, first, a detailed introduction to an air-gated field plate structure disclosed in the embodiments of the present application will be given.

[0024] Figure 1 Schematic diagram of an air-gated field plate structure provided by an embodiment of the present application. The air-gated field plate structure includes: a substrate 11, a gate 12, and a first dielectric layer 13 arranged in sequence from bottom to top; the gate 12 forms a Schottky contact with the substrate 11; the first dielectric layer 13 is integrally formed, covering the outer peripheral side of the gate 12 and covering the substrate 11, so that the first dielectric layer 13, the gate 12, and the substrate 11 enclose an air layer 14; the thickness of the first dielectric layer 13 is greater than the thickness of the air layer 14.

[0025] The above-mentioned gate 12 can be a T-shaped gate or a gate with other structures, as long as it is a structure that can form an air gate field plate in the X direction along the gate width. For a T-shaped gate, its gate field plate can be a rectangular structure or a regular trapezoidal structure.

[0026] Exemplarily, the substrate 11 can be a single-crystal semiconductor such as silicon or germanium, or it can also be a compound semiconductor such as silicon nitride, silicon carbide, gallium arsenide, gallium nitride, etc. It can also be an epitaxial semiconductor substrate formed by multiple semiconductor layers including gallium nitride, aluminum nitride, aluminum gallium nitride, indium gallium nitride, etc.; the semiconductor substrate of the present invention can include a multi-layer semiconductor layer with a heterostructure and can be prepared by a series of epitaxial processes. Those skilled in the art can design a suitable semiconductor substrate and its preparation process according to the actual product, and the embodiments of the present invention do not limit this.

[0027] Furthermore, source and drain electrodes (not shown in the figure) can be provided on both sides of the gate 12, that is, the gate 12 is located between the source and drain electrodes, and both the source and drain electrodes can form an ohmic contact with the substrate 11. Exemplarily, the materials of the source and drain electrodes can be metals such as gold, silver, copper, iron, aluminum, indium, platinum, titanium, nickel, or alloys formed by any combination, as long as an ohmic contact with the substrate 11 is ensured.

[0028] Furthermore, in the direction perpendicular to the paper surface, that is, in the actual semiconductor device, in the extending direction of the gate 12, the first dielectric layer 13 seals both ends of the gate 12, and then the air layer 14 forms a sealed air cavity, which can avoid the air layer being affected by the outside and improve the device reliability. And the first dielectric layer 13 formed by the non-conformal dielectric deposition process is integrally formed, which can greatly reduce the process steps for forming the air cavity.

[0029] In the embodiments of the present application, the above-mentioned first dielectric layer 13 is integrally formed by the non-conformal dielectric deposition process. The first dielectric layer 13 covers the outer peripheral side of the gate 12 and covers the substrate 11. An air cavity is surrounded by part of the gate field plate, part of the first dielectric layer, and part of the substrate on both sides of the gate 12. It can realize the self-sealing of the air gate field plate area and avoid subsequent deposition processes from filling the air gate field plate area, that is, the air layer area, thereby improving the reliability of device manufacturing.

[0030] In addition, during the preparation process of the existing air gate field plate structure, the deposited dielectric layer often deposits on the lower surface of the gate field plate or even wraps the entire gate. In order to avoid the deposited dielectric layer being too thick and affecting the thickness of the air layer, it is often necessary to ensure that the gate reaches a certain height. However, in the present application, due to the use of the non-conformal deposition integral forming process, the dielectric layer will not deposit on the lower surface of the gate field plate based on both sides of the gate pillar. Therefore, the height of the gate does not need to be limited.

[0031] The air-gate field plate structure provided by the embodiments of the present application realizes the self-sealing of the air-gate field plate region through the first dielectric layer integrally formed on the gate, avoiding the filling of the air-gate field plate region in subsequent deposition processes, so as to improve the reliability of device manufacturing.

[0032] In another implementation manner, as shown in Figure 2 As shown, a second dielectric layer 15 with a gate window formed in the middle is further provided on the substrate 11; the gate 12 is disposed in the gate window. A second dielectric layer 15 is deposited on the semiconductor substrate 11. An air-gate field plate dielectric structure gate 12 is deposited on the second dielectric layer 15. 14 is an air layer serving as the gate field plate dielectric. The first dielectric layer 13 is integrally formed by a non-conformal deposition process. The upper metal contact of the first dielectric layer 13 formed by this method and the gate 12, as well as the side contact of the gate field plate, but isolates the air layer 14 serving as the gate field plate dielectric from the outside (that is, the first dielectric layer 13 does not contact the gate root), and subsequent processes will not affect the air layer 14. This process does not require additional manufacturing of isolation regions and can self-seal the 14 part through one deposition. The thickness of the first dielectric layer 13 needs to be greater than the thickness of the air layer 14 under the gate field plate to ensure that the first dielectric layer 13 can seal the air layer 14 under the gate field plate. The sealing effect has nothing to do with the morphological dimensions of the gate 12, and the isolation of the air layer 14 part from the outside can be realized by a relatively simple process.

[0033] At the same time, since the first dielectric layer 13 inevitably has lateral expansion during deposition, the lateral distance (i.e., the gate width direction or the X direction) of the gate field plate corresponding to the gate 12, and / or the thickness of the air layer 14, needs to reach a certain threshold to ensure that the lateral expansion of the first dielectric layer during deposition does not extend to the root of the gate. The above-mentioned gate field plate is a rectangular structure or a regular trapezoidal structure; the lateral distance of the gate field plate is the lower side length of the gate field plate.

[0034] Specifically, the lateral distance of the gate field plate of the gate 12 needs to be long enough, and / or the thickness of the air layer 14 is thin enough to ensure that the lateral expansion of the first dielectric layer 13 during deposition does not extend to the gate foot metal part. Further, the ratio of half of the lateral distance of the gate field plate of the gate 12 to the thickness of the air layer 14 is greater than the tangent value of the climbing angle during the deposition of the first dielectric layer 13; the climbing angle is: the angle formed by the side of the first dielectric layer 13 close to the gate 12 and the side of the part of the substrate covered by the first dielectric layer 13.

[0035] This self-sealing dielectric structure of the air-gate field plate region is not only beneficial to the protection of the air-dielectric gate structure, but also beneficial to the formation of the source field plate behind the air-dielectric gate.

[0036] The above-mentioned second dielectric layer 15 can be a dielectric material such as silicon nitride, silicon oxide, aluminum oxide, etc. The deposition method of the second dielectric layer 15 can be conformal or non-conformal.

[0037] The above-mentioned first dielectric layer 13 can be a dielectric material such as silicon nitride, silicon oxide, aluminum oxide, etc. The deposition method of the first dielectric layer 13 must be non-conformal. Usually, it can be sputtering or electron beam evaporation to isolate the air layer 14 area from the outside. The thickness of the first dielectric layer 13 needs to be greater than the thickness of the air layer 14 to ensure that the air layer 14 area is isolated from the outside by the first dielectric layer 13.

[0038] The metal material used for the gate 12 can be a metal such as nickel, titanium, platinum, gold, or an alloy formed by any combination. The lateral distance of the gate field plate of the gate 12 and the thickness of the air layer 14 under the gate field plate need to meet the following conditions: the lateral distance of the gate field plate needs to be long enough, or the air layer 14 is thin enough, so as to ensure that the lateral expansion of the first dielectric layer 13 during deposition does not extend to the gate foot metal part, and to ensure the gate-source capacitance characteristics of this structure. Specifically, the ratio of half of the lateral distance of the gate field plate to the thickness of the air layer 14 needs to be greater than the tangent value of the climbing angle during the deposition of the first dielectric layer 13.

[0039] Based on the above structural embodiments, the embodiments of the present application further provide a preparation method for an air gate field plate structure. Refer to Figure 3 As shown, this method includes the following steps:

[0040] Step S302, forming a gate on the substrate, and the gate forms a Schottky contact with the substrate;

[0041] Step S304, depositing a first dielectric layer on the gate through a non-conformal deposition process, so that the first dielectric layer covers the outer peripheral side of the gate and covers the substrate, so that the first dielectric layer, the gate and the substrate enclose an air layer, and an air gate field plate structure is obtained.

[0042] Further, the above non-conformal deposition process includes: a sputtering process or an electron beam evaporation process.

[0043] Further, the step of forming a gate on the substrate further includes: forming a second dielectric layer on the substrate; opening a gate window in the middle of the second dielectric layer; and forming a gate in the gate window.

[0044] Further, before depositing the first dielectric layer, a source electrode and a drain electrode can also be formed, and the source electrode and the drain electrode form an ohmic contact with the substrate.

[0045] It should be noted that the substrate provided in the embodiments of the present application can be a substrate grown with an epitaxial layer, and a two-dimensional electron gas can be formed in the substrate.

[0046] In the manufacturing method of the air-gated field plate structure provided by the embodiments of the present application, the non-conformal dielectric deposition process is used to integrally form the self-sealing of the air-gated field plate region, avoiding the filling of the air-gated field plate region in subsequent deposition processes and improving the reliability of device manufacturing.

[0047] The air-gated field plate structure of the present invention can be used in semiconductor devices including but not limited to: high-power high electron mobility transistors (HEMTs) operating in high-voltage and high-current environments, transistors with a silicon-on-insulator (SOI) structure, gallium arsenide (GaAs)-based transistors, and metal-oxide-semiconductor field-effect transistors (MOSFETs), metal-insulator-semiconductor field-effect transistors (MISFETs), double heterojunction field-effect transistors (DHFETs), junction field-effect transistors (JFETs), metal-semiconductor field-effect transistors (MESFETs), metal-insulator-semiconductor heterojunction field-effect transistors (MISHFETs), or other field-effect transistors. In particular, it has more obvious advantages for gallium nitride electronic devices with a wide bandgap, high electron mobility, high breakdown field strength, and good thermal conductivity, and can be widely used in high-performance fields such as radio frequency microwave and power electronics.

[0048] In the description of the present application, it should be noted that the orientation or positional relationship indicated by terms such as "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present application. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0049] Finally, it should be noted that the above-described embodiments are only specific implementation manners of the present application, used to illustrate the technical solutions of the present application, rather than limiting it. The protection scope of the present application is not limited thereto. Although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that any person skilled in the technical field can still modify the technical solutions described in the foregoing embodiments or easily conceive changes, or perform equivalent replacements on some of the technical features; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An air grid field plate structure, characterized in that The air-gate field plate structure includes: a substrate, a gate, and a first dielectric layer sequentially arranged from bottom to top; the gate forms a Schottky contact with the substrate; the first dielectric layer is integrally formed, covers the outer peripheral side of the gate, and covers the substrate, so that the first dielectric layer, the gate, and the substrate enclose an air layer; the thickness of the first dielectric layer is greater than the thickness of the air layer.

2. The air grid field plate structure according to claim 1, characterized in that, A second dielectric layer with a gate window formed in the middle is provided on the substrate; the gate is disposed in the gate window, and the first dielectric layer is located on the side of the second dielectric layer away from the substrate.

3. The air grid field plate structure according to claim 1, characterized in that The lateral distance of the gate field plate corresponding to the gate, and / or the thickness of the air layer, needs to reach a certain threshold to ensure that the lateral expansion of the first dielectric layer during deposition does not extend to the root of the gate.

4. The air grid field plate structure according to claim 3, wherein, The ratio of half of the lateral distance of the gate field plate to the thickness of the air layer is greater than the tangent value of the climbing angle during deposition of the first dielectric layer; the climbing angle is: the angle formed by the side of the first dielectric layer close to the gate and the side of the part of the substrate covered by the first dielectric layer.

5. The air grid field plate structure according to claim 1, characterized in that In the extending direction of the gate, the first dielectric layer seals both ends of the gate, and the air layer forms a sealed air cavity.

6. The air grid field plate structure according to claim 2, characterized in that, The materials of the first dielectric layer and the second dielectric layer include: silicon nitride, silicon oxide, or aluminum oxide.

7. The air grid field plate structure according to claim 1, characterized in that The substrate material includes single-crystal semiconductor, compound semiconductor, or heterostructure.

8. A preparation method of an air grid field plate structure, characterized in that The method includes: Forming a gate on the substrate, and the gate forms a Schottky contact with the substrate; Depositing a first dielectric layer on the gate through a non-conformal deposition process, so that the first dielectric layer covers the outer peripheral side of the gate and covers the substrate, so that the first dielectric layer, the gate, and the substrate enclose an air layer, to obtain an air-gate field plate structure.

9. The method according to claim 8, wherein The non-conformal deposition process includes: sputtering process or electron beam evaporation process.

10. The method according to claim 8, characterized in that The step of forming the gate on the substrate further includes: Forming a second dielectric layer on the substrate; Opening a gate window in the middle of the second dielectric layer; Forming the gate in the gate window.

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