Stripping method of photoresist containing gold-tin pattern and preparation method of wafer chip

Abstract

The invention discloses a stripping method of photoresist containing a gold-tin pattern and a preparation method of a wafer chip, and belongs to the field of integrated circuit manufacturing and packaging, and after a gold-tin alloy layer is formed through wafer photoetching patterning, photoresist removal comprises the following steps: S8, immersing in an acetone solution, carrying out ultrasonic treatment for 10-30 minutes under the current of 0.2 A-1 A, and immersing in an isopropanol solution for 1-10 minutes; and S9, removing the photoresist by using a plasma photoresist remover to obtain a wafer chip product. According to the method, on the premise that the performance of the gold-tin alloy is not damaged, a gold-tin wafer product without photoresist residues is rapidly obtained through the synergistic effect of a wet-method photoresist removing process and a dry-method photoresist removing process.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit manufacturing and packaging, and more specifically, to a method for stripping photoresist with a gold-tin pattern and a method for fabricating a wafer chip with a gold-tin pattern. Background Art

[0002] As the core process in wafer manufacturing, lithography converts the circuit topology on the mask into a physical pattern on the wafer surface through the synergistic effect of deep ultraviolet light source and photosensitive polymer. Its linewidth accuracy directly determines the transistor density and chip performance. This process accounts for 32%-35% of the chip manufacturing cost, mainly due to its high-precision requirements and the characteristics of being prone to defects. Among them, photoresist stripping, as a key step, needs to completely remove the unexposed photoresist layer while ensuring no damage to the wafer substrate and metal layer.

[0003] To achieve this goal, wet stripping technology removes the uncurable colloid through the selective interaction of solvent molecules. Currently, common stripping liquids include N-methylpyrrolidone (NMP), dimethyl sulfoxide (DMSO), acetone, etc. Among them, NMP and DMSO are extremely easy to penetrate the skin and cause harm to the human body, while acetone has relatively low toxicity and low cost. Dry stripping such as plasma can accurately remove the residual colloid and has strong adaptability to complex structures.

[0004] In the field of integrated circuit manufacturing and packaging, the tensile strength and shear strength of gold-tin alloys (such as Au80Sn20 or Au75Sn25, etc.) are significantly higher than those of tin-silver-copper (SAC) alloys, which can effectively alleviate the crack propagation of solder joints caused by thermal stress. Therefore, they are widely used. When traditional wet stripping is applied to the photoresist stripping in the field of integrated circuit manufacturing and packaging with gold-tin alloy patterns, the problem of uneven penetration caused by surface tension in high aspect ratios becomes increasingly prominent. When traditional wet stripping is applied to the photoresist stripping in the field of integrated circuit manufacturing and packaging with gold-tin alloy patterns, in an unprotected atmosphere environment, when the temperature exceeds 200 °C, tin will gradually be oxidized to tin oxide (SnO2), affecting the wetting performance of the welding interface and increasing the risk of leakage. The oxygen radicals in the plasma are much more chemically active than gaseous oxygen and can cause metal oxidation at a lower temperature.

[0005] The above background art is for facilitating the understanding of the present invention and is not the prior art that has been publicly known to the general public before the application of the present invention. Summary of the Invention

[0006] In view of the above problems, the present invention provides a method for fabricating a wafer chip with a gold-tin pattern, aiming to solve the problem of photoresist stripping in the field of integrated circuit manufacturing and packaging with gold-tin alloy patterns.

[0007] A method for stripping photoresist with a gold-tin pattern. After forming a gold-tin alloy layer by wafer lithography patterning, removing the photoresist includes the following steps: S8, immersing in an acetone solution, ultrasonicating for 10 min to 30 min at a current of 0.2 A to 1 A, and immersing in an isopropanol solution for 1 min to 10 min; S9, removing the photoresist with a plasma asher to obtain a wafer chip product.

[0008] Optionally, in S8, the immersion in the acetone solution is carried out in two times, and each time the immersed acetone solution is freshly prepared acetone solution.

[0009] Optionally, in S9, the plasma ashing conditions are: power of 100 W to 200 W, oxygen flow rate of 50 sccm to 150 sccm, and time of 1 min to 10 min.

[0010] Optionally, the photoresist is a negative photoresist.

[0011] Optionally, the wafer is a four-inch alumina substrate or a four-inch aluminum nitride substrate.

[0012] The present invention also provides a method for preparing a wafer chip with a gold-tin pattern.

[0013] A method for preparing a wafer chip with a gold-tin pattern includes the following steps: S1. Perform the first lithography patterning on the wafer substrate; S2. Sputter a titanium layer, a platinum layer, and a gold layer in sequence to form an activation metal layer; S4. Immerse in an acetone solution, ultrasonicate for 10 min to 30 min at a current of 0.2 A to 1 A, and immerse in an isopropanol solution for 1 min to 10 min; S5. Perform the second lithography patterning; S6. Evaporate a gold-tin alloy; S8. Immerse in an acetone solution, ultrasonicate for 10 min to 30 min at a current of 0.2 A to 1 A, and immerse in an isopropanol solution for 1 min to 10 min; S9. Remove the photoresist with a plasma asher to obtain a wafer chip product.

[0014] Optionally, after S2 and before S4, S3 is further included, sticking a blue film for assisting in removing the photoresist and tearing off the blue film after sticking; after S6 and before S8, S7 is further included, sticking a blue film for assisting in removing the photoresist and tearing off the stuck blue film after sticking.

[0015] Optionally, in S8, the immersion in the acetone solution is carried out in two times, and each time the immersed acetone solution is freshly prepared acetone solution.

[0016] Optionally, in S9, the plasma ashing conditions are: power of 100 W to 200 W, oxygen flow rate of 50 to 150 sccm, and time of 1 min to 10 min.

[0017] Optionally, the photoresist is a negative photoresist.

[0018] Compared with the prior art, the beneficial effects of the present invention are as follows: First of all, in the present invention, through wet acetone + isopropyl alcohol + specific ultrasonic current, high polarity can efficiently penetrate to the photoresist-substrate interface, preferentially dissolve uncrosslinked polymer chains, and have little impact on the cured exposed area. Excessive current density will cause violent cavitation, which may break the stripped photoresist fragments into smaller particles. However, these particles may be temporarily suspended in the liquid due to solution turbulence or surface charge effects, and then redeposit on the surface due to solvent evaporation or liquid flow stagnation; too small current density cannot effectively break the binding force between the photoresist and the substrate, and can remove residues more thoroughly with low toxicity. Then, for the photoresist fragments remaining on the metal and substrate after wet cleaning, the photoresist is ashed in the shortest time under an oxygen atmosphere and specific plasma power. Excessive oxygen flow rate and power will cause oxidation of the AuSn alloy surface, and Sn will gradually be oxidized to SnO2 or SnO, and even form holes, damaging the subsequent solderability of AuSn; too small cannot oxidize the photoresist into CO2 and H2O, not only thoroughly removing the photoresist, but also ensuring that the AuSn content changes little and does not affect subsequent chip packaging. Description of the Drawings

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0020] Figure 1 It is an image of the present invention with a total ultrasonic time of 25 min at a current of 0.6 A; Figure 2 It is an image of the present invention after wet process + oxygen dry process; Figure 3 It is an image of the present invention with a total ultrasonic time of 25 min at a current of 0.2 A; Figure 4 It is an image of the present invention with a total ultrasonic time of 25 min at a current of 1 A; Figure 5 It is an image of the present invention with a total ultrasonic time of 20 min at a current of 0.6 A; Figure 6 It is an image of the present invention after wet process + argon dry process; Figure 7 This is the image after the wet process + oxygen and argon dry process of the present invention. Detailed implementation manners

[0021] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it may be a fixed connection, or indirectly connected through an intermediate medium, or the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0022] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present invention. In the description of the present invention, the meaning of "a plurality of" is two or more, unless otherwise specifically and precisely specified.

[0023] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of this application and the above-mentioned drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances, so that the embodiments of this application described here can be implemented in an order different from those illustrated or described here. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device comprising a series of steps or units does not have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0024] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of this application.

[0025] The technical solutions of the present invention will be described in detail below with specific embodiments. These specific embodiments below can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0026] In the present invention, photolithographic patterning refers to the process of transferring the pattern to be formed through a mask pattern to a wafer through steps such as coating, exposure, and development of a photoresist.

[0027] In the present invention, the wafer is a four-inch alumina substrate or a four-inch aluminum nitride substrate.

[0028] In the present invention, the photoresist is preferably a negative photoresist.

[0029] Example 1 A preparation method of a wafer chip product with a gold-tin pattern is prepared through the following sequential steps: S1. Perform photolithographic patterning on a four-inch wafer substrate.

[0030] S2. Sputter a titanium layer, a platinum layer, and a gold layer in sequence to form an activation metal layer.

[0031] S3. Stick a blue film, gently wipe the surface of the blue film back and forth with a lint-free cloth so that the blue film is in complete contact with the activation metal layer, and then tear off the blue film. The activation metal layer on the photoresist will adhere to the torn blue film, so that the photoresist is completely exposed.

[0032] During operation, place a layer of lint-free cloth under the substrate to prevent damage to the back surface.

[0033] S4. Remove the photoresist: Immerse it in a clean acetone solution, ultrasonic for 10 min at a current of 0.6 A (the first ultrasonic), and then immediately put it into another clean acetone solution and ultrasonic for 15 min at 0.6 A (the second ultrasonic) to prevent the photoresist from re-adsorbing on the surface of the metal layer. Then immerse it in a clean isopropyl alcohol solution for 5 min, and immediately rinse, spin-dry, and dry it with deionized water.

[0034] The clean acetone solution refers to a newly prepared acetone solution, and the clean isopropyl alcohol solution refers to a newly prepared isopropyl alcohol solution.

[0035] S5. Perform photolithographic patterning again.

[0036] S6. Evaporate a gold-tin alloy (Au75Sn25).

[0037] S7. Stick a blue film, gently wipe the surface of the blue film back and forth with a lint-free cloth so that the blue film is in complete contact with the gold-tin layer, and then tear off the blue film. The gold-tin layer on the photoresist will adhere to the torn blue film, so that the photoresist is completely exposed.

[0038] During operation, place a layer of lint-free cloth under the substrate to prevent damage to the back surface.

[0039] S8, Photoresist Removal: Immerse in a clean acetone solution, sonicate at 0.6 A for 10 min (first sonication), then immediately transfer to another clean acetone solution and sonicate at 0.6 A for 15 min (second sonication). The purpose of changing the solution in a timely manner is to prevent the photoresist from re-adsorbing onto the surface of the metal layer. Then immerse in an isopropanol solution for 5 min, and immediately rinse with deionized water, spin-dry, and dry. The image is as shown in Figure 1 .

[0040] S9, Plasma Ashing to Obtain a Wafer Chip Product with No Photoresist Residue (Plasma product image is as shown in Figure 2 ): The plasma asher evacuates to 0.320 mbar, with a power of 100 W, an oxygen flow rate of 100 sccm, and a time of 3 min.

[0041] As can be seen from the figure, there is no photoresist residue on the wafer chip product.

[0042] Test the gold-tin composition of the wafer chip product in S9 using XRF. The test results are shown in Table 1.

[0043] Comparative Example 1 Compared with Example 1, the differences are as follows: ⑴ In S4 and S8, the sonication current is 0.2 A; ⑵ Stop after S8 is completed without performing subsequent processes.

[0044] The image after S8 is as shown in Figure 3 , and as can be seen from the figure, there is still photoresist residue from the photolithographic patterning in S5 on the wafer chip product, indicating incomplete photoresist removal after S8 and S9.

[0045] Comparative Example 2 Compared with Example 1, the differences are as follows: ⑴ In S4 and S8, the sonication current is 1 A; ⑵ Stop after S8 is completed without performing subsequent processes.

[0046] The image after S8 is as shown in Figure 4 , and as can be seen from the figure, there is still photoresist residue from the photolithographic patterning in S5 on the wafer chip product, indicating incomplete photoresist removal after S8 and S9.

[0047] Comparative Example 3 Compared with Example 1, the differences are as follows: ⑴ In S4 and S8, the second sonication time is 10 min; ⑵ Stop after S8 is completed without performing subsequent processes.

[0048] The image after S8 is as shown in Figure 5, As can be seen from the figure, there is still photoresist residue in the lithography patterning in S5 on the wafer chip product, indicating that the photoresist removal in S8 and S9 is not thorough enough.

[0049] Comparative Example 4 Compared with Example 1, the difference is that after S7, S8 is not carried out and directly enters S9.

[0050] Comparative Example 5 Compared with Example 1, the difference is that in S9, the time is 1 min.

[0051] The wafer chip product is tested for gold-tin composition by XRF, and the test results are shown in Table 1.

[0052] Comparative Example 6 Compared with Example 1, the difference is that in S9, the time is 2 min.

[0053] The wafer chip product is tested for gold-tin composition by XRF, and the test results are shown in Table 1.

[0054] Comparative Example 7 Compared with Example 1, the difference is that in S9, the power is 200 W.

[0055] The wafer chip product is tested for gold-tin composition by XRF, and the test results are shown in Table 1.

[0056] Example 2 Compared with Example 1, the difference is that in S9, argon is introduced instead of oxygen.

[0057] After dry process, such as Figure 6 , will Figure 6 Compared with Figure 2 , surface dirt and small black dots still exist, and the removal efficiency is low. This is mainly because argon plasma is mainly physical bombardment, which is effective for brittle or loose residual photoresist, but has limited effect on chemically cross-linked tight photoresist and cannot decompose organic substances through oxidation reaction.

[0058] Example 3 Compared with Example 1, the difference is that in S9, in addition to introducing oxygen, argon is also introduced, the oxygen flow rate is 80 sccm, and the argon flow rate is 20 sccm.

[0059] After dry process, such as Figure 7 , will Figure 7 Compared with Figure 2 , there are no small black dots on the surface in a large area, but due to insufficient oxygen content, the oxygen free radicals do not fully react with the organic components in the photoresist, and there is still a small amount of residual photoresist.

[0060] Examples 1, Comparative Example 1, Comparative Example 2, and Comparative Example 3 were compared. In the manufacture of wafer chip products with AuSn patterns, in the stripping of photoresist in the presence of AuSn alloy, in the process of combining wet and dry stripping, with the dry conditions and other conditions such as the stripping solution established, an ultrasonic current of 0.6 A can completely strip the photoresist, followed by 1 A, and 0.2 A is the worst.

[0061] Table 1 AuSn alloy composition ratio

[0062] Examples 1, Comparative Examples 5 - 7 were compared. Under the same thorough removal of photoresist (i.e., with the wet cleaning conditions unchanged), with other conditions unchanged, as time increases, the tin content gradually increases in a small amplitude trend; with other conditions unchanged, when the power is doubled, the growth rate of the tin content increases; it shows that Example 1 can ensure that the change in the AuSn content is not significant, does not affect subsequent chip packaging, and can also remove the photoresist cleanly.

[0063] The present invention can not only completely remove the photoresist cleanly, but also ensure that the change in the AuSn content is not significant and does not affect subsequent chip packaging.

[0064] Finally, it should be noted that the above examples are only used to illustrate the technical solutions of the present invention and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing examples, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing examples, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for stripping a photoresist with a gold-containing tin pattern, characterized in that After forming a gold-tin alloy layer by wafer lithography patterning, removing the photoresist includes the following steps: S8. Immerse in an acetone solution, ultrasonically treat for 10 min to 30 min at a current of 0.2 A to 1 A, and then immerse in an isopropyl alcohol solution for 1 min to 10 min; S9. Use a plasma asher to remove the photoresist to obtain a wafer chip product.

2. The method for stripping photoresist of a gold-containing tin pattern according to claim 1, wherein In S8, the immersion in the acetone solution is carried out in two times, and each time the acetone solution immersed is a newly prepared acetone solution.

3. The method for stripping photoresist of a gold-containing tin pattern according to claim 1, wherein In S9, the plasma ashing conditions are: power is 100 W to 200 W, oxygen flow rate is 50 sccm to 150 sccm, and time is 1 min to 10 min.

4. The photoresist stripping method for the gold-tin pattern according to claim 1, characterized in that, The photoresist is a negative photoresist.

5. The method for stripping photoresist of a gold-containing tin pattern according to claim 1, wherein The wafer is a four-inch alumina substrate or a four-inch aluminum nitride substrate.

6. A method for preparing a wafer chip with a gold-containing tin pattern, characterized in that, Including the following steps: S1. Perform the first lithography patterning on the wafer substrate; S2. Sputter a titanium layer, a platinum layer, and a gold layer in sequence to form an activation metal layer; S4. Immerse in an acetone solution, ultrasonically treat for 10 min to 30 min at a current of 0.2 A to 1 A, and then immerse in an isopropyl alcohol solution for 1 min to 10 min; S5. Perform the second lithography patterning; S6. Evaporate gold-tin alloy; S8. Immerse in an acetone solution, ultrasonically treat for 10 min to 30 min at a current of 0.2 A to 1 A, and then immerse in an isopropyl alcohol solution for 1 min to 10 min; S9. Use a plasma asher to remove the photoresist to obtain a wafer chip product.

7. The manufacturing method of the wafer chip with a gold-tin pattern according to claim 6, characterized in that After S2 and before S4, S3 is further included, that is, stick a blue film for assisting in removing the photoresist and tear off the blue film after sticking; after S6 and before S8, S7 is further included, that is, stick a blue film for assisting in removing the photoresist and tear off the stuck blue film after sticking.

8. The preparation method of the wafer chip with a gold-tin pattern according to claim 6, characterized in that, In S8, the immersion in the acetone solution is carried out in two times, and each time the acetone solution immersed is a newly prepared acetone solution.

9. The preparation method of the wafer chip with a gold-tin pattern according to claim 6, characterized in that, In S9, the plasma ashing conditions are: power is 100 W to 200 W, oxygen flow rate is 50 sccm to 150 sccm, and time is 1 min to 10 min.

10. The preparation method of the wafer chip with a gold-tin pattern according to claim 6, characterized in that, The photoresist is a negative photoresist.

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