Circuit board and electronic equipment

By setting solder-resistant window opening and detection circuit on the solder-resistant layer of the circuit board, the range and direction of crawl corrosion are controlled, and combined with voltage divider circuits and data processing circuits, the problem of inaccurate crawl corrosion detection is solved, achieving higher detection accuracy and improved circuit board performance.

CN120302516APending Publication Date: 2025-07-11HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202410042249.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-01-10
Publication Date
2025-07-11

AI Technical Summary

Technical Problem

The existing crawling corrosion detection scheme is affected by factors such as environmental humidity, temperature and corrosion gas flow direction, resulting in inaccurate detection, making it difficult to accurately determine whether the circuit board has crawling corrosion.

Method used

The solder resist window is installed on the solder resist layer of the circuit board, and the detection line is exposed. By controlling the range and direction of the crawling corrosion, the detection circuit is used to accurately detect the crawling corrosion in the solder resist window, and combined with the voltage divider circuit and the data processing circuit, an alarm signal is output to judge the corrosion situation.

Benefits of technology

It improves the accuracy of crawl corrosion detection, can cover crawl corrosion in different directions, reduces the difficulty of detection, and accurately judges the corrosion status of the circuit board through level signals.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a circuit board and electronic equipment, relates to the technical field of electronics, and is used for improving the accuracy of creeping corrosion detection. The circuit board comprises a detection circuit and a solder mask layer, the detection circuit comprises at least two detection lines, the at least two detection lines comprise a first detection line and a second detection line, the first detection line is parallel to the second detection line, the solder mask layer comprises at least one solder mask window, and each solder mask window exposes part of the first detection line and part of the second detection line; two ends of the first detection line are coupled with the grounding end, one end of the second detection line is coupled with the detection node, a detection voltage greater than 0 volt is applied to the detection node, and the detection circuit is used for detecting whether creeping corrosion occurs on the circuit board.
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Description

Technical Field

[0001] This application relates to the field of electronic technologies, and particularly to a circuit board and an electronic device. Background Art

[0002] The working environment of electronic devices is complex and diverse. Some working environments may have an impact on electronic devices. For example, in working environments such as water leakage, wet dust, and gas pollution, the circuit boards of electronic devices may be corroded (such as creep corrosion, corrosion open circuit, and wet dust corrosion). Among them, integrated and miniaturized electronic devices are more sensitive to corrosion and are prone to failure due to corrosion.

[0003] In existing creep corrosion detection solutions, whether creep corrosion occurs on the circuit board is determined by detecting whether the level of the corrosion detection port is high or low. However, creep corrosion is affected by factors such as environmental humidity, temperature, and the flow direction of corrosive gases, which may cause creep corrosion to be out of control, resulting in inaccurate creep corrosion detection. Summary of the Invention

[0004] This application provides a circuit board and an electronic device for improving the accuracy of creep corrosion detection.

[0005] To achieve the above object, this application adopts the following technical solutions:

[0006] In a first aspect, a circuit board is provided. The circuit board includes a detection circuit and a solder mask layer. The detection circuit includes at least two detection lines. The at least two detection lines include a first detection line and a second detection line. The first detection line and the second detection line are parallel (the first detection line and the second detection line being parallel means that the first detection line and the second detection line are approximately parallel. For example, the included angle between the first detection line and the second detection line can be greater than 0 and less than 5 degrees). The solder mask layer includes at least one solder mask opening. Each solder mask opening exposes a part of the first detection line and a part of the second detection line. Both ends of the first detection line are coupled to a ground terminal. One end of the second detection line is coupled to a detection node. A detection voltage greater than 0 volts is applied to the detection node. The detection circuit is used to detect whether creep corrosion occurs on the circuit board.

[0007] In the technical solution provided by this application, at least one solder mask opening is provided on the solder mask layer of the circuit board. Each solder mask opening exposes a part of the first detection line and a part of the second detection line. The creep corrosion detection is carried out by using the characteristic that the solder mask opening is prone to corrosion. The range and direction of creep corrosion are controlled by the solder mask opening, so that the creep corrosion is within the range of the solder mask opening and creeps along the solder mask opening. Whether creep corrosion occurs within the solder mask opening can be accurately detected by the detection circuit. Compared with Figure 2 the situation where creep corrosion is out of control and the detection circuit cannot detect creep corrosion, the accuracy of creep corrosion detection is improved.

[0008] In a possible implementation of the first aspect, the detection line includes a first sub-line extending along a first direction (for example, the first direction may be a direction parallel to the surface where the solder mask layer is located and horizontally to the right), at least one solder mask opening includes a first solder mask opening, and the angle between the first solder mask opening and the first sub-line is a first angle (for example, the first angle may be 90 degrees). The first solder mask opening exposes a part of the first sub-line of the first detection line and a part of the first sub-line of the second detection line. In the above possible implementation, the angle between the first solder mask opening and the first sub-line is 90 degrees. By controlling the creep corrosion within the range of the first solder mask opening along the first solder mask opening (for example, creeping upward or downward along a direction at 90 degrees to the first sub-line), the direction of the creep corrosion is controlled, and the detection accuracy of the creep corrosion is improved.

[0009] In a possible implementation of the first aspect, the detection line includes a first sub-line extending along the first direction, at least one solder mask opening includes a second solder mask opening, and the angle between the second solder mask opening and the first sub-line is a second angle (for example, the second angle may be 45 degrees). The second solder mask opening exposes a part of the first sub-line of the first detection line and a part of the first sub-line of the second detection line, and the first angle is different from the second angle. In the above possible implementation, the creep corrosion is controlled within the range of the second solder mask opening along the second solder mask opening (for example, creeping along a direction at 45 degrees to the first sub-line), the direction of the creep corrosion is controlled, and by setting solder mask openings in multiple directions, different directions of the creep corrosion are adapted, further improving the detection accuracy of the creep corrosion.

[0010] In a possible implementation of the first aspect, the detection line further includes a second sub-line extending along a second direction, and the angle between the first direction and the second direction is a third angle (for example, the third angle may be 90 degrees, that is, the first sub-line in the first direction is perpendicular to the second sub-line in the second direction). At least one solder mask opening further includes a third solder mask opening, and the angle between the third solder mask opening and the second sub-line is a fourth angle (for example, the fourth angle may be 90 degrees). The third solder mask opening exposes a part of the second sub-line of the first detection line and a part of the second sub-line of the second detection line. In the above possible implementation, the creep corrosion is controlled within the range of the third solder mask opening along the third solder mask opening (for example, creeping left or right along a direction at 90 degrees to the second sub-line), the direction of the creep corrosion is controlled, and by setting solder mask openings on sub-lines in different directions, all directions of the creep corrosion are covered, further improving the detection accuracy of the creep corrosion.

[0011] In a possible implementation of the first aspect, the distance between the first sub-line of the first detection line and the first sub-line of the second detection line is the first distance, and the distance between the second sub-line of the first detection line and the second sub-line of the second detection line is the second distance, and the first distance is greater than the second distance. In the above possible implementation, when the degree of creep corrosion is relatively light, creep corrosion may occur between the sub-lines with a smaller distance. For example, when the degree of creep corrosion is relatively light, creep corrosion may occur between the first sub-line of the first detection line and the first sub-line of the second detection line. When the degree of creep corrosion is relatively severe, creep corrosion may occur between the sub-lines with a larger distance. For example, creep corrosion may occur between the second sub-line of the first detection line and the second sub-line of the second detection line. The difference in the distance between the sub-lines in different directions can further improve the detection accuracy of creep corrosion.

[0012] In a possible implementation of the first aspect, the first included angle, the third included angle, and the fourth included angle are within the first angular range, the first angular range is (90 ± X) degrees, the second included angle is within the second angular range, and the second angular range is (45 ± X) degrees or (135 ± X) degrees, where X is not equal to zero. In the above possible implementation, by means of solder mask openings at different angles, the creep corrosion is controlled to creep in different directions. For example, the creep corrosion is controlled to creep horizontally upward, horizontally downward, horizontally to the left, horizontally to the right, and in the diagonal direction, covering all directions of the corrosion creep, improving the detection accuracy of the creep corrosion while reducing the difficulty of setting the solder mask opening.

[0013] In a possible implementation of the first aspect, at least one first via is provided on the part of the first sub-line exposed by the first solder mask opening; and / or, at least one second via is provided on the part of the first sub-line exposed by the second solder mask opening; and / or, at least one third via is provided on the part of the second sub-line exposed by the third solder mask opening. In the above possible implementation, the creep corrosion of the vias is detected to improve the performance of the circuit board.

[0014] In a possible implementation of the first aspect, at least two detection lines further include a third detection line, the third detection line is parallel to the second detection line, the second detection line is disposed between the first detection line and the third detection line, and both ends of the third detection line are coupled to the ground terminal, and each solder mask opening also exposes a part of the third detection line. In the above possible implementation, both the first detection line and the third detection line are connected to the ground. By disposing the second detection line between the first detection line and the third detection line, when creep corrosion occurs, it is detected whether creep corrosion occurs by connecting the first detection line to the second detection line or connecting the second detection line to the third detection line, improving the detection accuracy of creep corrosion.

[0015] In a possible implementation of the first aspect, the detection circuit further includes a voltage dividing circuit and a data processing circuit. The voltage dividing circuit is coupled between the first power supply and the ground terminal. The third terminal of the voltage dividing circuit is connected to the detection node. The port of the data processing circuit is connected to the detection node. The first power supply is used to provide a first voltage for the voltage dividing circuit. The voltage dividing circuit is used to divide the first voltage. The voltage at the detection node is the detected voltage after division. The data processing circuit is used to analyze the detected voltage and output an alarm signal. In the above possible implementation, the detection voltage is provided for the detection node by the first power supply. When the circuit board does not undergo creep corrosion, the port of the data processing circuit is at a high level. When the circuit board undergoes creep corrosion, the detection voltage is zero and the port of the data processing circuit is at a low level. By detecting the level of the port of the data processing circuit, it can be determined whether the circuit board has undergone creep corrosion, improving the performance of the circuit board.

[0016] In a possible implementation of the first aspect, the voltage dividing circuit includes a first resistor and a second resistor. The first resistor is coupled between the first power supply and the detection node. The second resistor is coupled between the detection node and the ground terminal.

[0017] In a possible implementation of the first aspect, the detection circuit further includes a comparison circuit. The comparison circuit is coupled between the detection node and the port. The comparison circuit is used to receive the second voltage provided by the second power supply and the detected voltage, and output different level signals based on the magnitude relationship between the detected voltage and the second voltage. In the above possible implementation, a comparator is used to judge the corrosion degree of the circuit board, improving the performance of the circuit board.

[0018] In a possible implementation of the first aspect, the comparison circuit includes a third resistor and a comparator. The third resistor is coupled between the output terminal of the comparator and the port. The first input terminal of the comparator is coupled to the detection node. The second input terminal of the comparator is coupled to the second power supply.

[0019] In the second aspect, an electronic device is provided. The electronic device includes a circuit board and a functional circuit. The functional circuit includes a memory and a processor. The functional circuit is disposed on the circuit board. The circuit board includes the circuit board provided by the first aspect or any possible implementation of the first aspect.

[0020] It can be understood that the above-provided electronic device includes the circuit board provided above. Therefore, the beneficial effects it can achieve can refer to the beneficial effects of the circuit board provided above, which will not be elaborated here. Description of the Drawings

[0021] Figure 1a It is a schematic structural diagram of a PCB provided by an embodiment of the present application;

[0022] Figure 1bSchematic diagram of a via provided by an embodiment of the present application;

[0023] Figure 2 Schematic diagram of a corrosion detection circuit provided by an embodiment of the present application;

[0024] Figure 3 Schematic diagram of a creep corrosion provided by an embodiment of the present application;

[0025] Figure 4 Schematic diagram of the structure of an electronic device provided by an embodiment of the present application;

[0026] Figure 5 Schematic diagram of the structure of a circuit board provided by an embodiment of the present application;

[0027] Figure 6 Schematic diagram of the structure of another PCB provided by an embodiment of the present application;

[0028] Figure 7 Schematic diagram of the structure of yet another circuit board provided by an embodiment of the present application;

[0029] Figure 8 Schematic diagram of the structure of a detection circuit and a solder mask provided by an embodiment of the present application;

[0030] Figure 9 Schematic diagram of the structure of another detection circuit and a solder mask provided by an embodiment of the present application;

[0031] Figure 10 Schematic diagram of the structure of a via provided by an embodiment of the present application;

[0032] Figure 11 Schematic diagram of the structure of yet another detection circuit and a solder mask provided by an embodiment of the present application;

[0033] Figure 12 Schematic diagram of the structure of yet another detection circuit and a solder mask provided by an embodiment of the present application. Detailed implementation manners

[0034] In this application, "at least one" means one or more, and "a plurality" means two or more. "And / or" describes the relationship between associated objects and indicates that there can be three relationships. For example, A and / or B can represent: A exists alone, both A and B exist simultaneously, or B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after. "At least one (item)" or a similar expression refers to any combination of these items, including any combination of a single item or multiple items. For example, at least one of a, b, or c can represent: a, b, c, a - b, a - c, b - c, or a - b - c, where a, b, and c can be single or multiple. Additionally, the embodiments of this application use terms such as "first" and "second" to distinguish identical or similar items with basically the same function and role. For example, the first threshold and the second threshold are merely used to distinguish different thresholds and do not limit their order. Those skilled in the art can understand that terms such as "first" and "second" do not limit the quantity and execution order.

[0035] It should be noted that in this application, words such as "exemplary" or "for example" are used to give examples, illustrations, or explanations. Any embodiment or design solution described as "exemplary" or "for example" in this application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Rather, the use of words such as "exemplary" or "for example" is intended to present relevant concepts in a specific manner.

[0036] A detection circuit included in a circuit board provided by an embodiment of this application is used to detect the occurrence of creep corrosion on the circuit board (such as the degree of creep corrosion). Here, the circuit board can include a printed circuit board (PCB), a printed circuit board assembly (PCBA), etc., and the embodiments of this application do not make limitations.

[0037] First, the relevant knowledge regarding the circuit board in the embodiments of this application will be explained below.

[0038] Exemplarily, Figure 1a is a schematic structural diagram of a PCB. The PCB can include a first surface, a second surface opposite to the first surface, and a solder mask layer provided on the first surface. The PCB can also include vias and PCB traces, etc. Figure 1a The first surface and the second surface are not shown in.

[0039] Via: A hole that penetrates the first surface and the second surface of the PCB. A via includes a pad (annular ring) and a via wall. Among them, the pad can also be called a solder pad. Vias are usually used to achieve connections between the first surface, the second surface, and different layers.

[0040] PCB Trace: A line laid on the first surface. PCB traces can include detection lines and connection lines. The connection lines are used to connect different components on the PCB, and the detection lines are used to detect various functions of the PCB, such as corrosion detection. Among them, corrosion detection can include creep corrosion detection provided by the embodiments of the present application.

[0041] Via Group: There are many vias on the PCB, as Figure 1b shown. In the embodiments of the present application, a via group includes multiple or multiple pairs of vias. For example, Figure 1b as shown in the schematic, the via group includes 4 pairs of vias, taking a pair of vias including two vias as an example.

[0042] Soldermask: A layer of film covering the first surface of the PCB, usually green, so it is also called green oil. On the PCB, the areas where components do not need to be soldered can be covered with the soldermask to protect the circuit and prevent open circuits and damages caused by improper operations; and the soldermask can resist the influence of the external environment on the PCB, such as gas corrosion, salt spray, and wet dust corrosion.

[0043] Soldermask Opening: It means etching away a part of the soldermask on the PCB trace to expose the trace. In the embodiments of the present application, the purpose of the soldermask opening is to intentionally expose the trace to make it more easily corroded, serving as a weak point of the entire PCB for detection.

[0044] Secondly, a brief introduction to the types of corrosion is given.

[0045] Corrosion Open Circuit: Wet dust adheres to the surface of the PCB, forming an electrolyte. Ions in the electrolyte migrate, resulting in the corrosion and disconnection of the PCB trace. For example, it causes the copper wire to be corroded and disconnected, resulting in an open circuit.

[0046] Creep Corrosion: It refers to the reaction of polluting gases (such as hydrogen sulfide, hydrogen chloride, etc.) in the environment with the circuit board (such as the via of the circuit board) or the components on the circuit board, generating conductive metal oxides. For example, reacting with copper in the components to generate cuprous sulfide. The metal oxide (such as cuprous sulfide) continuously crawls and grows outward from the via. When creep corrosion occurs on the circuit board, it may lead to a decrease in the impedance or a short circuit of the circuit. Optionally, there are various situations of creep corrosion, such as including other creep corrosion situations of test holes, press-fit holes, components, and traces.

[0047] In a possible embodiment, it is determined whether creep corrosion occurs on the circuit board by detecting whether the level of the corrosion detection port is high or low. Exemplarily, Figure 2 is a schematic diagram of a corrosion detection circuit, which includes a creep corrosion detection circuit 201, a corrosion break detection circuit 202, and a logic chip 203. The creep corrosion detection circuit 201 includes 6 resistors, which can be respectively represented as R1 to R6, via group G1, via group G2, via group G3, capacitor C1, and capacitor C2; the corrosion break detection circuit 202 includes resistor R7 and a soldermask opening. Among them, the creep corrosion detection circuit 201 can also be called a sulfurization creep warning circuit, and the corrosion break detection circuit 202 can also be called a break corrosion warning.

[0048] The connection relationship between each circuit included in the corrosion detection circuit and the logic chip 203 will be described below.

[0049] Among them, via group G1, resistor R1, resistor R2, resistor R6, and capacitor C1 form a first detection loop. Resistors R1 and R2 are connected in parallel between one end of capacitor C1 and one end of via group G1. The other end of capacitor C1 is connected to the ground terminal. Resistor R6 is connected in series between one end of via group G1 and the power supply. The other end of via group G1 is connected to the general purpose input / output port (GPIO) 0 of the logic chip 203; via group G2, the soldermask opening, and resistor R7 form a second detection loop. Via group G2, the soldermask opening, and resistor R7 are connected in series between the power supply and the ground terminal. The soldermask opening and resistor R7 are coupled at node P1, and node P1 is connected to GPIO1 of the logic chip 203; via group G3, resistor R3, resistor R4, resistor R5, and capacitor C2 form a third detection loop. Resistors R3 and R4 are connected in parallel between one end of capacitor C2 and one end of via group G3. The other end of capacitor C2 is connected to the ground terminal. Resistor R5 is connected in series between the power supply and one end of via group G3. The other end of via group G3 is connected to GPIO2 of the logic chip 203.

[0050] Among them, the power supply can be used to provide voltage. For example, the power supply can be a 3.3V power supply, which is used to provide 3.3V voltage for the creep corrosion detection circuit 201 and the corrosion break detection circuit 202 respectively. The distance between via group G1 and via group G2 is d1, and the distance between via group G2 and via group G3 is d2. d1 is different from d2. In a possible implementation, d1 can be greater than d2. For example, d1 can be 20 mil, and d2 can be 30 mil. GPIO0, GPIO1, and GPIO3 are all corrosion detection ports. Figure 2 It is taken as an example that each via group includes 3 vias.

[0051] The principles of creep corrosion and wire break corrosion detection will be described below.

[0052] Under normal circumstances (i.e., when there is no creep corrosion and wire break corrosion in the via group), the power supply provides a voltage of 3.3V. In the first detection circuit, resistors R1, R2, and R6 are voltage-dividing resistors. That is, the equivalent resistance of the parallel connection of resistor R1 and resistor R2 and resistor R6 achieve voltage division, and at this time, GPIO0 is at a high level; in the second detection circuit, one end of the via group 2 is directly connected to the ground terminal, and at this time, GPIO1 is at a low level; similarly, in the third detection circuit, resistors R3, R4, and R5 are voltage-dividing resistors. That is, the equivalent resistance of the parallel connection of resistor R3 and resistor R4 and resistor R5 achieve voltage division, and at this time, GPIO3 is at a high level.

[0053] When creep corrosion occurs between via group G1 and via group G2, the corrosive substances generated by the creep corrosion cause via group G1 and via group G2 to be connected. At this time, GPIO0 changes from a high level to a low level, generating a first-order alarm signal; similarly, when creep corrosion occurs between via group G2 and via group G3, the corrosive substances generated by the creep corrosion cause via group G2 and via group G3 to be connected. At this time, GPIO2 changes from a high level to a low level, generating a second-order alarm signal. Since the distance between via group G1 and via group G2 is greater than the distance between via group G2 and via group G3, when the degree of creep corrosion is relatively light, creep corrosion may occur between vias with a smaller distance; when the degree of creep corrosion is relatively severe, creep corrosion will also occur between vias with a larger distance. For example, when the degree of creep corrosion is relatively light, creep corrosion occurs between via group G1 and via group G2, generating a first-order alarm signal; when the degree of creep corrosion is relatively severe, creep corrosion occurs between via group G2 and via group G3, generating a second-order alarm signal. The degree of creep corrosion of the circuit board can be determined based on the first-order alarm signal and the second-order alarm signal. When corrosion wire break occurs, the soldermask opening part is open-circuited, and at this time, the voltage at node P1 is the power supply voltage, and GPIO1 changes from a low level to a high level. Therefore, by detecting the levels of the corrosion detection ports (including GPIO0, GPIO1, and GPIO3), it can be determined whether creep corrosion has occurred on the circuit board.

[0054] However, creep corrosion is affected by factors such as environmental humidity, temperature, and the flow direction of corrosive gases, which may cause the creep corrosion to be out of control, resulting in a situation where the alarm signal does not match the degree of creep corrosion of the circuit board. For example, the alarm signal appears later than the actual fault degree of the circuit board, which in turn leads to inaccurate creep corrosion detection. Exemplarily, as Figure 3 shown, when the creep corrosion creeps in a direction perpendicular to the via group and away from via group G3, or when the creep corrosion creeps in a direction parallel to the via group, at this time, using the above Figure 2The shown creep corrosion detection circuit cannot detect creep corrosion, or the warning signal appears later than the actual fault degree of the circuit board. Figure 3 Taking the direction of the via group as horizontally rightward as an example in Figure 3 .

[0055] Based on this, an embodiment of the present application provides a circuit board. The circuit board includes a detection circuit and a solder mask layer. The solder mask layer includes solder mask openings. The solder mask openings expose part of the first detection lines and part of the second detection lines included in the detection circuit. By using the characteristic that creep corrosion is likely to occur in the solder mask openings, creep corrosion detection is performed, and the range and direction of creep corrosion are controlled through the solder mask openings, so that creep corrosion is within the range of the solder mask openings and creeps along the solder mask openings. The detection circuit can accurately detect the creep corrosion within the solder mask openings. Compared with the uncontrollable creep corrosion and the inability to detect creep corrosion in Figure 3 , the accuracy of creep corrosion detection is improved. Figure 2 Compared with the uncontrollable creep corrosion and the inability to detect creep corrosion in Figure 3 , the accuracy of creep corrosion detection is improved.

[0056] The technical solution provided by the embodiment of the present application can be applied to electronic devices. The electronic devices can include but are not limited to mobile robots, drones, vehicle-mounted devices, aerospace devices, etc. The following combines Figure 4 to introduce and illustrate the structure of the electronic device. Exemplarily, Figure 4 FIG. 14 is a schematic structural diagram of an electronic device provided by an embodiment of the present application. The electronic device 40 may include: a processor 410, a bus 420, a memory 430, and a communication interface 440. The processor 410, the memory 430, and the communication interface 440 are connected through the bus 420.

[0057] Some or all of the components included in the electronic device provided by the embodiment of the present application can be arranged on the circuit board provided by the embodiment of the present application. In a possible embodiment, the processor 410, the bus 420, the memory 430, and the communication interface 440 of the electronic device can all be arranged on the circuit board provided by the embodiment of the present application.

[0058] It should be understood that in this embodiment, the processor 410 is the control center of the electronic device 40, connecting various parts of the entire device through various interfaces and the bus 420. By running or executing software programs and / or software modules stored in the memory 430, and by invoking the data stored in the memory 430, it executes various functions of the electronic device 40 and processes data, thereby exercising overall control over the electronic device 40. The processor 410 can be a CPU, and this processor 410 can also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc. The processor 410 can also be a graphics processing unit (GPU), a neural network processing unit (NPU), a microprocessor, an ASIC, or one or more integrated circuits for controlling the execution of the program of the present application solution.

[0059] The communication interface 440 is used to enable communication between the electronic device 40 and external devices or components.

[0060] The bus 420 can include a path for transmitting information between the above components (such as the processor 410 and the memory 430). The bus 420 can include an address bus, a data bus, a control bus, etc. However, for the sake of clarity, all various buses are labeled as the bus 420 in the figure. The bus 420 can be a Peripheral Component Interconnect Express (PCIe) bus, or an Extended Industry Standard Architecture (EISA) bus, a Unified Bus (Ubus or UB), a Compute Express Link (CXL), a Cache Coherent Interconnect for Accelerators (CCIX), etc.

[0061] It is worth noting that Figure 4Only taking the example that the electronic device 40 includes 1 processor (for example, the processor 410) and 1 memory (for example, the memory 430), where the processor 410 and the memory 430 are respectively used to indicate a type of device or equipment. In specific embodiments, the quantity of each type of device or equipment can be determined according to service requirements.

[0062] The memory 430 can be used to store data, software programs, and software modules; it mainly includes a program storage area and a data storage area. Among them, the program storage area can store the operating system and application programs (i.e., computer instructions) required for at least one function, such as a sound playback function or an image playback function, etc.; the data storage area can store data created according to the use of the electronic device, such as audio data, image data, or table data, etc. For example, the memory 430 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus random access memory (DR RAM).

[0063] Although not shown, the electronic device may further include an audio component, a communication component, etc. For example, the audio component includes a microphone, and the communication component includes a wireless fidelity (WiFi) module, a Bluetooth module, etc. These are not elaborated in the embodiments of this application. Those skilled in the art can understand that Figure 4 the structure of the electronic device shown in

[0064] Figure 5 is a schematic structural diagram of a circuit board provided by an embodiment of this application. As Figure 5 shown, it includes a detection circuit and a solder mask layer. The detection circuit includes at least two detection lines. The at least two detection lines include a first detection line L1 and a second detection line L2. The first detection line L1 and the second detection line L2 are parallel. The solder mask layer includes at least one solder mask opening. Each solder mask opening exposes a part of the first detection line L1 and a part of the second detection line L2. Both ends of the first detection line L1 are coupled to a ground terminal. One end of the second detection line L2 is coupled to a detection node P2. A detection voltage greater than 0 volts is applied to the detection node P2. The detection circuit is used to detect whether creep corrosion occurs on the circuit board. Figure 5 In Figure 5 it is taken as an example that the at least two detection lines include a first detection line L1 and a second detection line L2, and the at least one solder mask opening includes two solder mask openings.

[0065] Among them, the detection circuit may be disposed on the first surface of the circuit board. The first surface is the larger one among the multiple surfaces of the circuit board and is the surface for disposing various components. Exemplarily, Figure 6 is a schematic structural diagram of a PCB. The PCB may include 6 surfaces and may be respectively denoted as F1 to F6. Among them, F1 is opposite to F2, and the areas of F1 and F2 are the same. Similarly, F3 is opposite to F4, and the areas of F3 and F4 are the same. F5 is opposite to F6, and the areas of F5 and F6 are the same. The area of F5 is greater than the area of F3, and the area of F3 is greater than the area of F1. The first surface may be any one of F5 or F6. Figure 6 In Figure 4 only three surfaces, i.e., F1, F3, and F5, of the PCB are shown. In practical applications, if F5 is the first surface, various components are also disposed on the first surface F5. For example, various components for forming the

[0066] In addition, the solder mask layer is used to cover the areas on the first surface where components do not need to be soldered. For example, the solder mask layer can be used to cover PCB traces, and the PCB traces can include at least two detection lines.

[0067] Optionally, the at least two detection lines can include 2 detection lines, or can include more than 2 detection lines. For example, 3 or 5 detection lines. In the first possible implementation, please continue to refer to Figure 5 , the at least two detection lines can include two detection lines (for example, the first detection line L1 and the second detection line L2). The other end of the second detection line L2 is suspended or connected to other components on the circuit board. The first detection line L1 is parallel to the second detection line L2. In the second possible implementation, as Figure 7 shown, the at least two detection lines can include three detection lines. The three detection lines can include the first detection line L1, the second detection line L2, and the third detection line L3. The second detection line L2 is arranged between the first detection line L1 and the third detection line L3. Both ends of the third detection line L3 are connected to the ground terminal. Any two adjacent detection lines are parallel to each other, that is, the first detection line L1 is parallel to the second detection line L2, and the second detection line L2 is parallel to the third detection line L3. At this time, each exposed part of the solder mask opening exposes part of the first detection line L1, part of the second detection line L2, and part of the third detection line L3. In practical applications, the line width of the detection line can be 6 mil. Figure 7 In [reference document] it takes at least one solder mask opening including two solder mask openings as an example. The embodiments of the present application do not make specific limitations on the number of detection lines.

[0068] In addition, in the embodiments of the present application, parallel means approximately parallel. For example, the first detection line L1 being parallel to the second detection line L2 means that the first detection line L1 is approximately parallel to the second detection line L2, and the second detection line L2 being parallel to the third detection line L3 means that the second detection line L2 is approximately parallel to the third detection line L3. For example, the included angle between the first detection line L1 and the second detection line L2 can be between [0, 5), and the included angle between the second detection line L2 and the third detection line L3 can also be between [0, 5). For the sake of easy understanding, Figure 5 and Figure 7 and in the following embodiments, it is taken that the included angle between any two adjacent detection lines is zero as an example. In one possible implementation, at least two detection lines can be serpentine.

[0069] Since in practical applications, the detection lines can be laid in different directions, that is, the detection lines include multiple sub-lines extending in different directions. When the extending directions of the detection lines are different, the distances between the sub-lines in different directions are different, and the settings of the solder mask openings in different extending directions are also different. First, the different extending directions of the detection lines will be described below.

[0070] As Figure 8As shown, the detection line includes a first sub-line extending in a first direction and a second sub-line extending in a second direction. The angle between the first direction and the second direction is a third angle c, that is, the angle between the first sub-line and the second sub-line is the third angle c. Among them, the third angle c can be any angle within a first angle range, and the first angle range is (90±X) degrees, where X is not equal to zero. For example, X can be 5 degrees, and the embodiments of the present application do not make specific limitations on this. Figure 8 Only some of the angles are schematically shown in [the figure].

[0071] Among them, the first direction can be any direction parallel to the first surface. For example, the first direction can be a direction parallel to the first surface and horizontally to the right, or horizontally to the left. If the first direction is a direction parallel to the first surface and horizontally to the right, when the third angle c is 90 degrees, the second direction is a direction parallel to the first surface and horizontally upward or horizontally downward, that is, the first sub-line and the second sub-line are perpendicular. For the sake of understanding, Figure 8 in this and the following embodiments, the first direction is taken as parallel to the first surface and horizontally to the right, and the second direction is taken as parallel to the first surface and horizontally upward as an example.

[0072] In addition, please continue to refer to Figure 8 , the detection line includes a first sub-line extending in a first direction, that is, the first detection line L1 includes a first sub-line L1a extending in a first direction, the second detection line L2 includes a first sub-line L2a extending in a first direction, and the third detection line L3 includes a first sub-line L3a extending in a first direction; the detection line includes a second sub-line extending in a second direction, that is, the first detection line L1 includes a second sub-line L1b extending in a second direction, that is, the second detection line L2 includes a second sub-line L2b extending in a second direction, that is, the third detection line L3 includes a second sub-line L3b extending in a second direction. Figure 5 and Figure 7 the first detection line L1 in [the figure] is the first sub-line L1a, the second detection line L2 is the first sub-line L2a, Figure 7 the third detection line L3 in [the figure] is the first sub-line L3a.

[0073] Secondly, the distance between any two adjacent sub-lines extending in the same direction is equal. The distance between the first sub-line L1a and the first sub-line L2a extending in the first direction is equal, and the distance between the first sub-line L2a and the first sub-line L3a is equal. For example, the distance between the first sub-line L1a and the first sub-line L2a is the first distance d11, and the distance between the first sub-line L2a and the first sub-line L3a is the second distance d12, and d11 is equal to d12. For example, d11 = d12 = 5 mil. The distance between the second sub-line L1b and the second sub-line L2b extending in the second direction is equal, and the distance between the second sub-line L2b and the second sub-line L3b is equal. For example, the distance between the second sub-line L1b and the second sub-line L2b is the third distance d21, and the distance between the second sub-line L2b and the second sub-line L3b is the fourth distance d22, and d21 is equal to d22. For example, d21 = d22 = 3 mil.

[0074] In addition, the pitch between the sub-lines extending in the first direction is different from the distance between the sub-lines extending in the second direction. For example, the pitch between the sub-lines extending in the first direction is greater than the distance between the sub-lines extending in the second direction. Exemplarily, in combination with the above example, the pitch between the sub-lines extending in the first direction is d11, d11 = 5 mil, and the distance between the sub-lines extending in the second direction is d22, d22 = 3 mil, and d11 is greater than d22.

[0075] Please continue to refer to Figure 8 , and the solder mask openings on the sub-lines extending in different directions will be described.

[0076] In the first possible embodiment, at least one solder mask opening includes a first solder mask opening, and the included angle between the first solder mask opening and the first sub-line is the first included angle a, that is, the included angle between the first solder mask opening and the first sub-line L1a of the first detection line L1 is the first included angle a, the included angle between the first solder mask opening and the first sub-line L2a of the second detection line L2 is the first included angle a, and the included angle between the first solder mask opening and the first sub-line L3a of the third detection line L3 is the first included angle a. The first solder mask opening exposes a part of the first sub-line L1a of the first detection line L1, a part of the first sub-line L2a of the second detection line L2, and a part of the first sub-line L3a of the third detection line L3.

[0077] Among them, the first included angle a can be any included angle within the first angle range. For example, the first included angle a can be 90 degrees. At this time, the first solder mask opening is perpendicular to the first sub-line (including the first sub-line L1a, the first sub-line L2a, and the first sub-line L3a). The first solder mask opening is used to control the creep corrosion within the range of the first solder mask opening and creep along the first solder mask opening (for example, creep upward or downward along the first solder mask opening). Through the detection circuit, the creep corrosion within the first solder mask opening can be accurately detected, that is, the creep corrosion causes the second detection line L2 to be connected to the first detection line L1, or causes the second detection line L2 to be connected to the third detection line L3. Since both the first detection line L1 and the third detection line L3 are grounded, the voltage of the detection node P2 is changed, realizing the detection of creep corrosion, thereby improving the detection accuracy of creep corrosion. Figure 8 Taking the first included angle a being 90 degrees as an example for illustration.

[0078] In addition, the solder mask layer may include one first solder mask opening or may include multiple first solder mask openings. The embodiments of the present application do not make specific limitations on this. For example, Figure 8 Taking the solder mask layer including 1 first solder mask opening as an example.

[0079] In the second possible embodiment, at least one solder mask opening further includes a second solder mask opening. The included angle between the second solder mask opening and the first sub-line is the second included angle b, and the first included angle a is different from the second included angle b. That is, the included angle between the second solder mask opening and the first sub-line L1a of the first detection line L1 is the second included angle b, the included angle between the second solder mask opening and the first sub-line L2a of the second detection line L2 is the second included angle b, and the included angle between the second solder mask opening and the first sub-line L3a of the third detection line L3 is the second included angle b. The second solder mask opening exposes a part of the first sub-line L1a of the first detection line L1, a part of the first sub-line L2a of the second detection line L2, and a part of the first sub-line L3a of the third detection line L3.

[0080] Among them, the second included angle b can be any included angle within the second angle range. The second angle range is (45±X) degrees or (135±X) degrees, where X is not equal to zero. For example, X can be 10 degrees, and the second angle range is (45±10) degrees or (135±10) degrees. For example, the second included angle can be 45 degrees or 135 degrees. The second solder mask opening is used to control the creep corrosion within the range of the second solder mask opening and creep along the second solder mask opening (for example, creep along the 45-degree direction). Through the detection circuit, the creep corrosion within the second solder mask opening can be accurately detected. By adding solder mask openings in different directions to cover multiple directions of creep corrosion, the detection accuracy of creep corrosion is further improved. Figure 8 Taking the second included angle b being 45 degrees as an example for illustration.

[0081] Among them, the solder mask layer may include a second solder mask opening window, or may include multiple second solder mask opening windows. The embodiments of the present application do not make specific limitations in this regard. For example, Figure 8 Taking the solder mask layer including 1 second solder mask opening window as an example.

[0082] In 3 possible embodiments, at least one solder mask opening window further includes a third solder mask opening window. The included angle between the third solder mask opening window and the second sub-line is the fourth included angle d, that is, the included angle between the third solder mask opening window and the second sub-line L1b of the first detection line L1 is the fourth included angle d, the included angle between the third solder mask opening window and the second sub-line L2b of the second detection line L2 is the fourth included angle d, and the included angle between the third solder mask opening window and the second sub-line L3b of the third detection line L3 is the fourth included angle d. The third solder mask opening window exposes partial second sub-lines L1b of the first detection line L1, partial second sub-lines L2b of the second detection line L2, and partial second sub-lines L3b of the third detection line L3.

[0083] Among them, the fourth included angle d can be any included angle within the first angle range. For example, the fourth included angle can be 90 degrees. At this time, the third solder mask opening window is perpendicular to the second sub-line (including the second sub-line L1b, the second sub-line L2b, and the second sub-line L3b). The third solder mask opening window is used to control the creep corrosion within the range of the third solder mask opening window and creep (for example, creep to the left or right along the third solder mask opening window), covering more creep directions of the creep corrosion, and further improving the detection accuracy of the creep corrosion. Figure 8 Taking the fourth included angle d being 90 degrees as an example for illustration.

[0084] Among them, the solder mask layer may include a third solder mask opening window, or may include multiple third solder mask opening windows. The embodiments of the present application do not make specific limitations in this regard. For example, Figure 8 Taking the solder mask layer including 1 third solder mask opening window as an example.

[0085] In a possible embodiment, when the degree of creep corrosion is relatively light, creep corrosion may occur between the first sub-lines with a relatively small distance; when the degree of creep corrosion is relatively severe, creep corrosion will also occur between the second sub-lines with a relatively large distance. For example, when the degree of creep corrosion is relatively light, creep corrosion occurs between the first sub-line L1a of the first detection line L1 and the first sub-line L2a of the second detection line L2, generating an alarm signal, or creep corrosion occurs between the first sub-line L2a of the second detection line L2 and the first sub-line L3a of the third detection line L3, generating an alarm signal; when the degree of creep corrosion is relatively severe, creep corrosion occurs between the second sub-line L1b of the first detection line L1 and the second sub-line L2b of the second detection line L2, generating an alarm signal, or creep corrosion occurs between the second sub-line L2b of the second detection line L2 and the second sub-line L3b of the third detection line L3, generating an alarm signal. In this embodiment, the distances between the sub-lines in different directions are made different, further improving the accuracy of creep corrosion detection.

[0086] Optionally, different numbers of vias can be set in the solder mask opening. For example, at least one via can be set only on the first sub-line of the first detection line exposed in the first solder mask opening, or at least one via can be set on the sub-line of each exposed detection line, or vias can be set on the sub-lines exposed in different solder mask openings. The following combines Figure 9 Three possible embodiments in which vias can be set in the solder mask opening will be described.

[0087] In the first possible embodiment, at least one first via is provided on a part of the first sub-lines exposed in the first solder mask opening. For example, at least one first via G11 is provided on the first sub-line L1a of the first detection line L1 exposed in the first solder mask opening, and / or at least one first via G11 is provided on the first sub-line L2a of the second detection line L2 exposed in the first solder mask opening, and / or at least one first via G11 is provided on the first sub-line L3a of the third detection line L3 exposed in the first solder mask opening.

[0088] In the second possible embodiment, at least one second via is provided on a part of the first sub-lines exposed in the second solder mask opening. For example, at least one second via G21 is provided on the first sub-line L1a of the first detection line L1 exposed in the second solder mask opening, and / or, at least one second via G21 is provided on the first sub-line L2a of the second detection line L2 exposed in the second solder mask opening, and / or, at least one second via G21 is provided on the first sub-line L3a of the third detection line L3 exposed in the second solder mask opening.

[0089] In the third possible embodiment, at least one third via G31 is provided on the second sub-line of the portion of the third solder mask opening that is exposed. For example, at least one third via G31 is provided on the second sub-line L1b of the first detection line L1 that is exposed by the third solder mask opening, and / or at least one third via G31 is provided on the second sub-line L2b of the second detection line L2 that is exposed by the third solder mask opening, and / or at least one third via G31 is provided on the second sub-line L3b of the third detection line L3 that is exposed by the third solder mask opening.

[0090] Optionally, Figure 9 Taking the example where a plurality of first vias G11 are provided on the first sub-line of the portion of the first solder mask opening that is exposed, a plurality of second vias G21 are provided on the first sub-line of the portion of the second solder mask opening that is exposed, and a plurality of third vias G31 are provided on the second sub-line of the portion of the third solder mask opening that is exposed. In practical applications, the distance between any two adjacent vias can be 8 mil.

[0091] For any via, as Figure 10 shown, assuming that creep corrosion spreads evenly in all directions of the via and the thickness of the corrosion products generated by creep corrosion is equal everywhere, the creep corrosion model satisfies Equation (1), Dx satisfies Equation (2), and L satisfies Equation (3):

[0092]

[0093]

[0094]

[0095] Among them, D2 is the diameter of the via pad, D1 is the diameter of the inner hole, Dx is the average diameter of the circle formed by creep corrosion, V Gn is the corrosion thickening rate of copper in each grade of sulfide environment, T is the creep corrosion time, h is the thickness of the corrosion products formed by creep corrosion, and L is the creep distance of the corrosion products formed by creep corrosion within the service life.

[0096] In another possible embodiment, as Figure 11As shown, the detection circuit further includes a voltage division circuit and a data processing circuit. The voltage division circuit is coupled between the first power supply and the ground terminal. The third terminal of the voltage division circuit is connected to the detection node P2. For example, the voltage division circuit includes a first resistor Ra and a second resistor Rb. The first resistor Ra is coupled between the first power supply and the detection node P2, and the second resistor Rb is coupled between the detection node P2 and the ground terminal. The port of the data processing circuit is connected to the detection node P2. The port of the data processing circuit can also be referred to as the corrosion detection port. Since the voltage division circuit and the data processing circuit are not covered by the solder mask, the voltage division circuit and the data processing circuit are represented by solid lines.

[0097] Among them, the first power supply can be used to provide a first voltage for the voltage division circuit. For example, the first voltage can be a voltage of 3.3V. The voltage division circuit can be used to divide the first voltage. For example, both the first resistor Ra and the second resistor Rb can be 1M ohm resistors. The voltage at the detection node is the detection voltage. The data processing circuit can be used to analyze the detection voltage and output an alarm signal. For example, the data processing circuit can be used to determine whether the detection voltage is low level or high level. When the detection voltage is low level, an alarm signal is output.

[0098] Among them, the data processing circuit can include a central processing unit (CPU) or other logic devices, such as a complex programmable logic device (CPLD). The data processing circuit can be integrated on a chip, and this chip can also be referred to as a logic chip.

[0099] The principle of creep corrosion detection will be described below.

[0100] In the case where the circuit board does not undergo creep corrosion, the first power supply can be used to provide a voltage of 3.3V. The first resistor Ra and the second resistor Rb achieve voltage division, and the voltage at the detection node P2 is 1.65V, and the port GPIO is at high level.

[0101] In the case where the circuit board undergoes creep corrosion, the creep corrosion connects the first detection line L1 and the second detection line L2, or connects the second detection line L2 and the third detection line L3. Since both the first detection line L1 and the third detection line L3 are grounded, the second detection line L2 is grounded. At this time, the voltage at the detection node P2 is 0V, and the port GPIO changes from high level to low level. Therefore, it can be determined whether the circuit board undergoes creep corrosion by detecting whether the level of the port GPIO is high level or low level.

[0102] In another possible embodiment, as Figure 12As shown, the detection circuit further includes a comparison circuit, which is coupled between the detection node and the port. For example, the comparison circuit includes a third resistor Rc and a comparator. The third resistor Rc is coupled between the output terminal of the comparator and the port. The first input terminal of the comparator is coupled to the detection node, and the second input terminal of the comparator is coupled to the second power supply. Since the comparison circuit is not covered by the solder mask layer, the comparison circuit is represented by a solid line.

[0103] Among them, the comparison circuit can be used to receive the second voltage provided by the second power supply and the detection voltage, and output different level signals based on the magnitude relationship between the detection voltage and the second voltage. Specifically, the comparator can be used to receive the second voltage provided by the second power supply and the detection voltage. For example, the second voltage can be 1.25V, and the comparator can be used to output different level signals based on the magnitude relationship between the detection voltage and the second voltage. The third resistor Rc is the matching voltage of the output signal of the comparator, which can be used to prevent the output signal from fluctuating and ensure the quality of the output signal. For example, the third resistor Rc can be about 22 ohms. In this embodiment, different degrees of creep corrosion detection are realized through the comparator, improving the performance of the circuit board.

[0104] The circuit board provided by the embodiment of the present application includes a creep corrosion electrical measurement circuit and a solder mask layer. The creep corrosion detection circuit includes at least two detection lines. Both ends of the first detection line are connected to the ground, and the other end of the second detection line is connected to the detection node. The at least two detection lines include the first detection line and the second detection line. The extending direction of the detection line is the first sub-line in the first direction and the second sub-line in the second direction. The solder mask layer includes at least one solder mask opening. For example, the at least one solder mask opening includes a first solder mask opening at a first angle (for example, the first angle can be 90 degrees) with the first sub-line, the at least one solder mask opening includes a second solder mask opening at a second angle (for example, the second angle can be 45 degrees) with the first sub-line, or the at least one solder mask opening further includes a third solder mask opening at a fourth angle (for example, the fourth angle can be 90 degrees) with the second sub-line. By the first solder mask opening, the second solder mask opening and the third solder mask opening, the range and direction of creep corrosion (including the horizontal direction, the vertical direction and the diagonal direction) are controlled. Compared with Figure 2 the uncontrolled creep corrosion in [reference], where creep corrosion cannot be detected, the detection accuracy is improved.

[0105] The embodiment of the present application further provides an electronic device, which may include a circuit board and a functional circuit. The functional circuit includes a memory and a processor. The memory and the processor can be the memory and the processor shown in the above Figure 4 The functional circuit is arranged on the circuit board. The circuit board may include the above Figure 5 、 Figure 7 、 Figure 8 、 Figure 9 、 Figure 10, Figure 11 or Figure 12 the circuit board shown.

[0106] It should be noted that for the relevant description of the circuit board, reference can be made to the relevant description of the circuit board provided above, and the embodiments of the present application will not be elaborated herein.

[0107] Finally, it should be noted that: the above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A circuit board, characterized in that, The circuit board includes a detection circuit and a solder mask layer. The detection circuit includes at least two detection lines. The at least two detection lines include a first detection line and a second detection line. The first detection line and the second detection line are parallel. The solder mask layer includes at least one solder mask opening, and each solder mask opening exposes a part of the first detection line and a part of the second detection line; Both ends of the first detection line are coupled to a ground terminal. One end of the second detection line is coupled to a detection node, and a detection voltage greater than 0 volts is applied to the detection node. The detection circuit is used to detect whether creep corrosion occurs on the circuit board.

2. The circuit board according to claim 1, wherein The detection line includes a first sub-line extending in a first direction. At least one of the solder mask openings includes a first solder mask opening. The angle between the first solder mask opening and the first sub-line is a first angle. The first solder mask opening exposes a part of the first sub-line of the first detection line and a part of the first sub-line of the second detection line.

3. The circuit board according to claim 2, wherein At least one of the solder mask openings includes a second solder mask opening. The angle between the second solder mask opening and the first sub-line is a second angle. The second solder mask opening exposes a part of the first sub-line of the first detection line and a part of the first sub-line of the second detection line, and the first angle is different from the second angle.

4. The circuit board according to claim 3, wherein The detection line further includes a second sub-line extending in a second direction. The angle between the first direction and the second direction is a third angle. At least one of the solder mask openings further includes a third solder mask opening. The angle between the third solder mask opening and the second sub-line is a fourth angle. The third solder mask opening exposes a part of the second sub-line of the first detection line and a part of the second sub-line of the second detection line.

5. The circuit board according to claim 4, wherein The distance between the first sub-line of the first detection line and the first sub-line of the second detection line is a first distance. The distance between the second sub-line of the first detection line and the second sub-line of the second detection line is a second distance, and the first distance is greater than the second distance.

6. The circuit board according to claim 4 or 5, wherein The first angle, the third angle, and the fourth angle are within a first angular range. The first angular range is (90±X) degrees. The second angle is within a second angular range. The second angular range is (45±X) degrees or (135±X) degrees, and X is not equal to zero.

7. The circuit board according to any one of claims 4-6, wherein At least one first via is provided on the part of the first sub-line exposed by the first solder mask opening; And / or, at least one second via is provided on the part of the first sub-line exposed by the second solder mask opening; And / or, at least one third via is provided on the part of the second sub-line exposed by the third solder mask opening.

8. The circuit board according to any one of claims 1-7, wherein The at least two detection lines further include a third detection line. The second detection line is disposed between the first detection line and the third detection line. Both ends of the third detection line are coupled to the ground terminal. The third detection line is parallel to the second detection line. Each solder mask opening also exposes a part of the third detection line.

9. The circuit board according to any one of claims 1-8, wherein the detection circuit further includes a voltage dividing circuit and a data processing circuit. The voltage dividing circuit is coupled between a first power supply and the ground terminal. A third terminal of the voltage dividing circuit is connected to the detection node. A port of the data processing circuit is connected to the detection node; the first power supply is configured to provide a first voltage to the voltage dividing circuit. The voltage dividing circuit is configured to divide the first voltage. The voltage at the detection node is the detected voltage after voltage division. The data processing circuit is configured to analyze the detected voltage and output an alarm signal.

10. The circuit board according to claim 9, wherein the voltage dividing circuit includes a first resistor and a second resistor. The first resistor is coupled between the first power supply and the detection node. The second resistor is coupled between the detection node and the ground terminal.

11. The circuit board according to claim 9 or 10, characterized in that, The detection circuit further includes a comparison circuit. The comparison circuit is coupled between the detection node and the port; the comparison circuit is configured to receive a second voltage provided by a second power supply and the detected voltage, and output different level signals based on a magnitude relationship between the detected voltage and the second voltage.

12. The circuit board according to claim 11, wherein the comparison circuit includes a third resistor and a comparator. The third resistor is coupled between an output terminal of the comparator and the port. A first input terminal of the comparator is coupled to the detection node. A second input terminal of the comparator is coupled to the second power supply.

13. An electronic device, characterized in that, The electronic device includes a circuit board and a functional circuit. The functional circuit includes a memory and a processor. The functional circuit is disposed on the circuit board. The circuit board includes the circuit board according to any one of claims 1-12.