Gate drive circuit

Abstract

The invention relates to a gate driving circuit. The invention provides a high-side driver which has a simpler circuit structure and uses a gate driving circuit of an N-channel MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). A high-side driver circuit for driving a power semiconductor switch includes: a main switch N-channel MOSFET having a drain terminal connected to a positive side Vdc of a power source and a source terminal connected to an OUT terminal of a signal for driving the power semiconductor switch; a charge accumulation circuit that accumulates charges from the Vdc; the switch with the voltage detection function detects the voltage difference between the output terminal of the charge storage circuit and the Vdc, and when the voltage of the output terminal of the charge storage circuit is detected to be higher than the voltage of the positive side Vcc of the power supply by a certain voltage or more. A part or all of the output voltage of the charge storage circuit is applied to the gate terminal of the main switch N-channel MOSFET.

Description

[0001] This divisional application is a divisional application of the invention patent application with the application date of September 25, 2020, application number 202011024964.1, and invention title "Gate Driving Circuit". Technical Field

[0002] The present invention relates to a gate driving circuit for driving power semiconductor switches such as IGBTs. Background Art

[0003] For power devices such as high-power inverters or DCDC converters, high-frequency high-power switching elements are often used. As high-frequency high-power switching elements, IGBTs (Insulated Gate Bipolar Transistors) or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are often used. The input characteristics of the drive terminals (e.g., gate terminals) of such elements are often capacitive, and a large current must flow during driving.

[0004] Therefore, various circuits for driving these high-frequency high-power switching elements have been proposed. Such circuits are often referred to as gate driving circuits. The present invention relates to an improved high-side driver used in such a gate driving circuit.

[0005] Prior Art and Its Problems

[0006] In Figure 7 , Figure 8 Examples of conventional gate driving circuits for driving high-frequency high-power switching elements as described above are shown.

[0007] Figure 7 The shown gate driving circuit 3 is a circuit that uses a P-channel MOSFET 1 (hereinafter referred to as Q1) as an element for driving the IGBT 2 to ON. Q1 performs an ON operation by making its gate voltage lower than the source voltage. As a result, Q1 conducts, and the Vcc voltage appears at the drain terminal. This Vcc voltage is applied to the gate terminal of the IGBT 2 via the resistor 11 and via the output terminal 7.

[0008] Therefore, by making Figure 7 the IN terminal 5 of

[0009] LOW, Q1 can be made to perform an ON operation. Then, when Q1 performs an ON operation, as described above, the IGBT 2 can be made to perform an ON operation. Figure 7The gate drive circuit 3 of the circuit structure shown can turn on (or off) the IGBT2 using the input potential of the IN terminal 5.

[0010] However, generally, P-channel MOSFETs tend to have fewer varieties and larger ON-resistances compared to N-channel MOSFETs. Figure 7 In [reference], Q1, which is a circuit that turns on the IGBT2 using an N-channel MOSFET structure, can expect performance improvement.

[0011] Based on this situation, Figure 8 the gate drive circuit of the circuit structure shown is also used. In this circuit structure, the gate drive circuit 3a is constituted by using an N-channel MOSFET as Q1a in [reference]. To turn on an N-channel MOSFET, its gate potential must be a voltage higher than the source potential. On the other hand, Figure 8 the source voltage of Q1a in [reference] rises to near the positive-side voltage Vcc of the power supply of the gate drive circuit 3a. The positive-side voltage Vcc is supplied to the positive-side voltage terminal 4 in [reference], and similarly, in [reference], the positive-side voltage Vcc is supplied to the positive-side voltage terminal 4. Figure 8 In [reference], Figure 8 In [reference], Figure 7 the positive-side voltage Vcc is supplied to the positive-side voltage terminal 4.

[0012] Therefore, a bootstrap circuit and a level-shifting circuit are constituted as described below to create a high potential for raising the gate potential of Q1a in [reference] to a voltage higher than the source potential. Figure 8 In [reference],

[0013] In [reference], Figure 8 In the example of the circuit structure shown, a series circuit of a diode 12 (hereinafter referred to as D1) and a capacitor 13 (hereinafter referred to as C1) is connected between the OUT terminal 7 and the positive-side voltage terminal 4 as shown in Figure 8 . Then, when the OUT terminal 7 is at the GND potential, charge is accumulated in C1. When the IN terminal 5 is set to high level and Q1a turns on, the output-side transistor of the level-shifting optocoupler 10 (hereinafter referred to as PC1) is turned on, and the charge charged in C1 is applied to the gate terminal of Q1a. Thus, when Q1a turns on and the voltage of the OUT terminal 7 rises, the terminal voltage of the point where C1 is connected to the cathode side of D1 is a high voltage compared to Vcc, and a voltage higher than Vcc can be applied to the gate terminal of Q1a.

[0014] In this way, a high-potential power supply for driving Q1a can be simply fabricated using D1 and C1. However, in order to turn on Q1a using this high-voltage power supply, circuit research is required. For example, using an optocoupler (Figure 8 Insulating elements such as the PC1) in [reference] insulate the high-voltage power supply from the input potential of the IN terminal 5, or research is carried out to use a level-shifting circuit or the like to additionally provide a switch that shifts the voltage level from the high-voltage power supply. Without carrying out such research, it is difficult to fabricate a circuit that turns Q1a ON / OFF using the input potential of the IN terminal 5.

[0015] Prior Patent Art

[0016] For example, Patent Document 1 (Japanese Patent No. 6303060) described later discloses a gate drive circuit using a P-channel MOSFET and an N-channel MOSFET. In particular, a circuit structure is disclosed in which an input signal is supplied to the P-channel MOSFET via a level-shifting circuit.

[0017] Patent Document 2 (Japanese Unexamined Patent Application Publication No. 2006-270382) described later discloses a circuit structure for supplying power from a floating power supply to a high-side driver, characterized by using a level-shifting circuit capable of high-speed operation.

[0018] Patent Document 3 (Japanese Unexamined Patent Application Publication No. 2000-286687) described later discloses a circuit structure for supplying power from a floating power supply to a high-side driver, characterized by using a level-shifting circuit capable of preventing malfunction without increasing chip area or power consumption.

[0019] Prior Art Documents

[0020] Patent Documents

[0021] Patent Document 1: Japanese Patent No. 6303060;

[0022] Patent Document 2: Japanese Unexamined Patent Application Publication No. 2006-270382;

[0023] Patent Document 3: Japanese Unexamined Patent Application Publication No. 2000-286687. Summary of the Invention

[0024] Problems to be Solved by the Invention

[0025] As described above, in the gate drive circuit, when a P-channel MOSFET is used as the main switch, the performance is insufficient. Therefore, an N-channel MOSFET is often used. In addition, it is also possible to relatively easily fabricate a high-potential power supply for driving the N-channel MOSFET. However, in order to use this high-voltage power supply to drive the N-channel MOSFET, an insulating component or a voltage shift circuit for eliminating the voltage difference from the input signal is required, and the circuit is complicated and expensive. There is also a case where it is considered that the sufficient improvement effect brought by using the N-channel MOSFET cannot be obtained.

[0026] The present invention is proposed in view of such problems, and its object is to provide a high-side driver for a gate drive circuit with a simpler circuit structure and using an N-channel MOSFET.

[0027] Solution to the problem

[0028] (1) To solve the above problems, the present invention is a high-side driver, which is a circuit for driving a power semiconductor switch. The high-side driver includes: a main switch N-channel MOSFET, whose drain terminal is connected to the positive side Vdc of the power supply of the circuit, and whose source terminal is connected to the OUT terminal, and the OUT terminal is a terminal for outputting a signal for driving the power semiconductor switch; a charge storage circuit, which injects current from the positive side Vdc of the power supply of the circuit to store charge; and a switch with a voltage detection function, which detects the voltage difference between the output terminal of the charge storage circuit and the positive side Vdc of the power supply of the circuit to operate. When the switch with a voltage detection function detects that the voltage of the output terminal of the charge storage circuit is higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, a part or all of the output voltage of the charge storage circuit is applied to the gate terminal of the main switch N-channel MOSFET, so that the main switch N-channel MOSFET performs an ON operation.

[0029] (2) Further, the present invention is the high-side driver described in (1) above, which includes: a startup P-channel MOSFET connected in parallel with the main switch N-channel MOSFET, and having its source terminal connected to the positive side Vdc of the power supply and its drain terminal connected to the OUT terminal; and an ON signal input terminal for inputting a signal for turning on the power semiconductor switch and connected to the gate terminal of the startup P-channel MOSFET. When a signal for turning on the power semiconductor switch is input to the ON signal input terminal, the startup P-channel MOSFET turns on. When the startup P-channel MOSFET turns on, the voltage of the OUT terminal rises. The switch with a voltage detection function detects that the output terminal voltage of the charge storage circuit is higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, and applies a part or all of the output voltage of the charge storage circuit to the gate terminal of the main switch N-channel MOSFET, causing the main switch N-channel MOSFET to turn on.

[0030] (3) Further, the present invention is the high-side driver described in (1) or (2) above, wherein the switch with a voltage detection function includes an internal switch that turns on when the switch with a voltage detection function detects that the output terminal voltage of the charge storage circuit is higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, and applies a part or all of the output voltage of the charge storage circuit to the gate terminal of the main switch N-channel MOSFET.

[0031] (4) Further, the present invention is the high-side driver described in any one of (1) to (3) above, and includes: an OFF signal input terminal for inputting a signal for turning off the power semiconductor switch; a voltage conversion circuit connected between the positive side Vdc of the power supply of the circuit and the OFF signal input terminal, and performing voltage conversion by dividing the voltage between the positive side Vdc of the power supply of the circuit and the OFF signal input terminal and / or subtracting a certain value; a reverse current prevention circuit provided between the gate terminal of the main switch N-channel MOSFET and the MOSFET for gate charge extraction, and allowing current to flow only in the direction from the gate terminal of the main switch N-channel MOSFET toward the MOSFET for gate charge extraction; and the MOSFET for gate charge extraction, having a drain terminal connected to the reverse current prevention circuit, a source terminal connected to the OFF signal input terminal, and a gate terminal connected to an output terminal for outputting the voltage converted by the voltage conversion circuit. The drain terminal of the MOSFET for gate charge extraction is connected to the gate terminal of the main switch N-channel MOSFET via the reverse current prevention circuit. When a signal for turning off the power semiconductor switch is input to the OFF signal input terminal, and the voltage of the OFF signal input terminal drops from the positive side Vdc of the power supply of the circuit, the output voltage of the output terminal for outputting the voltage converted by the voltage conversion circuit rises, the MOSFET for gate charge extraction turns on, and the main switch N-channel MOSFET turns off.

[0032] Advantages of the Invention

[0033] According to the present invention, it is possible to provide a high-side driver that does not require the use of insulating elements or the like and has a simpler structure than conventional ones. In addition, a gate drive circuit can be constituted using this high-side driver. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1A It is an explanatory diagram showing the circuit structure of Principle 1 in the present embodiment.

[0035] Figure 1B It is an explanatory diagram showing the circuit structure of a modified example of Principle 1 in the present embodiment.

[0036] Figure 2 It is an explanatory diagram showing the circuit structure of Principle 2 in the present embodiment.

[0037] Figure 3 It is a graph showing the change in gate voltage when IGBT or the like transitions to the ON state.

[0038] Figure 4 It is an explanatory diagram showing the circuit structure of Principle 3 in the present embodiment.

[0039] Figure 5A This is a diagram showing a specific example of a charge storage circuit.

[0040] Figure 5B This is a diagram showing a specific example of a charge storage circuit.

[0041] Figure 6A This is a circuit diagram showing an example of the circuit structure of a specific gate drive circuit in the present embodiment.

[0042] Figure 6B This is a circuit diagram showing an example of the circuit structure of a specific gate drive circuit in the case of using a modified example of Principle 1 in the present embodiment.

[0043] Figure 7 This is a circuit diagram of a conventional gate drive circuit using a P-channel MOSFET.

[0044] Figure 8 This is a circuit diagram of a conventional gate drive circuit using an N-channel MOSFET instead of a P-channel MOSFET.

[0045] Description of reference numerals

[0046] 1 P-channel MOSFET

[0047] 1a N-channel MOSFET

[0048] 2 IGBT

[0049] 3, 3a Gate drive circuit

[0050] 4 Positive voltage terminal

[0051] 5 IN terminal

[0052] 6, 8 GND terminal

[0053] 7 OUT terminal

[0054] 9, 10, 11 Resistor

[0055] 10 Optocoupler

[0056] 12 Diode

[0057] 13 Capacitor

[0058] 21 N-channel MOSFET

[0059] 22 Switch with voltage detection function

[0060] 23 Charge storage circuit

[0061] 24 Positive and negative voltage terminals

[0062] 25 OUT terminal

[0063] 26, 26b Gate drive circuit

[0064] 27 IGBT

[0065] 28 ON signal input terminal

[0066] 29, 29b Resistor

[0067] 30 P-channel MOSFET for startup

[0068] 31 Voltage conversion circuit

[0069] 32 MOSFET

[0070] 33 Reverse current prevention circuit

[0071] 34 OFF signal input terminal

[0072] 40 Gate drive circuit

[0073] 50 Control IC

[0074] 51 Inverter. Detailed implementation mode

[0075] Hereinafter, the preferred implementation mode of the present invention will be described based on the drawings.

[0076] First, after explaining the principles of the three aspects of the present invention, the high side driver of the gate drive circuit as a specific implementation mode of the present invention will be described.

[0077] 1. Principle 1

[0078] Figure 1A is a block diagram for explaining Principle 1 for solving the above problems in this implementation mode. In Figure 1A the gate drive circuit 26 related to this Principle 1 is depicted, and the IGBT 27 driven by the gate drive circuit 26 is also depicted. In addition, for the sake of easy understanding, the high side driver as a characteristic structure is depicted in the center. Regarding the circuit structure parts of the gate drive circuit that are the same as those in the prior art, since they have the same functions as in the prior art, there are also parts that are omitted and not illustrated.

[0079] As Figure 1A shown, in the explanatory diagram of this Principle 1 ( Figure 1A) In the gate drive circuit 26, in addition to the N-channel MOSFET 21 (hereinafter referred to as Q21) serving as the main switch, a charge storage circuit 23 and a switch 22 with a voltage detection function are also provided. Q21 literally corresponds to a preferred example of the main switch N-channel MOSFET in the technical solution.

[0080] First, in Figure 1A , the OUT terminal 25 is an output terminal, and its output voltage swings between a voltage lower than the GND and the positive-side voltage Vdc. Figure 1A In, the source terminal of Q21, which is the main switch of the gate drive circuit 26, is connected to the OUT terminal 25, and its drain terminal is connected to the positive-side voltage Vdc. When the gate voltage of Q21 is a voltage higher than the OUT terminal 25 (i.e., the source terminal) by Vgson (a fixed value), Q21 performs an ON operation and outputs a high voltage (= approximately the Vdc voltage) to the OUT terminal 25. Here, Vgson refers to the gate threshold voltage of Q21.

[0081] The charge storage circuit 23 stores charge, but the pin for storing charge is different from the pin for discharging charge.

[0082] First, when the OUT terminal 25 (connected to the c pin) is at a low potential (= approximately GND or a voltage lower than GND), current is supplied from the a pin connected to the positive-side voltage Vdc to store charge. Then, the stored charge overlaps the potential of the OUT terminal 25 and is output from the b pin without flowing back to Vdc. Therefore, regarding the potential of the b pin, the potential is higher than the potential of the OUT terminal 25 (the source potential of Q1) by an amount of voltage corresponding to the stored charge. The b pin is connected to the e pin of the switch 22 with a voltage detection function described below. A specific example of the charge storage circuit 23 is shown in Figure 5A , Figure 5B , and details of these will be described later. Representative examples are given in these specific examples, and other circuit structures may also be used.

[0083] Next, Figure 1AThe d-pin of the switch 22 with voltage detection function is connected to the positive-side voltage terminal 24 (Vdc), the e-pin is connected to the b-pin of the charge storage circuit 23, and the f-pin is connected to the gate terminal of Q21. Under such a connection relationship, the switch 22 with voltage detection function monitors the voltage between the d-pin (that is, the positive-side voltage Vdc) and the e-pin. As a result of the monitoring, when the voltage of the e-pin is higher than the voltage of the d-pin by a specified value or more, that is, when the voltage of the e-pin is higher than Vdc by a specified voltage, the built-in switch of itself is turned on, and the voltage of the e-pin is supplied to the f-pin. Since the voltage corresponding to the charge stored in the charge storage circuit 23 is supplied from the b-pin to the e-pin, by turning on the switch built in the switch 22 with voltage detection function, a part or all of the voltage corresponding to the stored charge can be applied between the gate and source of Q21. As a result, a voltage higher than Vdc is applied between the gate (source) of Q21. If the voltage between the gate and source of Q21 is Vgson or more, Q21 is turned on.

[0084] When the OUT terminal 25 rises from a low potential to Vdc, the charge storage circuit 23 outputs from the b-pin the voltage between the b-pin and the c-pin by overlapping the voltage between the b-pin and the c-pin on the voltage of the OUT terminal 25 using the already stored charge. This is because the c-pin is connected to the OUT terminal 25. The voltage output in this overlapping manner is superimposed on the voltage of the OUT terminal 25. Therefore, if the potential of the OUT terminal 25 rises, the voltage of the b-pin also rises accordingly. When the voltage of the OUT terminal 25 further approaches Vdc, the voltage of the e-pin of the switch 22 with voltage detection function exceeds the voltage of the d-pin (that is, the positive-side voltage Vdc) and rises. When the exceeded voltage difference reaches a specified value, the built-in switch in the switch 22 with voltage detection function is turned on, and a part or all of the output voltage of the charge storage circuit 23 is applied to the gate terminal of Q21. That is, the built-in switch is a switch that functionally connects the e-pin and the f-pin. By turning on this built-in switch, all or a part of the output voltage (b-pin = e-pin) of the charge storage circuit 23 is supplied to the f-pin (= the gate terminal of Q21). Furthermore, the built-in switch mentioned here corresponds to a preferred example of the internal switch in the technical solution.

[0085] Here, the voltage (voltage between the b-pin and the c-pin) output from the b-pin using the charge stored in the charge storage circuit 23 is set as V CH and the specified value (threshold voltage) of the voltage difference exceeding Vdc set in the switch 22 with voltage detection function is set as V DET .

[0086] Thus, the voltage VO of the OUT terminal 25 at which the switch built into the switch 22 with a voltage detection function performs an ON operation ON is shown by the following equation (1). When Q21 performs an ON operation, for the output voltage of the OUT terminal 25, the voltage rapidly rises due to the ON operation of Q21 and eventually becomes approximately Vdc.

[0087] VO ON = V DET - V CH + Vdc(1)

[0088] Here, the voltage between the gate terminal and the source terminal that causes Q21 to perform an ON operation is Vgson, and k is a constant. The following equation (2) holds.

[0089] V CH ≥ k × Vgson(2)

[0090] Here, k is a constant showing the ratio of the output voltage of the charge storage circuit 23 applied to the gate terminal of Q21. k is a constant of 1 or less. When all of the output voltage of the charge storage circuit 23 is applied to the gate terminal of Q21, k = 1. When half of the output voltage of the charge storage circuit 23 is applied to the gate terminal of Q21, k = 1 / 2. In this way, part or all of the output voltage of the charge storage circuit 23 is applied to the gate terminal of Q21.

[0091] For example, when the voltage V CH of the b pin of the charge storage circuit 23 according to the stored charge is Vdc and the threshold voltage of the switch 22 with a voltage detection function is V CH = Vdc / 2, according to equation (1), the voltage VO of the OUT terminal 25 at which Q21 performs an ON operation DET is VO ON = Vdc / 2. When the output voltage of the OUT terminal 25 reaches VO ON = Vdc / 2, the built-in switch of the switch 22 with a voltage detection function performs an ON operation, and a voltage of (1 / k) × V ON is applied between the gate terminal and the source terminal of Q21. Therefore, if the above equation (2) holds, Q21 performs an ON operation. CH As described above,

[0092] The high-side driver having the structure shown above has the following function: Without using an insulating element such as a voltage shift circuit or an optocoupler, when its own output voltage, that is, the voltage of the OUT terminal 25, is a certain value or more, it autonomously performs an ON operation and maintains the ON operation state. Figure 1A ​

[0093] Furthermore, as Figure 1A shown, the f pin is connected to the gate terminal of Q21. However, a resistor 29 may be provided between the gate terminal and the source terminal, but this is not an essential structure.

[0094] 1.2 Variant of Principle 1

[0095] In the above-mentioned Principle 1, the terminal c of the charge storage circuit 12 is connected to the OUT terminal 25. Therefore, the rise in the voltage on the OUT terminal 25 is applied to the terminal c. In contrast, as Figure 1B shown, the c terminal of the charge storage circuit 12 may be connected to the OFF signal input terminal 34 instead of the OUT terminal 25. Here, the details of the OFF signal input terminal 34 and the signal input thereto will be described in the description of Figure 4 Principle 3 described later.

[0096] In the case of using the circuit of Principle 1 described in Figure 1A , as Figure 2 shown, it is preferable to combine a startup P-channel MOSFET for startup. With such a structure, the IGBT can be driven more reasonably. The details will be described later in 2. Principle 2.

[0097] In contrast, according to the modified example of Principle 1 shown in Figure 1B ( Figure 1B ), different from the circuit structure shown in Figure 1A , it is not necessary to combine a P-channel MOSFET, and a simpler circuit structure can be achieved. However, this excludes the case where the IGBT to be driven must be continuously turned on.

[0098] 2. Principle 2

[0099] Figure 2 FIG. is a diagram for explaining another Principle 2 of the present embodiment, which shows the case where a semiconductor switch (startup P-channel MOSFET) of a small capacitor is combined with the high-side driver of the above-mentioned Figure 1A . Thereby, a high-side driver of a gate drive circuit capable of driving the IGBT more reasonably can be provided.

[0100] Operation of IGBT

[0101] The gate circuit of a semiconductor switch such as an IGBT passes through approximately three states during the transition from the OFF operation to the ON operation. A diagram schematically showing this process is shown in Figure 3 . This diagram is a diagram showing the rise of the gate voltage over time. First, in region A, the IGBT is in the OFF operation state, which is a region where only the gate voltage rises.

[0102] Region B is the time period during which the IGBT transfers from the OFF operation to the ON operation. In this region, the rise of the gate voltage is temporarily alleviated. In this region B, it is the time period during which the transition to the ON operation is in progress and the collector potential of the IGBT is decreasing. In this region B, it is the time period during which a discharge current for discharging the charge of the feedback capacitance of the IGBT is required. Therefore, region B is the time period during which a relatively large drive current is required. Usually, the output current of the gate drive circuit of the IGBT is limited. Therefore, a certain amount of time is required before the charge of the feedback capacitance is discharged. This time period can also be considered as this region B.

[0103] Region C is the state in which the voltage between the collector terminal and the emitter terminal of the IGBT is substantially saturated (the collector potential has sufficiently decreased). This region C is the region in which only the gate voltage further rises to make the ON operation state of the IGBT more reliable.

[0104] Figure 2 The view of (Principle 2)

[0105] In order to convert the IGBT from the OFF operation to the ON operation state at high speed, a sufficiently large drive current is required in region B as compared with region A or region C. In Figure 2 The high-side driver of the gate drive circuit of the principle shown is one circuit independently invented by the inventor of the present application in order to make the gate voltage rise faster to reasonably meet the requirements in view of such characteristics of the IGBT.

[0106] Figure 2 The structure of Figure 1A and Figure 1B is substantially the same, but is different in that a startup P-channel MOSFET 30 is newly added and an ON signal is applied to this startup P-channel MOSFET 30 (hereinafter referred to as Q22). Q22 corresponds to a preferred example of the startup P-channel MOSFET in the technical solution. The source terminal of Q22 is connected to Vdc (positive-side voltage terminal 24), and the drain terminal is connected to the OUT terminal 25. A resistor 29b is connected between Vdc and the gate terminal to supply an ON signal to the gate terminal.

[0107] Hereinafter, the operation of the Figure 2 circuit structure will be described.

[0108] When Figure 2 the ON signal input terminal 28 shown is at a low level (LOW), Q22 transfers from the OFF operation state to the ON operation. Then, the voltage of the OUT terminal 25 starts to rise to Vdc. This time period is in Figure 3 region A of Figure 2is omitted in the following description. However, the IGBT as the driving object is connected to Figure 2 the OUT terminal of Figure 2 . The meaning of the area object A mentioned here is the area A of the IGBT as the driving object.

[0109] Then, when the voltage of the OUT terminal (the gate voltage of the unillustrated IGBT) reaches the gate threshold voltage of the IGBT as the driving object, it enters the area B as described above. Based on the above formulas (1) and (2), the voltage V of the b pin of the charge storage circuit 23 is appropriately set CH and the threshold voltage V of the switch with voltage detection function DET so that Q21 of the gate drive circuit performs an ON operation at this time.

[0110] The meaning of appropriately setting is to set it so that Q21 performs an ON operation when the IGBT enters the area B. Specifically, the gate voltage when the IGBT as the driving object enters the area B corresponds to VO in the formula (1) ON , Vdc is determined in design. According to the formula (2), using the coefficient k, V is determined according to Vgson of Q21 CH . Therefore, based on these values, V in the formula (1) is obtained DET . Just set each voltage value in such calculations.

[0111] In the high-side driver set like this, when the IGBT as the driving object enters the area B, Q21 performs an ON operation. Therefore, a large current can be supplied to the gate terminal of the IGBT as the driving object, and the IGBT as the driving object can be driven at high speed. When the charge storage circuit 23 of the high-side driver discharges the stored charge completely, the ON operation of Q21 cannot be maintained, and Q21 becomes an OFF operation state. However, if the discharge time constant of the stored charge amount is set long relative to the time when the IGBT as the driving object passes through the area B (refer to Figure 3 ), the requirements for making the IGBT perform an ON operation can be met. If the IGBT as the driving object enters the area C (refer to Figure 3 ), it is not necessary to supply a large current to the gate terminal of the IGBT as the driving object. Therefore, in the area C, it is sufficient for Q22 as the P-channel MOSFET to supply current. That is to say, the IGBT can be sufficiently driven.

[0112] In this way, according to Figure 2In the circuit configuration shown, an N-channel MOSFET (i.e., Q21) capable of handling large currents is used for current supply in region B, and P-channel MOSFETs (i.e., Q22) with current values lower than those of the N-channel MOSFET but capable of applying the power supply voltage Vdc using a simple circuit are used in regions A and C. Thus, a reasonable high-speed switching of the IGBT is achieved.

[0113] Furthermore, in Figure 2 it is also possible to efficiently utilize: the fact that when driving the N-channel MOSFET (Q21) that drives the main switch, it can be driven without using an optocoupler or a voltage shift circuit, etc., which is a feature common to Figure 1A and Figure 1B This invention (Principle 2) can provide a gate drive circuit that is suitable for high-speed driving of the IGBT to be driven, has a simple circuit configuration, and is low-cost.

[0114] 3. Principle 3

[0115] Prior to this, in Principle 1 ( Figure 1A ) or Principle 2 ( Figure 2 ), mainly a circuit having characteristics in the operation when transferring the IGBT to be driven from the OFF operation to the ON operation state was described. On the other hand, at the timing when the IGBT to be driven transfers from the ON operation to the OFF operation, usually another circuit needs to operate to start extracting the charge of the gate circuit of the IGBT. At this time, the OFF operation of the IGBT cannot be hindered.

[0116] The circuit configuration showing this Principle 3 ( Figure 4 ) is a circuit configuration with high noise resistance that meets these requirements. Figure 4 The circuit configuration shown is a circuit configuration obtained by adding a voltage conversion circuit 31, a gate charge extraction MOSFET 32 (hereinafter referred to as Q32), and a reverse current prevention circuit 33 to the circuit configurations shown in Figure 1A and Figure 1B .

[0117] The g pin of the voltage conversion circuit 31 is connected to Vdc, the i pin is connected to the OFF signal input terminal 34, and the h pin is connected to the gate terminal of Q32. The source terminal of Q32 is connected to the OFF signal input terminal 34, and the drain terminal is connected to the reverse current prevention circuit 33. The h pin is the output terminal of the voltage conversion circuit 31, so to speak, and is a preferred example corresponding to the output terminal in the technical solution.

[0118] One end of the reverse current prevention circuit 33 is connected to the drain terminal of Q32, and the other end is connected to the f terminal of the switch 22 with voltage detection function, i.e., the gate terminal of Q21. The reverse current prevention circuit 33 can be, for example, a series circuit of a diode and a resistor. The cathode side of the diode can be connected to the drain terminal of Q32, and the anode side can be connected to the f pin of the switch 22 with voltage detection function.

[0119] In order not to interfere with the OFF operation of the IGBT to be driven, Q21 must be quickly turned into the OFF operation state. When the IGBT to be driven transfers from the ON operation to the OFF operation state, the collector current of the IGBT rapidly decreases. Therefore, noise caused by the generated magnetic flux or spike noise caused by the wiring inductance of the collector circuit, etc. is generated in the system. There are cases where these noises overlap with the control circuit or the drive circuit and cause malfunction of the circuit components. Therefore, for the circuit structure used to transfer Q21 from the ON operation to the OFF operation state, it is particularly required to prevent malfunction caused by noise and to have a high tolerance to noise.

[0120] Figure 4 Shows a circuit structure with a high noise tolerance when turning off the main switch of the gate drive circuit, i.e., the N-channel MOSFET 21 (Q21). The circuit structure shown here is characterized in that the OFF signal input terminal 34 is connected to the source terminal of the gate charge extraction MOSFET 32 (Q32). That is, a structure with the feature that the OFF signal input terminal 34 is connected to the source terminal instead of the gate terminal of Q32 is adopted. The voltage conversion circuit 31 has a voltage conversion function of dividing the voltage between the g pin and the i pin and / or converting the voltage by processing such as subtracting a certain value. That is, the voltage conversion circuit converts the voltage between the g pin and the i pin using a specified structure and outputs the converted voltage between the h pin and the i pin. Among them, the output voltage is a positive voltage. That is, the h pin is a preferred example of the output terminal in the technical solution.

[0121] In the examples described later, regarding the voltage conversion function, the process of subtracting a certain voltage is taken as an example for explanation. However, voltage division (resistive voltage division) can also be performed using a resistor, etc. If described by an equation, for example, it is as follows.

[0122] It can also be expressed as follows:

[0123] h pin - i pin voltage = g pin - i pin voltage - certain voltage

[0124] h - pin to i - pin voltage=(g - pin to i - pin voltage)×t. Here, the proportionality constant t can be a number in the range of 0 < t ≤ 1. In addition, the processing of both of the above can also be applied. That is, voltage division can be performed after subtracting a certain value. In addition, a certain value can be subtracted after voltage division.

[0125] When the voltage at the OFF - signal input terminal 34 is near Vdc, the voltage between the g - pin and the i - pin is approximately 0V. Therefore, the voltage between the h - pin and the i - pin is also approximately 0V, and Q32 performs an OFF operation. When the voltage at the OFF - signal input terminal 34 changes in the downward direction from Vdc, a voltage (potential difference) is generated between the g - pin and the i - pin. Therefore, a voltage obtained by converting this voltage is generated between the h - pin and the i - pin.

[0126] When the voltage at the OFF - signal input terminal 34 further decreases, the voltage (difference) between the g - pin and the i - pin further increases. Along with this, the voltage between the h - pin and the i - pin also rises. When it exceeds the gate threshold voltage of Q32, Q32 performs an ON operation. When Q32 performs an ON operation, the gate charge of Q21 is discharged to the potential of the OFF - signal input terminal 34 via the reverse - current prevention circuit 33. As a result, the gate potential of Q21 becomes a voltage value that is higher than the potential of the OFF - signal input terminal 34 by the amount of the voltage drop generated by the reverse - current prevention circuit 33.

[0127] If the gate potential of this Q21 is set lower than the gate threshold voltage (Vgson) of Q21, then Q21 performs an OFF operation. Then, as a result of this operation, this bootstrap circuit becomes a state that does not interfere with the OFF operation of an IGBT (not shown) (the IGBT to be driven connected to the OUT terminal 25).

[0128] By making Q21 perform an OFF operation, it becomes a state that does not interfere with the OFF operation of the IGBT to be driven. However, in order to maintain this state, even when the OUT terminal 25 is at a low - level (Low) voltage, the OFF - operation state of Q21 must be maintained. Therefore, when the low - level (Low) voltage of the OUT terminal 25 is set to VO low and the amount of the voltage drop of the reverse - current prevention circuit 22 is set to V dr the input voltage V of the OFF - signal input terminal 34 for making Q21 perform an OFF operation INlow must satisfy the following formula (4). In addition, for V that satisfies formula (4) INlowFor example, according to the necessity of turning on Q32, when setting the gate threshold voltage of Q32 to VgsonQ32 and expressing the conversion formula of the voltage conversion circuit 31 by Equation (3), it is necessary to satisfy Equation (5). Furthermore, the input voltage of the OFF signal input terminal 34 itself is expressed as V IN . In addition, Vm represents a certain voltage used in the conversion in the voltage conversion circuit 31. In addition, the case where the gate threshold voltage of Q21 is represented by Vgson is the same as in Principle 1.

[0129] Therefore, when assuming the conditions of the following four items, satisfying Equation (4) and Equation (5) among the conditions becomes a condition for Figure 4 the shown high-side driver not to interfere with the OFF operation of the IGBT to be driven.

[0130] (Item 1.) Express the gate threshold voltage of Q32 as VgsonQ32.

[0131] (Item 2.) When setting the voltage between the h-pin and the i-pin to V hi , the conversion formula of the voltage conversion circuit 31 is expressed by the following Equation (3).

[0132] V hi = Vdc - V IN - Vm (3)

[0133] (Item 3.) Set the voltage drop value of the reverse current prevention circuit 33 to V dr .

[0134] (Item 4.) Set the voltage of the OUT terminal 25 when Q21 is in the OFF operation state to VO low . Then, the above Equation (4) and Equation (5) are as follows:

[0135] V INlow < VO low - V dr + Vgson (4)

[0136] V INlow < Vdc - Vm - VgsonQ32 (5).

[0137] Here, the input voltage of the OFF signal input terminal 34 is near Vdc (= 15V), Q32 performs the OFF operation, and Q21 performs the ON operation. As a result, it is premised that the output voltage of the OUT terminal 25 is in a state approximately near Vdc. Under this premise, there is an instruction to turn off the IGBT to be driven, and it is considered necessary to make the OUT terminal 25 be in a state of -5V or less. That is, it is a condition of VO low ≤ -5V.

[0138] In order not to interfere with this instruction, if the voltage drop value V of the backflow prevention circuit 33 is made dr = 2V and Vgson = 4V, then according to the above formula (4), it becomes V INlow < -3V. Further, when the gate threshold voltage of Q32 is assumed to be VgsonQ32 = 4V and V INlow = -3V, according to the above formula (5), the constant Vm of the conversion formula of the voltage conversion circuit 31 is obtained as Vm < 14V.

[0139] In this way, Figure 4 the present high-side driver shown connects the OFF signal input terminal 34 to the source terminal of the MOSFET 32 (Q32). Therefore, when the voltage of the OFF signal input terminal 34 is not changed from Vdc to V INlow , the state of this circuit does not change to a state that does not interfere with the OFF operation of the IGBT to be driven.

[0140] That is, in the specific examples of the above voltages, if the OFF signal input terminal 34 does not change from +15V to -3V, the state does not change to a state that does not interfere with the OFF operation of the IGBT. This means that Figure 4 the present high-side driver requires a voltage change of 18V to change the state. When considering the opposite view, for a voltage change (noise) of less than 18V, the state is not changed. That is, it can be said that the noise tolerance is very high.

[0141] In the past, in a circuit that has been put into practical use, when it is desired to turn off Q21, its input signal is input to the gate terminal of the MOSFET 32 (Q32) for gate charge extraction, and the source terminal of Q32 is often connected to a fixed potential such as Vee (negative-side voltage). In such a case, the input signal is initially Vee, and in order to cause a state change (that is, to turn off Q21), a method of applying a voltage of about Vee + 5V to the gate terminal of Q32 to turn on Q32 to turn off Q21 is common.

[0142] However, in such a structure, the voltage between the gate and source of Q32 changes from 0V to 5V to turn on Q32, causing a change in the state of the high-side driver. In particular, the input impedance of the gate terminal of the MOSFET is high and noise is easily applied. In this regard, the present circuit shown in Principle 3 ( Figure 4 ) can take a voltage difference of more than three times, and the noise tolerance characteristics are significantly superior compared to the conventional method.

[0143] 4. Examples of Charge Storage Circuits

[0144] A specific example of the charge storage circuit 23 described above is shown in Figure 5A , Figure 5B . As shown in Figure 1A , Figure 1B , Figure 2 , Figure 4 , the charge storage circuit 23 has an a pin, a b pin, and a c pin. In the circuit shown in the example 1 of Figure 5A , a series circuit of a diode D1 and a capacitor C1 is provided between the a pin and the c pin, and the connection point of the diode D1 and the capacitor C1 is connected to the b pin. With such a circuit structure, when the voltage at the a pin is higher than the voltage drop of the diode D1 at the c pin, charge is stored in the capacitor C1, and as a result, a voltage is generated in the capacitor C1. This voltage appears at the b pin (between the b pin and the c pin). As already described, the voltage that appears at the b pin is connected to the e pin of the switch 22 with a voltage detection function and is supplied to the gate terminal of Q21 via the switch 22 with a voltage detection function.

[0145] The circuit shown in the example 2 of Figure 5A is a circuit in which a Zener diode D2 is connected in series with the diode D1 with respect to the circuit of the example 1. As a result, the capacitor C1 can be charged (charge can be stored) with a voltage equal to the voltage drop of the Zener diode D2.

[0146] The circuit shown in the example 3 of Figure 5A is a circuit in which a resistor R1 is connected in series with the diode D1 with respect to the circuit of the example 1. As a result, the charging current can be limited by the value of the resistor R1.

[0147] The circuit shown in the example 4 of Figure 5A is a circuit in which a Zener diode D2 and a resistor R1 are connected in series with the diode D1 with respect to the circuit of the example 1. As a result, the capacitor C1 can be charged (charge can be stored) with a voltage equal to the voltage drop of the Zener diode D2, and the charging current can be limited by the value of the resistor R1.

[0148] The circuit shown in the example 5 of Figure 5B is a circuit in which a resistor R2 is connected in parallel with the capacitor C1 with respect to the circuit of the example 1. As a result, the charge stored in the capacitor C1 can be discharged, and the voltage output to the b pin can be decreased over time.

[0149] The circuit shown in the example 6 of Figure 5B is a circuit in which a resistor R3 is provided between the connection point of the diode D1 and the capacitor C1 and the b pin with respect to the circuit of the example 5. As a result, the value of the current discharged from the b pin can be limited by the value of the resistor R3.

[0150] The circuit shown in the example ofFigure 5B The circuit shown in Example 7 is a circuit in which a Zener diode D3 is connected between the c-pin and the b-pin and the resistor R1 is removed from the circuit of Example 6. As a result, the value of the current discharged from the b-pin can be limited by the value of the resistor R3, and in addition, the voltage output from the b-pin can be limited to the voltage drop generated in the Zener diode D3.

[0151] 5. Specific Embodiments of the Present Invention

[0152] In Figure 6A the circuit structure of a gate drive circuit as an example of a specific embodiment of the present invention is shown. In particular, the range surrounded by the dashed line is the gate drive circuit 40 which is a characteristic circuit in the present embodiment. Q21 is a P-channel MOSFET as the main switch. Q44, which is a P-channel MOSFET, the diode D4, the resistor R3, and the resistor R5 constitute a switch 22 with a voltage detection function. Q44 corresponds to a preferred example of the internal switch in the technical solution.

[0153] The charge storage circuit 23 is composed of the diode D2, the diode D3, and the capacitor C1. The operations of these circuits are as described above. Q22 is a semiconductor switch with a small capacitance, corresponding to Figure 2 Q22 in Figure 2 and operates in the same manner as Q22 in Figure 4 . Q32 corresponds to Figure 4 Q32 in Figure 6A and operates in the same manner as Q32 in Figure 4 . In addition, Figure 4 the voltage conversion circuit 31 in

[0154] Figure 6A is composed of the diode D1, the resistor R2, and the resistor R1, and operates in the same manner as the voltage conversion circuit 31 in Figure 6A . The reverse current prevention circuit 33 is composed of the diode D5 and the resistor R4, and operates in the same manner as the reverse current prevention circuit 33 in Figure 6A .

[0155] The high-side driver of the gate drive circuit 40 shown in

[0156] In Figure 6AThe circuits outside the gate drive circuit 40 are also shown. The control IC 50 is a device that controls the ON / OFF of the power semiconductor switch. Vdc and Vee are supplied to the control IC 50 as power supplies. The control IC 50 operates using this power supply, generates an IN signal, and supplies it to the IN terminal 45 of the gate drive circuit 40 (refer to Figure 6A ). The inverter 51 inverts the IN signal, generates an inverted IN signal, and supplies it to the inverted IN terminal 46 of the gate drive circuit 40.

[0157] When the potential of the OUT terminal 25 is approximately Vee, the IN terminal 45 is also at the potential of Vee, Q32 turns on and Q21 turns off. This state is a state where the voltage of the IN terminal 45 satisfies the above formulas (4) and (5) and does not interfere with the OFF operation of the IGBT (not shown) to be driven. At this time, the capacitor C1 of the charge storage circuit 23 is charged by the current flowing from Vdc through the diode D3 and the diode D2 to Vee. The charging voltage V c1 of the capacitor C1 is represented by the following formula (6). Furthermore, V c1 can be adjusted according to the Zener voltage V zd3 of the constant voltage diode D3. Here, the forward voltage drop of the diode D2 is set to VF D2 .

[0158] V c1 = Vdc - Vee - V zd3 - VF D2 (6)

[0159] The V CH in the already described formula (1) is equal to V c1 . Let this equation be formula (7).

[0160] V c1 = V CH (7)

[0161] Based on the necessity of applying a gate voltage to Q21 that sufficiently exceeds the gate threshold voltage, this V c1 (= V CH ) is selected to satisfy formula (2). When the IN terminal 45 is at a high level (High) (≈Vdc) and Q32 turns off, when the inverted IN terminal 46 becomes at a low level (Low) (≈the intermediate potential between Vdc and Vee), the P-channel MOSFET, which is a semiconductor switch with a small capacitance, i.e., Q22, turns on. When Q22 turns on, the voltage of the OUT terminal 25 starts to rise. Among them, this period is a period during which only the gate voltage of the IGBT rises while the IGBT to be driven is still in the OFF operation state (please refer to the above Figure 3As the voltage of the OUT terminal 25 continues to rise, the voltage of the b pin exceeds Vdc and continues to rise due to the charge accumulated by the charge accumulation circuit 23. Along with this, the voltage between the e pin and the d pin of the switch 22 with a voltage detection function rises.

[0162] When the voltage between the e-pin and the d-pin of the switch 22 with voltage detection function reaches the threshold voltage V DET When, that is, when the voltage at the OUT terminal 25 satisfies the equation (1), Q44, which is its own switch, is turned on. As Q44 is turned on, the accumulation voltage V for the charge accumulation circuit 23 is applied between the gate terminal and the source terminal of Q21, which is the main switch N-channel MOSFET. C1 The voltage is multiplied by the constant k, and Q21 quickly switches from the OFF state to the ON state. When Q21 switches to the ON state, Q21 controls the large current used to provide the gate current increase accompanying the feedback capacitance of the IGBT (refer to Figure 3 The charge and discharge time constant of capacitor C1 can provide Figure 3 After the charge of capacitor C1 is discharged and Q21 is turned off, Q22 ensures the gate voltage of the IGBT (see Figure 3 area C).

[0163] Next, when the IGBT is in the ON state, when the system receives an instruction to turn the IGBT off, the IN terminal 45 starts to shift to a low level (Low), and the inverted IN terminal 46 shifts to a high level (High). The inverted IN terminal 46 becomes a high level (High), whereby Q22 performs an OFF operation. The gate drive circuit 40 of this embodiment starts to shift Q21 from the ON state to the OFF state in a manner that does not hinder the OFF operation of the IGBT. When the IN terminal 45 drops from Vdc to Vee, a voltage is generated between the g pin and the i pin of the voltage conversion circuit 31. Along with this, the corresponding output voltage is output to the output of the voltage conversion circuit 31, that is, between the h pin and the i pin.

[0164] When the voltage drop of the IN terminal 45 is progressing and the output voltage of the voltage conversion circuit 31 exceeds the gate threshold voltage of Q32, Q32 turns on and extracts the gate charge of the main switch N-channel MOSFET (Q21) through the backflow prevention circuit 33. As a result, the gate potential of Q21 becomes a voltage obtained by adding the voltage drop of the backflow prevention circuit 33 to the potential of the IN terminal 45. Regarding the conversion formula of the voltage conversion circuit 31, if R1>>R2, it is expressed by the following formula (8). In addition, Vhi is the voltage between the h-pin and the i-pin, which is the output of the voltage conversion circuit 31. In addition, V in Equation (3) m corresponds to Vz in the following Equation (8) D1 .

[0165] V hi = Vdc - V IN - Vz D1 (8)

[0166] The condition for Q32 to perform the ON operation is shown by Equation (5) which has been described. When the low voltage of the OUT terminal 25 during the OFF operation of the IGBT is set to VOlow, the voltage of the IN terminal 45 that maintains the OFF operation state of Q21 even when the voltage of the OUT terminal 25 decreases is represented by the above Equation (4).

[0167] Figure 6A Modification example

[0168] by Figure 6A The specific implementation shown is an example of the circuit structure using the structure in which the terminal c of the charge storage circuit 12 is connected to the OUT terminal 25, that is, Figure 1A (Principle 1).

[0169] In contrast, the circuit structure shown in Figure 1B (Variant of Principle 1) can also be used. In this way, in Figure 6B the circuit diagram of the specific implementation using the Figure 1B structure is shown. That is, as Figure 6B shown, the terminal c of the charge storage circuit 12 is connected to the IN terminal 45 instead of the OUT terminal 25.

[0170] By adopting such a structure, as described in "1.2 Variant of Principle 1", it is not necessary to combine P-channel MOSFETs, and a simpler circuit structure can be achieved. This means that Figure 6B the circuit composed of the resistor R7 and Q22 is not necessarily required.

[0171] 6. Effects and Others

[0172] As described above, according to the high-side driver and the gate drive circuit including the high-side driver in the present embodiment, the following effects are achieved.

[0173] Using the switch 22 with a voltage detection function, the voltage generated by the charge storage circuit 23 is supplied to the main switch. Therefore, since the ON operation is autonomously performed using the output voltage, it is not necessary to use a voltage shift circuit or an insulating element, etc., and the circuit structure can be simplified.

[0174] In addition, in view of the operation characteristics of the power semiconductor switch to be driven, a more reasonable driving method is adopted. Therefore, it is possible to provide a gate drive circuit suitable for high-speed driving of the power semiconductor switch, having a simple circuit structure and a low cost.

[0175] In addition, it is possible to provide a circuit that does not interfere with the OFF operation when the power semiconductor switch to be driven performs an OFF operation. Furthermore, compared with the conventional circuit, it is possible to provide a circuit with superior noise immunity.

[0176] In addition, the above-described embodiments are examples of the implementation means of the present invention, and should be appropriately modified or changed according to the structure or various conditions of the device to which the present invention is applied. The present invention is not limited to the form of the present embodiment. For example, in the above-described embodiment, as the power semiconductor switch to be driven, IGBT is mainly described. However, other power semiconductor switches can also be applied.

[0177] In addition, the structure of the charge storage circuit or the switch circuit with a voltage detection function is an example, and other circuits having the same function can also be used. Furthermore, in the present embodiment (the present invention), MOSFET is used as the main structural element. However, if the same effect is achieved, other structures can also be used. For example, various semiconductor switches or switches using other materials can also be used.

Claims

1. A high-side driver, which is a circuit for driving a power semiconductor switch, wherein, The high-side driver includes: A main switch N-channel MOSFET, whose drain terminal is connected to the positive side Vdc of the power supply of the circuit, and whose source terminal is connected to the OUT terminal, where the OUT terminal is a terminal for outputting a signal for driving the power semiconductor switch; A charge storage circuit, coupled between the positive side Vdc of the power supply of the circuit and the OUT terminal, injects current from the positive side Vdc of the power supply of the circuit to store charge based on the voltage between the positive side Vdc of the power supply of the circuit and the OUT terminal, and discharges the stored charge from the output terminal of the charge storage circuit; And A switch with a voltage detection function, which operates by detecting the voltage difference between the output terminal of the charge storage circuit and the positive side Vdc of the power supply of the circuit, When the switch with the voltage detection function detects that the voltage of the output terminal of the charge storage circuit is higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, a part or all of the output voltage of the charge storage circuit is applied to the gate terminal of the main switch N-channel MOSFET, causing the main switch N-channel MOSFET to turn on.

2. The high-side driver according to claim 1, wherein, Includes: A startup P-channel MOSFET, connected in parallel with the main switch N-channel MOSFET, and whose source terminal is connected to the positive side Vdc of the power supply, and whose drain terminal is connected to the OUT terminal; And An ON signal input terminal, which inputs a signal for turning on the power semiconductor switch and is connected to the gate terminal of the startup P-channel MOSFET, When a signal for turning on the power semiconductor switch is input to the ON signal input terminal, the startup P-channel MOSFET turns on, When the startup P-channel MOSFET turns on, the voltage of the OUT terminal rises, The switch with the voltage detection function detects that the voltage of the output terminal of the charge storage circuit is higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, and applies a part or all of the output voltage of the charge storage circuit to the gate terminal of the main switch N-channel MOSFET, causing the main switch N-channel MOSFET to turn on.

3. The high-side driver according to claim 1 or 2, wherein The switch with the voltage detection function includes an internal switch, which turns on when the switch with the voltage detection function detects that the voltage of the output terminal of the charge storage circuit is higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, and applies a part or all of the output voltage of the charge storage circuit to the gate terminal of the main switch N-channel MOSFET.

4. The high-side driver according to claim 1 or 2, wherein, Includes: An OFF signal input terminal, which inputs a signal for turning off the power semiconductor switch; A voltage conversion circuit is connected between the positive side Vdc of the power supply of the circuit and the OFF signal input terminal, and performs voltage conversion by dividing the voltage between the positive side Vdc of the power supply of the circuit and the OFF signal input terminal and / or subtracting a certain value; A reverse current prevention circuit is provided between the gate terminal of the main switch N-channel MOSFET and the MOSFET for gate charge extraction, and allows current to flow only in the direction from the gate terminal of the main switch N-channel MOSFET toward the MOSFET for gate charge extraction; and The MOSFET for gate charge extraction has its drain terminal connected to the reverse current prevention circuit, its source terminal connected to the OFF signal input terminal, and its gate terminal connected to the output terminal that outputs the voltage converted by the voltage conversion circuit, The drain terminal of the MOSFET for gate charge extraction is connected to the gate terminal of the main switch N-channel MOSFET via the reverse current prevention circuit, A signal for turning off the power semiconductor switch is input to the OFF signal input terminal. When the voltage at the OFF signal input terminal drops from the positive side Vdc of the power supply of the circuit, the output voltage of the output terminal of the voltage conversion circuit that outputs the voltage after the conversion rises, the charge extraction MOSFET turns on, and the main switch N-channel MOSFET turns off.

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