Power semiconductor device

Abstract

The present disclosure provides a power semiconductor device that suppresses heat generation at a terminal portion by securing a current capacity by expanding a terminal width of a main electrode terminal of a semiconductor module. The semiconductor device includes: a plurality of semiconductor modules; and a first bus bar and a second bus bar electrically connected to the first main electrode terminal and the second main electrode terminal of each of the semiconductor modules, respectively, the plurality of semiconductor modules are arranged so as not to overlap each other in a first direction, which is the thickness direction, the first and second main electrode terminals protrude from one side surface of the semiconductor module, and the first and second bus bars are electrically connected to the first and second main electrode terminals of each of the semiconductor modules. The first and second main electrode terminals are disposed adjacent to each other at intervals in a second direction, which is an arrangement direction of the plurality of semiconductor modules, and an insulating medium is interposed between the first and second main electrode terminals.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device for power, and particularly to a semiconductor device for power that ensures the current capacity of a semiconductor module and suppresses heat generation at a terminal portion. Background Art

[0002] Generally, in power semiconductor modules typified by IGBT (Insulated Gate Bipolar Transistor) modules, IPM (Intelligent Power Module), and TPM (Transfer-molded Power Module), there are a main electrode terminal through which a large current flows and a high voltage is applied, and a control terminal that controls the conduction and cutoff of a switching device. The control terminal is connected to an external connector, and the switching of the power semiconductor module is controlled by a control signal from the outside.

[0003] The P terminal and the N terminal of adjacent main electrode terminals are respectively connected to laminated bus bars, and further the bus bars are connected to a capacitor bank. In addition, the bottom surface of the module is configured to be in contact with a heat dissipation mechanism such as a heat sink.

[0004] Since a large current flows through the main electrode terminal, the temperature rise becomes a technical problem. In addition, since a high voltage is applied to the main electrode terminal, it is necessary to ensure the space insulation distance between the terminals for safety, and it is difficult to increase the terminal width.

[0005] In the power conversion device disclosed in Patent Document 1, the following technique is disclosed: by disposing an insulating member between the main electrode terminals connected to the bus bar, even if the main electrode terminals are narrowed by overlapping the main electrode terminals, while maintaining the electrical insulation between the main electrode terminals, the power conversion device is miniaturized. Prior Art Documents Patent Documents

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2018-67990 Summary of the Invention Technical Problem to be Solved by the Invention

[0007] In the power conversion device disclosed in Patent Document 1, the arrangement direction of the main electrode terminals is the same as the stacking direction of the semiconductor module, and the arrangement of the insulating member disposed between the main electrode terminals is restricted, and it is difficult to increase the terminal width.

[0008] The present disclosure is proposed to solve the above problems, and its purpose is to provide a power semiconductor device, which ensures current capacity and suppresses heat generation at the terminal part by expanding the terminal width of the main electrode terminal of the semiconductor module. Technical means for solving technical problems

[0009] The power semiconductor device according to the present disclosure includes: a plurality of semiconductor modules; and a first bus bar and a second bus bar, the first bus bar and the second bus bar are respectively electrically connected to the first main electrode terminal and the second main electrode terminal of each semiconductor module of the plurality of semiconductor modules, the plurality of semiconductor modules are arranged without overlapping in a first direction as the thickness direction, the first main electrode terminal and the second main electrode terminal protrude from one side surface of the semiconductor module, and are adjacent to each other with an interval in a second direction as the arrangement direction of the plurality of semiconductor modules, and an insulating medium is inserted between the first main electrode terminal and the second main electrode terminal. Invention effects

[0010] According to the power semiconductor device of the present disclosure, by inserting an insulating medium between the first main electrode terminal and the second main electrode terminal, the space insulation distance can be shortened, and the lengths of the first and second main electrode terminals in the second direction, that is, the electrode widths, can be expanded. Description of the drawings

[0011] Figure 1 It is a top view showing the structure of the power semiconductor device according to Embodiment 1 of the present disclosure. Figure 2 It is a perspective view showing the structure of the connection part between the main electrode terminal of the semiconductor module and the bus bar. Figure 3 It is a perspective view showing the structure of the connection part between the main electrode terminal of the semiconductor module and the bus bar. Figure 4 It is a top view showing the semiconductor module. Figure 5 It is a side view of the semiconductor module in the power semiconductor device according to Embodiment 2 of the present disclosure. Figure 6 It is a top view showing the structure of the power semiconductor device according to Embodiment 2 of the present disclosure. Figure 7 It is a side view of the semiconductor module in the power semiconductor device which is a modification of Embodiment 2 of the present disclosure. Figure 8 It is a top view showing the structure of the power semiconductor device which is a modification of Embodiment 2 of the present disclosure. Figure 9It is a top view of a semiconductor module in the power semiconductor device of Embodiment 3 according to the present disclosure. Figure 10 It is a side view of a semiconductor module in the power semiconductor device of Embodiment 3 according to the present disclosure. Figure 11 It is a side view of a semiconductor module in the power semiconductor device of Embodiment 3 according to the present disclosure. Figure 12 It is a side view of a semiconductor module in the power semiconductor device of Embodiment 4 according to the present disclosure. Figure 13 It is a side view of a semiconductor module in the power semiconductor device of a modified example of Embodiment 4 according to the present disclosure. Figure 14 It is a side view of a semiconductor module in the power semiconductor device of Embodiment 4 according to the present disclosure. Detailed Embodiments

[0012] <Embodiment 1> Figure 1 It is a top view for explaining the structure of the power semiconductor device 100 of Embodiment 1 according to the present disclosure.

[0013] As Figure 1 shown, the power semiconductor device 100 includes: six semiconductor modules 1 mounted on the upper surface of a cooling member 4a of a cooling mechanism such as a water cooling mechanism 4b; a bus bar 2a (first bus bar) and a bus bar 2b (second bus bar), which are respectively connected to main electrode terminals 5a (first main electrode terminal) and main electrode terminals 5b (second main electrode terminal) protruding from the sides of each semiconductor module 1 at intervals.

[0014] The bus bars 2a and 2b extend along the X direction, which is the arrangement direction of the six semiconductor modules 1, and a capacitor bank, which is an aggregate of a plurality of capacitors, is connected to an end (not shown) in the Y direction orthogonal to the X direction. This capacitor bank is used as a smoothing capacitor of a power conversion circuit, for example.

[0015] Each semiconductor module 1 has an output terminal 10 protruding from a side opposite to the side where the main electrode terminals 5a and 5b protrude, and the output terminals 10 of adjacent semiconductor modules 1 are commonly connected through a terminal board 11. The terminal board 11 is electrically connected to the outside of the power semiconductor device 100 via an external terminal board (not shown).

[0016] Figure 2It is a perspective view showing the structure of the connection portions of the main electrode terminals 5a and 5b of the semiconductor module 1 with the bus bars 2a and 2b. The bus bars 2a and 2b are stacked in the vertical direction, i.e., the Z direction, and are electrically insulated from each other by an insulator sheet 3 called a laminator having a resistance of about 100 MΩ to ensure a space insulation distance. In addition, in the present embodiment, the bus bar 2a is a P-potential bus bar on the high-potential side, and the bus bar 2b is an N-potential bus bar on the low-potential side.

[0017] As the insulator sheet 3, a composite material of polyethylene terephthalate (PET) film and aramid paper or the like can be used, and it can be provided not only between the bus bars 2a and 2b but also so as to cover the upper and lower surfaces of the bus bars 2a and 2b.

[0018] In addition, as Figure 2 shown, the bus bar 2a has the following structure: a plurality of bus bar terminals 21a (first bus bar terminals) extend from the edge portion on the semiconductor module 1 side, and the upper surface of the main electrode terminal 5a of the semiconductor module 1 is connected to the bus bar terminal 21a.

[0019] The bus bar 2b has the following structure: a plurality of bus bar terminals 21b (second bus bar terminals) extend from the edge portion on the semiconductor module 1 side, and the upper surface of the main electrode terminal 5b of the semiconductor module 1 is connected to the bus bar terminal 21b.

[0020] Between the main electrode terminal 5a and the main electrode terminal 5b protruding from the side surface of the semiconductor module 1, an insulating medium 6 made of a sheet-like insulating material is inserted. Since the main electrode terminals 5a and 5b are respectively connected to the bus bars 2a and 2b, the main electrode terminal 5a becomes a P potential and the main electrode terminal 5b becomes an N potential. Therefore, the main electrode terminals 5a and 5b originally need to be arranged with a separation distance required to ensure a space insulation distance, but in the power semiconductor device 100 of the present embodiment 1, by inserting the insulating medium 6 between the main electrode terminal 5a and the main electrode terminal 5b, the space insulation distance can be shortened, and the length in the X direction, i.e., the electrode width, of the main electrode terminals 5a and 5b can be increased.

[0021] As the insulating medium 6, paper materials such as aramid paper and resin paper, or resin materials such as nylon film, polyester film, and polyphenylene sulfide (PPS) film can be used, and the thickness can be about 100 μm in the thinnest case. By using the sheet-like insulating medium 6, an increase in manufacturing cost can be suppressed.

[0022] The insulating medium 6 can have a thickness that can ensure a certain level of withstand voltage. The thicker the thickness, the higher the withstand voltage. Therefore, the maximum thickness can be set to be the same as the distance between the adjacent main electrode terminals 5a and 5b. In addition, the length of the insulating medium 6 in the Y direction can be set to be the same as the length of the main electrode terminals 5a and 5b in the Y direction.

[0023] Here, in the power semiconductor device 100, a plurality of semiconductor modules 1 are arranged without overlapping in the thickness direction, i.e., the Z direction. The main electrode terminals 5a and 5b are arranged adjacent to each other in the arrangement direction of the plurality of semiconductor modules 1, i.e., the X direction, and the terminal surfaces of the main electrode terminals 5a and 5b do not overlap with each other. Moreover, the insulating medium 6 is arranged between the main electrode terminals 5a and 5b in the arrangement direction of the main electrode terminals 5a and 5b, i.e., the X direction. Therefore, if the insulating medium 6 can ensure the withstand voltage, by making the thickness of the insulating medium 6 extremely thin, the length of the main electrode terminals 5a and 5b in the X direction, i.e., the terminal width, can be greatly increased.

[0024] Therefore, without increasing the size of the semiconductor module 1, more current can flow, and the heat dissipation at the terminal part becomes larger, which can reduce heat generation.

[0025] In addition, instead of making the thickness of the insulating medium 6 thicker, a hollow cylindrical insulating medium 60 can be used. Figure 3 FIG. is a perspective view showing the structure of the connection part between the main electrode terminals 5a and 5b of the semiconductor module 1 and the bus bars 2a and 2b when the hollow cylindrical insulating medium 60 is used. By setting the width of the insulating medium 60 in the X direction to be the same as the distance between the adjacent main electrode terminals 5a and 5b, and setting the length of the insulating medium 60 in the Y direction to be the same as the length of the main electrode terminals 5a and 5b in the Y direction, the space between the main electrode terminals can be filled without gaps. By using the hollow cylindrical insulating medium 60, the weight can be reduced.

[0026] In addition, by bonding and fixing the insulating media 6 and 60 to at least one of the main electrode terminals 5a and 5b with an adhesive, the movement of the insulating media 6 and 60 due to vibration or the like can be suppressed.

[0027] Figure 4 FIG. is a plan view of the semiconductor module 1 as viewed from the upper surface. As Figure 4 shown, each of the semiconductor modules 1 has a plurality of control terminals CT protruding from the sides of the main electrode terminals 5a and 5b and the sides of the output terminals 10. A control signal for controlling the conduction and cutoff of the switching device built in the semiconductor module 1 is input to the plurality of control terminals CT, and they are bent in the Z direction orthogonal to the protruding direction (Y direction) and connected to an external connector (not shown).

[0028] <Embodiment 2> Figure 5 FIG. 4 is a side view of the semiconductor module 1 in the power semiconductor device 200 according to Embodiment 2 of the present disclosure, as viewed from the side of the main electrode terminals 5a and 5b.

[0029] As Figure 5 shown, in the semiconductor module 1, the main electrode terminals 5a and 5b are arranged at different positions in the terminal positions in the thickness direction Z of the semiconductor module 1 in a stepped manner, and an insulating medium 61 extending in the arrangement direction X of the main electrode terminals 5a and 5b to straddle the steps is inserted between the main electrode terminals 5a and 5b. By inserting the insulating medium 61, the bus bar terminal 21b is connected to the upper surface of the main electrode terminal 5b, and the bus bar terminal 21a is connected to the lower surface of the main electrode terminal 5a.

[0030] In addition, in Figure 5 , it is configured such that the main electrode terminal 5a at a high potential is located on the side closer to the bottom surface BF of the semiconductor module 1, and the main electrode terminal 5b at a low potential is located on the opposite side, but the vertical relationship between the main electrode terminals 5a and 5b may be reversed.

[0031] By inserting the insulating medium 61 between the main electrode terminals 5a and 5b having steps and arranged at different positions, the space insulation distance between the main electrode terminals 5a and 5b can be maintained, and thus the length in the X direction, i.e., the terminal width, of the main electrode terminals 5a and 5b can be greatly increased. For example, the terminal width can be expanded to the extent that the terminal surfaces of the main electrode terminals 5a and 5b overlap each other when viewed from the Z direction.

[0032] Therefore, without increasing the size of the semiconductor module 1, more current can flow, and the heat dissipation at the terminal portion becomes large, and the heat generation can be reduced. In addition, since the insulating medium 61 is arranged between the main electrode terminal 5a and the main electrode terminal 5b, the alignment and the like become easy.

[0033] Figure 6 FIG. 5 is a top view for explaining the structure of the power semiconductor device 200 according to Embodiment 2 of the present disclosure. In addition, in Figure 6 , the same reference numerals are given to the same structures as those of the power semiconductor device 100 described using Figure 1 , and the repeated description is omitted.

[0034] As Figure 6As shown, in the power semiconductor device 200, an insulating medium 61 extending in the arrangement direction of the main electrode terminals 5a and 5b, that is, the X direction, is inserted between the main electrode terminals 5a and 5b of each semiconductor module 1. In addition, since the main electrode terminal 5a is covered by the insulating medium 61, it cannot be recognized.

[0035] The insulating medium 61 can be made of the same material as the insulating medium 6 described in the first embodiment, but an insulator sheet 3 inserted between the bus bars 2a and 2b can also be extended to be used as the insulating medium 61. By extending the insulator sheet 3 to form the insulating medium 61, the insertion process of the insulating medium 61 is not required, and the manufacturing process can be reduced.

[0036] <Modification Example> Figure 7 FIG. is a side view of the semiconductor module 1 in the power semiconductor device 201 which is a modification example of the second embodiment of the present disclosure, as viewed from the side of the sides protruding from the main electrode terminals 5a and 5b.

[0037] As Figure 7 shown, the semiconductor module 1 is configured such that the main electrode terminals 5a and 5b are arranged at different positions in a stepped manner in the terminal positions in the thickness direction of the semiconductor module 1, that is, the Z direction, and the control terminal CT is arranged on the side closer to the bottom surface BF of the semiconductor module 1 in the terminal position in the Z direction to form the same plane as the main electrode terminal 5a. Moreover, an insulating medium 62 extending in the X direction is inserted between the main electrode terminals 5a and 5b arranged at different positions in the Z direction and the control terminal CT. The insulating medium 62 is provided to cover the main electrode terminal 5a and the control terminal CT. By inserting the insulating medium 62, the bus bar terminal 21b is connected to the upper surface of the main electrode terminal 5b, and the bus bar terminal 21a is connected to the lower surface of the main electrode terminal 5a.

[0038] By inserting the insulating medium 62 between the main electrode terminals 5a and 5b arranged at different positions in the Z direction, the space insulation distance between the main electrode terminals 5a and 5b can be maintained. Therefore, the length of the main electrode terminals 5a and 5b in the X direction, that is, the terminal width, can be greatly increased, which is the same as the power semiconductor device 200 of the second embodiment.

[0039] Figure 8 FIG. is a top view for explaining the structure of the power semiconductor device 201 which is a modification example of the second embodiment of the present disclosure. In addition, in Figure 8 for the same structure as the power semiconductor device 100 described using Figure 1 the same reference numerals are assigned, and repeated explanations are omitted.

[0040] As Figure 8As shown, in the power semiconductor device 201, an insulating medium 62 extending in the X direction is inserted between the main electrode terminals 5a and 5b and the control terminal CT of each semiconductor module 1. In addition, since the main electrode terminal 5a is covered by the insulating medium 62, it cannot be recognized.

[0041] As Figure 8 shown, the insulating medium 62 can be integrally provided to straddle the entire terminal portion of the arrangement of a plurality of semiconductor modules 1. Therefore, compared with the power semiconductor device 200 in which the insulating medium 61 is arranged for each semiconductor module 1, the workability during assembly is improved.

[0042] In addition, in Figure 7 the semiconductor module 1 shown, as the distance in the X direction, the main electrode terminal 5b that becomes the low potential is arranged near the control terminal CT, and the main electrode terminal 5a that becomes the high potential is arranged at a position far from the control terminal CT. However, when the main electrode terminal 5a is arranged near the control terminal CT, by covering the control terminal CT with the insulating medium 62, the spatial insulation distance between the main electrode terminal 5a and the control terminal CT can be ensured, and the effect of suppressing the insulation breakdown between the main electrode terminal 5a and the control terminal CT can be obtained.

[0043] The insulating medium 62 may be made of the same material as the insulating medium 6 described in the first embodiment, but the insulator sheet 3 inserted between the bus bars 2a and 2b may also be extended to be used as the insulating medium 62. By extending the insulator sheet 3 to form the insulating medium 62, the insertion process of the insulating medium 62 is not required, and the manufacturing process can be reduced.

[0044] <Embodiment 3> Figure 9 is a top view of the semiconductor module 1 in the power semiconductor device 300 according to the third embodiment of the present disclosure as viewed from the upper surface.

[0045] Figure 10 and Figure 11 is a side view of the semiconductor module 1 as viewed from the long side side orthogonal to the short side side where the main electrode terminals 5a and 5b and the output terminal 10 protrude, Figure 9 is a side view when the semiconductor module 1 is viewed, Figure 10 is equivalent to Figure 9 a side view of a cross-sectional view taken along line A-A in Figure 11 is equivalent to Figure 9 a side view of a cross-sectional view taken along line B-B in

[0046] As Figures 9 - 11As shown, except for the front end portion, the main electrode terminal 5b is covered by the transfer molding resin MD of the semiconductor module 1, and the bus bar terminal 21b is connected to the front end portion. On the other hand, the main electrode terminal 5a is not covered by the transfer molding resin, and the bus bar terminal 21a is connected to the entire portion protruding from the side surface of the semiconductor module 1. Alternatively, the main electrode terminal 5a may be covered by the transfer molding resin MD.

[0047] In this way, by covering at least one of the main electrode terminals 5a and 5b with resin, the space insulation distance between the main electrode terminal 5a and the main electrode terminal 5b can be further shortened, and the length of the main electrode terminals 5a and 5b in the X direction, i.e., the terminal width, can be increased. In addition, by extending the bus bar terminal 21a to the vicinity of the semiconductor module 1 and connecting it to the main electrode terminal 5a, the thickness of the terminal portion becomes thicker, the current capacity can be further increased, and the temperature rise can be further suppressed.

[0048] <Embodiment 4> Figure 12 It is a side view when observing the semiconductor module 1 in the power semiconductor device 400 according to the fourth embodiment of the present disclosure from the side surface side where the main electrode terminals 5a and 5b protrude.

[0049] As Figure 12 shown, in the semiconductor module 1, the terminal positions of the main electrode terminals 5a and 5b in the thickness direction of the semiconductor module 1, i.e., the Z direction, are the same, and an insulating medium 63 having a bent portion in a stepped manner in the up and down direction, i.e., the Z direction, and extending in the X direction is inserted between the terminals.

[0050] The insulating medium 63 has steps to cover the upper surface of the main electrode terminal 5a and the lower surface of the main electrode terminal 5b. By inserting the insulating medium 63, the bus bar terminal 21b is connected to the upper surface of the main electrode terminal 5b, and the bus bar terminal 21a is connected to the lower surface of the main electrode terminal 5a.

[0051] By inserting an insulating medium 63 having steps in the Z direction between the terminals, the space insulation distance between the main electrode terminals 5a and 5b can be maintained, so the length of the main electrode terminals 5a and 5b in the X direction, i.e., the terminal width, can be increased.

[0052] Therefore, without increasing the size of the semiconductor module 1, more current can flow, and the heat dissipation at the terminal portion becomes larger, and the heat generation can be reduced.

[0053] The insulating medium 63 may be made of the same material as the insulating medium 6 described in Embodiment 1, but the insulating sheet 3 inserted between the bus bars 2a and 2b may also be extended to serve as the insulating medium 63. By extending the insulating sheet 3 to form the insulating medium 63, the insertion process of the insulating medium 63 is not required, and the manufacturing process can be reduced.

[0054] <Variant Example> Figure 13 It is a side view when observing the semiconductor module 1 in the power semiconductor device 401 which is a variant example of Embodiment 4 according to the present disclosure from the side where the main electrode terminals 5a and 5b protrude.

[0055] As Figure 13 shown, in the semiconductor module 1, the main electrode terminals 5a and 5b have the same terminal positions in the thickness direction of the semiconductor module 1, that is, the Z direction, and an insulating medium 64 having a bent portion in a stepped manner in the up-and-down direction, that is, the Z direction and extending in the X direction is inserted between the terminals.

[0056] The insulating medium 64 has steps to cover the lower surface of the main electrode terminal 5a and the upper surface of the main electrode terminal 5b. By inserting the insulating medium 64, the bus bar terminal 21b is connected to the lower surface of the main electrode terminal 5b, and the bus bar terminal 21a is connected to the upper surface of the main electrode terminal 5a.

[0057] By inserting an insulating medium 64 having steps in the Z direction between the terminals, the space insulation distance between the main electrode terminals 5a and 5b can be maintained, so the length of the main electrode terminals 5a and 5b in the X direction, that is, the terminal width, can be increased.

[0058] Therefore, without increasing the size of the semiconductor module 1, more current can flow, and the heat dissipation at the terminal portion becomes larger, and heat generation can be reduced.

[0059] The insulating medium 64 may be made of the same material as the insulating medium 6 described in Embodiment 1, but the insulating sheet 3 inserted between the bus bars 2a and 2b may also be extended to serve as the insulating medium 64. By extending the insulating sheet 3 to form the insulating medium 64, the insertion process of the insulating medium 64 is not required, and the manufacturing process can be reduced.

[0060] <Embodiment 5> Figure 14 It is a side view when observing the semiconductor module 1 in the power semiconductor device 500 of Embodiment 5 according to the present disclosure from the side where the main electrode terminals 5a and 5b protrude.

[0061] As Figure 14As shown, in the semiconductor module 1, the main electrode terminals 5a and 5b have the same terminal positions in the thickness direction of the semiconductor module 1, i.e., the Z direction, and the bus bar terminals 21a and 21b are connected in such a way as to respectively surround the main electrode terminals 5a and 5b. Between the adjacent bus bar terminals 21a and 21b, an insulating medium 65 is arranged to maintain the space insulation distance between the two terminals.

[0062] By respectively surrounding the main electrode terminals 5a and 5b with the bus bar terminals 21a and 21b, the contact area between the main electrode terminals and the bus bar terminals can be increased, the thickness of the terminal part becomes thicker, and the temperature rise can be further suppressed.

[0063] On the other hand, the distance between the bus bar terminals 21a and 21b is shortened, but by providing the insulating medium 65, it is easy to ensure the space insulation distance.

[0064] In addition, the bus bar terminals 21a and 21b are formed in a cylindrical shape so as to be able to respectively surround the main electrode terminals 5a and 5b in advance. During assembly, the bus bar terminals 21a and 21b are respectively inserted into the main electrode terminals 5a and 5b, and pressure is applied from the outside of the bus bar terminals 21a and 21b through riveting, whereby the bus bar terminals 21a and 21b can be respectively connected to the main electrode terminals 5a and 5b.

[0065] In addition, within the scope of the present disclosure, the various embodiments can be freely combined, or the various embodiments can be appropriately deformed or omitted.

[0066] The present disclosure described above is summarized and recorded as an appendix.

[0067] (Appendix 1) A power semiconductor device, comprising: a plurality of semiconductor modules; and a first bus bar and a second bus bar, the first bus bar and the second bus bar being respectively electrically connected to the first main electrode terminal and the second main electrode terminal of each semiconductor module of the plurality of semiconductor modules, the plurality of semiconductor modules are arranged without overlapping in a first direction as the thickness direction, the first and second main electrode terminals protrude from one side surface of the semiconductor module, and are adjacently arranged at intervals in a second direction as the arrangement direction of the plurality of semiconductor modules, and an insulating medium is inserted between the first and second main electrode terminals.

[0068] (Appendix 2) The power semiconductor device according to Appendix 1, the insulating medium is inserted between the first and second main electrode terminals in the second direction of the first and second main electrode terminals.

[0069] (Supplementary Note 3) The semiconductor device for power use as described in Supplementary Note 2, The insulating medium is composed of a sheet-like insulating material.

[0070] (Supplementary Note 4) The semiconductor device for power use as described in Supplementary Note 2, The insulating medium is composed of a hollow cylindrical insulating material.

[0071] (Supplementary Note 5) The semiconductor device for power use as described in Supplementary Note 1, The first and second main electrode terminals are arranged at different positions on the one side surface in a manner that has a step in the first direction of the semiconductor module, The insulating medium is inserted in a manner that straddles between the steps of the first and second main electrode terminals and extends in the second direction.

[0072] (Supplementary Note 6) The semiconductor device for power use as described in Supplementary Note 5, The semiconductor module has a plurality of control terminals protruding from the one side surface, The plurality of control terminals are respectively arranged at positions different from the first and second main electrode terminals in the second direction, and are all arranged at the same position as one of the first and second main electrode terminals in the first direction, The insulating medium extends along the second direction to cover the plurality of control terminals as well.

[0073] (Supplementary Note 7) The semiconductor device for power use as described in Supplementary Note 1, The first and second main electrode terminals are arranged at the same position in the first direction on the one side surface of the semiconductor module, The insulating medium is inserted between the first main electrode terminal and the second main electrode terminal, has a bent portion in a manner that has a step in the first direction, and extends along the second direction.

[0074] (Supplementary Note 8) The semiconductor device for power use as described in Supplementary Note 1, The first bus bar has a first bus bar terminal connected to the first main electrode terminal, The second bus bar has a second bus bar terminal connected to the second main electrode terminal, The first bus bar terminal is connected to the first main electrode terminal to surround the first main electrode terminal, The second bus bar terminal is connected to the second main electrode terminal to surround the second main electrode terminal, The insulating medium is inserted between the first and second main electrode terminals surrounded by the first and second bus bar terminals in the second direction of the first and second main electrode terminals, respectively.

[0075] (Supplementary Note 9) The semiconductor device for power use according to any one of Supplementary Notes 5 to 8, The first and second bus bars are arranged opposite to each other at intervals in the first direction, An insulator sheet is disposed between the first bus bar and the second bus bar, A part of the insulator sheet is extended to form the insulating medium.

[0076] (Supplementary Note 10) A semiconductor device for power use, comprising: A plurality of semiconductor modules; and A first bus bar and a second bus bar, the first bus bar and the second bus bar being electrically connected to the first main electrode terminal and the second main electrode terminal of each semiconductor module of the plurality of semiconductor modules, respectively, The plurality of semiconductor modules are arranged without overlapping in the first direction as the thickness direction, The first bus bar has a first bus bar terminal connected to the first main electrode terminal, The second bus bar has a second bus bar terminal connected to the second main electrode terminal, The first and second main electrode terminals are arranged adjacent to each other at intervals in the second direction as the arrangement direction of the plurality of semiconductor modules, The first main electrode terminal protrudes from one side surface of the semiconductor module, The second main electrode terminal is covered with a transfer molding resin forming the semiconductor module except for the front end portion, The first bus bar terminal is formed to have a length connected in such a manner as to cover the protruding portion of the first main electrode terminal, The second bus bar terminal is formed to have a length connected in such a manner as to cover the front end portion of the second main electrode terminal. Reference Numeral Explanation

[0077] 1 Semiconductor module, 2a, 2b Bus bar, 3 Insulator sheet, 5a, 5b Main electrode terminal, 6, 60 - 65 Insulating medium, CT Control terminal, MD Transfer molding resin.

Claims

1. A semiconductor device for power, characterized in that, Comprising: A plurality of semiconductor modules; And A first bus bar and a second bus bar, the first bus bar and the second bus bar are electrically connected to the first main electrode terminal and the second main electrode terminal of each semiconductor module of the plurality of semiconductor modules respectively, The plurality of semiconductor modules are arranged without overlapping in a first direction which is a thickness direction, The first main electrode terminal and the second main electrode terminal protrude from one side surface of the semiconductor module, and are arranged adjacent to each other with an interval therebetween in a second direction which is an arrangement direction of the plurality of semiconductor modules, and an insulating medium is inserted between the first main electrode terminal and the second main electrode terminal.

2. The semiconductor device for power use according to claim 1, wherein The insulating medium is inserted between the first main electrode terminal and the second main electrode terminal in the second direction of the first main electrode terminal and the second main electrode terminal.

3. The semiconductor device for power use according to claim 2, wherein The insulating medium is composed of a sheet-like insulating material.

4. The semiconductor device for power use according to claim 2, wherein The insulating medium is composed of a hollow cylindrical insulating material.

5. The semiconductor device for power use according to claim 1, wherein The first main electrode terminal and the second main electrode terminal are arranged at different positions on the one side surface in a manner of having a step in the first direction of the semiconductor module, The insulating medium is inserted in a manner of extending in the second direction across between the steps of the first main electrode terminal and the second main electrode terminal.

6. The semiconductor device for power use according to claim 5, wherein The semiconductor module has a plurality of control terminals protruding from the one side surface, The plurality of control terminals are respectively arranged at positions different from the first main electrode terminal and the second main electrode terminal in the second direction, and are all arranged at positions the same as one of the first main electrode terminal and the second main electrode terminal in the first direction, The insulating medium extends along the second direction to cover the plurality of control terminals as well.

7. The semiconductor device for power use according to claim 1, wherein The first main electrode terminal and the second main electrode terminal are arranged at the same position on the one side surface in the first direction of the semiconductor module, The insulating medium is inserted between the first main electrode terminal and the second main electrode terminal, has a bent portion in a manner of having a step in the first direction and extends along the second direction.

8. The semiconductor device for power use according to claim 1, wherein The first bus bar has a first bus bar terminal connected to the first main electrode terminal, The second bus bar has a second bus bar terminal connected to the second main electrode terminal, The first bus bar terminal is connected to the first main electrode terminal to surround the first main electrode terminal, The second bus bar terminal is connected to the second main electrode terminal to surround the second main electrode terminal, The insulating medium is inserted between the first main electrode terminal and the second main electrode terminal, which are surrounded by the first bus bar terminal and the second bus bar terminal, respectively, in the second direction of the first main electrode terminal and the second main electrode terminal.

9. The semiconductor device for power use according to any one of claims 5 to 8, characterized in that the first bus bar and the second bus bar are oppositely arranged at intervals in the first direction, an insulator sheet is arranged between the first bus bar and the second bus bar, a part of the insulator sheet is extended to form the insulating medium.

10. A semiconductor device for power, characterized in that, Comprising: a plurality of semiconductor modules; and a first bus bar and a second bus bar, the first bus bar and the second bus bar are respectively electrically connected to the first main electrode terminal and the second main electrode terminal of each semiconductor module of the plurality of semiconductor modules, the plurality of semiconductor modules are arranged without overlapping in the first direction as the thickness direction, the first bus bar has a first bus bar terminal connected to the first main electrode terminal, the second bus bar has a second bus bar terminal connected to the second main electrode terminal, the first main electrode terminal and the second main electrode terminal are adjacently arranged at intervals in the second direction as the arrangement direction of the plurality of semiconductor modules, the first main electrode terminal protrudes from one side surface of the semiconductor module, the second main electrode terminal is covered by the molding resin constituting the semiconductor module except for the front end portion, the first bus bar terminal is formed to have a length connected in a manner of covering the protruding portion of the first main electrode terminal, the second bus bar terminal is formed to have a length connected in a manner of covering the front end portion of the second main electrode terminal.

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