Oscillation circuit and electronic device

Through the combination of high-precision oscillation module and negative resistance enhancement module, the quartz crystal oscillator generates a target oscillation signal after two start-ups, solving the problems of long start-up time and large power consumption, and achieving the effects of fast start-up and low power consumption.

CN120342330APending Publication Date: 2025-07-18BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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Patent Information

Application Number
CN202510394391.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-31
Publication Date
2025-07-18

AI Technical Summary

Technical Problem

It often takes hundreds or even milliseconds to output the clock signal from the start of the crystal oscillator, which leads to a large power consumption during the start of the vibration and requires optimization.

Method used

The jitter signal is provided to accelerate the first start of the quartz crystal by providing a jitter signal, and then the negative resistance enhancement module is used to provide a negative resistance value of 1,000 ohms to accelerate the second start of the quartz crystal, reducing the start time.

Benefits of technology

The start-up time of the quartz crystal is greatly reduced, from 2ms to 100us, reducing the power consumption of the oscillation circuit.

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Patent Text Reader

Abstract

The embodiment of the invention discloses an oscillation circuit and electronic equipment. The oscillation circuit comprises a quartz crystal; the high-precision oscillation module is connected with the two ends of the quartz crystal and is used for providing a jitter signal for the two ends of the quartz crystal so as to enable the quartz crystal to start oscillation for the first time; and the negative resistance enhancing module is connected with the two ends of the quartz crystal, and provides a negative resistance value for the quartz crystal after the quartz crystal starts oscillation for the first time, so that the quartz crystal performs oscillation starting for the second time, and the quartz crystal generates a target oscillation signal after oscillation starting for two times. According to the oscillation circuit and the electronic equipment provided by the embodiment of the invention, the oscillation starting of the crystal in the crystal oscillation module is accelerated through the jitter signal provided by the high-precision oscillation module, and then the oscillation starting of the crystal is accelerated again through the negative resistance enhancement module, so that the oscillation starting time of the crystal is greatly shortened, and the required power consumption is greatly reduced.
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Description

Technical Field

[0001] This application relates to the technical field of analog circuits, and particularly to an oscillation circuit and an electronic device. Background Art

[0002] In recent years, with the rapid development of Internet of Things technology devices, in order to ensure a relatively long available duration for each device, it is necessary to optimize the power consumption of the chips of the device. Therefore, the power consumption requirements for its integrated circuits are very strict. To reduce the power consumption of such chips, the system often needs to repeatedly switch between the working state and the sleep state, that is, to perform periodic work. And it is in the sleep mode for a long time and only works normally when transmitting or receiving data.

[0003] The wake-up and sleep of such chips are inseparable from the participation of the clock module. In an electronic device, the clock module is a very crucial component. Its main function is to generate the clock signal required for the system operation, provide a stable and accurate time reference for each chip and circuit component, and ensure the coordinated operation of the entire electronic system.

[0004] The clock module generally consists of an oscillator circuit to generate the corresponding required frequency clock. Among many oscillators, the crystal oscillator stands out due to its high Q value characteristic. A high Q value means it has excellent frequency selection characteristics, can effectively suppress the interference of other spurious oscillation signals, and makes the stability of the generated clock frequency far better than that of other types of oscillators. Therefore, in chip systems with high requirements for clock frequency stability, crystal oscillators are widely used as the system clock signal source.

[0005] In the process of implementing this application, the inventors found that the above technology has at least the following defects: The crystal oscillator often takes hundreds of microseconds or even several milliseconds from starting to oscillate to output a clock signal and start working. Therefore, the power consumption during the startup process is large and needs to be optimized. Summary of the Invention

[0006] In view of the above problems, the purpose of the embodiments of this application is to provide an oscillation circuit and an electronic device, which use the jitter signal provided by a high-precision oscillation module to accelerate the oscillation of the crystal in the crystal oscillation module, and then use a negative resistance enhancement module to accelerate the crystal oscillation again, thereby greatly reducing the crystal startup time and the required power consumption.

[0007] According to one aspect of the embodiments of the present application, an oscillation circuit is provided, which includes: a quartz crystal; a high-precision oscillation module connected to both ends of the quartz crystal for providing a jitter signal to both ends of the quartz crystal to cause the quartz crystal to oscillate for the first time; a negative resistance enhancement module connected to both ends of the quartz crystal for providing a negative resistance value to the quartz crystal after the quartz crystal oscillates for the first time to cause the quartz crystal to oscillate for the second time, wherein the quartz crystal generates a target oscillation signal after the two oscillations.

[0008] Optionally, it further includes: a crystal oscillation module connected to both ends of the quartz crystal, and the crystal oscillation module maintains and amplifies the target oscillation signal after the quartz crystal generates the target oscillation signal.

[0009] Optionally, the jitter signal is a signal with alternating high and low frequencies having the intrinsic frequency of the quartz crystal as the intermediate frequency.

[0010] Optionally, both ends of the quartz crystal are connected to one of the crystal oscillation module, the high-precision oscillation module, and the negative resistance enhancement module at the same time.

[0011] Optionally, it further includes: a comparison module connected to the crystal oscillation module for generating a clock signal according to the amplified target oscillation signal.

[0012] Optionally, it further includes: a logic module connected to the crystal oscillation module, the high-precision oscillation module, and the negative resistance enhancement module for generating a first enable signal to a fourth enable signal.

[0013] Optionally, the first enable signal to the fourth enable signal control the connection sequence and duration of the crystal oscillation module, the high-precision oscillation module, and the negative resistance enhancement module to both ends of the quartz crystal.

[0014] Optionally, the negative resistance enhancement module includes a coupling amplification unit and a constant transconductance biasing unit.

[0015] Optionally, the coupling and amplifying unit includes: a second resistor, a first end of the second resistor being connected to a P-type bias voltage; a fifth capacitor, a first end of the fifth capacitor being connected to a first end of the quartz crystal, and a second end being connected to a second end of the second resistor; a sixth capacitor, a first end of the sixth capacitor being connected to the first end of the quartz crystal; a third resistor, a first end of the third resistor being connected to an N-type bias voltage, and a second end being connected to a second end of the sixth capacitor; a first P-type transistor, a first end of the first P-type transistor being connected to a power supply voltage, and a control end being connected to the second end of the second resistor; a first N-type transistor, a first end of the first N-type transistor being connected to a second end of the first P-type transistor, and a second end being connected to a ground terminal, and a control end being connected to the second end of the third resistor; a fourth resistor, a first end of the fourth resistor being connected to the P-type bias voltage; a seventh capacitor, a first end of the seventh capacitor being connected to the first end of the first N-type transistor, and a second end being connected to a second end of the fourth resistor; an eighth capacitor, a first end of the eighth capacitor being connected to the first end of the seventh capacitor; a fifth resistor, a first end of the fifth resistor being connected to the N-type bias voltage, and a second end being connected to a second end of the eighth capacitor; a second P-type transistor, a first end of the second P-type transistor being connected to the power supply voltage, and a control end being connected to the second end of the fourth resistor; a second N-type transistor, a first end of the second N-type transistor being connected to a second end of the second P-type transistor, and a second end being connected to the ground terminal, and a control end being connected to the second end of the fifth resistor; a sixth resistor, a first end of the sixth resistor being connected to the P-type bias voltage; a ninth capacitor, a first end of the ninth capacitor being connected to the first end of the second N-type transistor, and a second end being connected to a second end of the sixth resistor; a tenth capacitor, a first end of the tenth capacitor being connected to the first end of the ninth capacitor; a seventh resistor, a first end of the seventh resistor being connected to the N-type bias voltage, and a second end being connected to a second end of the tenth capacitor; a third P-type transistor, a first end of the third P-type transistor being connected to the power supply voltage, a second end being connected to the second end of the quartz crystal, and a control end being connected to the second end of the sixth resistor; a third N-type transistor, a first end of the third N-type transistor being connected to a second end of the third P-type transistor, and a second end being connected to the ground terminal, and a control end being connected to the second end of the seventh resistor; a third capacitor, a first end of the third capacitor being connected to the first end of the fifth capacitor, and a second end being connected to the first end of the second N-type transistor; a fourth capacitor, a first end of the fourth capacitor being connected to the first end of the third capacitor, and a second end being connected to the first end of the first N-type transistor.

[0016] Optionally, the constant transconductance bias unit includes: an eleventh capacitor, a first end of the eleventh capacitor is connected to a P-type bias voltage terminal, and a second end is connected to a power supply terminal; a fourth P-type transistor, a first end of the fourth P-type transistor is connected to a power supply voltage, and a control end is connected to the first end of the eleventh capacitor; a fifth P-type transistor, a first end of the fifth P-type transistor is connected to the power supply voltage, and a control end is connected to the control end of the fourth P-type transistor; a twelfth capacitor, a first end of the twelfth capacitor is connected to an N-type bias voltage terminal, and a second end is connected to a ground terminal; a fourth N-type transistor, a first end of the fourth N-type transistor is connected to a second end of the fourth P-type transistor, and a control end is connected to the first end of the twelfth capacitor; a fifth N-type transistor, a first end of the fifth N-type transistor is connected to a second end of the fifth P-type transistor, a control end is connected to the control end of the fourth P-type transistor, a second end is connected to the ground terminal, and the first end of the fifth N-type transistor is further connected to a control end; an eighth resistor, a first end of the eighth resistor is connected to a second end of the fourth N-type transistor, and a second end is connected to the ground terminal; an amplifier, a positive input terminal of the amplifier is connected to the first end of the fourth N-type transistor, a negative input terminal is connected to the first end of the fifth N-type transistor, and an output terminal is connected to the control end of the fourth P-type transistor.

[0017] Optionally, the crystal oscillation module includes: a current source, the first end of which is connected to a power supply voltage; a first resistor, the first end of which is connected to the second end of the current source; a first transistor, the first end of which is connected to the second end of the current source, the second end of which is connected to a ground terminal, and the control end of which is connected to the second end of the first resistor; a first selector, the first end of which is connected to the negative resistance enhancement module, the second end of which is connected to the second end of the first resistor, and the control end of which is connected to the logic module to receive the third enable signal; a second selector, the first end of which is connected to the third end of the first selector, the second end of which is connected to the output end of the high-precision oscillation module, and the control end of which is connected to the logic module to receive the fourth enable signal; a third selector, the first end of which is connected to the negative resistance enhancement module, the second end of which is connected to the first end of the first resistor, and the control end of which is connected to the logic module to receive the third enable signal; a fourth selector, the first end of which is connected to the third end of the third selector, and the control end of which is connected to the logic module to receive the fourth enable signal; an inverter, the first end of which is connected to the output end of the high-precision oscillation module, and the second end of which is connected to the second end of the fourth selector; a first capacitor, the first end of which is connected to the first end of the second selector, and the second end of which is connected to the ground terminal; a second capacitor, the first end of which is connected to the first end of the fourth selector, and the second end of which is connected to the ground terminal, wherein the first end of the quartz crystal is connected to the third end of the second selector, and the second end of the quartz crystal is connected to the third end of the fourth selector.

[0018] Optionally, the comparison module includes: a comparator, the positive input terminal of which is connected to the second end of the quartz crystal, the negative input terminal of which is connected to the first end of the quartz crystal, and the output terminal of which is connected to a clock signal output terminal; wherein the output terminal of the comparator is further connected to the logic module.

[0019] According to another aspect of the embodiments of the present application, an electronic device is provided, which includes the oscillation circuit provided in any embodiment of the present application.

[0020] The oscillation circuit and the electronic device provided by the embodiments of the present application, the oscillation circuit includes: a quartz crystal, a high-precision oscillation module and a negative resistance enhancement module, wherein, after the oscillation circuit starts to work, the high-precision oscillation module first provides a jitter signal to provide energy for the quartz crystal so that the quartz crystal starts to oscillate for the first time; then the negative resistance enhancement module is connected to both ends of the quartz crystal, so that the negative resistance value at both ends of the quartz crystal reaches the kiloohm level, so as to reduce the energy loss of the loop during the second oscillation of the quartz crystal, thereby greatly reducing the crystal startup time, and the reduction of the startup time also reduces the power consumption required by the oscillation circuit. Description of the Drawings

[0021] Through the following description of the embodiments of the present application with reference to the accompanying drawings, the above and other objects, features, and advantages of the present application will become clearer. In the drawings:

[0022] Figure 1 Shows the circuit structure diagram of the oscillation circuit provided by the embodiment of the present application;

[0023] Figure 2 Shows the circuit structure diagram of the coupling amplification unit in the negative resistance enhancement module of the oscillation circuit provided by the embodiment of the present application;

[0024] Figure 3 Shows the circuit structure diagram of the constant transconductance biasing unit in the negative resistance enhancement module of the oscillation circuit provided by the embodiment of the present application;

[0025] Figure 4 Shows the schematic structural diagram of the electronic device provided by the embodiment of the present application. Detailed Description of the Embodiments

[0026] The following will describe various embodiments of the present application in more detail with reference to the accompanying drawings. In each drawing, the same elements are denoted by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0027] The following will further describe in detail the specific embodiments of the present application in conjunction with the drawings and embodiments.

[0028] Figure 1 Shows the circuit structure diagram of the oscillation circuit according to the embodiment of the present application; Figure 2 Shows the circuit structure diagram of the coupling amplification unit in the negative resistance enhancement module of the oscillation circuit according to the embodiment of the present application; Figure 3 Shows the circuit structure diagram of the constant transconductance biasing unit in the negative resistance enhancement module of the oscillation circuit according to the embodiment of the present application; Figure 4 Shows the schematic structural diagram of the electronic device according to the embodiment of the present application.

[0029] In a simple embodiment, referring to Figure 1 , the oscillation circuit 100 of the embodiment of the present application includes: a quartz crystal XTAL, a high-precision oscillation module 130, and a negative resistance enhancement module 110. Among them, the high-precision oscillation module 130 and the negative resistance enhancement module 110 are respectively connected to both ends of the quartz crystal XTAL.

[0030] Among them, the high-precision oscillation module 130 is used to generate a jitter signal with alternating high and low frequencies centered on the intrinsic frequency of the quartz crystal XTAL. This jitter signal is injected across the quartz crystal XTAL to provide initial energy, enabling the quartz crystal XTAL to generate an initial signal in a relatively short time. Therefore, the high-precision oscillation module 130 provides the jitter signal to the quartz crystal XTAL to cause the quartz crystal XTAL to start oscillating for the first time. Among them, after the electronic device is powered on or wakes up from sleep, the quartz crystal XTAL starts to oscillate. The high-precision oscillation module 130 disconnects from the quartz crystal XTAL after the quartz crystal XTAL starts oscillating for the first time.

[0031] The jitter signal provided by the high-precision oscillation module 130 to the quartz crystal XTAL is a signal with alternating high and low frequencies centered on the intrinsic frequency of the quartz crystal XTAL. Specifically, this jitter signal is generated by configuring the reference voltage in the high-precision oscillation module 130 through register configuration bits, and the frequency of the jitter signal output by the high-precision oscillation module 130 is adjusted through the reference voltage to ensure that the frequency of this jitter signal is not affected by the power supply and temperature, thereby improving the stability of the oscillation signal generated by the oscillation circuit 100.

[0032] The negative resistance enhancement module 110 is connected across the quartz crystal XTAL via the crystal oscillation module 140, and is used to provide negative resistance to the quartz crystal XTAL after the quartz crystal XTAL starts oscillating for the first time, enabling the quartz crystal XTAL to start oscillating for the second time, so as to shorten the startup time of the quartz crystal XTAL, accelerate the startup speed, and reduce the energy consumption during wake-up. The negative resistance enhancement module 110 includes a coupling amplification unit 111 and a constant transconductance biasing unit 112.

[0033] Among them, the negative resistance enhancement module 110 can provide a negative resistance value in the order of kiloohms (KΩ) across the quartz crystal XTAL, which is much larger than the negative resistance value achieved by the startup level of ordinary crystal oscillators, so that the startup time of the oscillation circuit 100 is shortened from 2 ms to 100 μs, greatly reducing the time required for the quartz crystal XTAL to start oscillating. The negative resistance enhancement module 110 of the present application is specifically a three-stage AC-coupled negative resistance enhancement amplifier.

[0034] The quartz crystal XTAL connected to the high-precision oscillation module 130 and the negative resistance enhancement module 110 generates a target oscillation signal after two startups. Due to the two-stage acceleration of startup, the startup time of this oscillation circuit 100 is shortened from 2 ms to 100 μs, greatly reducing the time required for startup, and thus reducing the power consumption during startup.

[0035] In a preferred embodiment, the oscillation circuit 100 includes: a quartz crystal XTAL, a high-precision oscillation module 130, a negative resistance enhancement module 110, and a crystal oscillation module 140. Parts that are the same as those in the foregoing embodiments will not be described herein again, and only the differences will be described.

[0036] Among them, the crystal oscillation module 140 is connected to both ends of the quartz crystal XTAL. After the quartz crystal XTAL undergoes secondary startup to generate a target oscillation signal, the crystal oscillation module 140 maintains the target oscillation signal generated by the quartz crystal XTAL and amplifies it, so that the oscillation circuit 100 can generate a stable target oscillation signal in a relatively short time.

[0037] The crystal oscillation module 140 includes a steady-state Pierce amplifier unit for amplifying the target oscillation signal generated by the quartz crystal XTAL and maintaining the stability of the target oscillation signal.

[0038] In this embodiment, the high-precision oscillation module 130, the negative resistance enhancement module 110, and the crystal oscillation module 140 are sequentially connected to both ends of the quartz crystal XTAL. Therefore, at the same time, the quartz crystal XTAL is only connected to one of the crystal oscillation module 140, the high-precision oscillation module 130, and the negative resistance enhancement module 110.

[0039] In another preferred embodiment, the oscillation circuit 100 includes: a quartz crystal XTAL, a negative resistance enhancement module 110, a high-precision oscillation module 130, a crystal oscillation module 140, and a comparison module 150. Parts that are the same as those in the foregoing embodiments will not be described herein again, and only the differences will be described.

[0040] Among them, the comparison module 150 is connected to the crystal oscillation module 140 and is used to generate a clock signal according to the amplified target oscillation signal output by the crystal oscillation module 140. Specifically, the first end X1 and the second end X2 of the quartz crystal XTAL are respectively the first output end and the second output end of the crystal oscillation module 140.

[0041] The comparison module 150 includes a comparator U1. The positive input terminal of the comparator U1 is connected to the second end X2 of the quartz crystal XTAL, the negative input terminal is connected to the first end X1 of the quartz crystal XTAL, and the output terminal is connected to the clock signal output terminal OUT_CLK of the oscillation circuit 100.

[0042] In another preferred embodiment, as Figure 1 shown, the oscillation circuit 100 includes: a quartz crystal XTAL, a negative resistance enhancement module 110, a logic module 120, a high-precision oscillation module 130, a crystal oscillation module 140, and a comparison module 150. Parts that are the same as those in the foregoing embodiments will not be described herein again, and only the differences will be described.

[0043] Among them, the logic module 120 is connected to the negative resistance enhancement module 110, the high-precision oscillation module 130, and the crystal oscillation module 140. The logic module 120 serves as the brain of the oscillation circuit 100 and is used to provide enable signals to the negative resistance enhancement module 110, the high-precision oscillation module 130, and the crystal oscillation module 140 to control the working time and sequence among the modules. In this embodiment, the logic module 120 provides a first enable signal EN1 to the negative resistance enhancement module 110, a second enable signal EN2 to the high-precision oscillation module 130, and a third enable signal EN3 and a fourth enable signal EN4 to the crystal oscillation module 140.

[0044] Among them, the logic module 120 can adjust the effective time of the first enable signal EN1 to the fourth enable signal EN4 by adjusting the register configuration, so as to find the optimal enable time of the three modules of the negative resistance enhancement module 110, the high-precision oscillation module 130, and the crystal oscillation module 140, and thus greatly reduce the startup time of the oscillation circuit. In addition, the output end of the comparator U1 in the comparison module 150 is also connected to the logic module 120, and the logic module 120 can also control the selector and switch in the circuit to control the current path in the circuit.

[0045] In Figure 1 In the shown embodiment, after the oscillation circuit 100 is powered on, according to the second enable signal EN2 and the fourth enable signal EN4 provided by the logic module 120, the first end X1 and the second end X2 of the quartz crystal XTAL are first connected to the high-precision oscillation module 130. The high-precision oscillation module 130 generates a jitter signal with alternating high and low frequencies having the intrinsic frequency of the quartz crystal XTAL as the intermediate frequency. This jitter signal is injected into both ends of the quartz crystal XTAL to provide initial energy, so that the quartz crystal XTAL can start oscillating for the first time in a short time and generate an initial signal. After a certain time, the high-precision oscillation module 130 is turned off. According to the first enable signal EN1, the third enable signal EN3, and the fourth enable signal EN4 provided by the logic module 120, the first end X1 and the second end X2 of the quartz crystal XTAL are connected to the negative resistance enhancement module 110. According to the negative resistance value provided by the negative resistance enhancement module 110, the quartz crystal XTAL starts oscillating for the second time and is a fast startup; when the quartz crystal XTAL completely starts oscillating to generate the target oscillation signal, the negative resistance enhancement module 110 is turned off, and according to the third enable signal EN3 and the fourth enable signal EN4 provided by the logic module 120, the quartz crystal XTAL is connected to the crystal oscillation module 140. The crystal oscillation module 140 maintains the oscillation of the quartz crystal XTAL and amplifies the target oscillation signal; the comparison module 150 generates a clock signal according to the amplified target oscillation signal output by the crystal oscillation module 140.

[0046] Therefore, the logic circuit 120 controls the connection sequence and duration of the crystal oscillation module 140, the high-precision oscillation module 130, and the negative resistance enhancement module 110 to both ends of the quartz crystal XTAL through the first enable signal EN1 to the fourth enable signal EN4. Specifically, the logic circuit 120 changes the jitter injection time and the frequency of the jitter signal of the high-precision oscillation module 130 by adjusting the register configuration, and then controls the negative resistance value of the negative resistance enhancement module 110. Further, the logic circuit 120 can also adjust the register configuration to enable the enable signal output by the logic circuit 120 to control the enable time of the high-precision oscillation module 130 and the negative resistance enhancement module 110, and select different modules to be connected to the quartz crystal XTAL at different times, thereby improving the startup speed and obtaining the fastest startup time.

[0047] Further, as Figure 1 shown, the crystal oscillation module 140 in the foregoing embodiment includes: a current source I1, a first resistor R1, a first transistor T1, a first selector S1, a second selector S2, a third selector S3, a fourth selector S4, an inverter U2, a first capacitor C1, and a second capacitor C2.

[0048] Specifically, the first end of the current source I1 is connected to the power supply voltage VCC; the first end of the first resistor R1 is connected to the second end of the current source I1; the first end of the first transistor T1 is connected to the second end of the current source I1, the second end is connected to the ground terminal GND, and the control end is connected to the second end of the first resistor R1; the first end (0) of the first selector S1 is connected to the negative resistance enhancement module 110, the second end (1) is connected to the second end of the first resistor R1, and the control end is connected to the logic module 120 to receive the third enable signal EN3; the first end (0) of the second selector S2 is connected to the third end of the first selector S1, the second end (1) is connected to the output end of the high-precision oscillation module 130, and the control end is connected to the logic module 120 to receive the fourth enable signal EN4; the first end (0) of the third selector S3 is connected to the negative resistance enhancement module 110, the second end (1) is connected to the first end of the first resistor R1, and the control end is connected to the logic module 120 to receive the third enable signal EN3; the first end (0) of the fourth selector S4 is connected to the third end of the third selector S3, and the control end is connected to the logic module 120 to receive the fourth enable signal EN4; the first end of the inverter U2 is connected to the output end of the high-precision oscillation module 130, and the second end is connected to the second end (1) of the fourth selector S4; the first end of the first capacitor C1 is connected to the first end (0) of the second selector S2, and the second end is connected to the ground terminal GND; the first end of the second capacitor C2 is connected to the first end (0) of the fourth selector S4, and the second end is connected to the ground terminal GND. Among them, the first end X1 of the quartz crystal XTAL is connected to the third end of the second selector S2, and the second end X2 is connected to the third end of the fourth selector S4.

[0049] As Figure 2 shown, the coupling and amplification unit 111 of the negative resistance enhancement module 110 is a three-stage amplification unit, including: a second resistor R2 to a seventh resistor R7, a third capacitor C3 to a tenth capacitor C10, a first P-type transistor PM1 to a third P-type transistor PM3, and a first N-type transistor NM1 to a third N-type transistor NM3.

[0050] Specifically, the first end of the second resistor R2 is connected to the P-type bias voltage V P-bias ; the first end of the fifth capacitor C5 is connected to the first end X1 of the quartz crystal XTAL, and the second end is connected to the second end of the second resistor R2; the first end of the sixth capacitor C6 is connected to the first end X1 of the quartz crystal XTAL; the first end of the third resistor R3 is connected to the N-type bias voltage V N-bias ; the second end is connected to the second end of the sixth capacitor C6; the first end of the first P-type transistor PM1 is connected to the power supply voltage VCC, and the control end is connected to the second end of the second resistor R2; the first end of the first N-type transistor NM1 is connected to the second end of the first P-type transistor PM1, the second end is connected to the ground terminal GND, and the control end is connected to the second end of the third resistor R3; the first end of the fourth resistor R4 is connected to the P-type bias voltage V P-bias ; the first end of the seventh capacitor C7 is connected to the first end of the first N-type transistor NM1, and the second end is connected to the second end of the fourth resistor R4; the first end of the eighth capacitor C8 is connected to the first end of the seventh capacitor C7; the first end of the fifth resistor R5 is connected to the N-type bias voltage V N-bias ; the second end is connected to the second end of the eighth capacitor C8; the first end of the second P-type transistor PM2 is connected to the power supply voltage VCC, and the control end is connected to the second end of the fourth resistor R4; the first end of the second N-type transistor NM2 is connected to the second end of the second P-type transistor PM2, the second end is connected to the ground terminal GND, and the control end is connected to the second end of the fifth resistor R5; the first end of the sixth resistor R6 is connected to the P-type bias voltage V P-bias ; the first end of the ninth capacitor C9 is connected to the first end of the second N-type transistor NM2, and the second end is connected to the second end of the sixth resistor R6; the first end of the tenth capacitor C10 is connected to the first end of the ninth capacitor C9; the first end of the seventh resistor R7 is connected to the N-type bias voltage V N-biasThe first end is connected to the first end of the tenth capacitor C10, and the second end is connected to the second end of the tenth capacitor C10; the first end of the third P-type transistor PM3 is connected to the power supply voltage VCC, the second end is connected to the second end X2 of the quartz crystal XTAL, and the control end is connected to the second end of the sixth resistor R6; the first end of the third N-type transistor NM3 is connected to the second end of the third P-type transistor PM3, the second end is connected to the ground terminal GND, and the control end is connected to the second end of the seventh resistor R7; the first end of the third capacitor C3 is connected to the first end of the fifth capacitor C5, and the second end is connected to the first end of the second N-type transistor NM2; the first end of the fourth capacitor C4 is connected to the first end of the third capacitor C3, and the second end is connected to the first end of the first N-type transistor NM1.

[0051] As Figure 3 shown, the constant transconductance biasing unit 112 of the negative resistance enhancement module 110 includes: the eleventh capacitor C11, the twelfth capacitor C12, the eighth resistor R8, the fourth P-type transistor PM4, the fifth P-type transistor PM5, the fourth N-type transistor NM4, the fifth N-type transistor NM5, and the amplifier U3.

[0052] Specifically, the first end of the eleventh capacitor C11 is connected to the P-type bias voltage V P-bias terminal, and the second end is connected to the power supply terminal VCC; the first end of the fourth P-type transistor PM4 is connected to the power supply voltage VCC, and the control end is connected to the first end of the eleventh capacitor C11; the first end of the fifth P-type transistor PM5 is connected to the power supply voltage VCC, and the control end is connected to the control end of the fourth P-type transistor PM4; the first end of the twelfth capacitor C12 is connected to the N-type bias voltage V N-bias terminal, and the second end is connected to the ground terminal GND; the first end of the fourth N-type transistor NM4 is connected to the second end of the fourth P-type transistor PM4, and the control end is connected to the first end of the twelfth capacitor C12; the first end of the fifth N-type transistor NM5 is connected to the second end of the fifth P-type transistor PM5, the control end is connected to the control end of the fourth P-type transistor PM4, the second end is connected to the ground terminal, and in addition, the first end of the fifth N-type transistor NM5 is also connected to the control end; the first end of the eighth resistor R8 is connected to the second end of the fourth N-type transistor NM4, and the second end is connected to the ground terminal; the non-inverting input terminal of the amplifier U3 is connected to the first end of the fourth N-type transistor NM4, the inverting input terminal is connected to the first end of the fifth N-type transistor NM5, and the output terminal is connected to the control end of the fourth P-type transistor PM4.

[0053] Among them, the P-type bias voltage V P-bias terminal and the N-type bias voltage V N-bias terminal are the first output terminal and the second output terminal of the constant transconductance biasing unit 112 respectively, and are connected to the corresponding terminals of the coupling amplification unit 111. The P-type bias voltage V P-biasand the N-type bias voltage V N-bias is the bias voltage with stable capacitance to ground and is also the constant transconductance bias voltage.

[0054] Furthermore, the present application also provides an electronic device including the oscillation circuit as described above.

[0055] In the oscillation circuit and the electronic device provided by the embodiments of the present application, the oscillation circuit includes: a quartz crystal, a high-precision oscillation module, and a negative resistance enhancement module. After the oscillation circuit starts to work, the high-precision oscillation module first provides a jitter signal to supply energy to the quartz crystal so that the quartz crystal starts to oscillate for the first time; then the negative resistance enhancement module is connected to both ends of the quartz crystal, so that the negative resistance value at both ends of the quartz crystal reaches the kilohm level, reducing the energy loss of the loop during the second oscillation of the quartz crystal, thereby greatly reducing the crystal oscillation time, and reducing the oscillation time also reduces the power consumption required by the oscillation circuit.

[0056] As described above according to the embodiments of the present application, these embodiments do not describe all the details in detail, nor do they limit the application to only the specific embodiments described. Obviously, many modifications and variations can be made according to the above description. These embodiments are selected and specifically described in this specification to better explain the principle and practical application of the present application, so that those skilled in the art can make good use of the present application and its modifications based on the present application. The present application is only limited by the claims and their full scope and equivalents.

Claims

1. An oscillation circuit, wherein, Comprising: A quartz crystal; A high-precision oscillation module, connected to both ends of the quartz crystal, for providing a jitter signal to both ends of the quartz crystal to cause the quartz crystal to perform a first startup oscillation; A negative resistance enhancement module, connected to both ends of the quartz crystal, for providing a negative resistance value to the quartz crystal after the first startup oscillation of the quartz crystal to cause the quartz crystal to perform a second startup oscillation, wherein, the quartz crystal generates a target oscillation signal after two startup oscillations.

2. The oscillator circuit according to claim 1, wherein, Further comprising: A crystal oscillation module, connected to both ends of the quartz crystal, and the crystal oscillation module maintains the target oscillation signal and amplifies the target oscillation signal after the quartz crystal generates the target oscillation signal.

3. The oscillator circuit according to claim 1, wherein, The jitter signal is a signal with alternating high and low frequencies having the intrinsic frequency of the quartz crystal as the intermediate frequency.

4. The oscillator circuit according to claim 2, wherein, Both ends of the quartz crystal are connected to one of the crystal oscillation module, the high-precision oscillation module, and the negative resistance enhancement module at the same time.

5. The oscillator circuit according to claim 4, wherein, Further comprising: A comparison module, connected to the crystal oscillation module, for generating a clock signal according to the amplified target oscillation signal.

6. The oscillator circuit according to claim 5, wherein, Further comprising: A logic module, connected to the crystal oscillation module, the high-precision oscillation module, and the negative resistance enhancement module, for generating a first enable signal to a fourth enable signal.

7. The oscillating circuit according to claim 6, wherein, The first enable signal to the fourth enable signal control the connection sequence and duration of the crystal oscillation module, the high-precision oscillation module, and the negative resistance enhancement module to both ends of the quartz crystal.

8. The oscillator circuit according to claim 6, wherein, The negative resistance enhancement module includes a coupling amplification unit and a constant transconductance biasing unit.

9. The oscillator circuit according to claim 8, wherein, The coupling amplification unit includes: A second resistor, the first end of the second resistor is connected to a P-type bias voltage; A fifth capacitor, the first end of the fifth capacitor is connected to the first end of the quartz crystal, and the second end is connected to the second end of the second resistor; A sixth capacitor, the first end of the sixth capacitor is connected to the first end of the quartz crystal; A third resistor, the first end of the third resistor is connected to an N-type bias voltage, and the second end is connected to the second end of the sixth capacitor; A first P-type transistor, the first end of the first P-type transistor is connected to a power supply voltage, and the control end is connected to the second end of the second resistor; A first N-type transistor, the first end of the first N-type transistor is connected to the second end of the first P-type transistor, the second end is connected to a ground terminal, and the control end is connected to the second end of the third resistor; A fourth resistor, the first end of the fourth resistor is connected to the P-type bias voltage; A seventh capacitor, the first end of the seventh capacitor is connected to the first end of the first N-type transistor, and the second end is connected to the second end of the fourth resistor; An eighth capacitor, the first end of the eighth capacitor is connected to the first end of the seventh capacitor; A fifth resistor, the first end of the fifth resistor is connected to the N-type bias voltage, and the second end is connected to the second end of the eighth capacitor; A second P-type transistor, the first end of the second P-type transistor is connected to a power supply voltage, and the control end is connected to the second end of the fourth resistor; A second N-type transistor, a first end of the second N-type transistor is connected to a second end of the second P-type transistor, a second end is connected to a ground terminal, and a control end is connected to a second end of the fifth resistor; A sixth resistor, a first end of the sixth resistor is connected to the P-type bias voltage; A ninth capacitor, a first end of the ninth capacitor is connected to a first end of the second N-type transistor, and a second end is connected to a second end of the sixth resistor; A tenth capacitor, a first end of the tenth capacitor is connected to a first end of the ninth capacitor; A seventh resistor, a first end of the seventh resistor is connected to the N-type bias voltage, and a second end is connected to a second end of the tenth capacitor; A third P-type transistor, a first end of the third P-type transistor is connected to a power supply voltage, a second end is connected to a second end of the quartz crystal, and a control end is connected to a second end of the sixth resistor; A third N-type transistor, a first end of the third N-type transistor is connected to a second end of the third P-type transistor, a second end is connected to a ground terminal, and a control end is connected to a second end of the seventh resistor; A third capacitor, a first end of the third capacitor is connected to a first end of the fifth capacitor, and a second end is connected to a first end of the second N-type transistor; A fourth capacitor, a first end of the fourth capacitor is connected to a first end of the third capacitor, and a second end is connected to a first end of the first N-type transistor.

10. The oscillator circuit according to claim 8, wherein, The constant transconductance bias unit includes: An eleventh capacitor, a first end of the eleventh capacitor is connected to a P-type bias voltage terminal, and a second end is connected to a power supply terminal; A fourth P-type transistor, a first end of the fourth P-type transistor is connected to a power supply voltage, and a control end is connected to a first end of the eleventh capacitor; A fifth P-type transistor, a first end of the fifth P-type transistor is connected to a power supply voltage, and a control end is connected to a control end of the fourth P-type transistor; A twelfth capacitor, a first end of the twelfth capacitor is connected to an N-type bias voltage terminal, and a second end is connected to a ground terminal; A fourth N-type transistor, a first end of the fourth N-type transistor is connected to a second end of the fourth P-type transistor, and a control end is connected to a first end of the twelfth capacitor; A fifth N-type transistor, a first end of the fifth N-type transistor is connected to a second end of the fifth P-type transistor, a control end is connected to a control end of the fourth P-type transistor, a second end is connected to a ground terminal, and a first end of the fifth N-type transistor is further connected to a control end; An eighth resistor, a first end of the eighth resistor is connected to a second end of the fourth N-type transistor, and a second end is connected to a ground terminal; An amplifier, a positive input terminal of the amplifier is connected to a first end of the fourth N-type transistor, a negative input terminal is connected to a first end of the fifth N-type transistor, and an output terminal is connected to a control end of the fourth P-type transistor.

11. The oscillator circuit according to claim 6, wherein, The crystal oscillation module includes: A current source, a first end of the current source is connected to a power supply voltage; A first resistor, a first end of the first resistor is connected to a second end of the current source; A first transistor, a first end of the first transistor is connected to a second end of the current source, a second end is connected to a ground terminal, and a control end is connected to a second end of the first resistor; A first selector, a first end of the first selector is connected to the negative resistance enhancement module, a second end is connected to a second end of the first resistor, and a control end is connected to the logic module to receive the third enable signal; A second selector, a first end of the second selector is connected to a third end of the first selector, a second end is connected to an output end of the high-precision oscillation module, and a control end is connected to the logic module to receive the fourth enable signal; A third selector, a first end of the third selector is connected to the negative resistance enhancement module, a second end is connected to a first end of the first resistor, and a control end is connected to the logic module to receive the third enable signal; A fourth selector, a first end of the fourth selector is connected to a third end of the third selector, and a control end is connected to the logic module to receive the fourth enable signal; An inverter, a first end of the inverter is connected to an output end of the high-precision oscillation module, and a second end is connected to a second end of the fourth selector; A first capacitor, a first end of the first capacitor is connected to a first end of the second selector, and a second end is connected to a ground terminal; A second capacitor, a first end of the second capacitor is connected to a first end of the fourth selector, and a second end is connected to a ground terminal, wherein, a first end of the quartz crystal is connected to a third end of the second selector, and a second end is connected to a third end of the fourth selector.

12. The oscillator circuit according to claim 6, wherein, The comparison module includes: A comparator, a positive input terminal of the comparator is connected to a second end of the quartz crystal, a negative input terminal is connected to a first end of the quartz crystal, and an output terminal is connected to a clock signal output terminal; wherein, the output terminal of the comparator is further connected to the logic module.

13. An electronic device, wherein, An oscillation circuit according to any one of claims 1-12 is included.