Decoding method and device based on low-density parity check code, equipment and medium

Abstract

The invention discloses a decoding method and device based on a low-density parity check code, equipment and a medium, and relates to the technical field of communication, and the method comprises the steps: obtaining a target check matrix based on the low-density parity check code; the target check matrix comprises a plurality of variable nodes corresponding to columns and a plurality of check nodes corresponding to rows, and each variable node is connected with at least one check node; processing a corresponding number of signals to be decoded, the number of which is the same as the number of the variable nodes, and assigning each variable node by using a processing result to obtain corresponding initial information; performing hierarchical processing on each variable node by using a greedy algorithm to obtain a plurality of target layers; each check node in each target layer is connected with at most one variable node; and performing layer-by-layer decoding and multiple iterations on each target layer to update information between the variable nodes and the check nodes, and outputting a decoding result of the to-be-decoded signal corresponding to each variable node until all target layers are traversed and a preset iteration stop condition is met.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a decoding method, apparatus, device, and medium based on low-density parity-check codes. Background Art

[0002] LDPC (Low Density Parity Check Code) codes have become the mainstream error-correcting codes widely used in modern communication systems and solid-state storage devices due to their superiority in aspects such as error-correcting performance, decoding speed, and algorithm complexity. In various communication and storage media such as wired and wireless communication networks, personal area networks, and solid-state drives, LDPC coding demonstrates excellent error-correcting performance, ensuring high accuracy and reliability of data under channel noise interference. Among LDPC decoding algorithms, the column-layered decoding algorithm has attracted much attention due to its significant advantages. By cleverly reusing hardware resources, this algorithm effectively reduces the hardware requirements during the decoding process and accelerates information convergence, significantly improving the decoding efficiency, and thus has been widely applied in practical applications.

[0003] However, existing column-layered decoding algorithms still face challenges. On the one hand, some algorithms consume a large amount of computing resources and storage space during processing, and the iterative convergence time is relatively long; on the other hand, some algorithms sacrifice computational accuracy in the pursuit of efficiency, affecting the accuracy of the decoding results.

[0004] In summary, in the decoding process based on low-density parity-check codes, how to accelerate the iterative convergence speed and ensure the accuracy of the decoding results is an issue to be solved currently. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a decoding method, apparatus, device, and medium based on low-density parity-check codes, which can accelerate the iterative convergence speed and ensure the accuracy of the decoding results during the decoding process based on low-density parity-check codes. The specific solutions are as follows:

[0006] In a first aspect, the present application discloses a decoding method based on low-density parity-check codes, including:

[0007] Obtaining a target parity-check matrix based on low-density parity-check codes; wherein, the target parity-check matrix includes a plurality of variable nodes corresponding to matrix columns and a plurality of check nodes corresponding to matrix rows, and each variable node is connected to at least one check node;

[0008] Processing a corresponding number of signals to be decoded equal to the number of variable nodes, and using the processing results to assign values to each variable node to obtain the initial information of each variable node;

[0009] Use the greedy algorithm to hierarchically process each variable node to obtain several target layers; among them, each check node in each target layer is connected to at most one variable node;

[0010] Perform layer-by-layer decoding and multiple iterations on each target layer to update the information between the variable nodes and the check nodes. After traversing all the target layers and satisfying the preset iteration stop condition, output the decoding results of the signals to be decoded corresponding to each variable node.

[0011] Optionally, process a corresponding number of signals to be decoded equal to the number of variable nodes, and use the processing results to assign values to each variable node to obtain the initial information of each variable node, including:

[0012] Receive a corresponding number of signals to be decoded equal to the number of variable nodes; among them, different variable nodes receive different signals to be decoded;

[0013] For each variable node, calculate the log-likelihood ratio based on the corresponding signal to be decoded, and use the log-likelihood ratio to assign a value to the variable node to obtain the initial information of the variable node.

[0014] Optionally, use the greedy algorithm to hierarchically process each variable node to obtain several target layers, including:

[0015] Determine the set of check nodes corresponding to each variable node based on the target connection relationship in the target check matrix; among them, the target connection relationship is the connection relationship between the variable node and the check node;

[0016] Based on the set of check nodes and using the greedy algorithm, hierarchically process each variable node to obtain several target layers.

[0017] Optionally, based on the set of check nodes and using the greedy algorithm, hierarchically process each variable node to obtain several target layers, including:

[0018] Determine the current set of selectable columns; among them, the current set of selectable columns includes the variable nodes in the target check matrix that have not been assigned currently, and the current set of selectable columns is constructed based on all the variable nodes in the target check matrix during initialization;

[0019] Based on the preset selection rule and the greedy algorithm, select a group of variable nodes from the current set of selectable columns to form the current target layer, and store the current target layer in the pre-constructed layer set; among them, the preset selection rule is used to stipulate that the sets of check nodes corresponding to the variable nodes in the current target layer have no intersection;

[0020] Delete each variable node included in the current target layer from the current set of selectable columns to obtain an updated current set of selectable columns, and then jump back to the step of selecting a set of variable nodes from the current set of selectable columns to form the current target layer based on a preset selection rule and a greedy algorithm until the current set of selectable columns is empty, so as to obtain several target layers after hierarchical processing stored in the layer set.

[0021] Optionally, selecting a set of variable nodes from the current set of selectable columns to form the current target layer based on a preset selection rule and a greedy algorithm includes:

[0022] Arbitrarily select a first variable node from the current set of selectable columns;

[0023] Successively determine whether there is an intersection between the check node sets corresponding to the remaining variable nodes in the current set of selectable columns and the check node set corresponding to the first variable node;

[0024] If there is a second variable node among the remaining variable nodes that has no intersection with the check node set corresponding to the first variable node, form an initial target layer based on the first variable node and the second variable node, otherwise form the current target layer based on the first variable node;

[0025] Determine whether the variable nodes in the current set of selectable columns have been traversed. If not, successively determine whether there is an intersection between the check node sets corresponding to the remaining un-traversed variable nodes in the current set of selectable columns and the check node sets corresponding to each variable node in the initial target layer;

[0026] If there is a third variable node among the remaining un-traversed variable nodes that has no intersection with the check node sets corresponding to each variable node in the initial target layer, add the third variable node to the initial target layer, and then jump back to the step of determining whether the variable nodes in the current set of selectable columns have been traversed until the variable nodes in the current set of selectable columns are traversed;

[0027] If there is no third variable node among the remaining un-traversed variable nodes that has no intersection with the check node sets corresponding to each variable node in the initial target layer, directly use the initial target layer as the current target layer.

[0028] Optionally, the process of updating the information between variable nodes and check nodes includes:

[0029] For any variable node, the variable node sends first target information to the target check node connected to itself; the first target message is calculated based on the current information of the remaining adjacent variable nodes connected to the target check node;

[0030] For any check node, any check node sends second target information to the target variable nodes connected to itself based on the parity check constraint, so as to update the current information of the target variable nodes by using the second target information; the second target information is calculated based on the current information of the remaining adjacent check nodes connected to the target variable nodes.

[0031] Optionally, the preset iteration stop condition includes a first iteration stop condition and a second iteration stop condition; the first iteration stop condition is that the parity check equation corresponding to each check node satisfies the parity check condition, and the second iteration stop condition is that the current iteration number reaches the preset maximum iteration number.

[0032] Correspondingly, until all target layers are traversed and the preset iteration stop condition is satisfied, the decoding results of the signals to be decoded corresponding to each variable node are output, including:

[0033] Until all target layers are traversed and the first iteration stop condition or the second iteration stop condition is satisfied, the decoding results of the signals to be decoded corresponding to each variable node are output.

[0034] In a second aspect, the present application discloses a decoding device based on a low-density parity-check code, including:

[0035] A check matrix acquisition module, configured to acquire a target check matrix based on a low-density parity-check code; wherein, the target check matrix includes a plurality of variable nodes corresponding to matrix columns and a plurality of check nodes corresponding to matrix rows, and each variable node is connected to at least one check node.

[0036] An assignment module, configured to process a corresponding number of signals to be decoded equal to the number of variable nodes, and assign values to each variable node by using the processing results to obtain the initial information of each variable node.

[0037] A column layering module, configured to perform layering processing on each variable node by using a greedy algorithm to obtain a plurality of target layers; wherein, each check node in each target layer is connected to at most one variable node.

[0038] A decoding module, configured to perform layer-by-layer decoding and multiple iterations on each target layer to update the information between the variable nodes and the check nodes, and output the decoding results of the signals to be decoded corresponding to each variable node until all target layers are traversed and the preset iteration stop condition is satisfied.

[0039] In a third aspect, the present application discloses an electronic device, including:

[0040] A memory, configured to store a computer program.

[0041] A processor, configured to execute the computer program to implement the steps of the foregoing disclosed decoding method based on a low-density parity-check code.

[0042] In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, the steps of the foregoing disclosed decoding method based on low-density parity-check codes are implemented.

[0043] It can be seen that the present application obtains a target parity-check matrix based on low-density parity-check codes; wherein, the target parity-check matrix includes a plurality of variable nodes corresponding to matrix columns and a plurality of check nodes corresponding to matrix rows, and each variable node is connected to at least one check node; processes a corresponding number of signals to be decoded equal to the number of variable nodes, and uses the processing results to assign values to each variable node to obtain initial information of each variable node; uses a greedy algorithm to perform hierarchical processing on each variable node to obtain several target layers; wherein, each check node in each target layer is connected to at most one variable node; performs layer-by-layer decoding and multiple iterations on each target layer to update the information between the variable nodes and the check nodes, and until all target layers are traversed and a preset iteration stop condition is satisfied, outputs the decoding results of the signals to be decoded corresponding to each variable node.

[0044] Beneficial effects: The present application first needs to determine a target parity-check matrix based on low-density parity-check codes, that is, to determine the parity-check matrix used in this decoding process. The target parity-check matrix specifically includes a plurality of variable nodes corresponding to matrix columns and a plurality of check nodes corresponding to matrix rows, wherein each variable node is connected to at least one check node. Further, a corresponding number of signals to be decoded equal to the number of variable nodes are obtained, and these signals to be decoded are processed to use the processing results to assign values to each variable node to obtain initial information of each variable node. In the present application, a column hierarchical algorithm based on a greedy algorithm is used to perform hierarchical processing on each variable node. The purpose is to select as many columns as possible from the selectable variable nodes to form a layer each time, while maintaining the constraint that each check node in each layer is connected to at most one variable node, so as to maximize the number of columns in each layer, reduce the total number of layers, reduce the serial dependence in the decoding process, and avoid decoding errors caused by excessive connections of check nodes, thereby improving the decoding speed and overall efficiency. Finally, layer-by-layer decoding and multiple iterations are performed on each target layer to update the information between the variable nodes and the check nodes, and until all target layers are traversed and a preset iteration stop condition is satisfied, outputs the decoding results of the signals to be decoded corresponding to each variable node, thus completing a complete decoding process. Description of the Drawings

[0045] To more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on the provided drawings.

[0046] Figure 1 Flowchart of a decoding method based on low - density parity - check code disclosed in the present application;

[0047] Figure 2 Flowchart of LDPC column - layer decoding disclosed in the present application;

[0048] Figure 3 Principle diagram of message - passing decoding disclosed in the present application;

[0049] Figure 4 Flowchart of a specific decoding method based on low - density parity - check code disclosed in the present application;

[0050] Figure 5 Flowchart of a column - layer method disclosed in the present application;

[0051] Figure 6 Structure diagram of a decoding device based on low - density parity - check code disclosed in the present application;

[0052] Figure 7 Structure diagram of an electronic device disclosed in the present application. Detailed implementation manners

[0053] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0054] Currently, in LDPC decoding algorithms, the column - layer decoding algorithm has attracted much attention due to its significant advantages. This algorithm effectively reduces the hardware requirements during the decoding process and accelerates information convergence through the ingenious reuse of hardware resources, significantly improving the decoding efficiency. Therefore, it has been widely used in practical applications. However, the existing column - layer decoding algorithms still face challenges. On the one hand, some algorithms consume a large amount of computing resources and storage space during processing, and the iterative convergence time is relatively long. On the other hand, some algorithms sacrifice computational accuracy in the pursuit of efficiency, affecting the accuracy of the decoding results.

[0055] The embodiments of the present application disclose a decoding method, device, equipment and medium based on low-density parity-check codes, which can accelerate the iterative convergence speed and ensure the accuracy of the decoding result during the decoding process based on low-density parity-check codes.

[0056] See Figure 1 and Figure 2 As shown, the embodiments of the present application disclose a decoding method based on low-density parity-check codes, and the method includes:

[0057] Step S11: Obtain a target parity-check matrix based on low-density parity-check codes; wherein, the target parity-check matrix includes a plurality of variable nodes corresponding to the matrix columns and a plurality of check nodes corresponding to the matrix rows, and each variable node is connected to at least one check node.

[0058] In this embodiment, first, it is necessary to determine the target parity-check matrix based on low-density parity-check codes, that is, to determine the parity-check matrix used in this decoding process. The target parity-check matrix specifically includes a plurality of variable nodes corresponding to the matrix columns and a plurality of check nodes corresponding to the matrix rows. Among them, each variable node is connected to at least one check node.

[0059] In a specific implementation manner, the target parity-check matrix may be a parity-check matrix based on Quasi-Cyclic Low-Density Parity-Check Codes (QC-LDPC). Quasi-Cyclic Low-Density Parity-Check Codes are a special type of low-density parity-check codes, and their parity-check matrices have a quasi-cyclic structure, that is, they are called quasi-cyclic matrices. This structure makes QC-LDPC codes have significant advantages in terms of hardware implementation and decoding efficiency. Each element of the row vector of the quasi-cyclic matrix is the result of shifting each element of the previous row vector one position to the right in turn. This structure makes the quasi-cyclic matrix have the property of cyclic right shift operation, and a new matrix can be generated through the right shift operation.

[0060] It can be understood that the LDPC decoder decodes through an algorithm based on the parity-check matrix. Each parity-check matrix H can construct a corresponding Tanner graph, which contains two types of nodes: variable nodes (VN) and check nodes (CN). In the Tanner graph, the variable nodes represent the columns in the matrix, the check nodes correspond to the rows, and the positions where the matrix elements are 1 form connection edges in the Tanner graph. For the parity-check matrix , where K is the number of check nodes and N is the number of variable nodes, and the element in the matrix represents that the variable node is connected to the check node .

[0061] It should be noted that the min-sum algorithm further simplifies the sum-product algorithm. In the traditional sum-product algorithm, message passing is based on full probability information, and the calculation is relatively complex, requiring the use of addition and multiplication operations to propagate the probability distribution. In the min-sum algorithm, the minimum value is passed instead of probability information, greatly simplifying the calculation process. Although the error correction performance is slightly reduced, the robustness of the algorithm is greatly improved, and the sensitivity to channel estimation is reduced. Various derivative versions of the current min-sum algorithm, such as the standard min-sum, row-layered min-sum, column-layered min-sum, etc., are gradually applied to engineering practice. During the decoding process of the layered min-sum algorithm, the updated VN information can be immediately passed to the associated CN and applied to the update process of the CN information after this round of iteration. Therefore, compared with the standard min-sum algorithm, it can terminate the iteration in advance and has a faster iteration convergence speed. Taking the column-layered min-sum algorithm with K rows and N columns as an example, the message passing between VN and CN is represented by and respectively, as shown in Figure 3 . The mapping of the parity-check matrix and the Tanner graph, combined with the column-by-column decoding strategy, makes the algorithm have higher parallelism and computational efficiency in hardware implementation.

[0062] Step S12: Process a corresponding number of signals to be decoded equal to the number of variable nodes, and use the processing results to assign values to each variable node to obtain the initial information of each variable node.

[0063] In this embodiment, it is necessary to obtain a corresponding number of signals to be decoded equal to the number of variable nodes, and process these signals to be decoded to use the processing results to assign values to each variable node to obtain the initial information of each variable node.

[0064] In the specific implementation, the above-mentioned processing of a corresponding number of signals to be decoded equal to the number of variable nodes and using the processing results to assign values to each variable node to obtain the initial information of each variable node includes: receiving a corresponding number of signals to be decoded equal to the number of variable nodes; where different variable nodes receive different signals to be decoded; for each variable node, calculate the log-likelihood ratio based on the corresponding signal to be decoded, and use the log-likelihood ratio to assign a value to the variable node to obtain the initial information of the variable node. That is, this embodiment needs to receive a corresponding number of signals to be decoded equal to the number of variable nodes N ; where different variable nodes receive different signals to be decoded , as shown in Figure 3 . It should be noted that the decoding input is the log-likelihood ratio ( ) of each variable node , and these values are based on the received signals It is calculated that each variable node receives a signal and generates initial soft information based on this signal as follows:

[0065] ;

[0066] In the initialization stage, these values are retained inside the variable nodes and are not directly sent to adjacent check nodes. The iterative decoding process starts with the exchange of messages between variable nodes and check nodes and updates these messages as the iterations proceed.

[0067] Step S13: Use a greedy algorithm to hierarchically process each variable node to obtain several target layers; wherein, each check node in each target layer is connected to at most one variable node.

[0068] In this embodiment, a column hierarchical algorithm based on a greedy algorithm is used to hierarchically process each variable node. The purpose is to select as many columns as possible from the selectable variable nodes to form a layer each time, while maintaining the constraint that each check node in each layer is connected to at most one variable node, thereby maximizing the number of columns in each layer, reducing the total number of layers, reducing the serial dependence in the decoding process, and avoiding decoding errors caused by excessive connections of check nodes, improving the decoding speed and overall efficiency.

[0069] Step S14: Perform layer-by-layer decoding and multiple iterations on each target layer to update the information between variable nodes and check nodes. After traversing all target layers and satisfying the preset iteration stop condition, output the decoding results of the signals to be decoded corresponding to each variable node.

[0070] In this embodiment, layer-by-layer decoding and multiple iterations are performed on each target layer to update the information between variable nodes and check nodes. After traversing all target layers and satisfying the preset iteration stop condition, output the decoding results of the signals to be decoded corresponding to each variable node, thus completing a complete decoding process.

[0071] Among them, the process of updating the information between variable nodes and check nodes includes: for any variable node, any variable node sends a first target message to the target check node connected to itself; the first target message is calculated based on the current information of the other adjacent variable nodes connected to the target check node; for any check node, any check node sends a second target message to the target variable node connected to itself based on the parity check constraint to update the current information of the target variable node using the second target message; the second target message is calculated based on the current information of the other adjacent check nodes connected to the target variable node.

[0072] It can be understood that initially, , , , , in each iteration round, each column within the layer is processed, that is, a group of variable nodes and check nodes related to a certain column are selected, and the messages between these nodes are updated.

[0073] The message passing process from variable nodes to check nodes is as follows: for the variable nodes in the j-th column , it sends the first target message to each connected target check node . Specifically, the calculation of this first target message is based on the messages passed by other adjacent variable nodes to the same target check node:

[0074] ;

[0075] is the first target message passed from variable node to check node , where t represents the current iteration number. is the set of all variable nodes adjacent to check node except , and sgn represents the sign function.

[0076] The message passing process from check nodes to variable nodes is as follows: after the check node receives the messages from each variable node, it needs to send the updated second target message to each connected variable node . The second target information is calculated based on the current information of the remaining adjacent check nodes connected to the target variable node. The message update method of the check node is usually based on the parity check constraint, that is:

[0077] ;

[0078] where is a preset constant parameter, is the set of all check nodes adjacent to variable node except , t represents the current iteration number, represents the message passed from the adjacent check node to the variable node.

[0079] It should be noted that the preset iteration stop conditions include a first iteration stop condition and a second iteration stop condition; the first iteration stop condition is that the parity check equations corresponding to each check node satisfy the parity check condition, and the second iteration stop condition is that the current iteration number reaches the preset maximum iteration number; correspondingly, until all target layers are traversed and the preset iteration stop conditions are met, the decoding results of the signals to be decoded corresponding to each variable node are output, including: until all target layers are traversed and the first iteration stop condition or the second iteration stop condition is met, the decoding results of the signals to be decoded corresponding to each variable node are output.

[0080] That is, in each round of iteration, messages are repeatedly exchanged between variable nodes and check nodes until all target layers are traversed and the preset iteration stop conditions are met, and the decoding results of the signals to be decoded corresponding to each variable node are output. Among them, the preset iteration stop conditions specifically include a first iteration stop condition and a second iteration stop condition. The first iteration stop condition is that the parity check equations corresponding to each check node satisfy the parity check condition, and the second iteration stop condition is that the current iteration number reaches the preset maximum iteration number. That is to say, until all parity check equations satisfy the parity check condition or the preset maximum iteration number is reached, the iteration is stopped and the decoding results are output.

[0081] It can be understood that the layered min-sum algorithm has a relatively fast convergence speed, and it often terminates the iteration in advance before reaching a certain number of iterations. Finally, the variable nodes determine their values according to the messages received from the check nodes and output the decoding results . It is usually the estimated value of each variable node, that is:

[0082] ;

[0083] This algorithm needs to calculate the minimum value of the data in each column except the j-th column of the i-th row. There are many non-zero elements in a row of the LDPC sparse matrix, and it is generally difficult for hardware to complete it within one clock cycle, which will affect the subsequent pipelined calculation. Due to the excessively long iteration time, it is difficult to meet the low-latency and high-bandwidth requirements of wireless communication or solid-state drives, so the number of clock cycles required for iteration should be shortened.

[0084] It should also be noted that, in order to improve the decoding efficiency, the layered algorithm can be mapped to multiple computing units of the GPU, and its powerful parallel computing ability can be utilized to accelerate the layered process. In the specific implementation, the layered task is decomposed into multiple subtasks, and each subtask independently processes a part of variable nodes and check nodes, specifically including: dividing the parity check matrix into multiple sub-matrices, each sub-matrix corresponding to a subtask, and using a parallel computing framework (such as CUDA, OpenCL) to assign the subtasks to multiple computing units. In this way, each computing unit only needs to be responsible for processing a part of variable nodes and check nodes, and can perform parallel computing, thereby improving the decoding efficiency. In addition, the parity check matrix of the QC-LDPC code is sparse, and the memory occupancy can be reduced by compressed storage. Specifically, the parity check matrix can be stored in the compressed sparse row (CSR) or compressed sparse column (CSC) format to reduce the storage space.

[0085] It can be seen that the present application first needs to determine the target parity check matrix based on the low-density parity-check code, that is, to determine the parity check matrix used in this decoding process. The target parity check matrix specifically includes multiple variable nodes corresponding to the matrix columns and multiple check nodes corresponding to the matrix rows. Among them, each variable node is connected to at least one check node. Further, obtain a corresponding number of signals to be decoded equal to the number of variable nodes, and process these signals to be decoded, so as to assign values to each variable node using the processing results to obtain the initial information of each variable node. In the present application, the column-layered algorithm based on the greedy algorithm is used to perform layered processing on each variable node. The purpose is to select as many columns as possible from the selectable variable nodes to form a layer each time, while maintaining the constraint that at most one variable node is connected to the check nodes within each layer, so as to maximize the number of columns in each layer, reduce the total number of layers, reduce the serial dependence in the decoding process, and avoid decoding errors caused by excessive connections of check nodes, thereby improving the decoding speed and overall efficiency. Finally, layer-by-layer decoding and multiple iterations are performed on each target layer to update the information between the variable nodes and the check nodes. Until all target layers are traversed and the preset iteration stop condition is met, the decoding results of the signals to be decoded corresponding to each variable node are output, and thus a complete decoding process is completed.

[0086] See Figure 4 As shown, the embodiment of the present application discloses a specific decoding method based on the low-density parity-check code. Compared with the previous embodiment, this embodiment further explains and optimizes the technical solution. Specifically, it includes:

[0087] Step S21: Obtain a target parity check matrix based on the low-density parity-check code; wherein, the target parity check matrix includes multiple variable nodes corresponding to the matrix columns and multiple check nodes corresponding to the matrix rows, and each variable node is connected to at least one check node.

[0088] Step S22: Process a corresponding number of signals to be decoded equal to the number of variable nodes, and use the processing results to assign values to each variable node to obtain the initial information of each variable node.

[0089] Step S23: Determine a set of check nodes corresponding to each variable node based on the target connection relationship in the target parity-check matrix; wherein, the target connection relationship is the connection relationship between the variable node and the check node.

[0090] In this embodiment, from the parity-check matrix calculate the connection information of each column . For each column, the corresponding set of check nodes is:

[0091] ;

[0092] wherein, represents the set of check nodes connected to the variable node .

[0093] Step S24: Based on the set of check nodes and using the greedy algorithm, perform hierarchical processing on each variable node to obtain a number of target layers; wherein, each check node in each target layer is connected to at most one variable node.

[0094] In this embodiment, based on the set of check nodes obtained above, use the greedy algorithm to perform hierarchical processing on each variable node to obtain a number of target layers; wherein, it is necessary to ensure that each check node in each target layer is connected to at most one variable node.

[0095] Specifically, define a layer set to store all hierarchical results (i.e., each target layer), where each is a subset containing several columns, representing the columns of the i-th layer. The column set within each layer satisfies that each check node is connected to at most one variable node.

[0096] In a specific embodiment, the variable nodes are hierarchically processed based on the check node set and using a greedy algorithm to obtain a number of target layers, including: determining a current set of selectable columns; wherein, the current set of selectable columns includes the variable nodes in the target check matrix that have not been allocated currently, and the current set of selectable columns is constructed based on all variable nodes in the target check matrix during initialization; selecting a set of variable nodes from the current set of selectable columns to form the current target layer based on a preset selection rule and a greedy algorithm, and storing the current target layer in a pre-constructed layer set; wherein, the preset selection rule is used to stipulate that the check node sets corresponding to the variable nodes in the current target layer have no intersection; deleting the variable nodes included in the current target layer from the current set of selectable columns to obtain an updated current set of selectable columns, and then jumping back to the step of selecting a set of variable nodes from the current set of selectable columns to form the current target layer based on the preset selection rule and the greedy algorithm until the current set of selectable columns is empty, so as to obtain a number of hierarchically processed target layers stored in the layer set.

[0097] That is, as Figure 5 shown, first determine the current set of selectable columns ; wherein, the current set of selectable columns includes the variable nodes in the target check matrix that have not been allocated currently. Initially, all columns in the check matrix are available. After each selection, the remaining set of columns is . Then select a set of variable nodes from the current set of selectable columns to form the current target layer, denoted as , and store the current target layer in a pre-constructed layer set L; the preset selection rule is used to stipulate that the check node sets corresponding to the variable nodes in the current target layer have no intersection, that is, the selection criterion is to ensure that at most one variable node is connected to the check nodes in each layer, that is:

[0098] ;

[0099] wherein, is the set of check nodes connected by column , and the selected set of columns must meet this condition.

[0100] Specifically, the steps for selecting columns are:

[0101] For each unallocated column , check the intersection of the check nodes of this column with all the selected columns in the current layer to ensure that no check node connects multiple variable nodes.

[0102] Select as many columns as possible to form a new layer until the check node constraint in each layer is met.

[0103] Select one layer each time After that, delete each variable node included in the current target layer from the current set of selectable columns to obtain an updated current set of selectable columns, and then jump back to the step of selecting a set of variable nodes from the current set of selectable columns based on a preset selection rule and a greedy algorithm to form the current target layer until the current set of selectable columns is empty, so as to obtain several target layers after hierarchical processing stored in the layer set.

[0104] Specifically, selecting a set of variable nodes from the current set of selectable columns based on a preset selection rule and a greedy algorithm includes: arbitrarily selecting a first variable node from the current set of selectable columns; sequentially determining whether there is an intersection between the check node sets corresponding to the remaining variable nodes in the current set of selectable columns and the check node set corresponding to the first variable node; if there is a second variable node among the remaining variable nodes that has no intersection with the check node set corresponding to the first variable node, then form an initial target layer based on the first variable node and the second variable node, otherwise form the current target layer based on the first variable node; determining whether the variable nodes in the current set of selectable columns have been traversed completely, if not, then sequentially determining whether there is an intersection between the check node sets corresponding to the remaining variable nodes that have not been traversed in the current set of selectable columns and the check node sets corresponding to each variable node in the initial target layer; if there is a third variable node among the remaining variable nodes that have not been traversed and has no intersection with the check node sets corresponding to each variable node in the initial target layer, then add the third variable node to the initial target layer, and then jump back to the step of determining whether the variable nodes in the current set of selectable columns have been traversed completely until the variable nodes in the current set of selectable columns have been traversed; if there is no third variable node among the remaining variable nodes that have not been traversed and has no intersection with the check node sets corresponding to each variable node in the initial target layer, then directly use the initial target layer as the current target layer.

[0105] That is, each time when selecting a target layer, first arbitrarily select a first variable node from the current set of selectable columns, and then sequentially determine whether there is an intersection between the parity-check node sets corresponding to the remaining variable nodes in the current set of selectable columns and the parity-check node set corresponding to the first variable node. During the sequential comparison process, if there is a second variable node whose corresponding parity-check node set has no intersection with the parity-check node set corresponding to the first variable node, then an initial target layer is formed based on the first variable node and the second variable node. If the parity-check node sets corresponding to all the remaining variable nodes have intersections with the parity-check node set corresponding to the first variable node, then the current target layer is formed only based on the first variable node. Further, after screening out a second variable node, if the variable nodes in the current set of selectable columns have not been traversed completely, then sequentially determine whether there is an intersection between the parity-check node sets corresponding to the remaining untraversed variable nodes in the current set of selectable columns and the parity-check node sets corresponding to the variable nodes in the initial target layer. If there is a third variable node with no intersection, then add the third variable node to the initial target layer and continue traversing according to the above method until all the variable nodes in the current set of selectable columns are traversed to obtain the final target layer. In addition, if there is no third variable node among the remaining untraversed variable nodes whose corresponding parity-check node set has no intersection with the parity-check node sets corresponding to the variable nodes in the initial target layer, then directly use the initial target layer as the current target layer.

[0106] The above process can also be understood as the following process:

[0107] For each column , record the set of parity-check nodes it is connected to , when selecting a new column, check whether this column conflicts with the columns already in the current layer . The conflict judgment is: if a certain parity-check node is already connected to other variable nodes, then do not add this column to the current layer. And when selecting, try to select those columns with fewer conflicts with other columns, so as to maximize the number of columns in each layer and reduce the number of layers. For each round of selection, the intersection size of the parity-check nodes of each column and the remaining columns can be calculated, and preferentially select the column with a smaller intersection and fewer conflicts. It can be seen that the core of the layering method is to select as many columns as possible from the current set of selectable columns each time, and by checking the conflicts of the parity-check nodes, ensure that the parity-check nodes in each layer are connected to at most one variable node. Through greedy selection and real-time verification, the number of columns in each layer is maximized while avoiding violating the parity-check node connection constraint. This method gradually eliminates the selected columns until all columns are assigned to layers.

[0108] Step S25: Perform layer-by-layer decoding and multiple iterations on each target layer to update the information between the variable nodes and the parity-check nodes. After traversing all the target layers and satisfying the preset iteration stop condition, output the decoding results of the signals to be decoded corresponding to each variable node.

[0109] Among them, for the more specific processing procedures of the above steps S21, S22, and S25, reference can be made to the corresponding content disclosed in the foregoing embodiments, and details will not be elaborated herein.

[0110] It can be seen that by adopting the column layering method based on the greedy algorithm, the present application can effectively improve the parallelism and efficiency of LDPC decoding. Each time, as many columns as possible are selected from the optional columns as a layer. Under the constraint that each check node in each layer is connected to at most one variable node, the number of columns in each layer is maximized, the number of layers is reduced, thereby reducing the serial dependence in the decoding process. The core advantage of this method lies in that by selecting columns layer by layer and updating the optional column set in real time, an efficient layering scheme can be constructed to accelerate the decoding process. Through this constraint selection condition, the column set selected each time can maximize the parallel decoding ability and avoid conflicts of check nodes. Finally, this method can effectively reduce the number of layers, increase the number of columns in each layer, improve the parallelism, and avoid decoding errors caused by excessive connections of check nodes, thereby improving the decoding speed and overall efficiency.

[0111] The technical solution of the present application will be described in detail below with a specific parity-check matrix as an example:

[0112] Suppose the parity-check matrix is as follows:

[0113] ;

[0114] This matrix has 4 rows (i.e., 4 check nodes, CN) and 5 columns (i.e., 5 variable nodes, VN). Each 1 in the matrix indicates that there is a connection between the corresponding variable node and check node.

[0115] First, we list the check nodes (rows) connected to each variable node (column):

[0116] VN1 (the 1st column): Connected to CN1 and CN3;

[0117] VN2 (the 2nd column): Connected to CN2 and CN3;

[0118] VN3 (the 3rd column): Connected to CN1, CN2, and CN4;

[0119] VN4 (the 4th column): Connected to CN2 and CN4;

[0120] VN5 (the 5th column): Connected to CN1 and CN4.

[0121] The column layering process based on the greedy algorithm is as follows:

[0122] Step 1: Initialization

[0123] Set of optional columns: Initially, all columns are optional, i.e., the set of optional columns is {VN1, VN2, VN3, VN4, VN5}.

[0124] Set of layers: Initially empty, indicating that no columns have been assigned to layers yet.

[0125] Step 2: Select columns layer by layer

[0126] Start selecting columns layer by layer. Each time, select as many columns as possible to form a layer while ensuring that at most one variable node is connected to the check nodes within each layer.

[0127] Selection for the first layer:

[0128] Select columns: Select columns from the set of optional columns. The goal is to select as many columns as possible such that the check nodes connected to these columns do not conflict;

[0129] First, select VN1, which is connected to CN1 and CN3;

[0130] Next, select VN2, which is connected to CN2 and CN3. Since CN3 has already been occupied by VN1, VN2 cannot be in the same layer as VN1;

[0131] Next, select VN3, which is connected to CN1, CN2, and CN4. Since CN1 has already been occupied by VN1, VN3 cannot be in the same layer as VN1;

[0132] Select VN4, which is connected to CN2 and CN4. Since neither CN2 nor CN4 has been occupied by VN1, VN4 can be in the same layer as VN1;

[0133] Select VN5, which is connected to CN1 and CN4. Since CN1 has already been occupied by VN1, VN5 cannot be in the same layer as VN1 and VN4.

[0134] Result for the first layer: Select VN1 and VN4 as the first layer because the check nodes they are connected to do not conflict;

[0135] That is, the first target layer is: {VN1, VN4};

[0136] Update the set of optional columns: {VN2, VN3, VN5};

[0137] Selection for the second layer:

[0138] Select columns: Select columns from the remaining set of optional columns;

[0139] Select VN2, which is connected to CN2 and CN3;

[0140] Select VN3, which is connected to CN1, CN2, and CN4. Since CN2 has already been occupied by VN2, VN3 cannot be on the same layer as VN2;

[0141] Select VN5, which is connected to CN1 and CN4. Since neither CN1 nor CN4 is occupied by VN2, VN5 can be on the same layer as VN2.

[0142] Result of the second layer: Select VN2 and VN5 as the second layer because there are no conflicts in the check nodes they are connected to;

[0143] That is, the second target layer: {VN2, VN5};

[0144] Update the set of available columns: {VN3}.

[0145] Selection for the third layer:

[0146] Select a column: The only available column left in the set of available columns is VN3.

[0147] Select VN3, which is connected to CN1, CN2, and CN4. Since these check nodes have been occupied in the previous two layers, VN3 must be on a separate layer alone;

[0148] Result of the third layer: Select VN3 as the third layer;

[0149] That is, the third sub-target layer: {VN3};

[0150] Update the set of available columns: It is an empty set at this time.

[0151] Step 3: Layering result

[0152] After the above steps, the following layering result is obtained:

[0153] The first layer: {VN1, VN4};

[0154] The second layer: {VN2, VN5};

[0155] The third layer: {VN3}.

[0156] After the layering is completed, the decoder can perform decoding layer by layer, and the variable nodes within each layer can be processed in parallel, thus accelerating the decoding process:

[0157] Decoding of the first layer:

[0158] Process VN1 and VN4 in parallel and update the messages between them and the adjacent check nodes (CN1, CN2, CN3, CN4);

[0159] Decoding of the second layer:

[0160] Process VN2 and VN5 in parallel and update the messages between them and the adjacent check nodes (CN1, CN2, CN3, CN4).

[0161] Layer 3 decoding:

[0162] Process VN3 and update the messages between it and the adjacent check nodes (CN1, CN2, CN4).

[0163] By using the column layering method based on the greedy algorithm, the variable nodes in the parity-check matrix are divided into multiple layers. The variable nodes within each layer can be processed in parallel, thereby reducing the serial dependencies in the decoding process and improving the parallelism and efficiency of decoding. In this example, 5 variable nodes are successfully divided into 3 layers, and the check nodes connected to the variable nodes within each layer do not conflict, ensuring the correctness and efficiency of the decoding process.

[0164] See Figure 6 As shown, an embodiment of the present application discloses a decoding device based on a low-density parity-check code. The device includes:

[0165] A parity-check matrix acquisition module 11 for acquiring a target parity-check matrix based on a low-density parity-check code; wherein, the target parity-check matrix includes multiple variable nodes corresponding to matrix columns and multiple check nodes corresponding to matrix rows, and each variable node is connected to at least one check node;

[0166] An assignment module 12 for processing a corresponding number of signals to be decoded equal to the number of variable nodes, and using the processing results to assign values to each variable node to obtain the initial information of each variable node;

[0167] A column layering module 13 for performing layering processing on each variable node by using the greedy algorithm to obtain several target layers; wherein, each check node in each target layer is connected to at most one variable node;

[0168] A decoding module 14 for performing layer-by-layer decoding and multiple iterations on each target layer to update the information between the variable nodes and the check nodes, and outputting the decoding results of the signals to be decoded corresponding to each variable node until all target layers are traversed and a preset iteration stop condition is satisfied.

[0169] It can be seen that the present application first needs to determine a target parity-check matrix based on a low-density parity-check code, that is, to determine the parity-check matrix used in this decoding process. The target parity-check matrix specifically includes a plurality of variable nodes corresponding to the matrix columns and a plurality of check nodes corresponding to the matrix rows. Among them, each variable node is connected to at least one check node. Further, obtain a corresponding number of signals to be decoded equal to the number of variable nodes, and process these signals to be decoded, so as to assign values to each variable node using the processing results to obtain the initial information of each variable node. In the present application, a column layering algorithm based on a greedy algorithm is used to layer each variable node. The purpose is to select as many columns as possible from the selectable variable nodes to form a layer each time, while maintaining the constraint that each check node in each layer is connected to at most one variable node, so as to maximize the number of columns in each layer, reduce the total number of layers, reduce the serial dependence in the decoding process, and avoid decoding errors caused by excessive connection of check nodes, thereby improving the decoding speed and overall efficiency. Finally, each target layer is decoded layer by layer and iterated multiple times to update the information between the variable nodes and the check nodes. Until all target layers are traversed and the preset iteration stop condition is met, the decoding results of the signals to be decoded corresponding to each variable node are output, and thus a complete decoding process is completed.

[0170] Since the embodiments of the device part correspond to the above embodiments, the embodiments of the device part are described with reference to the embodiments of the above method part and will not be elaborated here.

[0171] Figure 7 It is a schematic structural diagram of an electronic device provided by an embodiment of the present application. Specifically, it may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. Among them, the memory 22 is used to store a computer program, and the computer program is loaded and executed by the processor 21 to implement the relevant steps in the decoding method based on a low-density parity-check code executed by the electronic device disclosed in any of the foregoing embodiments.

[0172] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows is any communication protocol applicable to the technical solution of the present application, and no specific limitation is made here; the input / output interface 25 is used to obtain external input data or output data to the outside, and its specific interface type can be selected according to specific application requirements, and no specific limitation is made here.

[0173] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 may be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), or PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor used to process data in the wake state, also known as the CPU (Central Processing Unit); the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may be integrated with a GPU (Graphics Processing Unit), and the GPU is responsible for the rendering and drawing of the content to be displayed on the display screen. In some embodiments, the processor 21 may further include an AI (Artificial Intelligence) processor, and the AI processor is used to process computational operations related to machine learning.

[0174] In addition, as a carrier for resource storage, the memory 22 may be a read-only memory, a random access memory, a magnetic disk, or an optical disc, etc. The resources stored thereon include an operating system 221, a computer program 222, data 223, etc., and the storage method may be temporary storage or permanent storage.

[0175] Among them, the operating system 221 is used to manage and control each hardware device on the electronic device 20 and the computer program 222 to enable the processor 21 to perform operations and processing on the massive data 223 in the memory 22. It may be Windows, Unix, Linux, etc. In addition to the computer program that can be used to complete the decoding method based on low-density parity-check codes executed by the electronic device 20 disclosed in any of the foregoing embodiments, the computer program 222 may further include computer programs that can be used to complete other specific tasks. The data 223 may include not only the data transmitted by external devices received by the electronic device but also the data collected by its own input / output interface 25, etc.

[0176] Furthermore, the embodiment of the present application also discloses a computer-readable storage medium. When the computer program stored in the storage medium is loaded and executed by a processor, the steps of the decoding method based on low-density parity-check codes disclosed in any of the foregoing embodiments are implemented.

[0177] An embodiment of the present invention also discloses a computer program product, including computer programs / instructions, which, when executed by a processor, implement the steps of the decoding method based on low-density parity-check codes disclosed in any of the foregoing embodiments.

[0178] The various embodiments in this specification are described in a progressive manner. The key point of each embodiment is the difference from other embodiments. For the same or similar parts among the various embodiments, reference can be made to each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and reference can be made to the description of the method part for the relevant parts.

[0179] Those skilled in the art can further realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed in this article can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of the examples have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0180] The steps of the methods or algorithms described in combination with the embodiments disclosed in this article can be directly implemented by hardware, software modules executed by a processor, or a combination of the two. The software modules can be placed in a random access memory (Random Access Memory, i.e., RAM), internal memory, read-only memory (Read-Only Memory, i.e., ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, compact disc read-only memory (Compact Disc Read-Only Memory, i.e., CD-ROM), or any other form of storage medium well-known in the technical field.

[0181] Finally, it should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variation thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising a..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.

[0182] The above has introduced in detail a decoding method, apparatus, device and storage medium based on low-density parity-check codes provided by the present invention. Specific examples are used in this text to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A decoding method based on low-density parity-check codes, characterized in that Including: Obtain a target parity-check matrix based on a low-density parity-check code; wherein, the target parity-check matrix includes a plurality of variable nodes corresponding to matrix columns and a plurality of check nodes corresponding to matrix rows, and each of the variable nodes is connected to at least one of the check nodes; Process a corresponding number of signals to be decoded that is the same as the number of the variable nodes, and use the processing results to assign values to each of the variable nodes to obtain initial information of each of the variable nodes; Use a greedy algorithm to hierarchically process each of the variable nodes to obtain a plurality of target layers; wherein, each check node in each of the target layers is connected to at most one of the variable nodes; Perform layer-by-layer decoding and multiple iterations on each of the target layers to update the information between the variable nodes and the check nodes, and after traversing all of the target layers and satisfying a preset iteration stop condition, output the decoding results of the signals to be decoded corresponding to each of the variable nodes.

2. The decoding method based on low-density parity-check code according to claim 1, wherein The processing a corresponding number of signals to be decoded that is the same as the number of the variable nodes, and using the processing results to assign values to each of the variable nodes to obtain initial information of each of the variable nodes includes: Receive a corresponding number of signals to be decoded that is the same as the number of the variable nodes; wherein, different variable nodes receive different signals to be decoded; For each of the variable nodes, calculate a log-likelihood ratio based on the corresponding signal to be decoded, and use the log-likelihood ratio to assign a value to the variable node to obtain the initial information of the variable node.

3. The decoding method based on low-density parity-check code according to claim 1, wherein The using a greedy algorithm to hierarchically process each of the variable nodes to obtain a plurality of target layers includes: Determine a set of check nodes corresponding to each of the variable nodes based on a target connection relationship in the target parity-check matrix; wherein, the target connection relationship is the connection relationship between the variable nodes and the check nodes; Based on the set of check nodes and using a greedy algorithm, hierarchically process each of the variable nodes to obtain a plurality of target layers.

4. The decoding method based on low-density parity-check code according to claim 3, characterized in that The based on the set of check nodes and using a greedy algorithm to hierarchically process each of the variable nodes to obtain a plurality of target layers includes: Determine a current selectable column set; wherein, the current selectable column set includes the variable nodes in the target parity-check matrix that are not currently assigned, and the current selectable column set is constructed based on all the variable nodes in the target parity-check matrix during initialization; Based on a preset selection rule and a greedy algorithm, select a group of variable nodes from the current selectable column set to form a current target layer, and store the current target layer in a pre-constructed layer set; wherein, the preset selection rule is used to stipulate that the sets of check nodes corresponding to the variable nodes in the current target layer have no intersection; Delete each variable node included in the current target layer from the current set of selectable columns to obtain the updated current set of selectable columns, and then jump back to the step of selecting a set of variable nodes from the current set of selectable columns to form the current target layer based on the preset selection rule and the greedy algorithm until the current set of selectable columns is empty, so as to obtain several target layers after hierarchical processing stored in the layer set.

5. The decoding method based on low density parity check code according to claim 4, characterized in that, The step of selecting a set of variable nodes from the current set of selectable columns to form the current target layer based on the preset selection rule and the greedy algorithm includes: Arbitrarily select a first variable node from the current set of selectable columns; Successively determine whether there is an intersection between the set of check nodes corresponding to the remaining variable nodes in the current set of selectable columns and the set of check nodes corresponding to the first variable node; If there is a second variable node among the remaining variable nodes whose set of check nodes has no intersection with the set of check nodes corresponding to the first variable node, form an initial target layer based on the first variable node and the second variable node, otherwise form the current target layer based on the first variable node; Determine whether the variable nodes in the current set of selectable columns have been traversed. If not, successively determine whether there is an intersection between the set of check nodes corresponding to the remaining non-traversed variable nodes in the current set of selectable columns and the set of check nodes corresponding to each variable node in the initial target layer; If there is a third variable node among the remaining non-traversed variable nodes whose set of check nodes has no intersection with the set of check nodes corresponding to each variable node in the initial target layer, add the third variable node to the initial target layer, and then jump back to the step of determining whether the variable nodes in the current set of selectable columns have been traversed until the variable nodes in the current set of selectable columns are traversed; If there is no third variable node among the remaining non-traversed variable nodes whose set of check nodes has no intersection with the set of check nodes corresponding to each variable node in the initial target layer, directly use the initial target layer as the current target layer.

6. The decoding method based on low-density parity-check code according to claim 1, wherein, The process of updating the information between the variable nodes and the check nodes includes: For any variable node, the any variable node sends first target information to the target check node connected to itself; the first target message is calculated based on the current information of the remaining adjacent variable nodes connected to the target check node; For any check node, the any check node sends second target information to the target variable node connected to itself based on the parity check constraint to update the current information of the target variable node using the second target information; the second target information is calculated based on the current information of the remaining adjacent check nodes connected to the target variable node.

7. The decoding method based on low-density parity-check codes according to any one of claims 1 to 6, characterized in that, The preset iteration stop conditions include a first iteration stop condition and a second iteration stop condition; the first iteration stop condition is that the check equation corresponding to each check node satisfies the parity check condition, and the second iteration stop condition is that the current iteration number reaches the preset maximum iteration number; Correspondingly, after traversing all the target layers and meeting the preset iteration stop condition, outputting the decoding results of the to-be-decoded signals corresponding to each of the variable nodes, including: After traversing all the target layers and meeting the first iteration stop condition or the second iteration stop condition, outputting the decoding results of the to-be-decoded signals corresponding to each of the variable nodes.

8. A decoding device based on low-density parity-check codes, characterized in that, Including: A check matrix acquisition module, configured to acquire a target check matrix based on a low-density parity-check code; wherein, the target check matrix includes a plurality of variable nodes corresponding to matrix columns and a plurality of check nodes corresponding to matrix rows, and each of the variable nodes is connected to at least one of the check nodes; An assignment module, configured to process a corresponding number of to-be-decoded signals equal to the number of the variable nodes, and use the processing results to assign values to each of the variable nodes to obtain initial information of each of the variable nodes; A column layering module, configured to perform layering processing on each of the variable nodes by using a greedy algorithm to obtain a plurality of target layers; wherein, each check node in each of the target layers is connected to at most one of the variable nodes; A decoding module, configured to perform layer-by-layer decoding and multiple iterations on each of the target layers to update information between the variable nodes and the check nodes, and after traversing all the target layers and meeting the preset iteration stop condition, outputting the decoding results of the to-be-decoded signals corresponding to each of the variable nodes.

9. An electronic device, characterized in that, Including: A memory, configured to store a computer program; A processor, configured to execute the computer program to implement the steps of the decoding method based on a low-density parity-check code according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, For storing a computer program; wherein, when the computer program is executed by a processor, the steps of the decoding method based on a low-density parity-check code according to any one of claims 1 to 7 are implemented.

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