Method for producing optoelectronic component comprising LED and photodiode

Abstract

The present disclosure relates to a method for manufacturing an optoelectronic component comprising at least one LED (L) and at least one photodiode (P), comprising the following consecutive steps: a) epitaxially forming an active semiconductor transmitting and receiving stack (103) common to the LED and the photodiode; b) forming a trench (120) extending vertically through the active stack (103) and laterally delimiting the LED (L) and the photodiode (P), where the trench is arranged such that a lateral dimension of the LED (L) is smaller than a lateral dimension of the photodiode (P).

Description

[0001] This application is based on and claims the priority of French Patent Application FR2212871, filed on December 7, 2022, titled "Procédé de fabrication d'un dispositif optoélectronique comprenant une LED et une photodiode", which is considered to be part of this specification within the scope of the law. Technical Field

[0002] The present disclosure generally relates to the field of optoelectronic devices. More specifically, it relates to embodiments of optoelectronic devices including at least one light-emitting diode (LED) and at least one photodiode. In particular, it relates to simultaneously implementing the active emission stack of the LED and the active reception stack of the photodiode by a common epitaxial step, aiming to operate within the same wavelength range. Background Art

[0003] For example, in the field of optical communication systems, devices have been proposed that include one or more LEDs configured to emit optical signals, and one or more photodiodes configured to receive and measure the signals emitted by the LED.

[0004] There is a desire to be able to at least partially improve certain aspects of these systems.

[0005] In particular, it would be desirable to be able to simultaneously perform the active emission stack of the LED and the active reception stack of the photodiode by means of a common epitaxial step. Summary of the Invention

[0006] To this end, an embodiment provides a method for manufacturing an optoelectronic device including at least one LED and at least one photodiode, comprising the following successive steps:

[0007] a) Epitaxially forming a common active semiconductor emission and reception stack for the LED and the photodiode;

[0008] b) Forming a trench that extends vertically through the active stack and laterally delimits the LED and the photodiode,

[0009] wherein the trench is arranged such that the lateral dimension of the LED is smaller than the lateral dimension of the photodiode.

[0010] According to one embodiment, the trench is arranged such that the lateral dimension of the LED is at least half of the lateral dimension of the photodiode.

[0011] According to one embodiment, the trench is arranged such that the lateral dimension of the LED is at least four times smaller than the lateral dimension of the photodiode.

[0012] According to one embodiment, the trenches are arranged such that the lateral dimension of the LED is less than 4 μm.

[0013] According to one embodiment, the method includes, between steps a) and b), a step for transferring and attaching the active stack to a face of a control integrated circuit previously formed in and on a semiconductor substrate.

[0014] According to one embodiment, during the step for transfer and attachment, the active stack is attached to the said face of the control integrated circuit by molecular bonding.

[0015] According to one embodiment, at the end of the step for transfer and attachment, the active stack extends continuously above the entire surface of the control integrated circuit.

[0016] According to one embodiment, the active semiconductor stack comprises one or more III-V or II-VI semiconductor alloys.

[0017] Another embodiment provides an optoelectronic device comprising at least one LED and at least one photodiode, each of the at least one LED and the at least one photodiode comprising an active semiconductor emission and reception stack having the same properties and composition, the lateral dimension of the LED being less than the lateral dimension of the photodiode.

[0018] According to one embodiment, the device further comprises a control integrated circuit, to which the LED and the photodiode are attached to a face of the control integrated circuit, the control integrated circuit being adapted to drive the LED at a higher current density than the photodiode.

[0019] According to one embodiment, the control integrated circuit is adapted to drive the LED at a current density that is at least ten times higher than that of the photodiode.

[0020] Another embodiment provides a method for manufacturing an optoelectronic device comprising at least one LED and at least one photodiode, comprising the following steps:

[0021] a) forming a semiconductor support stack comprising at least one doped semiconductor layer;

[0022] b) simultaneously forming the active semiconductor emission stack of the LED and the active semiconductor reception stack of the photodiode in a common epitaxial step;

[0023] c) forming trenches that extend vertically through the support stack and laterally delimit at least one first support pad and at least one second support pad,

[0024] wherein, at the end of steps b) and c), the active semiconductor emission stack of the LED covers the first support pad and the active semiconductor reception stack of the photodiode covers the second support pad,

[0025] After step c), the method further comprises step d) for rendering porous the doped semiconductor layer in the first support pad without rendering porous the doped semiconductor layer in the second support pad, or a step for rendering porous the doped semiconductor layer in the second support pad without rendering porous the doped semiconductor layer in the first support pad.

[0026] According to one embodiment, step c) for forming trenches through the support stack and step d) for rendering the doped semiconductor layer porous are carried out before step b) for epitaxially growing the active emission semiconductor stack of the LED and the active reception semiconductor stack of the photodiode, and wherein, in step d), the doped semiconductor layer is rendered porous in the second support pad and is not rendered porous in the first support pad.

[0027] According to one embodiment, step c) for forming trenches through the support stack is carried out after step b) for epitaxially growing the emission semiconductor active stack of the LED and the reception semiconductor active stack of the photodiode, and in step d), the doped semiconductor layer is rendered porous in the first support pad and is not rendered porous in the second support pad.

[0028] According to one embodiment, in step d), the flanks of the doped semiconductor layer in the second pad are in contact with the electrolyte, while the flanks of the doped semiconductor layer in the first pad are protected by a protective layer from contact with the electrolyte.

[0029] According to one embodiment, in step d), the flanks of the doped semiconductor layer in the first pad are in contact with the electrolyte, while the flanks of the doped semiconductor layer in the second pad are protected by a protective layer from contact with the electrolyte.

[0030] According to one embodiment, in step d), a bias current is applied through the doped semiconductor layer.

[0031] According to one embodiment, after steps b) and d), the method comprises a step for transferring and attaching the LED and the photodiode to one face of a control integrated circuit previously formed in and on a semiconductor substrate.

[0032] According to one embodiment, during the step for transferring and attaching, the LED and the photodiode are attached to the face of the control integrated circuit by molecular bonding.

[0033] According to one embodiment, the trenches are arranged such that the lateral dimension of the LED is smaller than the lateral dimension of the photodiode.

[0034] According to one embodiment, the active semiconductor emission stack of the LED and the active semiconductor reception stack of the photodiode comprise one or more III-V or II-VI semiconductor alloys.

[0035] Another embodiment provides an optoelectronic device comprising at least one LED and at least one photodiode, the at least one LED comprising an active semiconductor emission stack, the at least one photodiode comprising an active semiconductor reception stack, the device further comprising a doped semiconductor layer opposite the LED and the photodiode, wherein the doped semiconductor layer is porous opposite the LED and non-porous opposite the photodiode, or wherein the doped semiconductor layer is porous opposite the photodiode and non-porous opposite the LED.

[0036] According to one embodiment, the device further comprises a control integrated circuit, to which the LED and the photodiode are attached on one side, the control integrated circuit being adapted to drive the LED at a higher current density than the photodiode.

[0037] According to one embodiment, the control integrated circuit is adapted to drive the LED at a current density that is at least ten times higher than that of the photodiode. Description of the Drawings

[0038] The foregoing features and advantages, as well as others, will be described in detail in the following description of specific embodiments, given by way of illustration and not limitation, with reference to the accompanying drawings, in which:

[0039] Figure 1A 、 Figure 1B 、 Figure 1C and Figure 1D are cross-sectional views showing steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to a first embodiment;

[0040] Figure 2A 、 Figure 2B 、 Figure 2C 、 Figure 2D 、 Figure 2E and Figure 2F are cross-sectional views showing steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to a second embodiment;

[0041] Figure 3A 、 Figure 3B 、 Figure 3C 、 Figure 3D and Figure 3E are cross-sectional views showing steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to a third embodiment; and

[0042] Figure 4A diagram showing the responses of the active emission stack of an LED and the active reception stack of a photodiode produced by a common epitaxial step. DETAILED DESCRIPTION

[0043] Similar features have been designated by like reference throughout the figures. In particular, structural and / or functional features common to the various embodiments may have the same reference and may have the same structure, dimensions, and material properties.

[0044] For clarity, only the operations and elements useful for understanding the embodiments described herein are shown and described in detail. In particular, the electrical connections of the described devices and the implementation of the LED and photodiode control circuits are not described in detail, and the described embodiments are compatible with the usual implementations of these elements, or the implementations of these elements are within the scope indicated to those skilled in the art by this description. In addition, the applications that may benefit from the described embodiments are not described in detail because the described embodiments can be advantageously used in any application including one or more LEDs and one or more photodiodes designed to operate in the same wavelength range (e.g., visible light, ultraviolet, or near-infrared light wavelength range).

[0045] Unless otherwise specified, when referring to two elements connected together, this means a direct connection without any intermediate element other than a conductor, and when referring to two elements coupled together, this means that the two elements can be connected or they can be coupled via one or more other elements.

[0046] In the following disclosure, unless otherwise specified, when referring to absolute position qualifiers such as the terms "front", "rear", "top", "bottom", "left", "right", etc., or relative position qualifiers such as the terms "above", "below", "higher", "lower", etc., or qualifiers of orientation such as "horizontal", "vertical", etc., reference is made to the orientation shown in the figures.

[0047] Unless otherwise indicated, the expressions "around", "about", "substantially", and "approximately" mean within 10%, and preferably within 5%.

[0048] According to one aspect of the described embodiments, a method for manufacturing an optoelectronic device is provided, in which the active emission stack of an LED and the active photosensitive stack of a photodiode are simultaneously implemented in a single epitaxial step.

[0049] One advantage is a cost reduction compared to methods that include separate specific epitaxial steps to successively produce the active emission stack of an LED and the active reception stack of a photodiode.

[0050] LEDs and photodiodes can be monolithically integrated into a single optoelectronic chip or separated by dicing at the end of a method for integration into separate chips for assembly into the same optoelectronic device.

[0051] The active emission stack of the LED and the active reception stack of the photodiode are, for example, inorganic semiconductor stacks, such as based on III-V semiconductor materials, such as based on group III nitrides, such as gallium, aluminum, indium or alloys based on one or more of these materials. Alternatively, the active emission stack of the LED and the active reception stack of the photodiode are based on II-VI semiconductor materials, such as ZnCdSe (zinc-cadmium-selenium).

[0052] The same gallium nitride-based active stack can, for example, be used as the active stack of the LED during emission or as the active stack of the photodiode during reception. Thus, the photodiode has a very low dark current and a narrow optical bandwidth during reception, allowing for a very good signal-to-noise ratio to be obtained.

[0053] However, one difficulty lies in the fact that the optimal emission wavelength (emission peak) of the LED is shifted upwards by several tens of nanometers compared to the optimal reception wavelength (absorption peak) of the photodiode. Typically, for a gallium nitride (GaN)-based active stack, such as based on indium-gallium nitride (InGaN), it is about 20 nm. This is known as the Stokes shift and is caused, in particular, by the binding energy of electron-hole pairs. This affects the sensitivity of the photodiode in the emission wavelength range of the LED and thus the efficiency of the LED-photodiode system.

[0054] In Figure 4 this phenomenon is particularly illustrated.

[0055] Figure 4 is a graph showing the evolution of the quantum efficiency Q as a function of the wavelength W (x-axis) in reception (curve 401) and in emission (curve 403) of the active stack of a diode based on gallium nitride (GaN), such as based on indium-gallium nitride (InGaN).

[0056] According to one aspect of the first embodiment, an active semiconductor stack common to an LED and a photodiode is formed by epitaxy, and then a trench is formed that extends vertically through the active stack and laterally defines the LED and the photodiode. According to the first embodiment, the LED has a smaller lateral dimension than the photodiode. This allows the mechanical stress in the active stack of the LED to relax to a greater extent than in the active stack of the photodiode. As a result, the internal electric field in the active stack of the LED is reduced compared to the internal electric field in the active stack of the photodiode. This reduction in the internal electric field in the active stack of the LED causes the emission peak of the LED to shift downward (so-called blue shift). This allows at least partial compensation for the Stokes shift between the emission peak and the absorption peak of the active stack. Thus, the emission peak of the LED is brought closer to the absorption peak of the photodiode, improving the system efficiency.

[0057] Figures 1A through 1D is a cross-sectional view schematically showing the steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to the first embodiment.

[0058] Figure 1A shows a structure including an active semiconductor emission and reception stack 103 disposed on the top surface of a support substrate 101.

[0059] The active stack 103 includes, for example, a semiconductor layer 103a doped with a first conductivity type (e.g., N-type) that coats the top surface of the support substrate 101; an active layer 103b that coats the surface of layer 103a opposite to the support substrate 101, i.e., Figure 1A its top surface in the orientation shown; and a semiconductor layer 103c doped with a second conductivity type (e.g., P-type) that coats the surface of layer 103a opposite to layer 103b, i.e., Figure 1A its top surface in the orientation shown. By way of example, layer 103b contacts the top surface of layer 103a via its bottom surface and contacts the surface below layer 103c via its top surface.

[0060] The layers 103a, 103b, and 103c of the active stack 103 each extend continuously and with a substantially uniform thickness above the entire surface of the support substrate 101, for example.

[0061] The layers 103a, 103b, and 103c are formed continuously by epitaxy on the top surface of the support substrate 101, for example.

[0062] By way of example, the support substrate 101 is made of sapphire or silicon. The semiconductor layers 103a and 103c of the active stack 103 are made of gallium nitride, for example. For example, the active layer 103b includes a stack of layers each forming a quantum well, for example based on indium gallium nitride (InGaN).

[0063] A buffer layer (not shown) can form an interface between the top surface of the substrate 101 and the bottom surface of the underlying layer 103a.

[0064] Figure 1A A step of depositing a metal layer 105 on the top surface of the active stack 103 is further illustrated. In the example shown, the layer 105 extends continuously and with a substantially uniform thickness above the entire top surface of the active stack 103. By way of example, the layer 105 contacts the top surface of the top layer 103c of the active stack via its bottom surface.

[0065] Figure 1B An integrated control circuit 110 is schematically shown, which has been previously formed in and on a semiconductor substrate 111 (such as a silicon substrate). In this example, for each of the LEDs of the device, the control circuit 110 includes a metal connection pad 113L on one side of its top surface, which is intended to be connected to one of the electrodes (anode or cathode) of the LED in order to be able to control the current flowing through the LED and / or apply a voltage across the terminals of the LED. In this example, for each of the photodiodes of the device, the control circuit 110 further includes a metal connection pad 113P on one side of its top surface, which is intended to be connected to one of the electrodes (anode or cathode) of the photodiode in order to be able to read an electrical signal representing the intensity of the light radiation received by the photodiode within its sensitivity wavelength range.

[0066] For example, for each LED connected to the metal pad 113L dedicated to the LED, the control circuit includes a basic control unit that includes one or more transistors such that the current flowing through the LED and / or the voltage applied across the terminals of the LED can be controlled; for each photodiode connected to the metal pad 113P dedicated to the photodiode, the control circuit includes a basic sensing unit that includes one or more transistors such that an electrical signal representing the intensity of the light radiation received by the photodiode within its sensitivity wavelength range can be read. The readout circuit includes, for example, a transimpedance amplifier for amplifying the photodiode current.

[0067] The control circuit 110 is, for example, based on CMOS technology. The metal pads 113L, 113P can be laterally surrounded by an insulating material 114 (such as silicon oxide), such that the control circuit 110 has a substantially flat top surface including alternating metal regions 113 and insulating regions 114. The contacts with the electrodes of the LEDs or photodiodes not connected to the pads 113L, 113P can be made collectively, for example, in the peripheral region of the control circuit 110, via one or more connection pads (not visible in the figure) of the control circuit 110. By way of example, the control circuit 110 includes, on one side of the top surface of the substrate 111, a stack of insulating and conductive layers forming an interconnect network 112, which particularly includes the connection pads 113L, 113P, and the top surface of the interconnect network 112 defines the top surface of the circuit 110.

[0068] Figure 1B A step of depositing a metal layer 115 on the top surface of the control integrated circuit 110 is further shown. In the example shown, the layer 115 extends continuously and with a substantially uniform thickness above the entire top surface of the circuit 110. By way of example, the layer 115 contacts the top surface of the interconnect network 112 of the control circuit 110 via its bottom surface.

[0069] For example, the layer 115 is made of the same material as the layer 105. By way of example, each of the layers 105 and 115 includes a top layer referred to as a bonding layer. The bonding layers of the layers 105 and 115 are preferably made of the same material, such as titanium.

[0070] Figure 1C A structure obtained at the end of the step of transferring the active stack of the LEDs and photodiodes 103 to the top surface of the control circuit 110 is shown. For this purpose, the Figure 1A structure shown can be inverted and then transferred to the Figure 1B structure shown, such that the face of the metal layer 105 opposite to the substrate 101 (i.e., its bottom surface in the Figure 1C orientation shown, corresponding to its top surface in the Figure 1A orientation shown) contacts the face of the metal layer 115 opposite to the substrate 111 (i.e., its top surface in the Figure 1B and Figure 1C orientation shown). During this step, the active stack 103 is bonded to the control circuit 110. By way of example, attaching the active stack 103 to the control circuit 110 can be obtained by molecular bonding between the two contacting surfaces. Alternatively, the attachment of the two surfaces can be performed by thermocompression, eutectic bonding or any other suitable bonding method.

[0071] Once the bonding is complete, the support substrate 101 is removed to expose the top surface of the semiconductor layer 103c of the active stack 103 (in the Figure 1C orientation shown). For example, the substrate 101 is removed from the face of the substrate 101 opposite the active stack 103 by grinding and / or etching. Alternatively, in the case of a transparent substrate 101 (such as a sapphire substrate), the substrate 101 can be detached from the active stack 103 by means of a laser beam projected through the substrate 101 from its face opposite the active stack 103 (laser lift-off type method). More generally, any other method that allows the removal of the substrate 101 can be used. After the removal of the substrate, an additional etching step can be provided to remove any buffer layer remaining on the top surface side of the semiconductor layer 103c. Additionally, a portion of the thickness of the layer 103c can be removed, for example, by etching. At the end of this step, the active stack 103 substantially covers the entire surface of the control circuit 110 without discontinuities. By way of example, at the Figure 1D end of the step shown, the thickness of the active stack 103 is between 0.5 μm and 2 μm.

[0072] At the end of this step, the mechanical stress of the epitaxially grown active stack 103 is partially transferred to the substrate 111 of the control circuit 110.

[0073] Figure 1D shows the step following the Figure 1C step shown, during which trenches 120 are formed in the active stack 103 from its top surface, for example, by photolithography followed by etching, so as to define one or more LEDs L and one or more photodiodes P, each corresponding to an island or mesa-like portion of the active stack 103. In the example shown, the trenches 120 extend vertically above the entire height of the active stack 103 and open onto the top surface of the metal layer 105. The trenches 120 can be aligned with marks previously formed on the control circuit 110. In the example shown, each LED L is located opposite a single metal pad 113L on the control circuit 110 in vertical projection, and each photodiode P is located opposite a single metal pad 113P on the control circuit 110 in vertical projection. By way of example, each LED L and each photodiode P have a substantially square or rectangular shape in plan view. For example, when viewed from above, the trenches 120 form a grid or grid pattern that laterally separates the LEDs L and photodiodes P of the device from each other.

[0074] Then, the trenches can be extended through the metal layers 105 and 115 to isolate the electrical connections on the lower semiconductor layer 103a of the active stack 103 of each LED L and each photodiode P. Subsequent steps can then be implemented to restore the individual or common electrical contacts on the upper semiconductor layer 103a of the active stack 103 of each LED L and each photodiode P. These steps are not described in detail and are within the scope that a person skilled in the art can grasp from the instructions of this specification. By way of example, these steps are similar to the steps already described in the patent application WO2017194845 or the patent application WO2019092357 previously filed by the applicant.

[0075] During the step of etching Figure 1D the active stack 103 shown, additional relaxation of the mechanical stress present in the epitaxially grown active stack 103 occurs via the edges of the etched islands or mesa. This relaxation depends on the size of the islands or mesa. In particular, islands or mesa with small dimensions exhibit high stress relaxation, while islands or mesa with larger dimensions retain relatively high mechanical stress. The relaxation can further depend on the nature of the substrate, which can include, for example, a stack of gallium nitride layers on a silicon layer, or a stack of gallium nitride layers on a sapphire layer, or a stack of porous gallium nitride layers on a silicon layer.

[0076] According to an aspect of the first embodiment, the following is provided, which defines:

[0077] - an LED L having a relatively small lateral dimension so as to obtain a significant relaxation of the mechanical stress in the active stack 103 and thus a relatively large downward shift of the emission peak, and

[0078] - a photodiode P having a relatively large lateral dimension so as to achieve less relaxation of the mechanical stress in the active stack 103 and thus a relatively low downward shift of the absorption peak.

[0079] This allows the Stokes shift that naturally exists between the emission peak and the absorption peak of the active stack 103 to be at least partially compensated.

[0080] By way of example, the islands or mesa forming the LED L have a lateral dimension less than or equal to 5 μm, such as less than or equal to 4 μm, such as less than or equal to 2 μm. This causes the active stack to be almost completely relaxed during the etching of the LED. For its part, the islands or mesa forming the photodiode P have a lateral dimension greater than the lateral dimension of the LED, such as at least twice that of the LED, such as at least four times that of the LED, in order to maintain a relatively high mechanical stress in the active stack 103 of the photodiode P.

[0081] By way of non-limiting example, for a GaN-based active stack and for a square LED L with a side of about 1 μm, and for a photodiode P with a side of about 8 - 10 μm, an emission peak of the LED L was observed to be aligned with a reception peak of the photodiode P.

[0082] The described embodiments are not limited to Figure 1D the example of the arrangement of the LED L and the photodiode P shown in. By way of example, the device may include a plurality of LED Ls on a first portion of the surface of the integrated control circuit 110, for example identical (except for manufacturing dispersion), for example arranged in a matrix in rows and columns, for example with a constant inter-LED spacing. The device may further include a plurality of photodiodes P on a second portion of the surface of the integrated control circuit 110, for example identical (except for manufacturing dispersion), for example arranged in a matrix in rows and columns, for example with a constant inter-photodiode spacing. The inter-LED spacing in the first region is, for example, the same as the inter-photodiode spacing in the second region. On the other hand, the lateral dimension of the LEDs in the first region is smaller than the lateral dimension of the photodiodes in the second region.

[0083] In addition to the differential sizing of the LED L and the photodiode P, another parameter that reduces the wavelength shift between the emission peak of the LED and the absorption peak of the photodiode is the charge carrier density in the active stack, and in particular the charge carrier density in the quantum wells of the active layer 103b. More specifically, a high carrier density will cause the electric field present in the active stack to be shielded, and thus cause the optimal operating wavelength of the active stack to be shifted downward.

[0084] Thus, advantageously, the control circuit 110 is configured to drive the LED L at a higher voltage than the photodiode P. This allows the carrier density obtained in the LED L to be higher than that obtained in the photodiode P, and thus the shift between the emission peak of the LED L and the absorption peak of the photodiode P is reduced. By way of example, the drive voltage is selected such that the carrier density in the LED L is at least twice, for example at least five times, or approximately ten times, the carrier density in the photodiode P.

[0085] The value of the wavelength shift associated with the increase in current density in an LED depends on the structure of the active stack and, in particular, on the width of the quantum wells in the active layer 103b. In particular, the wider the well, the greater the electric field screening associated with the increase in carrier density, and thus the greater the downward shift of the optimal emission wavelength of the LED associated with the increase in carrier density. On the other hand, increasing the width of the well means a longer radiative recombination time, which may be disadvantageous for communication applications that require short recombination times. Those skilled in the art will be able to select an appropriate compromise according to the needs of the application. By way of illustrative, non-limiting example, for an LED including a 4 nm thick InGaN quantum well with an indium content of 14.3%, compared to driving the LED at a current density of about 10 A / cm 2 driving the same LED at a current density of about 100 A / cm 2 results in a blue shift of the emission peak of about 6 nm.

[0086] To fully compensate for the Stokes shift, for example, by using an LED smaller than the photodiode, the mechanical relaxation effect described above can be combined with the field screening effect by carriers by using a higher current density in the LED than in the photodiode. By way of illustrative, non-limiting example, for a gallium nitride-based LED including an InGaN quantum well, there is a wavelength shift of about 30 nm between a 4 μm wide LED driven at a current density of about 200 A / cm 2 and the same type of 25 μm wide LED driven at a current density of about 10 A / cm 2 . In this 30 nm shift, about 20 nm is due to the difference in size and the rest (about 10 nm) is due to the difference in current density. This shift is typically the same as the Stokes shift between emission and reception in the active stack.

[0087] It should be noted that compensation for the difference in carrier density between the LED and the photodiode can also be achieved in a device with an LED L having a lateral dimension equal to or even greater than the lateral dimension of the photodiode P.

[0088] According to a second embodiment, before the co-epitaxy step, during which an active emission and reception stack is formed simultaneously, the face of the support layer of the semiconductor material opposite the photodiode of the device is locally porousized, and the active stack is epitaxially grown thereon. This results in the relaxation of mechanical stress in the active stack of the photodiode during epitaxy, particularly during the formation of the active layer 103b of the stack. This relaxation leads to a difference in the proportion of semiconductor alloy species in the active layer 103b formed between the photodiode and the LED. In particular, in the case where the active layer includes InGaN quantum wells, the result is a greater incorporation of indium in the photodiode quantum wells than in the LED quantum wells. This leads to a red shift, i.e., an upward shift, of the absorption peak of the photodiode, and thus at least partially compensates for the Stokes shift between the emission peak and the absorption peak of the active stack.

[0089] Figures 2A through 2F is a cross-sectional view schematically showing the steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to a second embodiment.

[0090] Figure 2A A structure including a semiconductor support stack 210 on one face of a support substrate 101 is shown. The support substrate 101 is, for example, the same as or similar to that described above. The semiconductor support stack 210 is made of, for example, a III-V semiconductor material, such as gallium nitride. The semiconductor support stack 210 includes at least one doped semiconductor layer 210b, the doping level of which is selected such that the layer 210b can be made porous during a subsequent electrolytic porousization step. By way of example, the layer 210b is N-type doped. For example, the layer 210b is made of N-type doped gallium nitride with a doping level between 10 19 and 1.5×10 19 atoms / cm 3 ³.

[0091] In the example shown, the support stack 210 further includes a semiconductor layer 210a on the bottom face of the layer 210b, for example in contact with the bottom face of the layer 210b. The layer 210a is made of, for example, the same material as the layer 210b, but with a doping level lower than that of the layer 210b, for example at least ten times lower than the doping level of the layer 210b. Alternatively, the layer 210a is made of a material different from that of the layer 210b.

[0092] In the example shown, the support stack 210 further includes a semiconductor layer 210c on the top face of the layer 210b, for example in contact with the top face of the layer 210b. The layer 210c is made of, for example, the same material as the layer 210b, but with a doping level lower than that of the layer 210b, for example at least ten times lower, preferably at least 100 times lower, than the doping level of the layer 210b. Alternatively, the layer 210a is made of a material different from that of the layer 210b.

[0093] Layers 210a, 210b, and 210c of the support stack 210, for example, each extend continuously and with a substantially uniform thickness above the entire surface of the substrate 101.

[0094] Layers 210a, 210b, and 210c are formed continuously, for example, by epitaxy on the top surface of the support substrate 101.

[0095] By way of example, the support substrate 101 is made of sapphire or silicon. An optional buffer layer (not shown) can form an interface between the top surface of the substrate 101 and the bottom surface of layer 210a underlying the support stack 210.

[0096] Figure 2B Steps are shown for forming trenches 220 from its top surface in the support stack 210, for example, by lithography followed by etching, in order to define a plurality of island - shaped or mesa - shaped support pads SL and SP in the stack 210. Each support pad SL is intended to receive an LED L of a device on its top surface, and each support pad SP is intended to receive a photodiode P of a device on its top surface.

[0097] In the example shown, the trenches 220 extend vertically from the top surface of the stack, completely through layers 210c and 210b, and open into layer 210a without completely passing through it. Alternatively, the trenches 220 completely pass through layer 210.

[0098] For example, when viewed from above, the trenches 220 form a grid or grid pattern that laterally separates the support pads SL and SP, which are intended to receive the LED L and the photodiode P of the device, from each other.

[0099] For example, both the support pads SP and SL have the same lateral dimension, for example, between 1 μm and 25 μm, for example, between 2 μm and 8 μm. For example, when viewed from above, the support pads SP and SL have a square or rectangular shape.

[0100] At this point, in each of the support pads SL and SP, the flanks of the doped semiconductor layer 210b of the support stack are exposed.

[0101] Figure 2C A structure is shown for selectively porosifying layer 210b at the end of the step, which structure is only in the support pad SP of the photodiode P of the device. During this step, layer 210b of the support pad SP is made porous by electrochemical etching or electroporation. On the other hand, layer 210b of the support pad SL remains non - porous.

[0102] To this end, the side wings of the support pads can be coated beforehand with a protective layer (not visible in the figures), made of, for example, an insulating material such as silica or nitride. The protective layer is, for example, initially deposited above the entire top surface and then locally removed, for example, by photolithography and etching, so as to expose the side wings of the support pad SP without exposing the side wings of the support pad SL.

[0103] Then, the structure can be immersed in an electrolytic bath (not visible in the figures), such as an oxalic acid-based solution, such as an aqueous oxalic acid solution.

[0104] Then, a bias voltage is applied so as to cause a current to flow through the doped semiconductor layer 210b. By way of example, a voltage is applied between a first electrode (not visible in the figures) connected to the layer 210a and an electrolyte (not visible in the figures) connected to the layer 210c through the wafer.

[0105] Under the action of the bias current, the portions of the layer 210b that are in contact with the electrolyte via their side wings (i.e., the portions of the layer 210b that are included in the support pad SP of the photodiode P of the device) become porous. On the other hand, the portions of the protective layer 210b that are not in contact with the electrolyte (i.e., the portions of the layer 210b that are included in the support pad SL of the LED L of the device) remain intact (non-porous).

[0106] It should be noted that, in this example, the doping levels of the stacked layers 210a, 210b, and 210c of the support are chosen such that only the layer 210b becomes porous during the electroporation step.

[0107] At the end of this step, the protective layer coating the side wings of the support pad SL can be removed.

[0108] Figure 2D The structure obtained at the end of the co-epitaxy step is shown, during which an active semiconductor stack 103 is formed on each support pad SL and each support pad SP. The epitaxy is located, for example, in an opening in a dielectric layer etched previously, which is not shown.

[0109] For example, on each support pad SL and SP, the active stack 103 covers the entire top surface of the pad. The portion of the active stack 103 covering each SL pad defines the LED of the device. The portion of the active stack 103 covering each SP defines the photodiode of the device.

[0110] On each support pad SP and SL, the active stack 103 includes, in order starting from the top surface of the pad, a semiconductor layer 103a, a semiconductor layer 103b, and a semiconductor layer 103c, for example, as previously described with respect to Figures 1A to 1DThe same or similar as described. For example, layers 103a, 103b, and 103c are formed continuously by epitaxy from the top surfaces of pads SP and SL. By way of example, in each of pads SP and SL, the lower semiconductor layer 103a of the active stack 103 contacts the top surface of layer 210c via its bottom surface.

[0111] The presence of the porous layer 210b in the support pad SP results in a greater mechanical relaxation in the active stack of the photodiode P than in the active stack of the LED L. Thus, during epitaxy, different species are incorporated into the active layer 103b of the active stack of the LED L and the active layer 103b of the active stack of the photodiode P. In particular, in the case of an InGaN-based active layer 103b, this results in a greater incorporation of indium in the active layer 103b of the photodiode P than in the active layer 103b of the LED L. The presence of the porous layer 210b in the support pad SP of the photodiode P thus shifts the absorption peak of the photodiode P upward in wavelength (towards red), and thus makes it closer to the emission peak of the LED L.

[0112] Figure 2E Shows the structure obtained at the end of the steps for: on each LED L, a contact metallization 232L is formed on and contacts the top surface of the top semiconductor layer 103c of the active stack of the LED, and on each photodiode P, a contact metallization 232P is formed on and contacts the top surface of the top semiconductor layer 103c of the active stack of the photodiode.

[0113] Figure 2E Further shows the step of filling the trenches 220 and the space between the LED L and the photodiode P with an electrically insulating material 234 (such as silicon oxide).

[0114] After filling, a planarization step can be performed, for example by chemical mechanical polishing (CMP), such that the contact metallizations 232L, 232P are flush with the top surface of the filling material 234.

[0115] Figure 2F Shows for transferring Figure 2E the structure shown and attaching it to the control integrated circuit 110, for example similar to Figure 1B the steps shown.

[0116] During this step, Figure 2E the contact metallizations 232L, 232P of the structure shown contact the contact metallizations 113L, 113P of the control circuit 110 via their faces opposite to the support substrate 101.

[0117] By way of example,Figure 2E The structure shown in [Fig. 0] is attached and electrically connected to the control integrated circuit 110 by molecular bonding (e.g., by hybrid metal-metal / oxide-oxide bonding).

[0118] Once the two structures have been assembled, Figure 2E the support substrate 101 of the structure shown can be removed. Additionally, all or part of the semiconductor support stack 210 can be removed, e.g., by grinding or etching.

[0119] In the example shown, layer 210a of the support stack 210 is completely removed, and layers 210b and 210c are retained. However, the described embodiments are not limited to this example.

[0120] Subsequent steps can then be implemented to make individual or common electrical contacts on the top semiconductor layer 103a of the active stack 103 of each LED L and photodiode P. For example, a layer of transparent conductive material (such as a transparent conductive oxide, e.g., indium tin oxide (ITO)) is deposited on Figure 2F the top surface of the structure shown and contacts the top surface. These steps are not described in detail and are within the scope of what a person skilled in the art can do according to the instructions of this specification.

[0121] Similar to what has been described above, the control circuit can optionally be configured to drive the LED and photodiode with a carrier density suitable for reducing the shift between the emission peak of the LED and the absorption peak of the photodiode.

[0122] According to an aspect of the third embodiment, support pads SP and SL are formed in a manner similar to that described above with respect to Figures 2A through 2F those described, but layer 210b of the support pad is selectively porous only after a common epitaxial step of simultaneously forming the active stacks 103 of the LED L and photodiode P. In this third embodiment, layer 210b is porous near the LED L and remains intact (non-porous) near the photodiode P. This results in at least partial relaxation of the mechanical stress in the active stack L of the LED, without imposing such relaxation in the photodiode P. This results in a reduction in the internal electric field in the active stack of the LED compared to the active stack of the photodiode. This reduction in the internal electric field in the active stack of the LED causes a downward shift in the emission peak of the LED. Again, this allows at least partial compensation for the Stokes shift between the emission peak and the absorption peak of the active stack. Thereby bringing the emission peak of the LED closer to the absorption peak of the photodiode and improving the system efficiency.

[0123] Figures 3A through 3E is a cross-sectional view schematically showing the steps in an example embodiment of a method for manufacturing an optoelectronic device according to the third embodiment.

[0124] Figure 3A shows a structure including a semiconductor support stack 210 on one face of a support substrate 101. The support stack 210 and the support substrate 101 are, for example, the same as or similar to those previously described with respect to Figure 2A the content described.

[0125] Figure 3A Further shown are steps for forming an active stack 103 for LEDs and photodiodes on the top face of the semiconductor support stack 210. The active stack 103 is, for example, the same as or similar to the previously described active stack, particularly with respect to Figure 1A . The layers 103a, 103b, and 103c are formed, for example, continuously by epitaxy from the top face of the support stack 210. By way of example, the lower semiconductor layer 103a of the active stack 103 contacts the top face of the layer 210c via its bottom face.

[0126] At this point, the layers of the support stack 210 and the layers of the active stack 103 are each continuous and extend with a uniform thickness above the entire surface of the support substrate 101.

[0127] Figure 3B Shown are steps for forming trenches 320 in the active stack 103 and in the support stack 210 from the top face of the active stack 103, for example by lithography and then etching, so as to define a plurality of island-shaped or mesa-shaped support pads SL and SP in the stack 210. Each support pad SL is coated on its top face with a portion of the active stack 103 that defines the LED L of the device, and each support pad SP is coated on its top face with a portion of the active stack 103 that defines the photodiode P of the device.

[0128] In the example shown, the trenches 320 extend vertically from the top face of the active stack 103, completely through the layers 103c, 103b, 103a, 210c, and 210b, and open into the layer 210a without completely passing through it. Alternatively, the trenches 220 completely pass through the layer 210.

[0129] For example, when viewed from above, the trenches 320 form a grid or grid pattern that laterally separates the LEDs L and photodiodes P from the support pads SL and SP.

[0130] For example, the LEDs L and photodiodes P, and the underlying support pads SP and SL all have the same lateral dimension, for example between 1 μm and 25 μm, for example between 2 μm and 8 μm. By way of example, the LEDs L and photodiodes P and the support pads SP and SL have a square or rectangular shape in a plan view. More generally, the LEDs L and photodiodes P can have any shape, such as circular or hexagonal.

[0131] At this point, in each of the support pads SL and SP, the flanks of the doped semiconductor layer 210b that supports the stack are exposed.

[0132] Figure 3C Shown is the structure obtained at the end of the step for selectively porosifying layer 210b, which is located only in the support pad SL of the LED L of the device. This step is similar to the previous one regarding Figure 2C the step described, except that, in Figure 3C the example of, the layer 210b of the support pad SL is porous while the layer 210b of the support pad SP remains intact (non-porous).

[0133] To this end, during the electroporation step, the flanks of the support pad SP can be protected from contact with the electrolyte by a protective layer (not visible in the figure), while the flanks of the support pad SL are in contact with the electrolyte.

[0134] In Figure 3C the example shown, the bias voltage used to force current through layer 210b is applied, for example, between a first electrode (not visible in the figure) connected to layer 210a and an electrolyte (not visible in the figure) connected to layer 103c through an edge.

[0135] Due to the porosification of the layer 210b in the support pad SL, the mechanical relaxation in the active stack of the LED L is greater than that in the active stack of the photodiode P. This causes the emission peak of the LED to shift downward and thus brings it closer to the absorption peak of the photodiode P.

[0136] Figure 3D Shown is the structure obtained at the end of a step similar to the previous one regarding Figure 2E the step described, which is for forming and contacting a contact metallization 232L on the top surface of the top semiconductor layer 103c of the active stack 103 of each LED L, and for forming and contacting a contact metallization 232P on the top surface of the top semiconductor layer 103c of the active stack 103 of each photodiode P.

[0137] Figure 2E Further shown is the step of filling the trenches 320 and the space between the LED L and the photodiode P with an electrically insulating material 234 (such as silicon oxide).

[0138] After filling, a planarization step can be performed, for example, by chemical mechanical polishing (CMP), such that the contact metallizations 232L, 232P are flush with the top surface of the filling material 234.

[0139] Figure 3E Shown is similar to the above regardingFigure 2F The steps of the steps for transferring and attaching the Figure 3D structure to the control integrated circuit 110 and removing the support substrate 101, and optionally, removing all or part of the semiconductor active stack 210.

[0140] Similar to those already described above, subsequent steps can then be implemented to make individual or common electrical contacts on the top semiconductor layer 103a of the active stack 103 of each LED L and each photodiode P.

[0141] Similar to those already described above, the control circuit can optionally be configured to drive the LED and the photodiode with a carrier density suitable for reducing the shift between the emission peak of the LED and the absorption peak of the photodiode.

[0142] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these embodiments can be combined and other variations will readily occur to those skilled in the art. In particular, the described embodiments are not limited to the example materials and dimensions mentioned in the description.

[0143] Furthermore, although the active stacks 103 of the LED and the photodiode have been described above as being attached to the control integrated circuit by direct full - wafer metal - to - metal bonding or by direct hybrid metal - to - metal / dielectric - to - electrical bonding, the described embodiments are not limited to these particular examples. More generally, the active stacks 103 of the LED and the photodiode can be attached to the control integrated circuit by any other means, such as by full - wafer direct oxide - to - oxide bonding.

[0144] Furthermore, it should also be noted that the first embodiment and the third embodiment can be combined.

[0145] Finally, the actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art based on the functional descriptions provided herein.

Claims

1. A method for manufacturing an optoelectronic device comprising at least one LED (L) and at least one photodiode (P), comprising the following successive steps: a) epitaxially forming a common active semiconductor emission and reception stack (103) of said LED and said photodiode; b) forming a trench (120) extending vertically through said active stack (103) and laterally delimiting said LED (L) and said photodiode (P), Among them, said trench being arranged such that the lateral dimension of said LED (L) is smaller than the lateral dimension of said photodiode (P).

2. The method according to claim 1, wherein The trench (120) is arranged such that the lateral dimension of the LED (L) is at least half of the lateral dimension of the photodiode (P).

3. The method according to claim 1 or 2, wherein, The trench (120) is arranged such that the lateral dimension of the LED (L) is at least four times smaller than the lateral dimension of the photodiode (P).

4. The method according to any one of claims 1 to 3, wherein, The trench (120) is arranged such that the lateral dimension of the LED (L) is less than 4 μm.

5. The method according to any one of claims 1 to 4, between step a) and step b), comprising a step of transferring and attaching said active stack (103) to a face of a control integrated circuit (110) previously formed in and on a semiconductor substrate (101).

6. The method according to claim 5, wherein, During said transfer and attachment step, said active stack (103) is attached to said face of said control integrated circuit (110) by molecular bonding.

7. The method according to claim 5 or 6, wherein At the end of said transfer and attachment step, said active stack (103) extends continuously above the entire surface of said control integrated circuit (110).

8. The method according to any one of claims 1 to 7, wherein Said semiconductor active stack (103) comprises one or more III-V or II-VI semiconductor alloys.

9. A optoelectronic device comprising at least one LED (L) and at least one photodiode (P), each of the at least one LED (L) and at least one photodiode (P) comprising an active semiconductor emission and reception stack (103) of the same nature and composition, wherein, The lateral dimension of said LED (L) is smaller than the lateral dimension of said photodiode (P).

10. The device according to claim 9, further comprising a control integrated circuit (110), on a face of which said LED (L) and said photodiode (P) are attached, said control integrated circuit (110) being adapted to drive said LED at a higher current density than said photodiode (P).

11. The device according to claim 10, wherein, The control integrated circuit (110) is adapted to drive the LED (L) at a current density at least ten times higher than that of the photodiode (P).

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