Efficient rectifying circuit

Abstract

A source electrode of a first MOS tube is connected with one electrode of a power supply, a grid electrode of a second MOS tube is also connected with the electrode of the power supply through a fourth resistor, a grid electrode of a third MOS tube is also connected with the electrode of the power supply through a fifth resistor, and a source electrode of a fourth MOS tube is also connected with the electrode of the power supply; the grid electrode of the first MOS tube is connected with the other electrode of the power supply through a second resistor, the source electrode of the second MOS tube is also connected with the electrode of the power supply, the source electrode of the third MOS tube is also connected with the electrode of the power supply, and the grid electrode of the fourth MOS tube is also connected with the electrode of the power supply through a sixth resistor; the drain electrode of the first MOS tube and the drain electrode of the second MOS tube are connected to jointly serve as the positive output end of the rectifying circuit, and the drain electrode of the third MOS tube and the drain electrode of the fourth MOS tube are connected to jointly serve as the negative output end of the rectifying circuit. The positive output end of the rectifying circuit always outputs positive voltage; and compared with the condition that voltage drop occurs when a diode is used, the efficiency of the electric equipment is higher.

Description

Technical Field

[0001] The present invention relates to an efficient rectifier circuit. Background Art

[0002] With the development of automation and electrification, the power consumption is increasing, and many devices are powered by batteries. A large part of the devices or apparatuses are powered by a DC power supply. For safety and convenience, many devices rectify the current to a fixed polarity by rectification to prevent the wrong connection of the positive and negative poles of the power supply. Usually, a rectifier bridge composed of diodes can be used to rectify the current input from the power supply to a fixed polarity. However, due to the voltage drop of the diode itself, the voltage output by the rectifier bridge to the electrical device is less than the power supply voltage, resulting in a reduction in the efficiency of the electrical device. Summary of the Invention

[0003] The object of the present invention is to overcome the defects existing in the prior art, provide an efficient rectifier circuit, solve the faults and safety problems caused by the power supply polarity problem at present, and improve the efficiency of the electrical device. The present invention makes improvements on the phenomenon that the diode rectification of the rectifier bridge will cause voltage drop, and provides a rectification method by using MOS transistors instead of diodes, achieving the effects of rectification and almost no voltage drop after rectification.

[0004] To achieve the above object, the technical solution of the present invention is to design an efficient rectifier circuit, including a power supply, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first diode, a second diode, a third diode, a fourth diode, a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor; The source of the first MOS transistor is connected to one pole of the power supply, the gate of the second MOS transistor is also connected to this pole of the power supply through the fourth resistor, the gate of the third MOS transistor is also connected to this pole of the power supply through the fifth resistor, and the source of the fourth MOS transistor is also connected to this pole of the power supply; The gate of the first MOS transistor is connected to the other pole of the power supply through the second resistor, the source of the second MOS transistor is also connected to this pole of the power supply, the source of the third MOS transistor is also connected to this pole of the power supply, and the gate of the fourth MOS transistor is also connected to this pole of the power supply through the sixth resistor; The drain of the first MOS transistor is connected to the drain of the second MOS transistor and jointly serves as the positive output terminal of the rectifier circuit, and the drain of the third MOS transistor is connected to the drain of the fourth MOS transistor and jointly serves as the negative output terminal of the rectifier circuit. Through the cooperation of diodes, step-down resistors and triodes, it is realized that no matter how the positive and negative poles of the voltage are connected to the rectifier circuit, the output terminals of this rectifier circuit can always maintain a fixed polarity with one being positive and the other being negative, effectively preventing the problem of wrong connection of the positive and negative poles of the power supply.

[0005] A further technical solution is that a first resistor and a first diode are connected between the gate and the source of the first MOS transistor, and the cathode of the first diode is connected to the gate of the first MOS transistor.

[0006] A further technical solution is that a third resistor and a second diode are connected between the gate and the source of the second MOS transistor, and the cathode of the second diode is connected to the gate of the second MOS transistor.

[0007] A further technical solution is that a third diode is also connected between the gate and the drain of the third MOS transistor; the cathode of the third diode is connected to the gate of the third MOS transistor, and the anode of the third diode is connected to the drain of the third MOS transistor.

[0008] A further technical solution is that a fourth diode is also connected between the gate and the drain of the fourth MOS transistor; the cathode of the fourth diode is connected to the gate of the fourth MOS transistor, and the anode of the fourth diode is connected to the drain of the fourth MOS transistor.

[0009] The advantages and beneficial effects of the present invention are as follows: By improving the rectifier bridge, a method of using MOS transistors instead of diodes is provided to achieve the rectification effect, and there is almost no voltage drop in the rectifier bridge, so as to improve the power consumption efficiency of the equipment.

[0010] Through the cooperation of diodes, step-down resistors and triodes, it is realized that no matter how the positive and negative poles of the voltage are connected to the rectification circuit, the output terminals of this rectification circuit can always maintain a fixed polarity with one being positive and the other being negative, which can effectively prevent the problem of incorrect connection of the positive and negative poles of the power supply.

[0011] No matter how the positive and negative poles of the power supply are connected to the rectification circuit, one of the output terminals of the circuit always outputs a positive voltage, and the other output terminal always outputs a negative voltage; and since the internal resistance of the MOS transistor is very small and can almost be ignored, the voltage loss from the power supply to the two output terminals of the rectification circuit is very small and can also almost be ignored. Therefore, the voltage at the two output terminals of the rectification circuit is approximately equal to the voltage across the power supply. Compared with the case where there is a voltage drop in the diode, the power consumption efficiency of the electrical equipment is higher. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a schematic diagram of an efficient rectification circuit of the present invention.

[0013] In the figure: U, power supply; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; R6, sixth resistor; D1, first diode; D2, second diode; D3, third diode; D4, fourth diode; Q1, first MOS transistor; Q2, second MOS transistor; Q3, third MOS transistor; Q4, fourth MOS transistor;. Detailed implementation manners

[0014] The following combines the drawings and embodiments to further describe the detailed implementation manners of the present invention. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and cannot be used to limit the protection scope of the present invention.

[0015] The present invention is an efficient rectifier circuit, which consists of: power supply U; first resistor R1, second resistor R2, third resistor R3, fourth resistor R4, fifth resistor R5, sixth resistor R6; first diode D1, second diode D2, third diode D3, fourth diode D4; first MOS transistor Q1, second MOS transistor Q2, third MOS transistor Q3, fourth MOS transistor Q4, where the first MOS transistor Q1 and the second MOS transistor Q2 are P-channel, and the third MOS transistor Q3 and the fourth MOS transistor Q4 are N-channel.

[0016] The working principle of the present invention is as follows: when the a end of the power supply U is the positive pole and the b end is the negative pole, the source (S pole) voltage of Q1 is connected to the positive pole of the a end of the power supply U, and its voltage is represented by VS1. After being stepped down by R1 and D1, it becomes the gate (G pole) voltage of Q1, represented by VG1, and then is stepped down by R2 to the negative pole voltage of the b end of the power supply U; at this time, VS1 > VG1, and VS1 - VG1 is greater than the conduction voltage of Q1, meeting the conduction condition of the P-channel MOS transistor, and Q1 conducts; the source (S pole) of Q2 is connected to the negative pole of the b end of the power supply U, and its voltage is represented by VS2. The voltage of the G pole of Q2 is connected to the positive pole of the a end of the power supply U through R4, and its voltage is represented by VG2. Since VS2 < VG2, it does not meet the conduction condition of the P-channel MOS transistor, and Q2 does not conduct; the gate (G pole) of Q3 is connected to the positive pole of the a end of the power supply U through R5, and its voltage is represented by VG3. The source (S pole) of Q3 is connected to the negative pole of the b end of the power supply U, and its voltage is represented by VS3. At this time, VG3 > VS3, and VG3 - VS3 is greater than the conduction voltage of Q3; meeting the conduction condition of the N-channel MOS transistor, Q3 conducts; the gate (G pole) of Q4 is connected to the negative pole of the b end of the power supply U through R6, and its voltage is represented by VG4. The source (S pole) of Q4 is connected to the positive pole of the a end of the power supply U, and its voltage is represented by VS4. At this time, VS4 > VG4, not meeting the conduction condition of the N-channel MOS transistor, and Q4 does not conduct; at this time, the conducting MOS transistors are Q1 and Q3. The c end of the circuit is connected to the positive pole of the a end of the power supply U through Q1, and the c end outputs the positive pole voltage of the power supply U; the d end is connected to the negative pole of the b end of the power supply through Q3, and the d end outputs the negative pole voltage of the power supply U.

[0017] When the b terminal of the power supply U is the positive pole of the power supply and the a terminal is the negative pole of the power supply, the gate (G pole) of Q1 is connected to the positive b terminal of the power supply U through R2, and its voltage is VG1. The source (S pole) of Q1 is connected to the negative a terminal of the power supply U, and its voltage is VS1. At this time, VS1 < VG1, which does not meet the conduction condition of the P-channel MOS transistor, so Q1 is not conducted; the source (S pole) of Q2 is connected to the positive b terminal of the power supply, and its voltage is VS2. Then, through the voltage reduction of R3 and D2, it reaches the gate (G pole) of Q2, and then through R4, it is connected to the negative a terminal of the power supply U. The gate (G pole) voltage of Q2 is VG2. At this time, VG2 < VS2, and VS2 - VG2 is greater than the conduction voltage of Q2, meeting the conduction condition of the P-channel MOS transistor, so Q2 is conducted; the source (S pole) of Q3 is connected to the positive b terminal of the power supply U, and its voltage is VS3. The gate (G pole) of Q3 is connected to the negative a terminal of the power supply U through R5, and its voltage is VG3. At this time, VS3 > VG3, which does not meet the conduction condition of the N-channel MOS transistor, so Q3 is not conducted; the source (S pole) of Q4 is connected to the negative a terminal of the power supply U, and its voltage is VS4. The gate (G pole) of Q4 is connected to the positive b terminal of the power supply U through R6, and its voltage is VG4. At this time, VG4 > VS4, and VG4 - VS4 is greater than the conduction voltage of Q4, so Q4 is conducted; at this time, the conducted MOS transistors are Q2 and Q3. The c terminal of the circuit is connected to the positive b terminal of the power supply U through Q2, and the c terminal outputs the positive voltage of the power supply U; the d terminal is connected to the negative a terminal of the power supply through Q4, and the d terminal outputs the negative voltage of the power supply U.

[0018] As can be seen from the above, through Figure 1 the circuit, regardless of whether the a terminal of the power supply U is the positive pole and the b terminal is the negative pole, or the a terminal is the negative pole and the b terminal is the positive pole, the c terminal of the circuit always outputs the positive voltage, and the d terminal outputs the negative voltage; and because the internal resistance of the MOS is very small and can be almost ignored, the voltage loss from the power supply U to the c and d terminals of the circuit is very small and can also be almost ignored. Therefore, the voltage at the c and d terminals is approximately equal to the voltage at both ends of the power supply. Compared with the case where there is a voltage drop in the diode, the efficiency of the electrical equipment is higher.

[0019] The above description is only the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. An efficient rectifier circuit, characterized in that, It includes a power supply, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first diode, a second diode, a third diode, a fourth diode, a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor; The source electrode of the first MOS transistor is connected to one pole of the power supply. The gate electrode of the second MOS transistor is also connected to this pole of the power supply through the fourth resistor. The gate electrode of the third MOS transistor is also connected to this pole of the power supply through the fifth resistor. The source electrode of the fourth MOS transistor is also connected to this pole of the power supply; The gate electrode of the first MOS transistor is connected to the other pole of the power supply through the second resistor. The source electrode of the second MOS transistor is also connected to this pole of the power supply. The source electrode of the third MOS transistor is also connected to this pole of the power supply. The gate electrode of the fourth MOS transistor is also connected to this pole of the power supply through the sixth resistor; The drain electrode of the first MOS transistor is connected to the drain electrode of the second MOS transistor, and they jointly serve as the positive output terminal of the rectification circuit. The drain electrode of the third MOS transistor is connected to the drain electrode of the fourth MOS transistor, and they jointly serve as the negative output terminal of the rectification circuit.

2. The efficient rectifier circuit according to claim 1, wherein A first resistor and a first diode are connected between the gate electrode and the source electrode of the first MOS transistor, and the cathode of the first diode is connected to the gate electrode of the first MOS transistor.

3. An efficient rectifier circuit according to claim 2, wherein, A third resistor and a second diode are connected between the gate electrode and the source electrode of the second MOS transistor, and the cathode of the second diode is connected to the gate electrode of the second MOS transistor.

4. An efficient rectifier circuit according to claim 3, wherein, A third diode is further connected between the gate electrode and the drain electrode of the third MOS transistor; the cathode of the third diode is connected to the gate electrode of the third MOS transistor, and the anode of the third diode is connected to the drain electrode of the third MOS transistor.

5. An efficient rectifier circuit according to claim 4, wherein, A fourth diode is further connected between the gate electrode and the drain electrode of the fourth MOS transistor; the cathode of the fourth diode is connected to the gate electrode of the fourth MOS transistor, and the anode of the fourth diode is connected to the drain electrode of the fourth MOS transistor.

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