Composite collector IGBT structure

Abstract

The invention relates to the technical field of semiconductor chips, and discloses a composite collector IGBT structure which comprises a collector metal layer, a composite collector region arranged on the upper surface of the collector metal layer, an N-type buffer region arranged on the upper surface of the composite collector region, an N-type epitaxial layer arranged on the upper surface of the N-type buffer region, and a P-type body region arranged on the upper surface of the N-type epitaxial layer. The upper surface of the P-type body region is provided with a plurality of strip-shaped gate trenches, the inner wall of each gate trench is filled with a gate oxide layer and a polycrystalline silicon gate, and the gate oxide layer is arranged between the inner wall of the gate trench and the outer wall of the polycrystalline silicon gate. A heavily doped N-type emitter region is arranged on the upper surface of the P-type body region between two adjacent gate trenches, an insulating dielectric layer is arranged on the upper surfaces of the heavily doped N-type emitter region and the polycrystalline silicon gate, and a metal source emitter is arranged on the upper surface of the insulating dielectric layer; according to the invention, the low saturation voltage is provided, the turn-off time can be reduced, and the turn-off loss can be reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chips, and particularly to a composite collector IGBT structure. Background Art

[0002] As a power semiconductor device, IGBT is widely used in the fields of rail transit, smart grid, industrial energy conservation, electric vehicles, and new energy equipment. It has the characteristics of energy conservation, convenient installation, convenient maintenance, and stable heat dissipation. It is the core device for energy conversion and transmission. IGBT is a composite fully controlled voltage-driven power semiconductor device composed of BJT (bipolar junction transistor) and MOS (insulated gate field effect transistor), combining the advantages of high input impedance of MOSFET and low conduction voltage drop of GTR. GTR has a low saturation voltage drop and a large carrier density, but requires a large drive current; MOSFET has a very small drive power and a fast switching speed, but has a large conduction voltage drop and a small carrier density. IGBT combines the advantages of the above two devices, with small drive power and low saturation voltage drop.

[0003] For example, the patent document with the publication number CN102931223B discloses a collector IGBT with a vertical field plate structure, including an N-type base region, and further including a spaced N+-type region layer formed on the back surface of the N-type base region, and a spaced P+-type collector layer formed in the region on the back surface of the N-type base region that is not covered by the spaced N+-type region layer. The spaced N+-type region layer is formed by implanting pentavalent elements at intervals on the back surface of the N-type base region and then undergoing all the thermal processes on the front surface of the N-type base region. Or the spaced N+-type region layer is obtained by epitaxially growing an N+-type layer on the back surface of the N-type base region, then etching at intervals, and then undergoing all the thermal processes on the front surface of the N-type base region; however, there are still many deficiencies in this prior art. For example, due to the existence of switching losses, IGBT generates more switching losses when operating in a high-frequency environment compared to a low-frequency environment, which will cause the device temperature to rise, thereby affecting the device performance and reducing the safe operating area of the device. Summary of the Invention

[0004] The purpose of the present invention is to provide a composite collector IGBT structure to solve the problems raised in the above background art.

[0005] To achieve the above object, the present invention provides the following technical solution: a composite collector IGBT structure, including a collector metal layer, on the upper surface of which a composite collector region is provided. The composite collector region includes a P-type collector region and an N-type heavily doped collector region. On the upper surface of the composite collector region, an N-type buffer region is provided. On the upper surface of the N-type buffer region, an N-type epitaxial layer is provided. On the upper surface of the N-type epitaxial layer, a P-type body region is provided. On the upper surface of the P-type body region, a plurality of strip-shaped gate trenches are formed. The inner wall of each gate trench is filled with a gate oxide layer and a polysilicon gate, and the gate oxide layer is disposed between the inner wall of the gate trench and the outer wall of the polysilicon gate. On the upper surface of the P-type body region between two adjacent gate trenches, a heavily doped N-type emitter region is further provided. On the upper surface of the heavily doped N-type emitter region and the polysilicon gate, an insulating dielectric layer is provided. On the upper surface of the insulating dielectric layer, a metal source emitter is provided.

[0006] As a further improvement to the above solution, a contact hole is formed inside the insulating dielectric layer, and the contact hole penetrates through the insulating dielectric layer and extends into the heavily doped N-type emitter region and the P-type body region in sequence. A heavily doped P region is provided on the bottom surface of the contact hole, and a contact post is inserted into the contact hole, and the contact post is located above the heavily doped P region.

[0007] As a further improvement to the above solution, the metal source emitter forms an ohmic contact with the heavily doped N-type emitter region and the heavily doped P region through the contact post.

[0008] As a further improvement to the above solution, the N-type heavily doped collector region is circular, and a plurality of the N-type heavily doped collector regions are combined into a square queue, and the collector region outside the N-type heavily doped collector region is the P-type collector region.

[0009] As a further improvement to the above solution, a plurality of the gate trenches are arranged parallel to each other, and the gate trenches penetrate through the P-type body region in the horizontal direction, and the bottoms of the gate trenches extend into the N-type epitaxial layer.

[0010] As a further improvement to the above solution, the upper surface of the heavily doped N-type emitter region is flush with the upper surface of the polysilicon gate.

[0011] As a further improvement to the above solution, a plurality of the contact posts are integrally formed at the bottom end of the metal source emitter, and a plurality of heat dissipation trenches are further formed on the upper surface of the metal source emitter.

[0012] Compared with the prior art, the beneficial effects of the present invention are:

[0013] The present invention can reduce the P+ region on the back of the IGBT structure, lower the hole concentration, so the turn-off loss is reduced; at the same time, electrons directly reach the collector metal layer from the drift region through the N-type region. Compared with the existing IGBT structure, the excess electrons in the drift region can be discharged more quickly. Therefore, the composite collector IGBT structure of the present invention has a lower saturation voltage while reducing the turn-off time and turn-off loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0015] Figure 1 It is a schematic three-dimensional structure diagram of the present invention.

[0016] In the figure: 1 - collector metal layer; 2 - composite collector region; 201 - P-type collector region; 202 - N-type heavily doped collector region; 3 - N-type buffer region; 4 - N-type epitaxial layer; 5 - P-type body region; 6 - gate trench; 7 - gate oxide layer; 8 - polysilicon gate; 9 - heavily doped N-type emitter region; 10 - insulating dielectric layer; 11 - metal source emitter; 12 - contact hole; 13 - heavily doped P region; 14 - contact post. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0017] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the protection scope of the present invention.

[0018] A composite collector IGBT structure, as Figure 1As shown in the figure, it includes a collector metal layer 1. On the upper surface of the collector metal layer 1, a composite collector region 2 is provided. The composite collector region 2 includes a P-type collector region 201 and an N-type heavily doped collector region 202. The N-type heavily doped collector region 202 is circular, and several N-type heavily doped collector regions 202 are combined into a square queue. The collector region outside the N-type heavily doped collector region 202 is the P-type collector region 201. On the upper surface of the composite collector region 2, an N-type buffer region 3 is provided. On the upper surface of the N-type buffer region 3, an N-type epitaxial layer 4 is provided. On the upper surface of the N-type epitaxial layer 4, a P-type body region 5 is provided. On the upper surface of the P-type body region 5, several strip-shaped gate trenches 6 are opened. The inner wall of each gate trench 6 is filled with a gate oxide layer 7 and a polysilicon gate 8, and the gate oxide layer 7 is arranged between the inner wall of the gate trench 6 and the outer wall of the polysilicon gate 8. On the upper surface of the P-type body region 5 between two adjacent gate trenches 6, a heavily doped N-type emitter region 9 is also provided. On the upper surface of the heavily doped N-type emitter region 9 and the polysilicon gate 8, an insulating dielectric layer 10 is provided. On the upper surface of the insulating dielectric layer 10, a metal source emitter 11 is provided.

[0019] As Figure 1 shown, a contact hole 12 is opened inside the insulating dielectric layer 10, and the contact hole 12 penetrates through the insulating dielectric layer 10 and extends into the heavily doped N-type emitter region 9 and the P-type body region 5 in sequence. A heavily doped P region 13 is provided on the bottom surface of the contact hole 12. A contact post 14 is inserted into the contact hole 12, and the contact post 14 is located above the heavily doped P region 13; the metal source emitter 11 forms an ohmic contact with the heavily doped N-type emitter region 9 and the heavily doped P region 13 through the contact post 14.

[0020] Among them, as Figure 1 shown, several gate trenches 6 are arranged parallel to each other, and the gate trenches 6 penetrate through the P-type body region 5 in the horizontal direction. The bottoms of the gate trenches 6 all extend into the N-type epitaxial layer 4; the upper surfaces of the heavily doped N-type emitter region 9 and the polysilicon gate 8 are flush; several contact posts 14 are integrally formed at the bottom end of the metal source emitter 11, and several heat dissipation trenches are also opened on the upper surface of the metal source emitter 11.

[0021] The working principle of Embodiment 1 is: a channel is formed by applying a positive gate voltage to provide base current for the transistor and turn on the device. Conversely, applying a reverse gate voltage eliminates the channel, cuts off the base current, and turns off the device;

[0022] Specifically: when a voltage of 0 or negative is applied between the gate and emitter of the IGBT, the channel of the front MOSFET structure disappears, and the IGBT is in the off state.

[0023] When the collector-emitter voltage Vce < 0, the N-drift / P-collector PN junction is reverse-biased, and the IGBT is in the reverse blocking state.

[0024] When the collector-emitter voltage Vce > 0, there are two cases:

[0025] ① If the gate-emitter voltage Vge

[0026] ② If the gate-emitter voltage Vge > Vth, the MOS gate channel is formed, and the IGBT is in the conduction state (normal operation). At this time, holes are injected from the P+ region into the N-base region for conductivity modulation, reducing the value of the N-base region resistance RN-, and lowering the on-state voltage drop of the IGBT.

[0027] The present invention can reduce the P+ region on the back of the IGBT structure and lower the hole concentration, so the turn-off loss is reduced; at the same time, electrons directly reach the collector metal layer from the drift region through the N-type region. Compared with the existing IGBT structure, the discharge of excess electrons in the drift region is also faster. Therefore, the composite collector IGBT structure of the present invention has a lower saturation voltage while reducing the turn-off time and lowering the turn-off loss.

[0028] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A composite collector IGBT structure, comprising a collector metal layer (1), characterized in that: The upper surface of the collector metal layer (1) is provided with a composite collector region (2), the composite collector region (2) includes a P-type collector region (201) and an N-type heavily doped collector region (202), the upper surface of the composite collector region (2) is provided with an N-type buffer region (3), the upper surface of the N-type buffer region (3) is provided with an N-type epitaxial layer (4), the upper surface of the N-type epitaxial layer (4) is provided with a P-type body region (5), a plurality of strip-shaped gate trenches (6) are formed on the upper surface of the P-type body region (5), the inner walls of each of the gate trenches (6) are filled with a gate oxide layer (7) and a polysilicon gate (8), and the gate oxide layer (7) is disposed between the inner wall of the gate trench (6) and the outer wall of the polysilicon gate (8). A heavily doped N-type emitter region (9) is further provided on the upper surface of the P-type body region (5) between two adjacent gate trenches (6). An insulating dielectric layer (10) is commonly provided on the upper surfaces of the heavily doped N-type emitter region (9) and the polysilicon gate (8), and a metal source emitter (11) is provided on the upper surface of the insulating dielectric layer (10).

2. The composite collector IGBT structure according to claim 1, wherein: A contact hole (12) is formed inside the insulating dielectric layer (10), and the contact hole (12) penetrates through the insulating dielectric layer (10) and sequentially extends into the heavily doped N-type emitter region (9) and the P-type body region (5). A heavily doped P region (13) is provided on the bottom surface of the contact hole (12), and a contact post (14) is inserted into the contact hole (12), and the contact post (14) is located above the heavily doped P region (13).

3. The composite collector IGBT structure according to claim 2, wherein: The metal source emitter (11) forms an ohmic contact with the heavily doped N-type emitter region (9) and the heavily doped P region (13) through the contact post (14).

4. A composite collector IGBT structure according to claim 1, characterized in that: The N-type heavily doped collector region (202) is circular, and a plurality of the N-type heavily doped collector regions (202) are combined into a square queue. The collector region outside the N-type heavily doped collector region (202) is the P-type collector region (201).

5. A composite collector IGBT structure according to claim 1, characterized in that: A plurality of the gate trenches (6) are arranged parallel to each other, and the gate trenches (6) penetrate through the P-type body region (5) in the horizontal direction, and the bottoms of the gate trenches (6) extend into the N-type epitaxial layer (4).

6. The composite collector IGBT structure according to claim 1, characterized in that: The upper surface of the heavily doped N-type emitter region (9) is flush with the upper surface of the polysilicon gate (8).

7. A composite collector IGBT structure according to claim 1, characterized in that: A plurality of the contact posts (14) are integrally formed at the bottom end of the metal source emitter (11), and a plurality of heat dissipation trenches are further formed on the upper surface of the metal source emitter (11).

Images