Optoelectronic component and method for producing optoelectronic component

Abstract

The invention relates to an optoelectronic component. According to one embodiment, the optoelectronic component comprises a carrier (2), at least one semiconductor chip (3) on the carrier (2), a protective layer (4) on the semiconductor chip (3), and a potting (5) on the protective layer (4). The at least one semiconductor chip (3) in particular comprises at least one micro LED. The invention further relates to a method for producing an optoelectronic component.

Description

Technical Field

[0001] A photoelectronic device is described. Furthermore, a method for manufacturing a photoelectronic device is described.

[0002] Cross - reference to Related Applications

[0003] This patent application claims the priority of German Patent Application 10 2022 133 373.6, the disclosure of which is incorporated herein by reference. Background Art

[0004] One object to be solved is to provide a photoelectronic device with higher efficiency. Another object to be solved is to provide a method for manufacturing a photoelectronic device with higher efficiency. Summary of the Invention

[0005] A photoelectronic device is described. The device relates, for example, to a photoelectronic device that emits radiation. The photoelectronic device generates electromagnetic radiation during operation, especially electromagnetic radiation having a wavelength in the wavelength range between ultraviolet radiation and infrared radiation. The photoelectronic device has at least one component, especially a plurality of components, or consists of them.

[0006] According to at least one embodiment, the photoelectronic device includes a carrier. The carrier is a mechanically supporting component of the photoelectronic device. The remaining components of the photoelectronic device, such as optical and / or electronic components, are arranged on the carrier. The carrier is especially used for the mechanical fastening and / or electrical connection of the optical and / or electronic components of the photoelectronic device. In particular, the carrier is a connecting carrier. In other words, the carrier is structured. The structured carrier has one or more chip connection sites and / or one or more metal wires for electrical contact. The metal wire or metal wires can be made of Cu and / or Cu blackened by CuO, Cu3N or Pd and / or Cu with different surface coatings such as NiAu or NiPdAu.

[0007] According to at least one embodiment, the photoelectronic device includes at least one semiconductor chip on the carrier. In particular, at least one semiconductor chip is arranged in direct or indirect contact on the carrier. The direct or indirect contact between the semiconductor chip and the carrier can be electrical and / or mechanical contact. In particular, at least one semiconductor chip is arranged on the chip connection site of the carrier. For example, the semiconductor chip is fastened to the carrier by means of a solder connection, especially by means of a solder connection including a low - temperature solder system, especially on the chip connection site of the carrier. In particular, the low - temperature solder system has a melting point below 220°C or below 150°C. For example, it relates to a SAC solder system with a melting point of 217°C. For example, it relates to a SnBi solder system with a melting point of 138°C.

[0008] At least one semiconductor chip comprises or consists of a diode structure, a passivation layer, and a contact. The contact is in direct contact with the solder system. In other words, at least one semiconductor chip is not a package, but a bare semiconductor chip. Alternatively, at least one semiconductor chip can be a chipscale package without a polymer or ceramic intermediate carrier. The chipscale package includes, for example, an additional connection layer or a conversion layer surrounding the semiconductor chip without an additional substrate.

[0009] In particular, at least one semiconductor chip is configured to emit primary radiation having a first wavelength range during operation of the optoelectronic device. The semiconductor chip can include an active layer sequence that includes an active region that can generate primary radiation during operation of the optoelectronic device. The primary radiation herein and hereinafter refers to electromagnetic radiation of a first wavelength or a first wavelength range emitted by the semiconductor chip. The semiconductor chip is, for example, a light-emitting diode chip or a laser diode chip. For example, at least one semiconductor chip emits blue primary radiation, green primary radiation, yellow primary radiation, or red primary radiation.

[0010] In the case where at least one semiconductor chip includes a conversion layer surrounding the semiconductor chip, the chipscale package can emit secondary radiation having a second wavelength range during operation of the optoelectronic device. The conversion layer can convert the primary radiation partially or completely into secondary radiation. In the case of partial conversion, the unconverted part of the primary radiation passes through the conversion layer. The chipscale package emits, in this case, mixed light that consists of primary radiation and secondary radiation. For example, the chipscale package emits white light that consists of primary radiation in the blue spectral range and secondary radiation in the red spectral range. In the case of complete conversion, no primary radiation passes through the conversion layer. "No" means in the context that so little primary radiation passes through that it no longer perceptibly affects the light emitted by the chipscale package. For example, at most 10%, in particular at most 5%, and preferably at most 1% of the primary radiation passes through the conversion layer. Then, the chipscale package emits only secondary radiation. For example, the chipscale package emits yellow or red light without a blue component.

[0011] According to at least one embodiment, an optoelectronic device includes a protective layer on at least one semiconductor chip. The protective layer is configured to protect components of the optoelectronic device disposed below the protective layer, such as at least one semiconductor chip and / or a carrier and / or a chip connection portion, from mechanical and / or short-term thermal effects. In particular, the protective layer is configured as a thermal insulation layer. Thermal insulation in this context means that heat reaching one side of the protective layer does not or only to a small extent reach the opposite side of the protective layer. For example, the protective layer transmits at most 50%, at most 40%, at most 30%, at most 20%, at most 10%, at most 5% or at most 1% of the heat reaching it. In other words, the protective layer can have low thermal conductivity. In addition, the protective layer can be configured to protect components of the optoelectronic device disposed below the protective layer, in particular semiconductor chips, from corrosion effects. In this case, the protective layer can block or limit the intrusion of corrosive connections, such as corrosive gases or moisture.

[0012] According to at least one embodiment, an optoelectronic device includes a potting portion on the protective layer. The potting portion is used to protect components of the optoelectronic device, in particular components disposed below the potting portion, from external influences. The potting portion can be disposed on the protective layer in direct mechanical contact. Alternatively, additional elements, such as layers, can be disposed between the protective layer and the potting portion. In particular, the potting portion has a thickness of 500 μm (including 500 μm) to 1 cm (including 1 cm), for example 700 μm.

[0013] According to at least one embodiment, an optoelectronic device includes a carrier, at least one semiconductor chip on the carrier, a protective layer on the at least one semiconductor chip, and a potting portion on the protective layer.

[0014] The optoelectronic device is based in particular on the following considerations. When one or more semiconductor chips on the carrier are integrated into the potting portion, high forces and temperatures act on the semiconductor chips, the carrier, and the connection between the semiconductor chips and the carrier. Especially in the case where solder is used for the connection between the semiconductor chip and the carrier, the shear force of the semiconductor chip is minimized at the temperature of the potting portion used because the solder used will melt. The force action and temperature action can be significantly reduced by the protective layer via at least one semiconductor chip, such that one or more semiconductor chips on the carrier can be integrated into the potting portion without damaging the carrier, the semiconductor chips, and their connection to the carrier. Thereby, advantageously, a miniaturized optoelectronic device, such as a miniaturized optoelectronic device for automotive body panels or decorative parts, can be provided. In addition, the protective layer provides additional corrosion protection in the optoelectronic device and thereby advantageously extends the lifespan of the optoelectronic device.

[0015] According to at least one embodiment, the carrier is configured flexibly. In other words, the carrier is not a rigid carrier. The flexible carrier is configured to be bendable and / or elastic and / or deformable in at least one spatial direction. The flexible carrier can advantageously be bent or deformed under the action of an external force, such as bending stress, without losing, in particular without damaging, its structural integrity.

[0016] According to at least one embodiment, the carrier is a film. Herein and hereinafter, a film is understood as a uniform planar structure made of, for example, plastic. In particular, the carrier configured as a film is flexible. For example, the carrier is a 2D or 2.5D shaped film. A 2D shaped film is a planar film extending in two spatial directions here. A 2.5D shaped film is a two-dimensional film bent along an axis. In other words, the 2.5D shaped film is bent but not plastically deformed. The carrier configured as a film can advantageously be bent or deformed under the action of an external force, such as bending stress, without losing, in particular without damaging, its structural integrity.

[0017] According to at least one embodiment, the carrier comprises a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC), and silicone. Structured in the context of the carrier material means that the material has one or more chip connection sites and / or one or more metal wires, such as Cu wires, for electrical contact. In particular, the carrier is made of a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC), and silicone. For example, the carrier comprises a structured film made of one of the materials or is made of the structured film. Polyethylene terephthalate, polyimide, polymethyl methacrylate, polycarbonate, and silicone are advantageously suitable for forming a flexible film with a structured portion.

[0018] According to at least one embodiment, the carrier comprises or is made of structured polyethylene terephthalate (PET). Polyethylene terephthalate is advantageously suitable for maintaining adhesion to the protective layer even under bending stress.

[0019] According to at least one embodiment, the thickness of the carrier is in the range of 15 μm (including 15 μm) to 200 μm (including 200 μm), in particular in the range of 50 μm (including 50 μm) to 100 μm (including 100 μm), for example 100 μm. Such a carrier, in particular a flexible carrier having a thickness in the range of 50 μm (including 50 μm) to 200 μm (including 200 μm), can advantageously be used in a roll-to-roll process.

[0020] According to at least one embodiment, the thickness of at least one semiconductor chip is 80 μm. According to at least one further embodiment, the thickness of at least one semiconductor chip is less than 10 μm, for example 6 μm or 7 μm. The thickness of the semiconductor chip is currently the extension of the semiconductor chip perpendicular to the plane of extension of the carrier. In other words, the thickness of the semiconductor chip is the height of the semiconductor chip above the carrier. By integrating a thin semiconductor chip having a thickness of 80 μm or 6 μm or 7 μm on a carrier, for example on a thin film, into an optoelectronic device, an optoelectronic device having a small thickness can be advantageously provided.

[0021] According to at least one embodiment, at least one semiconductor chip comprises at least one micro light emitting diode (English: "light emitting diode", LED). The micro-LED can have a width, length, thickness and / or diameter of less than or equal to 100 μm, in particular less than or equal to 70 μm, for example less than or equal to 50 μm. In particular, the micro-LED, for example a rectangular micro-LED, has an edge length of the light emitting surface of less than or equal to 70 μm, for example less than or equal to 50 μm, in a top view of the stacked layers. The micro-LED is, for example, a light emitting diode in which the growth substrate has been removed, such that the thickness of the micro-LED is, for example, in the range of 1.5 μm (including 1.5 μm) to 10 μm (including 10 μm).

[0022] According to at least one embodiment, the protective layer comprises polysiloxane, polyurethane, acrylate, epoxy resin or a combination thereof. In particular, the protective layer consists of polysiloxane, polyurethane, acrylate, epoxy resin or a combination thereof. Polysiloxane, polyurethane, acrylate and epoxy resin can provide good corrosion protection while thermally insulating at the same time.

[0023] According to at least one embodiment, the protective layer comprises or consists of a polysiloxane. A polysiloxane is a polymer in which silicon atoms are bonded via oxygen atoms. The polysiloxane has a single siloxane unit. The polysiloxane can have M units, D units, T units, and Q units. The letters M (mono), D (di), T (tri), and Q (tetra) herein represent the number of oxygen atoms bonded to the silicon atom. Thus, the M unit has one oxygen atom, the D unit has two oxygen atoms, the T unit has three oxygen atoms, and the Q unit has four oxygen atoms. The greater the number of oxygen atoms bonded to the silicon atom, the stronger the crosslinking of the polysiloxane network can be. In particular, the protective layer comprises a polysiloxane having only M units and D units. This polysiloxane is advantageously formed in a flexible manner.

[0024] According to at least one embodiment, the protective layer comprises or consists of a silicone. Herein and hereinafter, silicone shall be understood as a polysiloxane having only M units and D units in its network. The protective layer comprising silicone is advantageously formed in a flexible manner and provides not only mechanical protection but also corrosion protection. In addition, the protective layer has high stability with respect to blue radiation, whereby the lifetime of the optoelectronic device can be extended while maintaining the optical properties unchanged.

[0025] According to at least one embodiment, the silicone of the protective layer is an addition-crosslinked silicone. For example, the silicone of the protective layer is not a condensation-crosslinked silicone. In contrast to the condensation reaction, no water is formed during the addition reaction. Thus, the protective layer composed of addition-crosslinked silicone has less water than the layer composed of condensation-crosslinked silicone. Thereby, the corrosion protection can be enhanced by the protective layer.

[0026] According to at least one embodiment, the protective layer is formed in a flexible manner. In other words, the protective layer is not a rigid protective layer. The flexible protective layer is formed to be bendable and / or elastic and / or deformable in at least one spatial direction. The flexible protective layer can advantageously maintain its adhesion to the carrier under the action of an external force, such as bending stress, without delamination of the protective layer from the carrier.

[0027] According to at least one embodiment, the protective layer has at least 110 14 Ω, for example 2·10 14 Ω of surface resistance. The surface resistance of the layer is a measure of the insulating effect of the layer. The higher the surface resistance of the layer, the higher the insulating effect of the layer. Currently, the protective layer advantageously has a high surface resistance and thus a good insulating effect.

[0028] According to at least one embodiment, the protective layer is configured to protect components disposed below the protective layer of an optoelectronic device, in particular at least one semiconductor chip, from corrosive connections. In particular, the protective layer accordingly has high moisture resistance or insulation resistance. Moisture resistance or insulation resistance is a measure of the amount of water absorbed by the component. The more water the component absorbs, the higher the conductivity and the lower the resistance. High moisture resistance or insulation resistance thus means that the protective layer does not absorb or only absorbs a small amount of water, thereby advantageously protecting the components disposed below the protective layer of the optoelectronic device from the influence of water.

[0029] According to at least one embodiment, the protective layer is transparent to electromagnetic radiation. The transparent protective layer is penetrable to electromagnetic radiation. In other words, the protective layer transmits the incident electromagnetic radiation. In particular, the protective layer transmits the incident electromagnetic radiation by at least 80%, 90%, 95% or 99%. In particular, the protective layer is transparent to the electromagnetic radiation emitted by the optoelectronic device during operation. For example, the protective layer is transparent to the primary radiation emitted by at least one semiconductor chip. Thus, the protective layer advantageously does not affect the optical characteristics of the optoelectronic device.

[0030] According to at least one embodiment, the protective layer does not change the characteristics of the electromagnetic radiation, in particular the characteristics of the primary radiation. In other words, the characteristics of the electromagnetic radiation transmitted through the protective layer, such as wavelength, intensity and direction, are not changed by transmission. In particular, the radiation has the same characteristics after being transmitted through the protective layer as before being incident on the protective layer. For example, the electromagnetic radiation has the same wavelength before and after being transmitted through the protective layer. In other words, the electromagnetic radiation is not converted by the protective layer. Alternatively or additionally, the electromagnetic radiation may have the same intensity before and after being transmitted through the protective layer. In other words, the electromagnetic radiation is not absorbed by the protective layer. Alternatively or additionally, the electromagnetic radiation may have the same direction before and after being transmitted through the protective layer. In other words, the electromagnetic radiation is not diffused by the protective layer. Thus, the protective layer advantageously does not affect the optical characteristics of the optoelectronic device.

[0031] According to at least one embodiment, the protective layer does not absorb electromagnetic radiation in the visible range of the electromagnetic spectrum. "Does not" in this context means that the protective layer absorbs so little of the incident electromagnetic radiation that the electromagnetic radiation is not perceptibly affected in terms of its intensity. For example, at most 10%, in particular at most 5% and preferably at most 1% of the incident electromagnetic radiation is absorbed by the protective layer. Thus, the protective layer advantageously does not affect the optical characteristics of the optoelectronic device.

[0032] According to at least one embodiment, the protective layer does not have diffusing particles, conversion materials, filling materials, nanoparticles and / or particles for adjusting the refractive index. Thus, the protective layer advantageously does not affect the optical characteristics of the optoelectronic device.

[0033] According to at least one embodiment, the protective layer is not a conversion layer. In particular, the protective layer is not a layer that includes a conversion material in a matrix material. The protective layer that is not a conversion layer advantageously provides protection against the intrusion of corrosive gases.

[0034] According to at least one embodiment, the protective layer completely covers at least one semiconductor chip. In particular, the protective layer covers the surface of at least one semiconductor chip that does not have a carrier. In other words, the protective layer is configured such that there is no direct mechanical contact between at least one semiconductor chip and the potting. Thereby, the protective layer can advantageously block the diffusion path for corrosive connections along the edges of the semiconductor chip.

[0035] According to at least one embodiment, the thickness of the protective layer on at least one semiconductor chip is at least 40 μm. It should be noted in particular that the thickness of the protective layer on at least one semiconductor chip is only bounded upwards for commercial and comprehensive reasons. In particular, as the thickness of the protective layer increases, the thickness of the optoelectronic device also increases. Thereby, it becomes difficult to integrate the device into an application system, especially into an application system with a small structural space. For example, the thickness of the protective layer on at least one semiconductor chip is at least 40 μm and at most 500 μm, especially at least 40 μm and at most 300 μm. The thickness of at least 40 μm of the protective layer on at least one semiconductor chip blocks the diffusion path along the edges of the semiconductor chip. In this way, the protective layer advantageously forms a barrier against water vapor and corrosive gases in the optoelectronic device. In addition, the protective layer advantageously protects at least one semiconductor chip, the carrier, and the connection between at least one semiconductor chip and the carrier from the influence of heat.

[0036] According to at least one embodiment, at least one semiconductor chip is completely surrounded by a carrier and a protective layer. In other words, all sides of at least one semiconductor chip are covered by the carrier and / or the protective layer. For this purpose, the direct mechanical contact between the protective layer and the carrier can be formed laterally by the semiconductor chip. In particular, the direct mechanical contact between the carrier and the protective layer extends completely around the semiconductor chip. In other words, the carrier and the protective layer form a cavity in which at least one semiconductor chip is disposed. In particular, at least one semiconductor chip is disposed on the carrier and embedded in the protective layer. In this case, the carrier can cover one side of the semiconductor chip and the protective layer can cover the remaining sides of the semiconductor chip. It should be noted here that the thickness of the protective layer between the carrier and the potting corresponds to the thickness of the protective layer on the semiconductor chip and the thickness of the semiconductor chip. For example, the thickness of at least one semiconductor chip is 80 μm and the thickness of the protective layer on the semiconductor chip is at least 40 μm, such that the thickness of the protective layer between the carrier and the potting is at least 120 μm.

[0037] According to at least one embodiment, at least one semiconductor chip includes a plurality of semiconductor chips. The plurality of semiconductor chips currently includes at least two semiconductor chips, particularly at least 50 semiconductor chips, preferably at least 100 semiconductor chips, for example at least 150 semiconductor chips. According to at least one embodiment, the plurality of semiconductor chips includes up to 50,000 semiconductor chips, particularly up to 10,000 semiconductor chips, for example up to 2,000 semiconductor chips. In particular, each semiconductor chip among the plurality of semiconductor chips is individually surrounded by a carrier and a protective layer, particularly completely. In other words, the protective layer is configured such that each semiconductor chip is individually embedded in the protective layer. In particular, the protective layer between the semiconductor chips is in direct contact with the carrier. By means of the plurality of semiconductor chips on the carrier, the light output efficiency of the optoelectronic device can be advantageously increased.

[0038] According to at least one embodiment, the spacing between each two semiconductor chips among the plurality of semiconductor chips is between 0.1 mm (including 0.1 mm) and 5 mm (including 5 mm). Alternatively, the spacing between semiconductor chips having a thickness of 80 μm can be between 40 μm (including 40 μm) and 50 μm (including 50 μm). The spacing between the semiconductor chips particularly causes the protective layer between the semiconductor chips to be in direct contact with the carrier, which can advantageously enhance the mechanical protection and anti-corrosion protection of the protective layer.

[0039] According to at least one embodiment, the potting portion includes silicone, polymethyl methacrylate (PMMA), polycarbonate (PC), or polyamide. In particular, the potting portion is made of silicone, polymethyl methacrylate (PMMA), polycarbonate (PC), or polyamide.

[0040] According to at least one embodiment, the protective layer is embedded in the potting portion. In particular, the potting portion covers the side of the protective layer facing away from the carrier and the lateral sides of the protective layer. For example, the protective layer is completely surrounded or enclosed by the potting portion and the carrier. In this case, at least one semiconductor chip is also embedded in the potting portion. In other words, the protective layer and at least one semiconductor chip can be integrated into the potting portion. The embedding of the protective layer into the potting portion causes at least one semiconductor chip to be integrated into the potting portion and can advantageously improve the stability of the optoelectronic device.

[0041] According to at least one embodiment, the potting portion is formed on the protective layer. The formation of the potting portion on the protective layer particularly causes the protective layer to be embedded or integrated into the potting portion. "The potting portion is formed on the protective layer" particularly does not mean that the carrier, semiconductor chip, and protective layer are fastened to an already formed and shaped potting portion, for example, via an adhesive layer. In particular, the potting portion only obtains its strength and shape when the potting material comes into contact with the component including the protective layer during its formation on the protective layer. The formation of the potting portion on the protective layer enables the carrier, semiconductor chip, and protective layer to be directly integrated into the potting portion without a fastening mechanism such as an adhesive layer. The potting portion can be formed on the protective layer via a potting method.

[0042] According to at least one embodiment, the optoelectronic device further includes a decorative layer on the side of the potting portion facing away from the protective layer. In particular, the decorative layer includes one or more layers. The side of the potting portion facing away from the protective layer is particularly the side of the optoelectronic device visible to an external observer. The decorative layer provided on this side can, for a desired application, optically functionalize the optoelectronic device, for example. For example, the decorative layer has a carbon fiber texture imprint or a root wood grain imprint. Alternatively or additionally, the decorative layer can be translucent and / or structured. For example, the decorative layer can define symbols or logos visible during the operation of the optoelectronic device via structuring.

[0043] According to at least one embodiment, the optoelectronic device further includes at least one component. The at least one component is on the carrier, for example, arranged adjacent to at least one semiconductor chip. The at least one component includes, for example, a sensor and / or a component having a detection function or a contact function. In particular, the at least one component has a topology similar to that of the at least one semiconductor chip. For example, the at least one component has a smaller, similar, or the same thickness compared to the semiconductor chip. Alternatively, the component can have a greater thickness than the semiconductor chip. In this case, it should be noted that the thickness of the protective layer on the thickest component is at least 40 μm. By integrating the component into the optoelectronic device, in addition to the light-emitting function, additional functions such as a sensor function can be incorporated into the optoelectronic device.

[0044] According to at least one embodiment, the optoelectronic device further includes a covering layer on the side of the protective layer facing away from the carrier. The covering layer particularly completely covers the surface of the protective layer facing away from the carrier. For example, the protective layer is completely surrounded by the covering layer and the carrier. In other words, the carrier, protective layer, and covering layer form a sandwich structure. In particular, the covering layer is formed flexibly. For example, the covering layer is a film.

[0045] The covering layer can be arranged between the protective layer and the potting portion.

[0046] According to at least one embodiment, the cover layer comprises polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) or silicone. In particular, the cover layer consists of polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) or silicone. Such a cover layer can advantageously have a particularly well - formed adhesion to the material of the potting part. For example, the cover layer comprises polyethylene terephthalate (PET) or consists thereof.

[0047] An optoelectronic device having a cover layer consisting of polyethylene terephthalate (PET) can be manufactured particularly cost - effectively.

[0048] According to at least one embodiment, the cover layer and the carrier have different materials. For example, the carrier comprises polyethylene terephthalate (PET) and the cover layer comprises polycarbonate (PC). Alternatively, the cover layer and the carrier have the same material. For example, the cover layer and the carrier comprise polyethylene terephthalate (PET).

[0049] According to at least one embodiment, an adhesive layer is provided between the cover layer and the protective layer. The adhesive layer mediates the connection between the protective layer and the cover layer. In particular, the adhesive layer is in direct mechanical contact with the protective layer and the cover layer. For example, the adhesive layer comprises a material suitable as an adhesion material for low - energy surfaces, such as silicone surfaces. For example, the adhesive layer comprises a polysiloxane adhesive.

[0050] According to at least one embodiment, the cover layer has at least one interface with the carrier. In other words, the cover layer and the carrier are at least partially in direct mechanical contact. In particular, the interface forms a frame surrounding the face of the carrier. In particular, at least one semiconductor chip and optionally present components of the optoelectronic device are provided on the enclosed face of the carrier.

[0051] According to at least one embodiment, the cover layer and the carrier are at least locally connected to each other at at least one interface by means of a welding connection, for example by means of a weld seam. The welding connection is understood here and hereinafter as a mechanical connection that cannot be detached without damage, which is produced between the carrier and the cover layer under the external action of, for example, ultrasound, laser radiation, heat and / or pressure. The weld seam is understood here and hereinafter as a welding connection along a connecting line or a connecting curve, which connects the cover layer and the carrier to each other, in particular along the interface. In particular, the cover layer and the carrier are connected to each other along their entire interface by means of a welding connection, wherein the region of the electrical contact, for example the Cu printed conductor, which is guided through the interface, is accommodated by the welding connection. In particular, the cover layer and the carrier are connected to each other along the entire frame formed by the interface, wherein the region of the electrical contact, for example the Cu printed conductor, which is guided through the interface, is accommodated by the welding connection. The welding connection between the cover layer and the carrier advantageously increases the stability of the connection between the cover layer and the carrier.

[0052] Furthermore, a method for manufacturing an optoelectronic device is described. Preferably, an optoelectronic device according to the above-mentioned embodiments is produced by means of the method described herein. In particular, all embodiments for optoelectronic devices also apply to the method and vice versa.

[0053] According to at least one embodiment, the method for manufacturing an optoelectronic device includes providing a carrier. In particular, the carrier is a flexible carrier, such as a film.

[0054] According to at least one embodiment, the method includes arranging at least one semiconductor chip on the carrier, in particular on the chip connection site of the carrier. For example, the semiconductor chip is fastened to the carrier by means of solder, in particular on the chip connection site of the carrier.

[0055] According to at least one embodiment, the method includes applying a protective layer on at least one semiconductor chip. In particular, the protective layer is applied by means of a printing method, a spraying method or a lamination method. For example, the protective layer is applied by means of a stencil printing method, a screen printing method, a spray coating method or a dispensing method.

[0056] According to at least one embodiment, the method includes applying a potting compound on the protective layer. In particular, the potting compound is applied by means of a potting method. For example, the potting compound is applied by means of in-mold decoration (IMD), injection molding or compression molding.

[0057] According to at least one embodiment, the method for manufacturing an optoelectronic device includes providing a carrier, arranging at least one semiconductor chip on the carrier, applying a protective layer on at least one semiconductor chip and applying a potting compound on the protective layer.

[0058] With this method, a semiconductor chip having a minimal surface topography, in particular a small thickness, can be directly integrated into the potting of an optoelectronic device. The protective layer serves as thermal insulation in the method and can thermally decouple the regions above and below the protective layer from each other, such that different temperatures exist above and below the protective layer. Thereby, when forming the potting, the forces and temperatures acting on the carrier, at least one semiconductor chip, and the connection between the semiconductor chip and the carrier can be reduced. Thus, for forming the potting, an injection molding method using a material that requires a high temperature, such as polymethyl methacrylate (PMMA) or polycarbonate (PC) with a potting temperature of more than 220 °C, for example 300 °C, can be applied without damaging at least the semiconductor chip, the carrier, and the connection between the semiconductor chip and the carrier.

[0059] According to at least one embodiment, the potting is directly applied to the protective layer. In particular, if the potting material adheres well to the protective layer, the potting is directly applied to the protective layer. Applying the potting directly on the protective layer can be advantageously implemented simply and cost-effectively.

[0060] According to at least one embodiment, during the application of the potting, the side of the carrier facing away from at least one semiconductor chip is cooled. In particular, the cooling is performed via a cooling circuit using water. The cooling can be performed constantly or in a pulsed mode and is controlled via a valve. For example, the side of the carrier facing away from at least one semiconductor chip is cooled to 80 °C to 90 °C. The cooling of the carrier serves to keep the connection between at least one semiconductor chip and the carrier at a temperature at which the connection between the semiconductor chip and the carrier remains stable during the application of the potting. In the case where the semiconductor chip is connected to the carrier by solder, the temperature of the connection between the semiconductor chip and the carrier can advantageously be kept at a temperature below the melting temperature of the solder. The thermal insulation provided by the protective layer simultaneously advantageously causes that the application of the potting having the required temperature on the protective layer is not affected by the cooling of the side of the carrier facing away from the semiconductor chip.

[0061] According to at least one embodiment, the method further includes applying an adhesive layer on the protective layer and applying a cover layer on the adhesive layer before applying the potting. In other words, a sandwich structure is formed by the carrier, the protective layer, and the cover layer. In particular, the cover layer includes a material compatible with the material of the potting. By applying the cover layer on the protective layer, the integration of the sandwich structure into the potting can be improved.

[0062] According to at least one embodiment, the method includes applying an adhesive layer on a cover layer and applying the adhesive layer together with the cover layer on a protective layer before applying the potting part. In other words, the adhesive layer and the cover layer are applied as a composite structure. In particular, the composite structure with the side having the adhesive layer is applied to the protective layer such that the adhesive layer is in direct contact with the protective layer. For example, a silicone adhesive can be applied to a polyethylene terephthalate film and then the composite structure consisting of the film with the already applied adhesive is applied to the protective layer with the adhesive side.

[0063] When applying the potting part, especially when injecting the potting material, the cover layer and / or the carrier can be deformed or distorted. Here, the deformation or distortion in the cover layer can be stronger than in the carrier. The adhesive layer in particular ensures that the cover layer does not lose its connection to the protective layer during the application of the potting part.

[0064] According to at least one embodiment, the cover layer is applied to the protective layer in such a way that the cover layer has at least one interface with the carrier. In particular, the cover layer is applied in such a way that the interface forms a frame that encloses a surface of the carrier, for example the following surface of the carrier, on which at least one semiconductor chip and optionally existing components of an optoelectronic device are arranged.

[0065] According to at least one embodiment, the method further includes creating a soldered connection at at least one interface between the cover layer and the carrier. In particular, a soldered connection is created at the entire interface between the cover layer and the carrier, wherein the region of an electrical contact, such as a Cu printed conductor, guided through the interface is accommodated by the soldered connection. In particular, the soldered connection is produced via plastic soldering, such as ultrasonic soldering or laser soldering. The soldered connection at the interface between the cover layer and the carrier strengthens the interface and advantageously improves the connection between the carrier and the cover layer.

[0066] Further advantageous embodiments, designs and improvements of the device and of the method for manufacturing the device result from the examples shown below in conjunction with the drawings. Description of the Drawings

[0067] Figures 1 to 5 Schematic diagrams of optoelectronic devices according to different embodiments are respectively shown and

[0068] Figures 6A to 6C and Figures 7A to 7C Schematic diagrams of methods for manufacturing optoelectronic devices according to different embodiments are respectively shown.

[0069] Identical, similar, or functionally equivalent elements are provided with the same reference numerals in the figures. The dimensional relationships between the figures and the elements shown in the figures should not be considered to be to scale. Rather, individual elements, in particular layer thicknesses, may be shown exaggerated for better visibility and / or for better understanding. Detailed Description

[0070] Figures 1 to 5 Schematic cross-sectional views of an optoelectronic device 1 are shown separately. The optoelectronic device 1 separately includes a carrier 2, at least one semiconductor chip 3, a protective layer 4, and a potting portion 5.

[0071] The carrier 2 is structured and has at least one chip connection site and / or at least one metal wire. The carrier 2 is particularly configured flexibly and may include or be composed of a structured thin film. The carrier 2 may include a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC), and silicone. For example, the carrier 2 is a structured polyethylene terephthalate film having a thickness of 100 μm.

[0072] On the carrier 2, in particular on the chip connection site of the carrier 2, there is provided a semiconductor chip 3 or a plurality of semiconductor chips 3, for example at least 50 semiconductor chips and at most 50,000 semiconductor chips. For example, the semiconductor chip 3 is fastened to the carrier 2, in particular to the chip connection site of the carrier 2, by means of a solder connection, in particular by means of a solder connection including a low-temperature solder system. For example, the solder system includes a SnBi solder system having a melting point of 138 °C. Alternatively, the solder system includes a SAC solder system having a melting point of 217 °C. The SAC solder system can advantageously be used in photon welding in combination with a polyimide carrier or a polyethylene terephthalate carrier.

[0073] The semiconductor chip 3 is in particular a bare semiconductor chip or a chip-level component without a polymer or ceramic intermediate carrier. For example, the semiconductor chip 3 has dimensions of 90 x 150 x 80 μm 3 Here, the thickness of the semiconductor chip, i.e., the height above the carrier, can be 80 μm.

[0074] The protective layer 4 is arranged on the carrier 2 such that the protective layer covers, in particular surrounds, the semiconductor chip 3. The thickness of the protective layer 4 on the semiconductor chip is at least 40 μm. The thickness of the protective layer 4 above the carrier 2 is independent of the thickness of the semiconductor chip 3 and is, for example, at least 120 μm in the case of an 80-μm-thick semiconductor chip 3. The protective layer 4 can comprise polysiloxane, polyurethane, acrylate, epoxy resin or a combination thereof. For example, the protective layer 4 is silicone, such as silicone DSL1705 or VT3602 from Peters with a thickness of at least 120 μm.

[0075] The protective layer 4 is configured to protect the semiconductor chip 3 and / or the carrier 2 and / or the connection between the semiconductor chip 3 and the carrier 2 from mechanical and / or short-term thermal effects. In addition, the protective layer 4 is configured to protect the semiconductor chip 3 from corrosion by blocking or restricting the ingress of corrosive connections, such as corrosive gases or moisture.

[0076] The potting 5 is arranged on the protective layer 4. In particular, the potting 5 covers the side of the protective layer 4 not covered by the carrier 2. The protective layer 4 is thus embedded or integrated into the potting 5. The potting 5 can comprise silicone, polymethyl methacrylate (PMMA), polycarbonate (PC) or polyamide. For example, the potting 5 is silicone, in particular silicone LPS-3570M from Shin-Etsu with a thickness of 700 μm. For example, the potting is polymethyl methacrylate with a thickness of 700 μm. For example, the potting is polycarbonate with a thickness of 700 μm.

[0077] Figure 2 The optoelectronic device 1 of Figure 1 differs from the optoelectronic device 1 of Figure 2 in that the optoelectronic device 1 has a decorative layer 6 on the side of the potting facing away from the protective layer. The decorative layer can be configured, for example, to be translucent or structured and consists of one or more layers. Figure 2 The arrow in

[0078] Figure 3 The optoelectronic device 1 of Figure 1 differs from the optoelectronic device 1 of Figure 3 in that the optoelectronic device 1 has a component 7 arranged preferably adjacent to the semiconductor chip 3 on the carrier 2. The component 7 is, for example, a sensor and / or a component with a detection function or a contact function. The optoelectronic device 1 can have, in addition to the component 7, further components 7 with the same or different functions (not shown here).

[0079] In Figure 3In the optoelectronic device, the thickness of component 7 is similar to the thickness of semiconductor chip 3. Alternatively, component 7 may have a greater thickness than semiconductor chip 3. In this case, the thickness of the protective layer above the thickest component 7 is at least 40 μm.

[0080] Figure 4 The optoelectronic device 1 differs from Figure 1 the optoelectronic device 1 in that a covering layer 10 is provided between the protective layer 4 and the potting portion 5. The covering layer 10 is fastened to the protective layer 4 by means of an adhesive layer 11.

[0081] The covering layer 10 has an interface 12 with the carrier 2. The interface 12 may extend in a frame-like manner around the region of the carrier 2, in particular around the region of the carrier 2 on which the semiconductor chip 3 and the optional component 7 are provided. The covering layer 10 and the carrier 2 may be connected to each other at the interface 12 by means of a soldering connection.

[0082] The potting portion 5 may completely embed or surround the side of the covering layer 10 facing away from the protective layer 4. The covering layer 10 may have a material that is compatible with the material of the potting portion 5 such that there is high adhesion and attachment between the covering layer 10 and the potting portion 5. For example, the covering layer 10 is a polyethylene terephthalate film.

[0083] Figure 5 The optoelectronic device 1 differs from Figure 4 the optoelectronic device 1 in that Figure 5 the optoelectronic device 1 has a decorative layer 6 on the side of the potting portion facing away from the protective layer. The decorative layer may be configured, for example, as translucent or structured.

[0084] Figures 6A to 6C Shows a method for manufacturing Figure 1 the optoelectronic device 1.

[0085] In a first method step, a carrier 2, for example a structured polyethylene terephthalate film, is provided. The semiconductor chip 3 is provided on the carrier 2. For example, the semiconductor chip 3 is soldered to the chip connection site of the carrier. The protective layer 4, for example a protective layer made of silicone, is applied to the semiconductor chip 3 by means of a stencil printing method ( Figure 6A ).

[0086] Figure 6BThe application of the potting part 5, for example silicone, is shown. The potting part 5 can be applied via potting methods such as in-mold decoration (IMD), injection molding, or compression molding. Applying the potting part requires a temperature of at least 220 °C, for example 300 °C. At this temperature, the solder used to connect the semiconductor chip 3 to the carrier 2, for example SnBi solder, can be melted in particular, whereby the shear force of the semiconductor chip 3 is minimized. The protective layer 4, for example by its current thickness, acts as a thermal insulation part and minimizes the thermal load on the semiconductor chip 3, the carrier 2, in particular the metal wires of the carrier 2, and the connection between the semiconductor chip 3 and the carrier 2. Thereby, the forces and temperatures acting during the application of the potting part 5, in particular the forces and temperatures acting on the solder, are significantly reduced, so that the semiconductor chip 3 can be integrated into the optoelectronic device 1 without detaching from the carrier 2 during the application of the potting part 5.

[0087] As shown in Figure 6B it is possible to use a potting tool 8 for applying the potting part 5 such that the shape of the potting part to be formed is preset. The potting tool can have a cooling part 9 by means of which the side of the carrier 2 facing away from the semiconductor chip 3 is cooled during the application of the potting part 5. The cooling can be carried out constantly or in pulsed mode and is controlled via a valve. For example, it is cooled to a temperature of 80 °C to 90 °C via a cooling circuit with water. The protective layer 4 also acts as a thermal insulation part here, so that the application of the potting part 5 and the high temperature required therefor are not affected by cooling the underside of the carrier 2.

[0088] Figure 6C An optoelectronic device 1 manufactured by means of the method is shown, which optoelectronic device corresponds to Figure 1 the optoelectronic device 1.

[0089] Figures 7A to 7C A method for manufacturing Figure 4 the optoelectronic device 1 is shown.

[0090] Figure 7A A layer stack composed of a carrier 2, a semiconductor chip 3, and a protective layer 4 is shown, which layer stack can be manufactured as described in connection with Figure 6A it.

[0091] Figures 7A to 7C The method of Figures 6A to 6CThe method differs in that the adhesive layer 11 is applied to the protective layer 4 before applying the potting part 5 to the protective layer 4 and the covering layer 10, for example a polyethylene terephthalate film, is applied to the adhesive layer 11. Alternatively, the adhesive layer 11 can first be applied to the covering layer 10 before the adhesive layer 11 and the covering layer 10 are applied to the protective layer 4 together as a composite structure. The composite structure is applied to the protective layer 4 by means of the side of the adhesive layer 11 such that the adhesive layer 11 is in direct contact with the protective layer 4. For example, a silicone adhesive can be applied to the polyethylene terephthalate film and subsequently the composite structure consisting of the film with the already applied adhesive is applied to the protective layer 4 by means of the adhesive side( Figure 7B ).

[0092] The covering layer 10 is applied in such a way that an interface 12 is formed between the carrier 2 and the covering layer 10. Optionally, the carrier 2 and the covering layer 10 can be connected at the interface 12 by plastic welding, for example ultrasonic welding or laser welding, by means of a welding connection.

[0093] Subsequently, the potting part 5 is applied to the side of the covering layer 10 facing away from the protective layer 4. The application of the potting part can be carried out as described in connection with Figure 6B .

[0094] The protective layer 4 arranged below the covering layer 10 protects the semiconductor chip 3 and the carrier 2 from the influence of heat loads during the application of the potting part 5, while the material of the covering layer 10 causes the potting part 5 to adhere better to the layer stack consisting of the carrier 2, the semiconductor chip 3 and the protective layer 4 due to its compatibility with the potting material. During the application of the potting part 5, the carrier 2 and the covering layer 10, in particular the covering layer 10, may deform or twist. The adhesive layer 11 between the protective layer 4 and the covering layer 10 ensures that the covering layer 10 does not delaminate during the application of the potting part 5.

[0095] Figure 7C The optoelectronic device 1 manufactured by means of the method is shown, which optoelectronic device corresponds to Figure 4 the optoelectronic device 1.

[0096] Even if not all combinations are explicitly described, the features and embodiments described in connection with the figures can be combined with one another according to further embodiments. In addition, the embodiments described in connection with the figures can alternatively or additionally have further features according to the description in the overview section.

[0097] The invention is not limited to these embodiments by the description according to the embodiments. Rather, the invention includes each new feature and any combination of features, which in particular includes any combination of features in the claims, even if such feature or combination itself is not explicitly stated in the claims or embodiments.

[0098] Reference numerals list

[0099] 1 Optoelectronic devices

[0100] 2 Carrier

[0101] 3 Semiconductor Chips

[0102] 4. Protective layer

[0103] 5 Potting Department

[0104] 6 Decorative layer

[0105] 7 Components

[0106] 8 Potting tools

[0107] 9 Cooling section

[0108] 10 Covering

[0109] 11 Adhesive layer

[0110] 12 Interface

Claims

1. An optoelectronic device (1), the optoelectronic device comprising - a carrier (2), - at least one semiconductor chip (3) on the carrier (2), in particular at least one micro-LED, - a protective layer (4) on the semiconductor chip (3), and - a potting portion (5) on the protective layer (4).

2. The optoelectronic device (1) according to the previous claim, wherein the carrier (2) is configured flexibly, and / or wherein the carrier (2) is a thin film.

3. The optoelectronic device (1) according to any one of the above claims, wherein the protective layer (4) comprises polysiloxane, polyurethane, acrylate, epoxy resin or a combination thereof.

4. The optoelectronic device (1) according to any one of the above claims, wherein the protective layer (4) completely covers the at least one semiconductor chip (3), and / or wherein the at least one semiconductor chip (3) is completely surrounded by the carrier (2) and the protective layer (4).

5. The optoelectronic device (1) according to any one of the above claims, wherein the thickness of the protective layer (4) on the at least one semiconductor chip (3) is at least 40 μm.

6. The optoelectronic device (1) according to any one of the above claims, wherein the at least one semiconductor chip (3) comprises a plurality of semiconductor chips (3), and / or wherein the optoelectronic device (1) comprises a decorative layer (6) on the side of the potting portion (5) facing away from the protective layer (4), and / or wherein the optoelectronic device (1) comprises at least one component (7), wherein the at least one component (7) is arranged on the carrier (2).

7. The optoelectronic device (1) according to any one of the above claims, wherein the protective layer (4) is embedded in the potting portion (5).

8. The optoelectronic device (1) according to any one of the above claims, the optoelectronic device further comprising a cover layer (10) on the side of the protective layer (4) facing away from the carrier (2).

9. The optoelectronic device (1) according to the previous claim, wherein the cover layer (10) is arranged between the protective layer (4) and the potting portion (5).

10. The optoelectronic device (1) according to any one of claims 8 or 9, wherein an adhesive layer (11) is arranged between the cover layer (10) and the protective layer (4).

11. The optoelectronic device (1) according to the previous claim, wherein the adhesive layer (11) is in direct mechanical contact with the protective layer (4) and the cover layer (10).

12. The optoelectronic device (1) according to any one of claims 8 to 11, wherein the cover layer (10) has at least one interface (12) with the carrier (2).

13. The optoelectronic device (1) according to the previous claim, wherein the cover layer (10) and the carrier (2) are at least partially connected by a welding connection at the at least one interface (12).

14. The optoelectronic device (1) according to any one of the above claims, The potting part (5) is produced on the protective layer (4) by a potting method, in particular in-mold decoration, injection molding or compression molding.

15. A method (1) for manufacturing an optoelectronic device, the method comprising - providing a carrier (2), - arranging at least one semiconductor chip (3), in particular at least one micro-LED, on the carrier (2), - applying a protective layer (4) on the at least one semiconductor chip (3), and - applying a potting part (5) on the protective layer (4) by a potting method.

16. The method according to the previous claim, wherein during the application of the potting part (5), the side of the carrier (2) facing away from the at least one semiconductor chip (3) is cooled.

17. The method according to any one of claims 15 or 16, the method further comprising, before applying the potting part (5), - applying an adhesive layer (11) on the protective layer (4) and - applying a cover layer (10) on the adhesive layer (11), or the method further comprising, before applying the potting part (5), - applying an adhesive layer (11) on the cover layer (10) and - applying the adhesive layer (11) and the cover layer (10) together on the protective layer (4).

18. The method according to the previous claim, wherein the cover layer (10) is applied to the protective layer (4) in such a way that the cover layer (10) has at least one interface (12) with the carrier (2).

19. The method according to the previous claim, the method further comprising - producing a welded joint at at least one interface (12) between the cover layer (10) and the carrier (2).

20. The method according to any one of claims 15 to 19, wherein the potting method is one of the following methods: in-mold decoration, injection molding or compression molding.

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