Silicon wafer processing method and silicon wafer
By dislocating the silicon block group and using multiple cut lines to cut the silicon block, the problem of low utilization rate of edge leather in the silicon rod cutting is solved, and efficient and low-cost silicon wafer production is achieved.
Patent Information
- Application Number
- CN202410099525.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-24
- Publication Date
- 2025-07-25
AI Technical Summary
In the prior art, when the silicon rod is cut into a silicon wafer, the remaining edge material cannot be effectively utilized, and the laser scribe efficiency is low, resulting in high production costs and low silicon wafer preparation efficiency.
Divide the silicon block into multiple groups of silicon blocks and set them in different directions. Multiple cutting lines are used to cut the silicon blocks to ensure that each cutting line is in contact with the silicon block, avoid uneven stress caused by vacancy, and simplify the cutting steps.
It improves the utilization rate of silicon rods, reduces production costs, prevents waste of raw materials, improves the production capacity and production efficiency of silicon wafers, simplifies the cutting process, and improves the yield of silicon wafers.
Smart Images
Figure CN120363355A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of batteries, and in particular to a processing method and a silicon wafer of a silicon wafer. Background Art
[0002] In the prior art, the silicon wafers in photovoltaic modules mainly use a straightening valve to grow cylindrical silicon rods. Before cutting the silicon rods into silicon blocks, the silicon rods are first truncated into round rods, then opened to obtain quasi-square cylinders, and then the quasi-square cylinders are cut into silicon wafers. The remaining edge scraps cannot be effectively utilized. Each silicon wafer needs to be laser scribed during the manufacturing process of the silicon wafer, but the efficiency of laser scribing is low and the production cost is high, which is not conducive to the preparation efficiency of the silicon wafer. Summary of the Invention
[0003] The present invention aims to at least solve one of the technical problems existing in the prior art. To this end, the first object of the present invention is to propose a processing method of a silicon wafer, which can effectively avoid jumper wires and improve processing efficiency.
[0004] According to the second object of the present invention, a silicon wafer is proposed, which is manufactured by using the above-mentioned processing method of the silicon wafer.
[0005] The processing method of the silicon wafer according to the embodiment of the first aspect of the present invention includes the following steps:
[0006] S1. Obtain a plurality of silicon blocks;
[0007] S2. Divide the plurality of silicon blocks into multiple groups of silicon block groups, wherein the multiple groups of silicon block groups are arranged in a first direction, and the silicon blocks in each group of silicon block groups are arranged at intervals in a second direction, and the silicon blocks in adjacent groups of silicon block groups are arranged in a staggered manner in the first direction, and the first direction and the second direction are perpendicular;
[0008] S3. Cut the silicon blocks in the multiple groups of silicon block groups to obtain a plurality of silicon wafers.
[0009] According to the processing method of the silicon wafer of the embodiment of the present invention, the silicon blocks are derived from the remaining edge scraps after the silicon rods are cut, which can effectively improve the utilization rate of the silicon rods, increase the production capacity of the silicon wafers, reduce the production cost, and prevent waste of raw materials. When cutting the silicon blocks, the silicon blocks in adjacent groups of silicon block groups are arranged in a staggered manner in the first direction, so that when the cutting lines cut the silicon blocks in the multiple groups of silicon block groups, each cutting line can contact and cut the silicon blocks, effectively avoiding problems such as jumper wires, high lines, and broken lines caused by uneven stress due to the cutting lines being vacant. Moreover, when cutting the silicon blocks, there is no need to pre-adjust the position of the cutting lines, which simplifies the cutting steps and is conducive to improving the production efficiency of the silicon wafers.
[0010] Optionally, in step S3, a plurality of cutting lines are used to cut a plurality of the silicon blocks of the plurality of groups of silicon block groups in a third direction, the third direction, the second direction, and the first direction are orthogonal, wherein the plurality of cutting lines are arranged at intervals in the second direction, and at least one of the cutting lines is located at a gap between two adjacent silicon blocks of at least one of the silicon block groups and at the silicon blocks of the adjacent silicon block groups.
[0011] Optionally, the plurality of cutting lines are evenly arranged at intervals in the second direction.
[0012] Optionally, the silicon blocks of the silicon block group completely cover the gap between two adjacent silicon blocks of the adjacent silicon block group in the first direction.
[0013] Optionally, the distance between a plurality of silicon blocks included in the silicon block group is L, and L satisfies: 0 ≤ L ≤ 2 mm.
[0014] Optionally, step S2 specifically includes;
[0015] Bonding the plurality of silicon blocks obtained in step S1 to a fixing plate to form a plurality of groups of the silicon block groups;
[0016] After step S3, it further includes;
[0017] S4. A partition is provided between two adjacent groups of the silicon block groups;
[0018] S5. Feeding the plurality of silicon wafers and the fixing plate into a debonding machine to separate the plurality of silicon wafers and the fixing plate.
[0019] Optionally, after step S5, it further includes;
[0020] S6. Inserting the short sides of the silicon wafers into the wafer loading basket in the direction facing the wafer loading basket;
[0021] S7. Cleaning the plurality of silicon wafers in the wafer loading basket.
[0022] Optionally, after step S7, it further includes:
[0023] Step S8. The silicon wafers enter the sorter for sorting with the long sides of the silicon wafers parallel to the belt direction of the sorter.
[0024] Optionally, step S1 specifically includes:
[0025] Obtaining a plurality of the silicon blocks from the edge scraps of the silicon rod.
[0026] The silicon wafers according to the embodiments of the second aspect of the present invention are processed by using the processing method of the silicon wafers described in any one of the above embodiments.
[0027] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0029] Figure 1 4 is a schematic flow chart of a method for processing a silicon block according to an embodiment of the present invention.
[0030] Figure 2 is a schematic diagram of a silicon block group and a cutting line according to an embodiment of the present invention.
[0031] Figure 3 2 is a bottom view schematically showing a silicon block group and a cutting line according to an embodiment of the present invention.
[0032] Figure 4 is a schematic side view of a silicon block group and a cutting line according to an embodiment of the present invention.
[0033] Reference numerals:
[0034] 1. Edge material; 10. Silicon block group; 11. First silicon block group; 12. Second silicon block group; 13. Silicon block; 14. Cutting line; 15. Fixing plate;
[0035] A. First direction; B. Second direction; C. Third direction. DETAILED DESCRIPTION
[0036] The embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Figures 1-4 A method for processing a silicon wafer according to an embodiment of the present invention is described.
[0037] Specifically, Figure 1 As shown, the processing method of the silicon block 13 includes the following steps:
[0038] S1, obtaining a plurality of silicon blocks 13;
[0039] The silicon block 13 is obtained from the edge material 1 remaining after the silicon rod is cut. After the rectangular silicon rod of the required size is cut out from the cylindrical silicon rod, a plurality of edge materials 1 with a flat surface on one side and a curved surface on the other side remain. The curved surface of the edge material 1 is cut off to form a silicon rod with a rectangular structure, and the silicon rod is divided into a plurality of silicon blocks 13 of the same size.
[0040] S2. Divide multiple silicon blocks 13 into multiple groups of silicon block groups 10. Among them, the multiple groups of silicon block groups 10 are arranged along the first direction A, and the multiple silicon blocks 13 in each group of silicon block groups 10 are arranged at intervals along the second direction B. The silicon blocks 13 of adjacent two groups of silicon block groups 10 are arranged in a staggered manner along the first direction A, and the first direction A and the second direction B are perpendicular.
[0041] Each group of silicon block groups 10 contains multiple silicon blocks 13. The multiple groups of silicon block groups 10 are arranged at intervals along the first direction A. The adjacent silicon blocks 13 in each group of silicon block groups 10 are arranged opposite to each other along the second direction B, and there is a certain interval between adjacent silicon blocks 13. The silicon blocks 13 of adjacent two groups of silicon block groups 10 are arranged in a staggered manner along the first direction A. Suppose the adjacent two groups of silicon block groups 10 include a first silicon block group 11 and a second silicon block group 12. The interval formed between the adjacent two silicon blocks 13 on the side surface of the silicon blocks 13 of the first silicon block group 11 adjacent to the second silicon block group 12 along the first direction A is opposite to the interval formed between the adjacent two silicon blocks 13 of the second silicon block group 12 along the first direction A. Correspondingly, the interval formed between the adjacent two silicon blocks 13 on the side surface of the silicon blocks 13 of the second silicon block group 12 adjacent to the first silicon block group 11 along the first direction A is opposite to the interval formed between the adjacent two silicon blocks 13 of the first silicon block group 11 along the first direction A.
[0042] S3. Cut the multiple silicon blocks 13 of the multiple groups of silicon block groups 10 to obtain multiple silicon wafers.
[0043] The cutting lines 14 cut the silicon blocks 13. The cutting lines 14 are arranged at intervals along the second direction B to cut the silicon blocks 13 into multiple silicon wafers.
[0044] According to the processing method of the silicon wafers in the embodiments of the present invention, the silicon blocks 13 are derived from the remaining edge scraps 1 after the silicon rods are cut, which can effectively improve the utilization rate of the silicon rods, increase the production capacity of the silicon wafers, reduce the production cost, and prevent waste of raw materials. When cutting the silicon blocks 13, the silicon blocks 13 of adjacent two groups of silicon block groups 10 are arranged in a staggered manner along the first direction A, so that when the cutting lines 14 cut the multiple silicon blocks 13 of the multiple groups of silicon block groups 10, each cutting line 14 can contact the silicon blocks 13 and cut the silicon blocks 13, effectively avoiding problems such as wire jumping, high wire, and wire breakage caused by uneven stress due to the cutting lines 14 being vacant. Moreover, when cutting the silicon blocks 13, there is no need to pre-adjust the positions of the cutting lines 14, simplifying the cutting steps, which is beneficial to improving the production efficiency of the silicon wafers.
[0045] Optionally, as Figures 2-4 shown, in step S3, multiple cutting lines 14 are used to cut the multiple silicon blocks 13 of the multiple groups of silicon block groups 10 along the third direction C. The third direction C, the second direction B, and the first direction A are orthogonal. Among them, the multiple cutting lines 14 are arranged at intervals along the second direction B, and at least one cutting line 14 is located at the gap between the adjacent two silicon blocks 13 of at least one group of silicon block groups 10 and at the silicon blocks 13 of the adjacent silicon block groups 10.
[0046] A plurality of cutting lines 14 extend along the first direction A. The plurality of cutting lines 14 are disposed below the plurality of groups of silicon blocks 10 along the third direction C. When the cutting lines 14 cut the silicon blocks 13, the cutting lines 14 move from bottom to top along the third direction C to complete the cutting of the plurality of silicon blocks 13 of the plurality of groups of silicon blocks 10, and a plurality of silicon wafers are obtained by cutting the plurality of silicon blocks 13. Let two adjacent groups of silicon blocks 10 include a first silicon block group 11 and a second silicon block group 12, and the silicon blocks 13 of the first silicon block group 11 and the second silicon block group 12 are arranged in a staggered manner along the first direction A. Then, at least one of the plurality of cutting lines 14 has a part along the first direction A opposite to the lower surface of the silicon block 13 of the first silicon block group 11 along the third direction C, and another part of the cutting line 14 along the first direction A is opposite to the gap formed between the adjacent silicon blocks 13 of the second silicon block group 12, wherein the gap formed between the adjacent silicon blocks 13 in the second silicon block group 12 is opposite to the silicon block 13 in the first silicon block group 11 along the first direction A. Similarly, at least one of the plurality of cutting lines 14 has a part along the first direction A opposite to the lower surface of the silicon block 13 of the second silicon block group 12 along the third direction C, and another part of the cutting line 14 along the first direction A is opposite to the gap formed between the adjacent silicon blocks 13 of the first silicon block group 11. There are also some cutting lines 14 among the plurality of cutting lines 14 that are opposite to both the lower surface of the silicon block 13 of the first silicon block group 11 along the third direction C and the lower surface of the corresponding silicon block 13 of the second silicon block group 12 along the third direction C.
[0047] Therefore, when the plurality of cutting lines 14 cut the plurality of silicon blocks 13 of the plurality of groups of silicon blocks 10, each cutting line 14 contacts and cuts at least one silicon block 13 in at least one group of silicon blocks 10, effectively avoiding problems such as wire jumping, high wire, and wire breakage caused by uneven force due to the cutting line 14 being idle.
[0048] Optionally, as Figure 2 and Figure 3 shown, the plurality of cutting lines 14 are arranged at equal intervals along the second direction B.
[0049] The plurality of cutting lines 14 arranged at equal intervals along the second direction B can cut the plurality of silicon blocks 13 in the plurality of groups of silicon blocks 10 into a plurality of silicon wafers with uniform thickness along the second direction B. Thus, the plurality of cutting lines 14 can simultaneously cut the plurality of silicon blocks 13 in the plurality of groups of silicon blocks 10, make the thickness of the cut silicon wafers uniform, improve the finished product yield of the silicon wafers, and can also avoid the step of adjusting the cutting lines 14 before cutting, simplify the cutting process of the silicon blocks 13, and greatly improve the production efficiency of the silicon wafers.
[0050] Optionally, as Figure 3 shown, the silicon blocks 13 of the silicon block group 10 completely cover the gap between two adjacent silicon blocks 13 of the adjacent silicon block group 10 along the first direction A.
[0051] Taking the adjacent first silicon block group 11 and second silicon block group 12 as an example, the gap formed between each adjacent pair of silicon blocks 13 within the first silicon block group 11 is always opposite to a silicon block 13 in the second silicon block group 12 along the first direction A. Similarly, the gap formed between each adjacent pair of silicon blocks 13 within the second silicon block group 12 is always opposite to a silicon block 13 in the first silicon block group 11 along the first direction A.
[0052] Thus, it can be ensured that when multiple cutting lines 14 cut multiple silicon blocks 13 of multiple silicon block groups 10, each cutting line 14 contacts at least one silicon block 13 in one group of silicon block groups 10.
[0053] Optionally, the distance between multiple silicon blocks 13 included in the silicon block group 10 is L, and L satisfies: 0 ≤ L ≤ 2 mm.
[0054] If the distance between adjacent silicon blocks 13 in the silicon block group 10 is greater than 2 mm, the gap between adjacent silicon blocks 13 is too wide, which is not conducive to the arrangement of the cutting lines 14, increases the space occupied by the silicon block group 10 in the second direction B, increases the arrangement quantity of the cutting lines 14, and reduces the quantity of silicon wafers cut by the same number of cutting lines 14, which is not conducive to improving the production efficiency of silicon wafers. For example, L = 1 mm.
[0055] Therefore, by limiting the distance between adjacent silicon blocks 13 of the silicon block group 10, it is convenient to increase the quantity of silicon blocks 13 cut by the cutting lines 14 when the quantity of the cutting lines 14 remains unchanged, which is beneficial to improving the production efficiency of silicon wafers.
[0056] Optionally, as Figure 4 shown, step S2 specifically includes;
[0057] Bonding the multiple silicon blocks 13 obtained in step S1 on the fixing plate 15 to form multiple silicon block groups 10;
[0058] The upper side surface of the multiple silicon blocks 13 along the third direction C is bonded to one side surface of the fixing plate 15 along the thickness direction. The multiple silicon blocks 13 are bonded to one side of the fixing plate 15 along the thickness direction at uniform intervals along the second direction B to form one group of silicon block groups 10, and multiple groups of silicon block groups 10 are bonded to one side of the fixing plate 15 at intervals along the first direction A.
[0059] After step S3, it further includes;
[0060] S4. Setting a partition between two adjacent groups of silicon block groups 10;
[0061] The partition extends along the second direction B. Taking the adjacent first silicon block group 11 and second silicon block group 12 as an example, the partition is arranged between the first silicon block group 11 and the second silicon block group 12. Along the first direction A, one side surface of the partition is opposite to one side surface of the silicon block 13 of the first silicon block group 11 adjacent to the second silicon block group 12 along the first direction A, and the other side surface of the partition is opposite to one side surface of the silicon block 13 of the second silicon block group 12 adjacent to the first silicon block group 11 along the first direction A.
[0062] S5. Feed multiple silicon wafers and the fixing plate 15 into a debonding machine to separate the multiple silicon wafers from the fixing plate 15.
[0063] Multiple silicon blocks 13 of multiple groups of silicon block groups 10 form multiple silicon wafers after being cut. The upper ends of the multiple silicon wafers along the third direction C are bonded to one side surface of the fixing plate 15 in the thickness direction. The debonding machine can release the bond between the multiple silicon wafers and the fixing plate 15.
[0064] Thus, multiple silicon blocks 13 are bonded to the fixing plate 15, facilitating operations such as cutting and handling of the multiple silicon blocks 13, preventing the silicon blocks 13 from shifting when multiple cutting lines 14 cut the silicon blocks 13, and improving the efficiency of cutting silicon wafers. After the debonding machine separates the multiple silicon wafers from the fixing plate 15, the silicon wafers are prone to falling down along the first direction A. By arranging partitions between adjacent silicon block groups 10, it is possible to avoid the phenomenon that adjacent silicon wafers collide along the first direction A, resulting in damage to the silicon wafers. The partitions play a protective role for the silicon wafers, which is beneficial to improving the yield rate of the silicon wafers.
[0065] Optionally, after step S5, it further includes;
[0066] S6. Insert the short sides of the silicon wafers into an inserting flower basket facing the direction of the inserting flower basket;
[0067] Even if the upper end of the inserting flower basket along the third direction C is provided with an open opening, the silicon wafers enter the inserting flower basket through the opening. The short sides of the silicon wafers are opposite to the opening along the third direction C, and the long sides of the silicon wafers are parallel to the side plates of the flower basket along the first direction A or the second direction B.
[0068] S7. Clean the multiple silicon wafers in the inserting flower basket.
[0069] The inserting flower basket is arranged on an inserting machine, and the inserting machine can clean the multiple silicon wafers in the inserting flower basket to remove the contaminated impurities on the surfaces of the silicon wafers.
[0070] Thus, inserting the short sides of the silicon wafers into the inserting flower basket facing the direction of the inserting flower basket can reduce the area at the opening of the inserting flower basket, which is beneficial to the miniaturization of the inserting machine and improves the integration degree of the inserting machine. The inserting machine can clean the multiple silicon wafers in the inserting flower basket, which can prevent the residual particles and metal impurities on the inserting surface from contaminating and affecting the quality and yield rate of the silicon wafers, and reduce the abnormal ratios such as silicon wafer adhesion, edge chipping, and fragmentation.
[0071] Optionally, after step S7, the method further includes:
[0072] Step S8: The silicon wafer enters the sorting machine for sorting with its long side parallel to the belt direction of the sorting machine.
[0073] When the multiple cutting lines 14 cut the silicon block 13, the distances between the two cutting lines 14 located at the outermost sides of each silicon block 13 along the second direction B and the two side surfaces of the silicon block 13 along the second direction B are not equal, resulting in different thicknesses of the two outermost silicon wafers of each silicon block 13 along the second direction B after cutting. The sorting machine can sort out these silicon wafers of different thicknesses, and can also sort out silicon wafers with uniform thickness but with unqualified phenomena such as edge collapse and fragments.
[0074] Therefore, the long side of the silicon wafer is parallel to the belt direction of the sorting machine, which can make the silicon wafer more stable on the belt as the belt moves, avoiding the silicon wafer from tipping over and causing damage to the silicon wafer. The sorting machine can sort the silicon wafers and can select qualified silicon wafers more accurately and quickly, thereby improving the finished yield of silicon wafers.
[0075] Alternatively, if Figure 1 As shown, step S1 specifically includes:
[0076] A plurality of silicon blocks 13 are obtained from the scraps 1 of the silicon rods.
[0077] Before cutting the silicon rod into silicon blocks 13, the silicon rod is first cut into cylindrical silicon rods, and then squared to obtain a quasi-square column, which is the main part of the silicon rod. The silicon block 13 in this embodiment is obtained from the edge material 1 remaining after the silicon rod is cut. After cutting out a rectangular silicon rod of a required size from the cylindrical silicon rod, a plurality of edge materials 1 with a flat surface on one side and an arc surface structure on the other side remain. The arc surface of the edge material 1 is cut off to form a silicon rod with a rectangular structure, and the silicon rod is divided into a plurality of silicon blocks 13 of the same size. Therefore, the silicon blocks 13 are derived from the edge materials 1 remaining after the silicon rod is cut, which can effectively improve the utilization rate of the silicon rod, improve the production capacity of silicon wafers, reduce production costs, and prevent the waste of raw materials.
[0078] The silicon wafer according to the embodiment of the second aspect of the present invention is processed by using the silicon wafer processing method of any one of the above embodiments.
[0079] According to the silicon wafer of the embodiment of the present invention, by adopting the processing method described in the above embodiment, the production efficiency of the silicon wafer can be effectively improved, the finished product yield of the silicon wafer can be guaranteed, and the production cost of the silicon wafer can be reduced.
[0080] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention.
[0081] In the description of the present invention, the "first feature" and "second feature" may include one or more of such features. In the description of the present invention, the meaning of "a plurality" is two or more. In the description of the present invention, the first feature being "above" or "below" the second feature may include the first and second features being in direct contact, or may include the first and second features not being in direct contact but being in contact through additional features therebetween. In the description of the present invention, the first feature being "above", "over" and "on" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the first feature has a higher horizontal height than the second feature.
[0082] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example.
[0083] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the claims and their equivalents.
Claims
1. A processing method for a silicon wafer, characterized in that, It includes the following steps: S1. Obtain a plurality of silicon blocks; S2. Divide the plurality of silicon blocks into multiple groups of silicon block groups, wherein the multiple groups of silicon block groups are arranged along a first direction, and the multiple silicon blocks in each group of silicon block groups are arranged at intervals along a second direction, and the silicon blocks of adjacent two groups of silicon block groups are arranged in a staggered manner along the first direction, and the first direction and the second direction are perpendicular; S3. Cut the multiple silicon blocks of the multiple groups of silicon block groups to obtain a plurality of silicon wafers.
2. The processing method of the silicon wafer according to claim 1, characterized in that, In step S3, the multiple silicon blocks of the multiple groups of silicon block groups are cut along a third direction by a plurality of cutting lines, and the third direction, the second direction and the first direction are orthogonal, wherein the plurality of cutting lines are arranged at intervals along the second direction, and at least one cutting line is located at a gap between adjacent two silicon blocks of at least one group of silicon block groups and at the silicon blocks of adjacent silicon block groups.
3. The processing method of the silicon wafer according to claim 2, characterized in that, The plurality of cutting lines are evenly arranged at intervals along the second direction.
4. The processing method of the silicon wafer according to claim 1, characterized in that, The silicon blocks of the silicon block group completely cover the gap between adjacent two silicon blocks of the adjacent silicon block group along the first direction.
5. The processing method of the silicon wafer according to claim 1, characterized in that, The distance between the multiple silicon blocks included in the silicon block group is L, and L satisfies: 0 ≤ L ≤ 2 mm.
6. The processing method of the silicon wafer according to claim 1, wherein, Step S2 specifically includes; Bond the multiple silicon blocks obtained in step S1 to a fixing plate to form multiple groups of silicon block groups; After step S3, it further includes; S4. Arrange a partition between adjacent two groups of silicon block groups; S5. Feed the plurality of silicon wafers and the fixing plate into a debonding machine to separate the plurality of silicon wafers and the fixing plate.
7. The processing method of the silicon wafer according to claim 6, wherein, After step S5, it further includes; S6. Insert the short sides of the silicon wafers into the wafer inserting flower basket in the direction facing the wafer inserting flower basket; S7. Clean the plurality of silicon wafers in the wafer inserting flower basket.
8. The processing method of the silicon wafer according to claim 7, characterized in that, After step S7, it further includes: Step S8. The silicon wafers enter the sorter for sorting with the long sides of the silicon wafers parallel to the belt direction of the sorter.
9. The processing method of the silicon wafer according to any one of claims 1-8, characterized in that, Step S1 specifically includes: Obtain the multiple silicon blocks from the edge scraps of the silicon rod.
10. A silicon wafer, characterized in that, It is processed by using the processing method of the silicon wafer according to any one of claims 1-9.