Silicon carbide device terminal structure, silicon carbide power device and chip

Abstract

The invention belongs to the technical field of power devices, and provides a silicon carbide device terminal structure, a silicon carbide power device and a chip, a field limiting ring structure comprising a plurality of field limiting rings is arranged at the tail end of a main junction, a tail groove is formed between the field limiting ring structure and the edge of the chip, and the inclination angle of a first side wall of the tail groove is set to be smaller than 16 degrees. The second side wall of the tail groove extends to the edge of the chip, the field limiting ring area is covered by a plurality of junction termination extension areas, and the junction termination extension areas extend to the tail groove, so that the field limiting ring, the junction termination extension areas and the groove structure are combined, the terminal length is effectively reduced, and the area occupation of the chip is reduced under the condition of ensuring the voltage resistance of the device.

Description

Technical Field

[0001] This application belongs to the technical field of power devices, and particularly relates to a silicon carbide device terminal structure, a silicon carbide power device, and a chip. Background Art

[0002] As a new generation of wide-bandgap semiconductor material, silicon carbide has excellent performance in harsh environments such as high voltage, high temperature, and high frequency. Therefore, it has broad application prospects in the fields of power electronics, rail transit, etc. However, due to the limited size of semiconductor devices, there is an electric field concentration effect at the edge of the main junction, which easily leads to premature breakdown of the device and reduces the breakdown voltage performance of the device. To alleviate this problem, a terminal protection structure usually needs to be set at the edge of the device. Common terminal structures include field plates, field limiting rings, junction terminal extensions, etc.

[0003] Although the traditional field limiting ring terminal structure can effectively improve the breakdown voltage of the device, it needs to introduce multiple field limiting ring regions, resulting in a large chip area occupied by the terminal structure and increasing the production cost. Although the junction terminal extension technology can reduce the terminal length, its efficiency of reducing the surface electric field is not high, the terminal area is still large, and it is very sensitive to the implantation dose, with a small process window. Therefore, the existing terminal structures cannot effectively reduce the terminal length and improve the chip utilization rate while ensuring the breakdown voltage performance of the device. Summary of the Invention

[0004] To solve the above technical problems, the embodiments of this application provide a silicon carbide device terminal structure, a silicon carbide power device, and a chip. By forming a tail groove in the N-type drift region and setting the inclination angle of the first side wall of the tail groove to be less than 16°, the terminal length is effectively reduced, and the occupied area of the terminal is reduced.

[0005] The first aspect of the embodiments of this application provides a silicon carbide device terminal structure, which includes: A field limiting ring structure formed at the end of the main junction, and the field limiting ring structure includes a plurality of field limiting rings; A tail groove formed between the field limiting ring structure and the chip edge, the inclination angle of the first side wall of the tail groove is less than 16°, and the second side wall of the tail groove extends to the chip edge; A plurality of junction terminal extension regions arranged in the field limiting ring region, and the plurality of junction terminal extension regions cover the field limiting ring region and extend to the tail groove.

[0006] In some embodiments, the distance range that the junction terminal extension region extends from the end of the main junction beyond the field limiting ring is 15 - 20 μm.

[0007] In some embodiments, the junction terminal extension region is also arranged in the interval where the second side wall of the tail groove extends to the chip edge.

[0008] In some embodiments, the depth of the tail groove ranges from 0.6 to 0.7 μm.

[0009] In some embodiments, the inclination angle of the second sidewall of the tail groove ranges from 0° to 90°.

[0010] In some embodiments, the silicon carbide device terminal structure further includes: An insulating dielectric material layer is disposed in the tail groove and covers the region between the end of the main junction and the edge of the chip.

[0011] In some embodiments, the doping concentration of the junction termination extension region is 3.5e12 - 4.0e12 cm -3 。

[0012] In some embodiments, the silicon carbide device terminal structure further includes: A field limiting ring isolation groove is disposed on the field limiting ring, and the field limiting ring isolation groove is filled with an insulating dielectric material.

[0013] The second embodiment of the present application further provides a silicon carbide power device, and the silicon carbide power device includes the silicon carbide device terminal structure as described in any one of the above.

[0014] The third embodiment of the present application further provides a chip, including the silicon carbide device terminal structure as described in any one of the above.

[0015] The beneficial effects of the embodiments of the present application: A field limiting ring structure including a plurality of field limiting rings is provided at the end of the main junction. By forming a tail groove between the field limiting ring structure and the edge of the chip, and setting the inclination angle of the first sidewall of the tail groove to be less than 16°, the second sidewall of the tail groove extends to the edge of the chip, and the field limiting ring region is covered by a plurality of junction termination extension regions and extends to the tail groove. Thus, by combining the field limiting ring, the junction termination extension region, and the groove structure, while ensuring the breakdown voltage performance of the device, the terminal length is effectively reduced, and the area occupied by the chip is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a schematic structural diagram of a silicon carbide device terminal structure provided by an embodiment of the present application; Figure 2 is a schematic diagram of the inclination angle of the tail groove provided by an embodiment of the present application; Figure 3 is a schematic structural diagram of a silicon carbide device terminal structure provided by an embodiment of the present application; Figure 4 is a schematic structural diagram of a silicon carbide device terminal structure provided by an embodiment of the present application; Figure 5It is a schematic structural diagram of a silicon carbide device terminal structure provided by an embodiment of the present application; Figure 6 It is a schematic structural diagram of a silicon carbide device terminal structure provided by an embodiment of the present application; Figure 7 It is a schematic structural diagram of a silicon carbide device terminal structure provided by an embodiment of the present application; Figure 8 It is a schematic diagram of the breakdown voltage withstand of the silicon carbide device terminal structure provided by an embodiment of the present application and the traditional terminal structure; Figure 9 It is a schematic diagram of the electric field distribution of the traditional terminal structure; Figure 10 and Figure 11 It is a schematic diagram of the electric field distribution of the silicon carbide device terminal structure provided by an embodiment of the present application; Figure 12 It is a schematic diagram of the relationship between the tail groove inclination angle and the breakdown voltage withstand of the terminal structure provided by an embodiment of the present application; Figure 13 It is a schematic diagram of the relationship between the JTE doping of the terminal structure and the breakdown voltage withstand provided by an embodiment of the present application. Detailed implementation manners

[0017] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0018] Although the existing field limiting ring terminal structure can improve the breakdown voltage of the device, it is necessary to introduce multiple field limiting ring circular regions, resulting in a large chip area occupied by the terminal structure and increasing the production cost. Moreover, although the junction terminal extension technology can reduce the terminal length, its efficiency of reducing the surface electric field is not high, and the terminal area is still large, so the chip utilization rate cannot be effectively improved.

[0019] To solve the above technical problems, an embodiment of the present application provides a silicon carbide device terminal structure. Refer to Figure 1 As shown, the silicon carbide device terminal structure in this embodiment includes: a field limiting ring 410 structure formed at the end of the main junction 310, the field limiting ring 410 structure including multiple field limiting rings 410; a tail groove 710 formed between the field limiting ring structure and the chip edge, the inclination angle of the first side wall of the tail groove 710 being less than 16°, and the second side wall of the tail groove 710 extending to the chip edge; a plurality of junction terminal extension regions 510 provided in the field limiting ring region, the plurality of junction terminal extension regions 510 covering the field limiting ring region and extending to the tail groove 710.

[0020] In this embodiment, in combination with Figure 1As shown, an N-type drift region 220 is formed on the front surface of the silicon carbide substrate 210, a first electrode 110 is formed on the back surface of the silicon carbide substrate, a main junction 310 is formed on the N-type drift region 220, a P-type ring, a junction termination extension region 510, and a tail trench 710 are formed at the end of the main junction 310, and a second electrode 120 is formed on the main junction 310. By setting the inclination angle of the first sidewall of the tail trench 710 to be less than 16°, the second sidewall of the tail trench 710 extends to the chip edge, and the field limiting ring region is covered by a plurality of junction termination extension regions 510 and extends to the tail trench 710, so as to combine the field limiting ring 410, the junction termination extension region 510, and the trench structure, effectively reducing the terminal length and the chip area occupation while ensuring the breakdown voltage performance of the device.

[0021] In some embodiments, combining Figure 2 As shown, the first sidewall of the tail trench 710 is close to the junction termination extension region 510, and the inclination angle of the first sidewall is the angle between the first sidewall of the tail trench 710 and the horizontal plane of the N-type drift region 220.

[0022] In this embodiment, combining Figure 2 As shown, the horizontal plane of the N-type drift region 220 is flush with the interface between the N-type drift region 220 and the silicon carbide substrate 210, and the inclination angle of the first sidewall of the tail trench 710 is Figure 2 the angle between the first sidewall of the Trench in Figure 12 and the horizontal plane of the silicon carbide substrate 210. By truncating the junction termination extension region 510 with the tail trench 710, the original cylindrical junction becomes a planar junction, reducing the electric field concentration, thereby greatly improving the breakdown voltage of the device. Under the same breakdown voltage requirement, the width of the terminal structure in this embodiment is smaller than that of the traditional field limiting ring terminal, which can save the chip area. In a 1200V breakdown voltage device, a safety margin of 20% is generally required, so the actual breakdown voltage is greater than 1500V. Combining Figure 13 As shown, when the doping dose of the junction termination extension region 510 is between 3.5E12 - 4.0E12 cm -2 , the breakdown voltage of the breakdown voltage device is greater than 1500V. By setting the inclination angle between the first sidewall of the tail trench 710 and the horizontal plane of the N-type drift region 220 to be less than 16°, a wider ion implantation range of the doping dose of the junction termination extension region 510 can be obtained, reducing the influence of the doping concentration on the breakdown voltage range of the device and being beneficial to improving the breakdown voltage stability of the device.

[0023] In some embodiments, the field limiting ring 410 is a P-type ring. The junction depth of the field limiting ring 410 is about 1 μm or so, and it can be formed by implanting P-type doping ions on the N-type drift region 220 for multiple times, so that the junction concentration of the field limiting ring 410 shows an approximately skewed distribution, with the highest concentration near the interface.

[0024] In this embodiment, the approximately skewed distribution of the junction concentration of the field limiting ring 410 can be an asymmetric Gaussian distribution. The P-type doping ion implantation can be carried out on the field limiting ring region with multiple P-type impurities, so that the concentration near the surface is relatively high. The ions at the mask edge may scatter into the area below the mask during implantation, resulting in a higher concentration near the interface than in the central region. High-temperature annealing causes the implanted ions to diffuse towards the surface and laterally, further strengthening the concentration near the interface.

[0025] In some embodiments, by implanting P-type doping ions on the field limiting ring region with multiple P-type impurities, the implanted concentrations of multiple field limiting rings 410 change gradually laterally or are distributed in multiple levels, which can smooth the electric field peak.

[0026] In some embodiments, the junction termination extension region 510 includes a lightly doped region surrounding the main junction 310, and the doping concentration is generally 1*10 16 cm -3 ~1*10 18 cm -3 。

[0027] In some embodiments, the doping concentration of the junction termination extension region 510 gradually decreases outward from the main junction 310, and it can be formed by multiple ion implantation processes. Also, the depth of the junction termination extension region 510 can gradually decrease outward from the main junction 310. When a reverse bias is applied, the depletion layer of the main junction expands laterally into the JTE region, making the electric field distribution "disperse" outward from the edge of the main junction, distributing the high voltage over a longer lateral distance. Moreover, by truncating the junction termination extension region 510 through the tail groove 710, the original cylindrical junction becomes a planar junction, reducing the electric field concentration, thereby being able to significantly improve the breakdown voltage of the device. Under the same breakdown voltage requirement, the width of the terminal structure in this embodiment is smaller than that of the traditional field limiting ring terminal, which can save the chip area.

[0028] In some embodiments, by implanting P-type doping ions with different energies for multiple times, the depth of the junction termination extension region 510 can be gradually decreased outward from the main junction 310 to achieve a JTE structure with a gradually changing depth.

[0029] In some embodiments, the P-type ring is a commonly used terminal structure in power semiconductor devices. It is a P-type ring structure with the same type of doping disposed near the main junction 310. Under reverse bias, the electric field lines generated by the ionized acceptors in the P-type ring interact with the electric field lines emitted by the ionized donors in the N-region of the main junction 310, which is equivalent to introducing additional charges near the main junction 310. The electric field generated by these additional charges is opposite to the direction of the electric field of the main junction 310, thereby weakening the peak value of the electric field of the main junction 310, reducing the curvature effect of the main junction 310, expanding the depletion region width, optimizing the electric field distribution, and increasing the breakdown voltage of the device.

[0030] In some embodiments, there may be one or more P-type rings, which can be fabricated in the same process as the main junction 310. By adjusting process parameters such as the spacing, junction depth, and ion implantation concentration of the P-type ring, the voltage withstand performance can be adjusted. The P-type ring structure design is relatively simple, the process implementation difficulty is low, and it can be formed simultaneously with the main junction 310 by diffusion without adding additional process steps.

[0031] In some embodiments, combined Figure 1 as shown, there may be 4 P-type rings.

[0032] In some embodiments, combined Figure 3 as shown, there may be 5 P-type rings.

[0033] In some embodiments, the distance that the junction terminal extension region 510 extends from the end of the main junction 310 beyond the field limiting ring 410 ranges from 15 to 20 μm.

[0034] In some embodiments, the junction terminal extension region 510 (i.e., the JTE structure) can be formed by superposing and implanting P-type doping ions (such as aluminum ions, etc.) in the field limiting ring region. The junction depth of the junction terminal extension region 510 is less than or equal to three-fifths of the junction depth of the field limiting ring 410.

[0035] In some embodiments, multiple junction terminal extension regions 510 are provided on the N-type drift region 220. The multiple junction terminal extension regions 510 can introduce different amounts of additional charges in different regions, further optimizing the electric field distribution and increasing the voltage withstand ability. The junction terminal extension region 510 has relatively high requirements for process control, and parameters such as the dose and depth of ion implantation need to be precisely controlled to ensure that the doping concentration and width of the extension region meet the design requirements.

[0036] In some embodiments, the junction termination extension region 510 can adopt multiple masks combined with multiple P-type doped ion implantations with different energies to achieve a multi-step doping effect in which the depth of the junction termination extension region 510 gradually decreases outward from the main junction 310. The depth of each step decreases by 0.1 - 0.6 μm. In a silicon carbide power device, the multi-step doped JTE structure can make the charge gradient change more gently. The stepped JTE structure can transfer the surface peak electric field to the body and reduce the leakage risk.

[0037] In some embodiments, the JTE junction depth concentration of the field limiting ring 410 shows a typical box-shaped distribution.

[0038] In some embodiments, the JTE junction depth of the field limiting ring 410 is about 0.5 μm.

[0039] In some embodiments, in combination Figure 4 As shown, the junction termination extension region 510 is also disposed in the interval where the second sidewall of the tail groove 710 extends to the chip edge.

[0040] In some embodiments, in combination Figure 5 As shown, the inclination angle of the first sidewall of the tail groove 710 is less than 16°, and the second side of the tail groove 710 extends to the chip edge.

[0041] In some embodiments, the sidewall inclination angle of the field limiting ring 410 is less than 90°, which can reduce the electric field concentration caused by the curvature effect.

[0042] In this embodiment, the sidewall inclination angle of the field limiting ring 410 is the angle between the interface of the sidewall of the field limiting ring 410 and the N-type drift region 220 and the horizontal plane of the silicon carbide substrate 210.

[0043] In some embodiments, the depth range of the tail groove 710 is 0.6 - 0.7 μm.

[0044] In some embodiments, the tail groove 710 is formed at the end of the JTE structure. The depth of the tail groove 710 is about 0.6 - 0.7 μm, the groove inclination angle is less than 16 degrees, and the groove is filled with an insulating dielectric material. It can effectively reduce the terminal length and reduce the area occupation by about 40% - 60% while ensuring the breakdown voltage performance of the device. Only the mask processes of the JTE and the groove need to be added, and the process is simple and the cost is low.

[0045] In some embodiments, in combination Figure 1 、 2 -5 As shown, the silicon carbide device terminal structure further includes: an insulating dielectric material layer 610, and the insulating dielectric material layer 610 is disposed in the tail groove 710 and covers the region between the end of the main junction 310 and the chip edge.

[0046] In some embodiments, the insulating dielectric material layer 610 is an insulating dielectric material with a low dielectric constant and a high critical field strength.

[0047] In some embodiments, the doping concentration of the junction termination extension region 510 is 3.5e12 - 4.0e12 cm -3 .

[0048] In some embodiments, in combination Figure 5 with Figure 6 as shown, the range of the inclination angle of the second sidewall of the tail groove 710 is between 0° and 90°.

[0049] In some embodiments, in combination Figure 5 as shown, the inclination angle of the second sidewall of the tail groove 710 is 0°, and the second side of the tail groove 710 extends to the chip edge.

[0050] In some embodiments, in combination Figure 6 as shown, the inclination angle of the second sidewall of the tail groove 710 is 90°.

[0051] In some embodiments, in combination Figure 7 as shown, the silicon carbide device terminal structure further includes a field limiting ring isolation groove 720, the field limiting ring isolation groove 720 is disposed on the field limiting ring 410, and the field limiting ring isolation groove 720 is filled with an insulating dielectric material.

[0052] In this embodiment, one field limiting ring isolation groove 720 is disposed on each field limiting ring 410, such that the shape of the vertical cross-section of the field limiting ring 410 is concave, which is beneficial to extending the length of the JTE structure between the main junction 310 and the chip edge, improving the breakdown voltage performance of the device, effectively reducing the terminal length, and reducing the chip area occupation.

[0053] In some embodiments, the field limiting ring isolation groove 720 and the tail groove 710 can share the same mask, and the depth of the field limiting ring isolation groove 720 is the same as the depth of the tail groove 710.

[0054] In some embodiments, in combination Figure 8 as shown, under the same EPI conditions, the BV of the silicon carbide device with the traditional terminal structure S10 is 1586V, and the Figure 1 BV of the silicon carbide power device with the silicon carbide device terminal structure S20 shown in Figure 1 is 1764V, and the silicon carbide power device with the silicon carbide device terminal structure shown in

[0055] In some embodiments, in combination Figure 9 as shown, when a voltage of 1586V is applied to the first electrode 110, its electric field distribution is as shown in Figure 9 as shown, Figure 1The peak electric field of the silicon carbide device terminal structure shown is located on the right side of the 4th ring. At the same time, the left inclined plane of the trench also plays a certain pressure-bearing role. The electric field on the right side of the 4th ring is much stronger than that on the left inclined plane of the trench, indicating that there is still room for optimization and improvement in this terminal structure. The electric field between the two points shows an ideal box-shaped distribution, and the model will reach the optimal state when the electric field on the right side of the 4th ring is close to that on the left inclined plane of the trench. When a voltage of 1586V is applied to the first electrode of a silicon carbide device with a traditional terminal structure (FLRs), its electric field distribution is as Figure 9 shown. The peak electric field of FLRs is located on the right side of the 6th - 7th rings adjacent to the main junction. Combining with the traditional terminal structure in Figure 9 , the length of the FLRs terminal except the main junction is 110μm. While in the terminal structure provided in this embodiment, when a voltage of 1586V is applied to the first electrode of the silicon carbide device, its electric field distribution is as Figure 10 and Figure 11 shown. Figure 10 and Figure 11 The horizontal coordinate Y in Figure 10 represents the horizontal distance of the terminal structure, Figure 11 the vertical coordinate X in Figure 10 and Figure 11 represents the vertical distance of the terminal structure, and the vertical coordinate in Figure 1 represents the electric field strength. Combining with what is shown in Figure 1 , in the terminal structure (S20) in

[0056] , at the position of the horizontal distance of 45um, the electric field on the right side of the 4th ring of its terminal structure is much stronger than that on the left inclined plane of the trench. At this time,

[0057] In some embodiments, the silicon carbide power device can be any one of a silicon carbide MOSFET, a silicon carbide diode, and a silicon carbide IGBT.

[0058] The silicon carbide device terminal structure described in any of the above embodiments can be applied to any high-voltage power device produced based on SiC materials, including but not limited to silicon carbide MOSFETs, silicon carbide diodes, silicon carbide IGBTs, etc.

[0059] This application also provides a chip, including the silicon carbide device terminal structure described in any of the above embodiments.

[0060] In this embodiment, the chip includes a chip substrate, on which the silicon carbide device terminal structure described in any one of the above is formed. A field limiting ring structure including a plurality of field limiting rings is provided at the end of the main junction. By forming a tail groove between the field limiting ring structure and the chip edge, and setting the inclination angle of the first side wall of the tail groove to be less than 16°, the second side wall of the tail groove extends to the chip edge, and the field limiting ring region is covered by a plurality of junction termination extension regions and extends to the tail groove, so as to combine the field limiting ring, the junction termination extension region and the groove structure, effectively reducing the terminal length and the area occupied by the chip while ensuring the breakdown voltage performance of the device.

[0061] In some embodiments, the chip includes a chip substrate, and one or more silicon carbide power devices are provided on the substrate. The silicon carbide power device may include the silicon carbide device terminal structure in any one of the above embodiments.

[0062] In a specific application embodiment, other related semiconductor devices and MOSFETs may also be integrated on the chip substrate to form an integrated circuit.

[0063] In a specific application embodiment, the chip may be a switching chip or a driving chip.

[0064] Those skilled in the art can clearly understand that, for the convenience and conciseness of description, only the above-mentioned divisions of each doping region and device are used as examples. In actual applications, the above functions can be allocated to different doping regions and devices as needed, that is, the internal structure of the device is divided into different doping regions to complete all or part of the functions described above. Each doping region and device in the embodiment may be integrated in one unit, or each unit may exist physically alone, or two or more units may be integrated in one unit.

[0065] In addition, the specific names of each doping region and device are only for the convenience of mutual distinction and do not limit the protection scope of the present application.

[0066] In the above embodiments, the descriptions of each embodiment have their own emphases. For the parts not detailed or recorded in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

[0067] In addition, each doping region in each embodiment of the present application may be integrated in one unit, or each unit may exist physically alone, or two or more units may be integrated in one unit.

[0068] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included within the protection scope of the present application.

Claims

1. A silicon carbide device terminal structure, characterized in that, The terminal structure of the silicon carbide device includes: A field limiting ring structure formed at the end of the main junction, the field limiting ring structure including a plurality of spaced field limiting rings; A tail groove formed between the field limiting ring structure and the chip edge, the inclination angle of the first side wall of the tail groove being less than 16°, and the second side wall of the tail groove extending to the chip edge; A plurality of junction termination extension regions provided in the field limiting ring region; the plurality of junction termination extension regions cover the field limiting ring region and extend to the tail groove, and the depth of the junction termination extension region is less than the depth of the field limiting ring.

2. The silicon carbide device terminal structure according to claim 1, wherein The distance range that the junction termination extension region extends from the end of the main junction beyond the field limiting ring is 15 - 20 μm.

3. The silicon carbide device terminal structure according to claim 1, characterized in that, The junction termination extension region is further provided in the interval where the second side wall of the tail groove extends to the chip edge.

4. The silicon carbide device terminal structure according to claim 1, characterized in that The depth range of the tail groove is 0.6 - 0.7 μm.

5. The terminal structure of the silicon carbide device according to claim 1, characterized in that, The range of the inclination angle of the second side wall of the tail groove is 0° - 90°.

6. The silicon carbide device terminal structure according to claim 1, wherein, The terminal structure of the silicon carbide device further includes: An insulating dielectric material layer provided in the tail groove and covering the region between the end of the main junction and the chip edge.

7. The silicon carbide device terminal structure according to any one of claims 1-6, characterized in that The doping concentration of the junction termination extension region is 3.5e12 - 4.0e12 cm -3 .

8. The silicon carbide device terminal structure according to claim 1, characterized in that, The terminal structure of the silicon carbide device further includes: A field limiting ring isolation groove provided on the field limiting ring, and the field limiting ring isolation groove is filled with an insulating dielectric material.

9. A silicon carbide power device, characterized in that, The silicon carbide power device includes the terminal structure of the silicon carbide device according to any one of claims 1 - 8.

10. A chip, characterized in that, Including the terminal structure of the silicon carbide device according to any one of claims 1 - 8.

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