Detection method for evaluating fine line forming capability of etching liquid

Abstract

The invention provides a detection method for evaluating the fine line forming capability of an etching solution, which is used for directly evaluating the fine line forming capability of the etching solution. By designing a plurality of groups of circuit concentric-square-shaped patterns with different line widths / line distances and utilizing a thick copper-clad plate to carry out an etching experiment, etching traces left on the copper-clad plate by the etching liquid and the size of the circuit are directly observed and compared, and the manufacturing capability of the etching liquid on different circuits is evaluated. The method is simple in technological process, low in raw material investment and high in cost performance, the fine circuit etching capability of the etching liquid can be rapidly evaluated in the printed circuit board industry, time is saved for etching process optimization, and powerful data support is provided.

Description

Technical Field

[0001] The present invention belongs to the technical field of high-density interconnection manufacturing of printed circuit boards (PCBs), and particularly relates to a detection method for evaluating the ability of an etching solution to form fine circuits, which is used to quantitatively evaluate the processing ability of the etching solution for micron-level fine circuits. Technical Background

[0002] With the rapid development of the electronics industry, the integration and intelligence of electronic products are increasing day by day, and the manufacturing precision requirements for printed circuit boards are also getting higher and higher. To form high-precision and dense high-end printed circuits, etching is a crucial link, especially the etching ability of the etching solution determines the fineness of the metal circuit.

[0003] However, at present, the production of fine circuits in the industry is mainly achieved by actual etching and repeatedly adjusting the circuit compensation value. For example, in the invention patent (CN117794089B), the etching rate, depth, and line width change amount are monitored in real time during actual etching to obtain etching quality data, and then the circuit compensation value is modified and etching is carried out again; the invention patent (CN116170955B) provides a dynamic etching compensation method for fine circuits, and fine circuits are manufactured by means of three dynamic compensations. This method not only has low efficiency, but also requires a large number of experimental test boards for adjustment, resulting in waste of raw materials. At the same time, there is also a lack of an intuitive quantitative evaluation method for the process capabilities of different fine circuits.

[0004] Therefore, the present invention proposes a new detection method, designs a dense loop detection circuit with different line widths / line pitches, accurately evaluates the ability of the etching solution to penetrate into the gaps of fine circuits through the etching traces of each circuit, and further more comprehensively, quickly, and clearly evaluates the ability of the etching solution to prepare fine circuits when using different etching equipment, providing a reliable basis for optimizing the etching process of fine circuits in the printed circuit board industry. At the same time, this method has a simple process flow, less raw material input, high cost performance, and high practical value. Summary of the Invention

[0005] The purpose of the present invention is to propose a detection method for evaluating the ability of an etching solution to form fine circuits, which can intuitively and accurately evaluate the etching ability of the etching solution to prepare metal circuits with different line widths / line pitches when using different etching equipment, providing a reliable basis for optimizing the etching process of fine circuits in the printed circuit board industry.

[0006] To achieve the above purpose, the technical solution adopted by the present invention includes the following steps:

[0007] S1 Test Circuit Design: Design a test circuit pattern for evaluating the ability of the etching solution to form fine circuits;

[0008] S2 Circuit Fabrication: The circuit is fabricated by pre-treating the copper clad laminate, laminating a film, exposing, developing, etching, and stripping the film.

[0009] S3 Result Observation: Use a metallurgical microscope to observe the morphology of the circuits with different line widths and line spacings after etching, visually observe the etching marks, and measure the depth and width of the etching marks; through the morphology and size of the etching marks, reflect the etching ability of the etching solution on fine circuits. The etching depth represents the copper foil thickness that can be processed by the circuit, and the etching width reflects the degree of side etching of the circuit. The degree of side etching = etching width - set target line width.

[0010] As a preferred method, the test circuits in step S1 cover the circuit layout in printed circuit design, including horizontal, vertical, and diagonal circuit orientations, and dense loop circuits with line widths / line spacings of 30μm / 30μm, 35μm / 35μm, 40μm / 40μm, 45μm / 45μm, and 50μm / 50μm respectively.

[0011] As a preferred method, in step S2, a copper clad laminate with a copper foil thickness much greater than the copper thickness of the product circuit and greater than or equal to 2Oz is selected for circuit fabrication to ensure that the exposed copper surface cannot be completely etched during the etching process, thus leaving clear and complete etching marks on the copper surface for subsequent observation and measurement.

[0012] As a preferred method, the etching equipment in step S2 is a vacuum etching equipment or a vacuum two-fluid etching equipment.

[0013] Beneficial Effects

[0014] 1. The test circuit pattern covers common line width / line spacing designs in printed circuits. Through simple experiments, the penetration ability of the etching solution in the gaps of circuits with different line widths / line spacings and its processing ability for corresponding fine circuits can be observed, avoiding repeated adjustment of circuit compensation values.

[0015] 2. Select a thick copper clad laminate as the carrier to facilitate clear visualization of the etching effect and visually evaluate the processing ability of the etching solution for circuits with different line widths / line spacings.

[0016] 3. This method can be directly applied to guide the actual etching process of fine circuits, significantly shortening the experimental cycle, improving production efficiency, and reducing material waste. Description of the Drawings

[0017] Figure 1 Shows the test circuit pattern used in the present invention, where 1 represents the diagonal part, 2 represents the vertical part, and 3 represents the horizontal part. These circuits form dense circuits with different line widths and line spacings for detecting the ability of the etching solution to form fine circuits.

[0018] Figure 2It is a flowchart of a test method for detecting the ability of an etching solution to enter gaps with different line widths and line spacings under the embodiments of the present invention, where 4 is a copper foil, 5 is an epoxy resin, and 6 is a dry film;

[0019] Figure 3 and Figure 6 are respectively micrographs of etching results with different line widths and line spacings after vacuum etching and vacuum two-fluid etching. Through these micrographs, the immersion and etching effects of the etching solution in the gaps between lines with different line widths and line spacings can be visually observed;

[0020] Figure 4 and Figure 5 respectively show the measurement results of the etching width and depth of vacuum etching at different line spacings, further quantitatively evaluating the etching ability of the etching solution of this etching method for fine lines;

[0021] Figure 7 and Figure 8 respectively show the measurement results of the etching width and depth of vacuum two-fluid etching at different line spacings, further verifying the etching ability of the etching solution of this etching method for fine lines. Specific Embodiments

[0022] The present invention will be specifically described below in combination with specific implementation cases and accompanying drawings. It is necessary to point out that the following implementation cases are only used for further illustration of the present invention and cannot be construed as limiting the protection scope of the present invention. Some non-essential improvements and adjustments made by those skilled in the art to the present invention based on the content of the present invention still fall within the protection scope of the present invention.

[0023] Example 1

[0024] This example details the operation steps of a detection method for evaluating the ability of an etching solution to form fine lines:

[0025] S1 Test Circuit Design: Design a circuit pattern including horizontal, vertical, and oblique circuit traces, and the line width / line spacing includes 20μm / 20μm, 25μm / 25μm, 30μm / 30μm, 35μm / 35μm, 40μm / 40μm, 45μm / 45μm, 50μm / 50μm, 75μm / 75μm dense loop circuits;

[0026] S2 Circuit Fabrication: Use a double-sided copper clad laminate with a copper foil thickness of 2Oz (72μm) as the detection substrate. Through pre-treatment, film lamination, exposure, and development of the copper clad laminate, pattern transfer is achieved, and then a vacuum etching device is used to etch the exposed copper surface. The etching solution used is a hydrochloric acid cupric chloride system. During the etching process, the etching solution acts uniformly on the copper surface by spraying to achieve precise etching of the copper surface, and finally the film is removed to complete the circuit fabrication;

[0027] Observation of S3 Results: Use a metallurgical microscope to observe the circuits with different line widths and line spacings after etching, and measure the width and depth of the etching marks. It is possible to intuitively understand the penetration and etching effects of the etching solution in the gaps between circuits with different line widths and line spacings. Through the morphology and size of the etching marks, the etching ability of the etching solution for fine circuits is reflected. The etching depth represents the copper foil thickness that can be processed for this circuit, and the etching width reflects the degree of side etching of this circuit. The degree of side etching = etching width - set target line width.

[0028] As Figure 3 shown, complete etching marks are retained on the thick copper plate. Through careful observation of the cross-sectional view, it can be clearly found that as the line spacing increases, the copper area removed by etching increases, which intuitively reflects the different penetration abilities shown by the etching solution droplets when immersed in gaps with different line spacings and the processing abilities for circuits with different line widths and line spacings. The width and depth of the etching also show a corresponding increasing trend.

[0029] Figure 4 and Figure 5 show the accurate measurement results of the specific etching widths and etching depths under different line widths and line spacings. The results show that when using vacuum etching technology with acidic copper chloride etching solution to produce fine circuits, for 20μm / 20μm circuits, copper foil below 18μm should be used; for 25μm / 25μm circuits, copper foil below 21μm should be used; for 30μm / 30μm circuits, copper foil below 24μm should be used; for 35μm / 35μm circuits, copper foil below 26μm should be used; for 40μm / 40μm circuits, copper foil below 29μm should be used.

[0030] Example 2

[0031] This example details the operating steps of the detection method for evaluating the ability of the etching solution to form fine circuits:

[0032] S1: Test Circuit Design: Design a circuit pattern including horizontal, vertical, and diagonal circuit orientations, and the line width / line spacing includes 20μm / 20μm, 25μm / 25μm, 30μm / 30μm, 35μm / 35μm, 40μm / 40μm, 45μm / 45μm, 50μm / 50μm, 75μm / 75μm dense loop circuits;

[0033] S2 Circuit Fabrication: Use a double-sided copper clad laminate with a copper foil thickness of 2Oz (72μm) as the detection substrate. Through pretreatment, laminating, exposure, and development of the copper clad laminate, pattern transfer is achieved, and then a vacuum two-fluid etching equipment is used to etch the exposed copper surface. The etching solution used is a hydrochloric acid copper chloride system. During the etching process, the etching solution acts on the copper surface evenly through the spraying method to achieve precise etching of the copper surface, and finally the film is removed to complete the circuit fabrication;

[0034] Observation of S3 Results: Use a metallurgical microscope to observe the circuits with different line widths and line spacings after etching, and measure the width and depth of the etching marks. Through observation, the penetration and etching effects of the etching solution in the gaps between circuits with different line widths and line spacings can be intuitively understood. The etching ability of the etching solution for fine circuits is reflected by the morphology and size of the etching marks. The etching depth represents the thickness of the copper foil that can be processed for this circuit, and the etching width reflects the degree of side etching of this circuit. The degree of side etching = etching width - set target line width.

[0035] As Figure 6 shown, complete etching marks are retained on the thick copper plate. Through careful observation of the cross-sectional view, it can be clearly found that as the line spacing increases, the copper area removed by etching increases, which intuitively reflects the different penetration abilities of the etching solution droplets when immersed in gaps with different line spacings and the processing abilities for circuits with different line widths / line spacings. The etching width and depth also show a corresponding increasing trend.

[0036] Figure 7 and Figure 8 show the accurate measurement results of the specific etching widths and etching depths under different line widths and line spacings. The results show that when using the vacuum two-fluid etching technology with acidic cupric chloride etching solution to fabricate fine circuits, copper foils below 19μm should be used for 20μm / 20μm circuits; copper foils below 25μm should be used for 25μm / 25μm circuits; copper foils below 26μm should be used for 30μm / 30μm circuits; copper foils below 28μm should be used for 35μm / 35μm circuits; copper foils below 29μm should be used for 40μm / 40μm circuits.

Claims

1. A detection method for evaluating the ability of an etching solution to form fine lines, characterized in that, It includes the following steps: S1 Test circuit design: Design a test circuit pattern for evaluating the ability of the etching solution to form fine circuits; S2 Circuit fabrication: Complete circuit fabrication by performing pre-treatment, film lamination, exposure, development, etching, and film stripping on the copper clad laminate; S3 Result observation: Use a metallurgical microscope to observe the morphology of the circuits with different line widths and line spacings after etching, visually observe the etching marks, and measure the depth and width of the etching marks; Through the morphology and size of the etching marks, reflect the etching ability of the etching solution for fine circuits. The etching depth represents the copper foil thickness that can be processed by the circuit, and the etching width reflects the degree of side etching of the circuit. The degree of side etching = etching width - set target line width.

2. The detection method for evaluating the ability of an etching solution to form fine lines according to claim 1, wherein: The test circuits in step S1 cover the circuit layout in printed circuit design, including horizontal, vertical, and diagonal circuit orientations, and dense loop circuits with line widths / line spacings of 30μm / 30μm, 35μm / 35μm, 40μm / 40μm, 45μm / 45μm, and 50μm / 50μm respectively.

3. The detection method for evaluating the ability of an etching solution to form fine lines according to claim 1, characterized in that: In step S2, a copper clad laminate with a copper foil thickness much greater than the copper thickness of the product circuit and greater than or equal to 2Oz is selected for circuit fabrication to ensure that the exposed copper surface cannot be completely etched during the etching process, so as to leave clear and complete etching marks on the copper surface for subsequent observation and measurement.

4. The detection method for evaluating the ability of an etching solution to form fine circuits according to claim 1, wherein: In step S2, the etching equipment is a vacuum etching equipment or a vacuum two-fluid etching equipment.

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