Semiconductor annealing method and system and storage medium

By dividing the wafer into a central area, a transition area and an edge area, and calculating the coordinated gain weight value between each region, combining the independent calibration of infrared pyrometer and PID control strategy, the PID control parameters of each region are adjusted step by step, the temperature inhomogeneity problem during wafer annealing process is solved, and the performance consistency of the semiconductor annealing process is achieved.

CN120432384AActive Publication Date: 2025-08-05JIHUA LAB

Patent Information

Application Number
CN202510933973.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-08
Publication Date
2025-08-05
Estimated Expiration
2045-07-08

AI Technical Summary

Technical Problem

In the existing semiconductor annealing treatment, the temperature responses between different regions of the wafer are inconsistent, especially the edge regions are prone to temperature hysteresis or overheating, which affects the uniformity of the overall temperature field and the performance consistency of the semiconductor annealing process.

Method used

By dividing the wafer into a central area, a transition area and an edge area, and calculating the coordinated gain weight value between each region, combining the independent calibration of infrared pyrometer and PID control strategy, the PID control parameters of each region are adjusted step by step to achieve coordinated heating control between each region of the wafer.

Benefits of technology

It improves the temperature uniformity between the wafer areas during the annealing process, ensures the performance consistency of the semiconductor annealing process, and solves the problem of temperature hysteresis or overheating in the edge area.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of semiconductor device preparation, and discloses a semiconductor annealing method and system and a storage medium, and the method comprises the steps: dividing a wafer structure into a central region, a transition region and an edge region, and calculating the central transition cooperative gain and the transition edge cooperative gain between the regions; the infrared pyrometers in all the areas are independently calibrated; sequentially setting PID control parameters of the central area, the transition area and the edge area based on the calibration result; and performing cooperative heating control on the wafer based on the set PID parameters until the annealing treatment is completed. According to the invention, the real-time following of the temperature of each region of the wafer is realized through master-slave cooperative gain control, the temperature uniformity among the regions of the wafer in the annealing process is improved, the problem of temperature lag or overheating of the edge region in the annealing treatment process is effectively solved, and the performance consistency of the semiconductor annealing process is ensured.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device preparation, and in particular to a semiconductor annealing method, system and storage medium. Background Art

[0002] In the existing technology, semiconductor sheets need to be annealed after they are prepared, but the annealing temperature requirements are relatively high. In addition, due to the thermal coupling differences between different areas of the wafer and the limited temperature measurement accuracy, the temperature responses of various areas are inconsistent during the heating process. In particular, temperature lag or overheating is prone to occur in the edge areas, affecting the uniformity of the overall temperature field, and thus affecting the performance consistency of the semiconductor annealing process. Summary of the Invention

[0003] In order to overcome the shortcomings of the prior art, the purpose of the present invention is to provide a semiconductor annealing method, system and storage medium. The present invention controls the heating of the semiconductor by combining the master-slave collaborative strategy and the PID control strategy, thereby improving the temperature uniformity between different areas of the wafer during the annealing process, effectively solving the problem of temperature lag or overheating in the edge area during the annealing process, and ensuring the performance consistency of the semiconductor annealing process.

[0004] The first aspect of the present invention provides a semiconductor annealing method, comprising: dividing a wafer into a central area, a transition area and an edge area according to the wafer structure, and calculating the synergistic gain weight values between each area to obtain a central transition synergistic gain and a transition edge synergistic gain; independently calibrating the infrared pyrometers in each area; after the calibration is completed, adjusting the PID control parameters of the central area to obtain the central area PID control parameters; adjusting the PID control parameters of the transition area based on the central area PID control parameters and the central transition synergistic gain to obtain the transition area PID control parameters; adjusting the PID control parameters of the edge area based on the transition area PID control parameters and the transition edge synergistic gain to obtain the edge area PID control parameters; annealing the wafer, and synergistically controlling the temperatures of each area of the wafer based on the central area PID control parameters, the transition area PID control parameters and the edge area PID control parameters until the annealing process is completed.

[0005] Optionally, in a first implementation method of the first aspect of the present invention, the wafer is divided into a central area, a transition area and an edge area according to the wafer structure, and the assistance gain weight value between each area is calculated to obtain a central transition synergistic gain and a transition edge synergistic gain, including: dividing the wafer into a central area, a transition area and an edge area according to the wafer structure; obtaining the contact area and the equivalent heat transfer distance of the center point between the central area and the transition area, and performing gain calculation in combination with the thermal conductivity parameters of the wafer substrate material to obtain the central transition synergistic gain; obtaining the contact area and the equivalent heat transfer distance of the center point between the transition area and the edge area, and performing gain calculation in combination with the thermal conductivity parameters of the wafer substrate material to obtain the transition edge synergistic gain.

[0006] Optionally, in a second implementation of the first aspect of the present invention, the independent calibration of the infrared pyrometers in each area includes: heating the standard thermocouple according to a preset infrared pyrometer calibration curve; during the heating process, collecting the temperature value of the standard thermocouple and the infrared pyrometer readings in each area; and curve fitting the temperature value of the standard thermocouple and the infrared pyrometer readings in each area to obtain a temperature calibration curve for the infrared pyrometer in each area to complete the calibration.

[0007] Optionally, in a third implementation of the first aspect of the present invention, after the calibration is completed, the PID control parameters of the central area are adjusted to obtain the PID control parameters of the central area, including: obtaining a set target temperature from the upper computer; turning off the heating lamps in the transition area and the edge area, independently starting the heating lamps in the central area to heat the central area, and obtaining the actual temperature of the central area from the infrared pyrometer in the central area; calculating the deviation between the actual temperature of the central area and the set target temperature to obtain a first deviation value; adjusting the PID control parameters of the central area based on the first deviation value until the actual temperature of the central area can stably follow the target temperature to obtain the PID control parameters of the central area.

[0008] Optionally, in a fourth implementation of the first aspect of the present invention, the PID control parameters of the transition zone are adjusted based on the central zone PID control parameters and the central transition synergistic gain to obtain the transition zone PID control parameters, including: keeping the heating lamps in the central zone running and making the heating lamps in the edge zone in a closed state, starting the heating lamps in the transition zone to heat the transition zone, and obtaining the actual temperature of the transition zone from the infrared pyrometer in the transition zone; obtaining the actual temperature of the central zone from the infrared pyrometer in the central zone; calculating the deviation between the actual temperature of the transition zone and the actual temperature of the central zone to obtain a second deviation value; and adjusting the PID control parameters of the transition zone based on the second deviation value and the central transition synergistic gain to obtain the transition zone PID control parameters.

[0009] Optionally, in a fifth implementation of the first aspect of the present invention, the PID control parameters of the edge zone are adjusted based on the transition zone PID control parameters and the transition edge collaborative gain to obtain the edge zone PID control parameters, including: keeping the heating lamps in the central zone and the transition zone running, starting the heating lamps in the edge zone to heat the edge zone, and obtaining the actual temperature of the edge zone from the infrared pyrometer in the edge zone; obtaining the actual temperature of the transition zone from the infrared pyrometer in the transition zone; calculating the deviation between the actual temperature of the edge zone and the actual temperature of the transition zone to obtain a third deviation value; and adjusting the PID control parameters of the edge zone based on the third deviation value and the transition edge collaborative gain to obtain the edge zone PID control parameters.

[0010] Optionally, in a sixth implementation of the first aspect of the present invention, the wafer is annealed, and the temperature of each region of the wafer is collaboratively controlled based on the central area PID control parameters, the transition area PID control parameters and the edge area PID control parameters until the annealing process is completed, including: controlling the heating lamps in the central area, the transition area and the edge area based on the central area PID control parameters, the transition area PID control parameters and the edge area PID control parameters to anneal the wafer; obtaining real-time temperature data of each region from infrared pyrometers in the central area, the transition area and the edge area; calculating the difference between the real-time temperature data of each region to obtain real-time temperature difference data; and performing temperature compensation on each region based on the real-time temperature difference data until the annealing process is completed.

[0011] Optionally, in the seventh implementation method of the first aspect of the present invention, the temperature compensation of each area based on the real-time temperature difference data includes: if the real-time temperature difference data exceeds a set threshold, adjusting the output power of the heating lamp tubes in each area based on the real-time temperature difference data until the real-time temperature difference data returns to an allowable range.

[0012] A second aspect of the present invention provides a semiconductor annealing system, comprising a control device and a semiconductor annealing device electrically connected to the control device; the semiconductor annealing device comprises: Heating cavity; a quartz chamber, which is disposed in the heating chamber; A furnace door is provided on the heating cavity in an openable and closable manner, and is used to close or open the quartz cavity; A quartz tray is disposed in the quartz cavity; the quartz tray is used to carry wafers; Multiple groups of heating lamps are distributed on the inner wall of the heating chamber; the heating lamps are used to heat the wafers; A plurality of infrared pyrometers are distributed outside the heating chamber; the infrared pyrometers are used to monitor the temperature of the wafer; The control device is used to execute the semiconductor annealing method as described above.

[0013] A third aspect of the present invention provides a computer-readable storage medium having instructions stored thereon, wherein the instructions, when executed by a processor, implement the various steps of the semiconductor annealing method described above.

[0014] In the technical solution of the present invention, the heating areas are first divided according to the wafer structure, and the synergistic gain weight values between the areas are calculated to establish a thermal coupling relationship between the areas; then the infrared pyrometers in each area are independently calibrated to improve the temperature measurement accuracy; after the calibration is completed, the PID control parameters of the center area, transition area and edge area are adjusted in turn to achieve step-by-step temperature following control from the center area to the edge area; finally, based on the adjusted PID parameters, the various areas of the wafer are synergistically heated, which improves the temperature uniformity between the various areas of the wafer during the annealing process, effectively solves the problem of temperature lag or overheating in the edge area during the annealing process, and ensures the performance consistency of the semiconductor annealing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which: Figure 1 A first flow chart of a semiconductor annealing method provided by an embodiment of the present invention; Figure 2 A second flow chart of the semiconductor annealing method provided by an embodiment of the present invention; Figure 3 A third flow chart of a semiconductor annealing method provided in an embodiment of the present invention; Figure 4 A fourth flow chart of a semiconductor annealing method provided in an embodiment of the present invention; Figure 5 A fifth flow chart of the semiconductor annealing method provided in an embodiment of the present invention; Figure 6 A sixth flow chart of a semiconductor annealing method provided in an embodiment of the present invention; Figure 7 A seventh flow chart of a semiconductor annealing method provided by an embodiment of the present invention; Figure 8 The eighth flow chart of the semiconductor annealing method provided by the embodiment of the present invention Figure 9 A schematic structural diagram of a semiconductor annealing system provided in an embodiment of the present invention.

[0016] In the accompanying drawings: 1-heating chamber; 2-quartz chamber; 3-furnace door; 4-quartz tray; 5-wafer; 6-heating lamp; 61-central zone heating lamp group; 62-transition zone heating lamp group; 63-edge zone heating lamp group; 7-infrared pyrometer; 71-central zone infrared pyrometer; 72-transition zone infrared pyrometer; 73-edge zone infrared pyrometer. DETAILED DESCRIPTION

[0017] The present invention provides a semiconductor annealing method, system and storage medium, which first divide the heating areas according to the wafer structure, calculate the collaborative gain weight value between the areas, and establish a thermal coupling relationship between the areas; then independently calibrate the infrared pyrometers in each area to improve the temperature measurement accuracy; after the calibration is completed, the PID control parameters of the central area, transition area and edge area are adjusted in turn to achieve step-by-step temperature following control from the central area to the edge area; finally, based on the adjusted PID parameters, collaborative heating control is performed on the various areas of the wafer, thereby improving the temperature uniformity between the various areas of the wafer during the annealing process, effectively solving the problem of temperature lag or overheating in the edge area during the annealing process, and ensuring the performance consistency of the semiconductor annealing process.

[0018] The terms "first," "second," "third," "fourth," and so on (if any) in the description and claims of the present invention and in the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments described herein can be implemented in an order other than that shown or described herein. In addition, the terms "including" or "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus that includes a series of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, product, or apparatus.

[0019] For ease of understanding, the specific process of the embodiment of the present invention is described below. Figure 1 , an embodiment of the semiconductor annealing method in the embodiment of the present invention includes: 101. Divide the wafer into a central area, a transition area, and an edge area according to the wafer structure, and calculate the assistance gain weight values between the areas to obtain the central transition synergy gain and the transition edge synergy gain; In this embodiment, before performing the annealing process, the wafer is first divided into three continuous and adjacent heating areas according to its geometric structure: a central area, a transition area, and an edge area. The division method is as follows: according to the size of the processed wafer, different heating lamp layouts are selected, the diameter of the central area of the heating area is Φ52mm~90mm, the diameter of the transition area is Φ130mm~210mm, and the diameter of the edge area is Φ197mm~322mm. Taking a 6-inch wafer as an example, if the heating layout selects 4 heating lamps in the central area and the lamp spacing is 3mm, two groups of heating lamps are distributed on both sides of the central area in the transition area, the number of heating lamps in each group is 3, the heating lamp spacing is 3mm, and the edge area is in the transition area. Two groups of heating lamps are distributed on both sides of the transition zone, with two heating lamps in each group and a spacing of 6 mm between the heating lamps. Since the diameter of the heating lamp is Φ10 mm, the diameter of the central zone can be calculated to be Φ52 mm, the diameter of the transition zone is Φ130 mm, and the diameter of the edge zone is Φ197 mm. Subsequently, combined with the thermal conductivity parameters of the wafer substrate material, the contact area and equivalent heat transfer distance between the central zone and the transition zone, and between the transition zone and the edge zone are calculated respectively to obtain the central transition synergistic gain and the transition edge synergistic gain. These two synergistic gain values reflect the thermal coupling strength between adjacent regions and provide a basis for the subsequent design of the PID controller for the slave nodes (transition zone, edge zone).

[0020] 102. Independently calibrate the infrared pyrometers in each area; In this embodiment, after completing the wafer partition modeling, the infrared pyrometers in each area are further calibrated independently; multi-point calibration is performed in the range of 300°C to 1200°C using a standard thermocouple (such as a multi-point TCWafer), the infrared pyrometer readings are collected and compared with the standard temperature, and the least squares method or other nonlinear fitting algorithms are used to generate the infrared pyrometer temperature calibration curve corresponding to each area; the temperature calibration curve is used to calibrate the measurement temperature of each subsequent infrared pyrometer, significantly improving the temperature measurement accuracy and providing reliable data support for subsequent PID tuning and dynamic compensation based on real temperature feedback.

[0021] 103. After the calibration is completed, the PID control parameters of the central area are adjusted to obtain the PID control parameters of the central area; In this embodiment, after the infrared pyrometer is calibrated, the heating lamps in the center area are started and the heating lamps in the transition area and the edge area are turned off, so that only the center area of the wafer is heated independently. By collecting the deviation between the actual temperature of the center area and the set target temperature, the control output is adjusted using an improved PID control algorithm, and the proportional coefficient Kp, integral coefficient Ki and differential coefficient Kd are repeatedly adjusted so that the temperature of the center area can stably follow the target temperature changes.

[0022] 104. Based on the central zone PID control parameters and the central transition synergy gain, the PID control parameters of the transition zone are tuned to obtain the transition zone PID control parameters; In this embodiment, under the premise that the PID control parameters of the central zone are fixed, the heating lamp tube in the transition zone is started, and the current temperature data of the transition zone is collected. The actual detected temperature of the central zone is used as the target temperature reference. Combined with the central transition collaborative gain, an improved PID control algorithm is constructed to adjust the PID parameters of the transition zone. This step realizes the real-time tracking control of the transition zone to the temperature changes of the central zone, thereby improving the overall temperature consistency of the system.

[0023] 105. Based on the transition zone PID control parameters and the transition edge collaborative gain, the PID control parameters of the edge zone are tuned to obtain the edge zone PID control parameters; In this embodiment, under the premise that the PID control parameters of the central zone and the transition zone are fixed, the heating lamp tube in the edge zone is started, and the current temperature data of the edge zone is collected. The actual detected temperature of the transition zone is used as the target temperature reference. Combined with the transition edge collaborative gain, an improved PID control algorithm is constructed to adjust the edge PID parameters. This step realizes the real-time tracking control of the edge zone to the temperature changes of the transition zone, thereby improving the overall temperature consistency of the system.

[0024] 106. Perform annealing on the wafer, and coordinately control the temperature of each region of the wafer based on the central region PID control parameter, the transition region PID control parameter, and the edge region PID control parameter until the annealing is completed; In this embodiment, after the PID control parameters for all zones are tuned, the formal annealing phase begins. Each zone's heating lamps operate independently according to the tuned PID control parameters, and infrared pyrometers continuously collect temperature data from each zone, forming a closed-loop feedback control until the annealing process is complete.

[0025] In an embodiment of the present invention, the heating areas are first divided according to the wafer structure, and the synergistic gain weight values between the areas are calculated to establish a thermal coupling relationship between the areas; then the infrared pyrometers in each area are independently calibrated to improve the temperature measurement accuracy; after the calibration is completed, the PID control parameters of the center area, transition area and edge area are adjusted in turn to achieve step-by-step temperature following control from the center area to the edge area; finally, based on the adjusted PID parameters, the various areas of the wafer are synergistically heated, which improves the temperature uniformity between the various areas of the wafer during the annealing process, effectively solves the problem of temperature lag or overheating in the edge area during the annealing process, and ensures the performance consistency of the semiconductor annealing process.

[0026] See also Figure 2 , two embodiments of the semiconductor annealing method in the embodiment of the present invention include: 201. Divide the wafer into a central area, a transition area, and an edge area according to the wafer structure; In this embodiment, before the annealing process is performed, the wafer is first divided into three continuous and adjacent heating zones based on its geometric structure: a center zone, a transition zone, and an edge zone. The center zone is located at the geometric center of the wafer and primarily reflects the overall thermal response of the wafer. The transition zone surrounds the center zone and serves as a heat transfer medium between the center and edge zones. The edge zone covers the outermost area of the wafer, where its thermal behavior is significantly affected by the cooling system. This zoning strategy enables independent temperature measurement and heating control for each zone of the wafer.

[0027] 202. Obtain the contact area between the central region and the transition region and the equivalent heat transfer distance of the center point, and perform gain calculation based on the thermal conductivity parameters of the wafer substrate material to obtain the center-transition synergistic gain; 203. Obtain the contact area and center point equivalent heat transfer distance between the transition zone and the edge zone, and perform gain calculation based on the thermal conductivity parameter of the wafer substrate material to obtain the transition edge synergistic gain; In this embodiment, after completing wafer partitioning, the contact areas between the central region and the transition region, and between the transition region and the edge region, are further collected. This is the interface area where heat exchange actually occurs between the two regions during heat conduction. Simultaneously, the equivalent heat transfer distance between the center points of the two regions is calculated. This distance reflects the path length of heat transfer from the central region to the transition region. Combining the thermal conductivity parameters of the wafer substrate material, the contact area, and the equivalent heat transfer distance of the center point, the gain calculation is performed, that is, the synergistic gain between two adjacent areas can be calculated. The calculation formula is as follows: (Formula 1); (Equation 2) ; in, is the thermal conductivity between region i and region j; is the contact area between region i and region j; is the equivalent heat transfer distance between the center points of regions i and j; is the equivalent thermal conductivity at the interface between region i and region j, It can be obtained from the thermal conductivity parameters of the wafer substrate material; is the synergy gain between region i and region j; is the set of adjacent regions of region i; k is the adjacent region, is the thermal conductivity between region i and adjacent region k; That is, the thermal conductance between region i and all adjacent regions k is summed, which is essentially the sum of the thermal conductances of region i and the surrounding regions; By "single-region thermal conductivity (i.e. ) / total thermal conductivity (i.e. )”, It can reflect the relative weight of the thermal impact of region j on region i, that is, the synergistic gain between regions i and j is obtained; For steps 202 and 203, the central area, transition area, and edge area are substituted into equations (1) and (2) as area i and area y, respectively, to obtain the synergistic gain between the central area and the transition area (i.e., the central-transition synergistic gain) and the synergistic gain between the transition area and the edge area (i.e., the transition-edge synergistic gain).

[0028] See also Figure 3 , three embodiments of the semiconductor annealing method in the embodiment of the present invention include: 301. Heating a standard thermocouple according to a preset infrared pyrometer calibration curve; In this embodiment, before executing the wafer annealing process, the infrared pyrometers in each area are first independently calibrated to improve temperature measurement accuracy; the semiconductor annealing system includes a standard thermocouple for testing, and a standard thermocouple (such as a multi-point TCWafer) is placed in the heating chamber as a reference temperature source; the control device drives the heating lamps in the center area, transition area, and edge area to increase the temperature in sequence according to a preset temperature gradient control strategy, so that the standard thermocouple is gradually heated from 300°C to 1200°C, and the temperature is maintained for 30 seconds each time the temperature is increased by 50°C to ensure that the system reaches a thermal equilibrium state.

[0029] 302. During the heating process, collect the temperature values of the standard thermocouples and the infrared pyrometer readings of each area; In this embodiment, during the heating process, the temperature value output by the standard thermocouple is collected in real time as a real temperature reference under the current environment; at the same time, the original output signals of the infrared pyrometer in the center area, the infrared pyrometer in the transition area, and the infrared pyrometer in the edge area are collected respectively; after each temperature step stabilizes, the corresponding infrared pyrometer voltage or digital signal value is recorded to form multiple sets of "standard temperature-infrared pyrometer reading" paired data sets for subsequent curve fitting.

[0030] 303. Perform curve fitting on the temperature value of the standard thermocouple and the reading of the infrared pyrometer in each region to obtain the temperature calibration curve of the infrared pyrometer in each region to complete the calibration; In this embodiment, the collected standard thermocouple temperature values are fitted to the corresponding infrared pyrometer readings using the least squares method or other nonlinear fitting algorithm to generate a temperature calibration curve reflecting the relationship between the two. The infrared pyrometers in each region (central region, transition region, and edge region) each obtain an independent calibration curve, which is used to convert the original infrared pyrometer signals collected during the subsequent actual annealing process into true temperature values. After completion of this step, the infrared pyrometers in each region have high temperature measurement accuracy, providing a reliable data basis for subsequent PID parameter tuning and dynamic temperature compensation based on true temperature feedback.

[0031] See also Figure 4 , four embodiments of the semiconductor annealing method in the embodiment of the present invention include: 401. Obtain the set target temperature from the host computer; In this embodiment, after completing preliminary preparations such as wafer partitioning, calculating inter-region synergistic gain, and calibrating the infrared pyrometer, the control device obtains the target temperature required for the current annealing process from the host computer. This target temperature is typically set based on the specific semiconductor device manufacturing process requirements, such as a constant temperature point or temperature curve within the range of 800°C to 1200°C.

[0032] 402. Turn off the heating lamps in the transition zone and the edge zone, independently start the heating lamps in the central zone to heat the central zone, and obtain the actual temperature of the central zone from the infrared pyrometer in the central zone; In this embodiment, in order to ensure the accuracy of the adjustment of the PID control parameters in the center area, the heating lamps in the transition area and the edge area are first turned off, and only the heating lamp group in the center area is turned on to independently heat the center area of the wafer; at the same time, the current temperature data is collected in real time by the infrared pyrometer in the center area, and is converted into a real temperature value based on the infrared pyrometer temperature calibration curve obtained in step 303.

[0033] 403. Calculate the deviation between the actual temperature of the central area and the set target temperature to obtain a first deviation value; In this embodiment, the control device periodically compares the current actual temperature of the central area with the set target temperature and calculates the temperature deviation between the two. , i.e. the first deviation value; the first deviation value serves as the error term of the central area PID control algorithm and is used for subsequent central area PID parameter tuning.

[0034] 404. PID control parameters of the central area are adjusted based on the first deviation value until the actual temperature of the central area can stably follow the target temperature, thereby obtaining the PID control parameters of the central area. In this embodiment, an improved PID control algorithm is used to dynamically adjust the central zone heating power. Compared with the traditional PID control algorithm, in order to further enhance the system's adaptability to thermal coupling effects and improve the stability of subsequent slave node control, a synergistic compensation term (i.e., the synergistic gain obtained in steps 202 and 203) is introduced. The improved PID control algorithm is as follows: (Formula 3); Where, 、 and is the PID control parameter; Where, = - ; is the actual temperature of the current area, is the target temperature, This is the deviation between the target temperature provided by the host computer and the actual temperature of the current area (i.e., the center area), which is introduced into the PID control algorithm as the tracking error term of the current area; is the control output of region i; is the synergy gain between region i and region j; is the set of adjacent regions of region i; is the actual temperature of the adjacent area; Since the central area is the main control node, its control goal is to make its own temperature stably follow the target temperature given by the host computer, so it does not rely on the temperature information of other areas; therefore, when adjusting the PID parameters of the central area, it is only based on the deviation between its own temperature and the target temperature. Adjustment is performed without introducing inter-regional collaborative gain compensation items By turning off the heating lamps in the transition zone and edge zone, independent adjustment of the central zone is achieved, ensuring good dynamic response characteristics and steady-state accuracy, and providing a stable reference source for temperature tracking in subsequent zones.

[0035] See also Figure 5 , five embodiments of the semiconductor annealing method in the embodiment of the present invention include: 501. Keep the heating lamps in the center zone running and the heating lamps in the edge zone off, start the heating lamps in the transition zone to heat the transition zone, and obtain the actual temperature of the transition zone from the infrared pyrometer in the transition zone; In this embodiment, after the PID control parameters of the central area are adjusted, the central area heating lamp is kept on and its adjusted PID control parameters are maintained unchanged; then the transition area heating lamp is started to heat the transition area of the wafer; the control device collects the current temperature data in real time through the infrared pyrometer in the transition area, and converts it into a real temperature value based on the infrared pyrometer temperature calibration curve obtained in step 303.

[0036] 502. Obtain the actual temperature of the central area from the infrared pyrometer in the central area; In this embodiment, the control device simultaneously obtains the actual temperature of the current central zone from the central zone infrared pyrometer, and this temperature serves as the target temperature of the transition zone controller; since the central zone is the master control node, its temperature has high stability and response speed, and is therefore suitable as a temperature tracking benchmark for the slave node (i.e., the transition zone).

[0037] 503. Calculate the deviation between the actual temperature of the transition zone and the actual temperature of the central zone to obtain a second deviation value; In this embodiment, the control device periodically compares the current actual temperature of the transition zone with the actual temperature of the central zone and calculates the temperature deviation between the two. , that is, the second deviation value; the second deviation value is used as the error term of the transition zone PID control algorithm and is used for subsequent transition zone PID parameter tuning.

[0038] 504. PID control parameters of the transition zone are tuned based on the second deviation value and the central transition cooperative gain to obtain PID control parameters of the transition zone. In this embodiment, the PID control parameters in the transition zone are tuned based on formula (3); (Formula 3); in, (where i is the center region and j is the transition region) is the center transition synergy gain at step 202; This is a collaborative compensation mechanism based on regional thermal coupling. is the actual temperature of the current area (i.e. the transition zone), is the actual temperature of the adjacent area (i.e., the central area); The central area serves as the master node, responsible for providing a stable temperature reference; the transition area serves as a slave node, reducing the temperature difference between areas by following the temperature changes of the central area in real time; Although each area uses an independent PID controller for local adjustment, by introducing the central transition collaborative gain as a compensation term into the PID control algorithm of the transition zone, the transition zone and the central zone form a master-slave collaborative architecture. The transition zone can sense the thermal disturbance in the central zone and respond in advance, which significantly improves the uniformity of the temperature field distribution on the wafer surface during the annealing process and realizes a control strategy that is both independent and collaborative.

[0039] See also Figure 6 , six embodiments of the semiconductor annealing method in the embodiment of the present invention include: 601. Keep the heating lamps in the center zone and the transition zone running, start the heating lamps in the edge zone to heat the edge zone, and obtain the actual temperature of the edge zone from the infrared pyrometer in the edge zone; In this embodiment, after the PID control parameters of the center zone and the transition zone are adjusted, the heating lamps in the center zone and the transition zone are kept on and their adjusted PID control parameters are maintained unchanged; then the heating lamps in the edge zone are started to heat the edge area of the wafer, and the control device collects the current temperature data in real time through the infrared pyrometer in the edge zone, and converts it into a real temperature value based on the infrared pyrometer temperature calibration curve obtained in step 303.

[0040] 602. Obtain the actual temperature of the transition zone from an infrared pyrometer in the transition zone; In this embodiment, the control device simultaneously obtains the actual temperature of the current transition zone from the transition zone infrared pyrometer, and this temperature serves as the target temperature of the edge zone controller; since the transition zone has achieved stable tracking of the center zone temperature, its temperature has good dynamic response characteristics and is suitable as a temperature tracking benchmark for the edge zone.

[0041] 603. Calculate the deviation between the actual temperature of the edge region and the actual temperature of the transition region to obtain a third deviation value; In this embodiment, the control device periodically compares the current actual temperature of the edge zone with the actual temperature of the transition zone and calculates the temperature deviation between the two. , that is, the third deviation value; the third deviation value is used as the error term of the marginal area PID control algorithm and is used for subsequent marginal area PID parameter tuning.

[0042] 604. PID control parameters are adjusted for the edge region based on the third deviation value and the transition edge collaborative gain to obtain PID control parameters for the edge region. In this embodiment, similar to step 504, the PID control parameters in the transition zone are tuned based on equation (3); (Formula 3); in, (where i is the transition region and j is the edge region) is the transition edge cooperative gain at step 203; This is a collaborative compensation mechanism based on regional thermal coupling. is the actual temperature of the current area (i.e. the edge area), is the actual temperature of the adjacent region (i.e., transition zone); During the tuning process, the PID control parameters of the center zone and the transition zone are fixed and unchanged, and only the Kp, Ki, and Kd parameters of the edge zone are adjusted so that the temperature of the edge zone can quickly and stably follow the temperature changes of the transition zone, and finally the PID control parameters suitable for the edge zone are determined.

[0043] See also Figure 7 , the seven embodiments of the semiconductor annealing method in the embodiment of the present invention include: 701. Control heating lamps in the central area, transition area, and edge area based on the central area PID control parameters, transition area PID control parameters, and edge area PID control parameters to perform annealing on the wafer. In this embodiment, after the PID control parameters of the central area, transition area and edge area are adjusted, the formal annealing process begins; the standard thermocouple used for testing is replaced with the wafer to be processed, and then the control device drives the heating lamp groups in the central area, transition area and edge area respectively according to the adjusted PID control parameters to heat the wafer according to the set process curve; the heating lamps in each area operate under the action of their own independent PID controller to form a basic temperature control loop, ensuring that each area has good local response characteristics.

[0044] 702. Obtain real-time temperature data of each area from infrared pyrometers in the central area, transition area, and edge area; In this embodiment, infrared pyrometers installed in each area continuously collect real-time temperature information of the corresponding area of the wafer; all temperature measurement data are converted based on the infrared pyrometer temperature calibration curve obtained in step 303 to ensure that the collected temperature values are real and reliable physical temperature values as the input basis for subsequent control algorithms.

[0045] 703. Calculate the difference between the real-time temperature data of each area to obtain real-time temperature difference data; In this embodiment, the control device periodically compares the temperature data between each area, calculates the temperature difference between adjacent areas, and generates real-time temperature difference data; the real-time temperature difference data reflects the thermal response differences between different areas of the wafer during the heating process, and is an important basis for determining whether the temperature compensation mechanism needs to be activated.

[0046] 704. Perform temperature compensation on each region based on the real-time temperature difference data until the annealing process is completed; In this embodiment, when the temperature difference between a certain area and an adjacent area exceeds a set threshold, PID control is suspended and a temperature compensation mechanism is triggered. The heating power is adjusted to restore the temperature difference to within the allowable range, and then PID control is resumed to maintain the consistency of the temperature field across the entire wafer surface. In this embodiment, the temperature compensation mechanism and the master-slave collaborative control strategy complement each other; the master-slave collaborative control ensures that the slave nodes (transition zone, edge zone) can stably follow the temperature changes of the upper-level nodes (center zone, transition zone); the dynamic compensation mechanism further enhances the system's adaptability to external disturbances (such as cooling system fluctuations, gas flow changes, etc.); the combination of the two further improves the consistency and repeatability of the annealing process.

[0047] See also Figure 8 , the eight embodiments of the semiconductor annealing method in the embodiment of the present invention include: 801. If the real-time temperature difference data exceeds the set threshold, the output power of the heating lamps in each area is adjusted based on the real-time temperature difference data until the real-time temperature difference data returns to an allowable range; In this embodiment, the temperature compensation mechanism includes the following control logic: When the real-time temperature difference data exceeds the set threshold, the PID control of each area is suspended first; For the edge zone, if the edge zone temperature is lower than the transition zone temperature and the temperature difference between the two exceeds a set threshold (e.g., 10°C), the output amplitude will be increased (e.g., +10% to 20%) based on the current edge zone heating power to accelerate the edge zone heating rate. If the edge zone temperature is higher than the transition zone temperature and the temperature difference between the two exceeds a set threshold (e.g., 10°C), the output amplitude will be reduced (e.g., -10% to 20%) based on the current edge zone heating power to prevent local overheating of the edge zone. The temperature compensation process will continue until the temperature difference between the edge zone and the transition zone is less than the set threshold. Similarly, temperature compensation also applies to situations where the temperature difference between the transition zone and the center zone is too large. When the temperature difference between all areas returns to the allowable range, the system automatically switches back to PID control and continues to complete the remaining annealing stages according to the preset process curve; when the annealing process time reaches the set value, the system stops heating and completes the entire annealing process.

[0048] The semiconductor annealing method according to the embodiment of the present invention is described above. The semiconductor annealing system according to the embodiment of the present invention is described below. Figure 9 In an embodiment of the present invention, a semiconductor annealing system includes a control device and a semiconductor annealing device electrically connected to the control device, wherein the semiconductor annealing device includes: Heating cavity 1; a quartz chamber 2, which is disposed in the heating chamber 1; The furnace door 3 is openably provided on the heating chamber 1 and is used to close or open the quartz chamber 2; A quartz tray 4 is disposed in the quartz chamber 2 ; the quartz tray 4 is used to carry the wafer 5 ; Multiple groups of heating lamps 6 are distributed on the inner wall of the heating chamber 1; the heating lamps 6 are used to heat the wafers 5; Multiple groups of infrared pyrometers 7 are distributed outside the heating chamber 1; the infrared pyrometers 7 are used to monitor the temperature of the wafer 5; In this embodiment, the heating chamber 1 is a metal chamber, preferably made of stainless steel, and is composed of a top plate, a bottom plate, and surrounding side plates. The inner wall of the chamber is coated with a gold layer to enhance infrared radiation reflection efficiency and reduce heat absorption by the chamber itself, thereby improving energy utilization. The heating chamber is equipped with a cooling system, including cooling water channels opened on the top plate, bottom plate, and side plates for continuous cooling of the chamber. At the same time, spray holes are also provided on the top and bottom plates to purge and cool the heating lamps by passing nitrogen gas to prevent the lamps from exploding due to overheating. The quartz chamber 2 is disposed inside the heating chamber 1 and is a sealed structure for accommodating the wafer to be processed and providing a stable process environment. The quartz chamber 2 has good light transmittance, which facilitates the infrared pyrometer 7 to perform non-contact measurement of the surface temperature of the wafer 5 through it. The furnace door 3 is openably provided on the heating chamber 1 and is used to close or open the quartz chamber 2. When inserting or removing a wafer, the furnace door 3 is opened, and the robot delivers the wafer 5 into the quartz chamber 2. After the insertion or removal is completed, the furnace door 3 is closed to ensure the stability and safety of the process environment during the heating process. The quartz tray 4 is placed inside the quartz chamber 2 and has a circular hollow hole in the middle that matches the size of the wafer 5, making it easy to place the wafer 5. The quartz tray 4 is equipped with several quartz pins (usually three) to support the wafer 5 to be processed, preventing the wafer 5 from directly contacting the tray surface, thereby reducing heat conduction errors. Multiple groups of heating lamps 6 are distributed on the inner wall of the heating chamber 1 to form a zoned heating system. The heating lamps 6 are generally infrared halogen lamps. The heating lamps 6 include a central zone heating lamp group 61, a transition zone heating lamp group 62, and an edge zone heating lamp group 63. The power of each zone lamp is set according to the thermal response characteristics of different areas of the wafer. The central heating lamp group 61 includes two groups of lamps, each group contains 4 to 6 infrared halogen lamps, the power of a single lamp is 500W to 1500W, and the lamps are arranged equidistantly with a spacing of 3 to 5 mm. The transition zone heating lamp group 62 includes four groups of lamps, each group contains 3 to 4 infrared halogen lamps, and the power of a single lamp is 500W to 1500W. The lamps are evenly distributed on both sides of the central area, and the lamps are evenly spaced 3 to 5mm apart. The edge zone heating lamp group 63 includes four groups of lamps, each group contains 2 to 3 infrared halogen lamps, the power of a single lamp is 2000W to 3000W, the lamps are evenly distributed on both sides of the transition zone, and the distance between the lamps is 6 to 8mm; All heating lamps 6 are arranged in an orthogonal or relative manner, and the distance between the lamps and the wafer is controlled between 30 and 60 mm to ensure uniform heating effect; Multiple groups of infrared pyrometers 7 are distributed outside the heating chamber, including a central infrared pyrometer 71, a transitional infrared pyrometer 72, and an edge infrared pyrometer 73. These infrared pyrometers 7 are respectively arranged to penetrate the quartz chamber 2 and face the central, transition, and edge regions of the wafer 5. The infrared pyrometers 7 are used to monitor temperature changes in corresponding regions of the wafer 5. The infrared pyrometers 7 are generally wavelength-type optical pyrometers with a temperature measurement range of 150°C to 1400°C and an operating wavelength of 3.9 μm. This wavelength can penetrate the quartz chamber 2 without being affected by it, thereby accurately measuring the wafer surface temperature. Multiple groups of heating lamps and infrared pyrometers form a closed-loop control structure. The control device adjusts the output power of the heating lamps in each zone in real time based on the temperature data collected by the infrared pyrometers to achieve uniform control of the wafer surface temperature across the entire area. The heating lamps in each zone are independently controlled by the PID control parameters of each zone, and rely on the collaborative gain compensation term in the PID control parameters to achieve master-slave collaborative control. At the same time, combined with a dynamic temperature compensation mechanism, a good temperature tracking relationship is established between the center zone, transition zone, and edge zone, effectively improving the consistency and repeatability of the annealing process. In this embodiment, the control device may be a common industrial control platform such as a programmable logic controller (PLC), an industrial personal computer (IPC), and an embedded control system.

[0049] The present invention realizes efficient and high-precision temperature control during the wafer annealing process by rationally dividing the heating areas, configuring the heating power density, optimizing the temperature measurement layout, and introducing the synergistic gain and improved PID control algorithm. It improves the temperature uniformity between the various areas of the wafer during the annealing process, effectively solves the problem of temperature lag or overheating in the edge area during the annealing process, and ensures the performance consistency of the semiconductor annealing process.

[0050] The present invention also provides a computer-readable storage medium, which can be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer-readable storage medium stores instructions, which, when executed on a computer, cause the computer to execute the steps of the semiconductor annealing method.

[0051] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, devices, and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0052] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0053] Finally, it should be noted that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art will be able to modify the technical solutions described in the aforementioned embodiments or substitute equivalents for some of the technical features. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. A semiconductor annealing method, characterized in that: include: The wafer is divided into a central area, a transition area, and an edge area according to the wafer structure, and the synergy gain weight values between the areas are calculated to obtain the central transition synergy gain and the transition edge synergy gain; Independent calibration of infrared pyrometers in each area; After the calibration is completed, the PID control parameters of the central area are adjusted to obtain the PID control parameters of the central area; Based on the central zone PID control parameters and the central transition synergy gain, the PID control parameters of the transition zone are tuned to obtain the transition zone PID control parameters; Based on the transition zone PID control parameters and the transition edge collaborative gain, the PID control parameters of the edge zone are tuned to obtain the edge zone PID control parameters; The wafer is annealed, and the temperature of each area of the wafer is coordinated and controlled based on the central area PID control parameters, the transition area PID control parameters and the edge area PID control parameters until the annealing process is completed.

2. The semiconductor annealing method according to claim 1, wherein The method of dividing the wafer into a central area, a transition area, and an edge area according to the wafer structure and calculating the assistance gain weight values between the areas to obtain the central transition synergy gain and the transition edge synergy gain includes: Divide the wafer into a central area, a transition area, and an edge area according to the wafer structure; Obtain the contact area between the center region and the transition region and the equivalent heat transfer distance at the center point, and perform gain calculation based on the thermal conductivity parameters of the wafer substrate material to obtain the center-transition synergistic gain; The contact area and the equivalent heat transfer distance at the center point between the transition zone and the edge zone are obtained, and the gain is calculated in combination with the thermal conductivity parameters of the wafer substrate material to obtain the transition edge synergistic gain.

3. The semiconductor annealing method according to claim 1, wherein: The independent calibration of infrared pyrometers in each area includes: Heating a standard thermocouple according to a preset infrared pyrometer calibration curve; During the heating process, the temperature values of the standard thermocouples and the infrared pyrometer readings of each area were collected; The temperature value of the standard thermocouple and the infrared pyrometer reading of each area are curve fitted to obtain the temperature calibration curve of the infrared pyrometer in each area to complete the calibration.

4. The semiconductor annealing method according to claim 1, wherein: After the calibration is completed, the PID control parameters of the central area are adjusted to obtain the PID control parameters of the central area, including: Get the set target temperature from the host computer; The heating lamps in the transition zone and the edge zone are turned off, and the heating lamps in the center zone are independently started to heat the center zone, and the actual temperature of the center zone is obtained from the infrared pyrometer in the center zone; Calculating the deviation between the actual temperature of the central area and the set target temperature to obtain a first deviation value; The PID control parameters of the central area are adjusted based on the first deviation value until the actual temperature of the central area can stably follow the target temperature, so as to obtain the PID control parameters of the central area.

5. The semiconductor annealing method according to claim 1, wherein: The PID control parameter of the transition zone is tuned based on the central zone PID control parameter and the central transition synergistic gain to obtain the transition zone PID control parameter, including: Keep the heating lamps in the center area running and the heating lamps in the edge area off, start the heating lamps in the transition area to heat the transition area, and obtain the actual temperature of the transition area from the infrared pyrometer in the transition area; Obtain the actual temperature of the central area from the infrared pyrometer in the central area; Calculating the deviation between the actual temperature of the transition zone and the actual temperature of the central zone to obtain a second deviation value; The PID control parameters of the transition zone are adjusted based on the second deviation value and the central transition cooperative gain to obtain the PID control parameters of the transition zone.

6. The semiconductor annealing method according to claim 1, wherein: The PID control parameter of the edge area is adjusted based on the transition area PID control parameter and the transition edge collaborative gain to obtain the edge area PID control parameter, including: Keep the heating lamps in the center and transition zones running, start the heating lamps in the edge zones to heat the edge zones, and obtain the actual temperature of the edge zones from the infrared pyrometers in the edge zones; Obtain the actual temperature of the transition zone from the infrared pyrometer in the transition zone; Calculating the deviation between the actual temperature of the edge region and the actual temperature of the transition region to obtain a third deviation value; The PID control parameters of the edge area are adjusted based on the third deviation value and the transition edge cooperative gain to obtain the PID control parameters of the edge area.

7. The semiconductor annealing method according to claim 1, wherein: The wafer is annealed and the temperature of each area of the wafer is collaboratively controlled based on the central area PID control parameter, the transition area PID control parameter and the edge area PID control parameter until the annealing process is completed, including: Controlling the heating lamps in the center area, the transition area, and the edge area based on the center area PID control parameters, the transition area PID control parameters, and the edge area PID control parameters to perform annealing on the wafer; Obtain real-time temperature data of each area from infrared pyrometers in the central area, transition area and edge area; Calculate the difference between the real-time temperature data of each area to obtain real-time temperature difference data; Temperature compensation is performed on each area based on real-time temperature difference data until the annealing process is completed.

8. The semiconductor annealing method according to claim 7, wherein: The temperature compensation for each area based on real-time temperature difference data includes: If the real-time temperature difference data exceeds the set threshold, the output power of the heating lamps in each area is adjusted based on the real-time temperature difference data until the real-time temperature difference data returns to the allowable range.

9. A semiconductor annealing system, characterized in that: The invention comprises a control device and a semiconductor annealing device electrically connected to the control device; the semiconductor annealing device comprises: Heating cavity; a quartz chamber, which is disposed in the heating chamber; A furnace door is provided on the heating cavity in an openable and closable manner, and is used to close or open the quartz cavity; A quartz tray is disposed in the quartz cavity; the quartz tray is used to carry wafers; Multiple groups of heating lamps are distributed on the inner wall of the heating chamber; the heating lamps are used to heat the wafers; A plurality of infrared pyrometers are distributed outside the heating chamber; the infrared pyrometers are used to monitor the temperature of the wafer; The control device is used to execute the semiconductor annealing method according to any one of claims 1 to 8.

10. A computer-readable storage medium having instructions stored thereon, characterized in that: When the instructions are executed by a processor, the various steps of the semiconductor annealing method according to any one of claims 1 to 8 are implemented.

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