Low-voltage varistor ceramic chip, preparation method thereof, varistor chip and varistor

Abstract

The invention relates to a low-voltage varistor ceramic chip, a preparation method thereof, a varistor chip and a varistor, and belongs to the technical field of special equipment or methods for manufacturing resistors. The preparation method of the low-voltage varistor ceramic chip comprises the following steps: carrying out heat treatment on a resistor ceramic chip to obtain the low-voltage varistor ceramic chip, the heat treatment comprises the step of keeping the temperature of the resistor ceramic chip at 290-310 DEG C for more than or equal to 8 hours in an air atmosphere. The low-voltage varistor ceramic chip prepared by the preparation method can effectively improve the nonlinear coefficient and the leakage current of the varistor, so that the qualification rate of the varistor is remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of special equipment or methods for manufacturing resistors, and in particular to a low-voltage varistor ceramic piece and a preparation method thereof, a varistor chip and a varistor. Background Art

[0002] Varistor is a voltage-limiting protective device that is widely used in civil circuits such as automotive circuits, communication lines, and household appliances to protect sensitive equipment from voltage surges and electrostatic discharges. Low voltage varistors generally refer to varistor voltages V 1mA Taking the low-voltage product 7K330 as an example, for varistor ≤68V, the nonlinear coefficient (α) of the current 7K low-voltage varistor chip is relatively small after normal silver burning, which is lower than the standard lower limit of 20.6; the leakage current is relatively large, which is higher than the standard upper limit of 12.5μA, resulting in a low pass rate of low-voltage varistors. Summary of the Invention

[0003] The object of the present invention is to overcome the deficiencies of the prior art and to provide a low-voltage varistor ceramic piece and a preparation method thereof, a varistor chip and a varistor.

[0004] To achieve the above object, the technical solution adopted by the present invention is:

[0005] In a first aspect, the present invention provides a method for preparing a low-voltage varistor ceramic chip, comprising the following steps:

[0006] Heat-treating the resistor ceramic sheet to obtain a low-voltage varistor ceramic sheet;

[0007] The heat treatment comprises: keeping the resistor ceramic piece at 290-310° C. (for example, the temperature may be any one of 290° C., 292° C., 294° C., 296° C., 298° C., 300° C., 302° C., 304° C., 306° C., 308° C., and 310° C. or any two thereof) in an air atmosphere for 8 hours or more (for example, the temperature may be any one of 8 hours, 9 hours, 10 hours, 11 hours, 12 hours, 13 hours, 14 hours, 15 hours, 16 hours, 17 hours, 18 hours, 19 hours, and 20 hours or any two thereof).

[0008] The existence of voltage between the pressure-sensitive element and the electrode is caused by the existence of the substrate grain boundary barrier. The low-voltage varistor has a low grain boundary barrier due to its own characteristics, resulting in a low nonlinear coefficient. The present invention heat-treats the resistor ceramic sheet (zinc oxide ceramic sheet) in an air atmosphere at low temperature for a long time, so that oxygen molecules in the air diffuse to the ZnO grain boundary and then adsorb. The adsorption of oxygen helps to improve the ZnO grain boundary barrier, thereby promoting the improvement of its nonlinear coefficient, thereby improving the qualified rate of the varistor.

[0009] As a preferred embodiment of the method for preparing low-voltage varistor ceramics of the present invention, the holding time at 290-310°C is ≥ 16 hours. Studies have found that a holding time of 16 hours or more is more conducive to improving the qualified rate of varistors.

[0010] In a preferred embodiment of the method for preparing low-voltage varistor ceramics according to the present invention, the holding time at 290-310°C is 16-20 hours. Studies have found that extending the holding time beyond 20 hours has limited effect on further improving the yield of the varistor. Furthermore, based on energy consumption considerations, the holding time is preferably 16-20 hours.

[0011] As a preferred embodiment of the method for preparing the low-voltage varistor ceramic sheet of the present invention, the heat treatment is specifically as follows: in an air atmosphere, first heating the resistor ceramic sheet from room temperature to 290-310°C, and keeping it at 290-310°C for ≥8h, and then naturally cooling it to room temperature.

[0012] As a preferred embodiment of the method for preparing a low-voltage varistor ceramic disc of the present invention, the heating rate for heating the resistor ceramic disc from room temperature to 290-310°C is ≤ 95°C / h (for example, it can be any one or any two of 95°C / h, 90°C / h, 85°C / h, 80°C / h, 75°C / h, 70°C / h, 65°C / h, and 60°C / h). Studies have found that a lower heating rate is more conducive to maintaining consistency in the internal and external temperatures of the resistor ceramic disc during heat treatment.

[0013] As a preferred embodiment of the method for preparing the low-voltage varistor ceramic sheet of the present invention, the resistor ceramic sheet is a zinc oxide ceramic sheet.

[0014] As a preferred embodiment of the method for preparing low-voltage varistor ceramic sheets according to the present invention, the zinc oxide ceramic sheets are sintered from ZnO having a molar percentage of ≥90% and additives such as Bi2O3, Co2O3, and NiO. For example, the zinc oxide ceramic sheets can be prepared by the following method: batching (sand grinding the additives for 3-5 hours, sand grinding the slurry for 4-5 hours) - granulation (spray drying) - molding (dry pressing) - sintering (below 1200°C).

[0015] In a preferred embodiment of the method for preparing a low-voltage varistor ceramic sheet according to the present invention, the zinc oxide ceramic sheet has a thickness of 0.90 to 1.55 mm. For example, the thickness of the zinc oxide ceramic sheet can be within the range of any one or any two of 0.90 mm, 1 mm, 1.1 mm, 1.2 mm, 1.3 mm, 1.4 mm, 1.5 mm, and 1.55 mm.

[0016] In a second aspect, the present invention provides a low-voltage varistor ceramic sheet produced by the above-mentioned preparation method.

[0017] In a third aspect, the present invention provides a varistor chip, which includes the above-mentioned low-voltage varistor ceramic chip.

[0018] In a fourth aspect, the present invention provides a varistor comprising the above-mentioned low-voltage varistor ceramic chip.

[0019] Compared with the prior art, the present invention has the following beneficial effects:

[0020] The low-voltage varistor ceramic piece prepared by the preparation method of the present invention can effectively improve the nonlinear coefficient and leakage current of the varistor, thereby significantly improving the qualified rate of the varistor. DETAILED DESCRIPTION

[0021] In order to better illustrate the purpose, technical solutions and advantages of the present invention, the present invention will be further described below in conjunction with specific embodiments.

[0022] Unless otherwise specified, other materials and reagents used in the examples can be obtained from commercial sources.

[0023] Resistor ceramic chip 1, manufactured by Xianhua Sensitive Components, brand 07k330;

[0024] Resistor ceramic chip 2, manufactured by Xianhua Sensitive Components, brand 07k220.

[0025] Example 1

[0026] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0027] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 300°C at a rate of 60°C / h, kept at 300°C for 8 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0028] A varistor chip is prepared by the following preparation method: silver paste is printed on both sides of the low-voltage varistor ceramic sheet obtained above (silver coating, diameter 5.0±0.01mm), and the silver layers printed on both sides of the varistor ceramic sheet are formed into thin silver layers with strong adhesion by high-temperature reduction (silver firing, temperature of 540±10°C), thereby obtaining the varistor chip.

[0029] A varistor is made by the following preparation method: the upper end of the varistor chip is placed in the middle of the intersection of the formed leads, and the internal and external electrodes are connected by dip soldering (soldering, the temperature is 270±5°C), and a bright, uniform, strong, moisture-proof and corrosion-resistant insulating layer is coated on the soldered chip (encapsulation and curing) to obtain the varistor.

[0030] Example 2

[0031] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0032] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 300°C at a rate of 60°C / h, kept at 300°C for 12 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0033] A varistor chip, the preparation method of which is the same as that of Example 1.

[0034] A varistor, the preparation method of which is the same as that of Example 1.

[0035] Example 3

[0036] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0037] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 300°C at a rate of 60°C / h, kept at 300°C for 16 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0038] A varistor chip, the preparation method of which is the same as that of Example 1.

[0039] A varistor, the preparation method of which is the same as that of Example 1.

[0040] Example 4

[0041] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0042] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 300°C at a rate of 60°C / h, kept at 300°C for 20 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0043] A varistor chip, the preparation method of which is the same as that of Example 1.

[0044] A varistor, the preparation method of which is the same as that of Example 1.

[0045] Example 5

[0046] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0047] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 290°C at a rate of 60°C / h, kept at 290°C for 8 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0048] A varistor chip, the preparation method of which is the same as that of Example 1.

[0049] A varistor, the preparation method of which is the same as that of Example 1.

[0050] Example 6

[0051] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0052] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 310°C at a rate of 60°C / h, kept at 310°C for 8 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0053] A varistor chip, the preparation method of which is the same as that of Example 1.

[0054] A varistor, the preparation method of which is the same as that of Example 1.

[0055] Example 7

[0056] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0057] In an air atmosphere, the resistance ceramic chip 2 is first heated from room temperature to 300°C at 30°C / h, and kept at 300°C for 16 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0058] A varistor chip, the preparation method of which is the same as that of Example 1.

[0059] A varistor, the preparation method of which is the same as that of Example 1.

[0060] Comparative Example 1

[0061] A low-voltage varistor ceramic piece is a resistance ceramic piece 1 that has not been subjected to heat treatment.

[0062] A varistor chip, the preparation method of which is the same as that of Example 1.

[0063] A varistor, the preparation method of which is the same as that of Example 1.

[0064] Comparative Example 2

[0065] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0066] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 300°C at a rate of 60°C / h, kept at 300°C for 6 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0067] A varistor chip, the preparation method of which is the same as that of Example 1.

[0068] A varistor, the preparation method of which is the same as that of Example 1.

[0069] Comparative Example 3

[0070] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0071] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 270°C at a rate of 60°C / h, kept at 270°C for 8 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0072] A varistor chip, the preparation method of which is the same as that of Example 1.

[0073] A varistor, the preparation method of which is the same as that of Example 1.

[0074] Comparative Example 4

[0075] A method for preparing a low-voltage varistor ceramic chip comprises the following steps:

[0076] In an air atmosphere, the resistance ceramic chip 1 is first heated from room temperature to 320°C at a rate of 60°C / h, kept at 320°C for 8 hours, and then naturally cooled to room temperature to obtain a low-voltage varistor ceramic chip.

[0077] A varistor chip, the preparation method of which is the same as that of Example 1.

[0078] A varistor, the preparation method of which is the same as that of Example 1.

[0079] Comparative Example 5

[0080] A varistor, the preparation method of which comprises the following steps:

[0081] First, the resistor ceramic sheet 1 is silver-coated (diameter 5.0±0.01mm) and silver-sintered (temperature 540±10°C); then, in an air atmosphere, the temperature is raised from room temperature to 300°C at a rate of 60°C / h and maintained at 300°C for 8 hours, and then naturally cooled to room temperature; finally, the upper end of the above-mentioned varistor chip is placed in the middle of the intersection of the formed leads, and the internal and external electrodes are connected by dip soldering (welding, temperature 270±5°C), and a bright, uniform, strong, moisture-proof and corrosion-resistant insulating layer is applied to the soldered chip (encapsulation and curing) to obtain a varistor.

[0082] Performance Testing

[0083] The varistors in the embodiment and the comparative example were tested for varistor voltage, nonlinear coefficient α and leakage current Ir, respectively. The qualified ranges of varistor voltage, nonlinear coefficient α and leakage current Ir are as follows.

[0084] 1) Varistor voltage V 1mA : 32.7-37.8V (product 07k330), 23.0-26.5V (product 07k220).

[0085] 2) Non-linear coefficient α: ≥20.6.

[0086] 3) Leakage current Ir: ≤12.5.

[0087] Table 1 Performance of varistor in Example 1 (10 randomly selected)

[0088]

[0089] Table 2 Performance of varistor in Example 2 (10 randomly selected)

[0090]

[0091]

[0092] Table 3 Performance of varistor in Example 3 (10 randomly selected)

[0093]

[0094] Table 4 Performance of varistor in Example 4 (10 randomly selected)

[0095]

[0096]

[0097] Table 5 Performance of varistor in Example 5 (10 randomly selected)

[0098]

[0099] Table 6 Performance of varistor in Example 6 (10 randomly selected)

[0100]

[0101] Table 7 Performance of varistor in Example 7 (10 randomly selected)

[0102]

[0103]

[0104] Table 8 Performance of varistors (10 randomly selected) in Comparative Example 1

[0105]

[0106] Table 9 Performance of varistors (10 randomly selected) in Comparative Example 2

[0107]

[0108]

[0109] Table 10 Performance of varistors in comparative example 3 (10 randomly selected)

[0110]

[0111] Table 11 Performance of varistors (10 randomly selected) in Comparative Example 4

[0112]

[0113]

[0114] Table 12 Performance of varistor (10 randomly selected) in comparative example 5

[0115]

[0116]

[0117] Table 13 Qualified rate of varistors in various embodiments and comparative examples

[0118] serial number Number of tests Number of qualified Pass rate Example 1 1051 844 80.3％ Example 2 1040 905 87.02％ Example 3 1071 1010 94.3％ Example 4 1087 1025 94.3％ Example 5 1047 841 80.32％ Example 6 1046 842 80.5％ Example 7 1061 1008 95.0％ Comparative Example 1 1045 836 80.0％ Comparative Example 2 1040 832 80.0％ Comparative Example 3 1080 864 80.0％ Comparative Example 4 1049 834 79.5％ Comparative Example 5 1049 839 79.98％

[0119] According to Table 13, the qualified rate of the varistors in Examples 1 to 7 all reached more than 80%, indicating that the low-voltage varistor ceramics prepared by the preparation method of the present invention can effectively improve the qualified rate of the varistors.

[0120] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the essence and scope of the technical solutions of the present invention.

Claims

1. A method for preparing a low voltage varistor ceramic chip, characterized in that: The following steps are involved: Heat-treating the resistor ceramic sheet to obtain a low-voltage varistor ceramic sheet; The heat treatment comprises: keeping the resistance ceramic piece at 290-310° C. for 8 hours or more in an air atmosphere.

2. The preparation method according to claim 1, wherein The heat preservation time at 290-310° C. is ≥16 h.

3. The preparation method according to claim 2, wherein The heat preservation time at 290-310° C. is 16-20 hours.

4. The preparation method according to claim 1, wherein The heat treatment is specifically as follows: in an air atmosphere, first heating the resistor ceramic piece from room temperature to 290-310° C., maintaining the temperature at 290-310° C. for 8 hours or more, and then naturally cooling the piece to room temperature.

5. The preparation method according to claim 4, wherein The heating rate of the resistance ceramic piece from room temperature to 290-310° C. is ≤95° C. / h.

6. The preparation method according to claim 1, wherein The resistor ceramic sheet is a zinc oxide ceramic sheet.

7. The preparation method according to claim 6, wherein The zinc oxide ceramic sheet is formed by sintering ZnO and additives; the thickness of the zinc oxide ceramic sheet is 0.90-1.55 mm.

8. A low voltage varistor ceramic obtained by the preparation method according to any one of claims 1 to 7.

9. A varistor chip, characterized in that: The low-voltage varistor ceramic chip comprises the low-voltage varistor ceramic chip according to claim 8.

10. A varistor, characterized in that: The low-voltage varistor ceramic chip comprises the low-voltage varistor ceramic chip according to claim 8.

Images