Power conversion device and control method

Abstract

The invention provides a power conversion device and a control method, the power conversion device comprises an arc fault detection circuit, a first boost circuit, a controller and an inverter circuit, the first boost circuit is connected between a first DC power supply and the inverter circuit, and the arc fault detection circuit is connected to the input end of the first boost circuit; the first boost circuit comprises a switching tube and an inductor, and the switching tube is connected with the controller and the inductor; the controller is used for controlling the switching frequency of a switching tube in the first boost circuit to be reduced from a first frequency to a second frequency when the average value of the inductive current in the first boost circuit is smaller than a frequency reduction threshold value; when the average value of the inductive current in the first boost circuit is smaller than a hiccup threshold value, the first boost circuit is controlled to enter a hiccup mode; the hiccup threshold value is smaller than the frequency reduction threshold value, and the hiccup mode is a mode in which a switching tube in the first boost circuit does not work continuously.

Description

Technical Field

[0001] The present application relates to the field of energy storage technology, and in particular to a power conversion device and a control method. Background Art

[0002] A photovoltaic system generally includes photovoltaic modules and power conversion devices. The photovoltaic modules can convert solar energy into electrical energy, and the power conversion device can convert the direct current generated by the photovoltaic modules into alternating current and output it to energy storage devices or electrical equipment. The power conversion device usually includes a boost circuit, which can adjust the voltage output by the photovoltaic modules to adapt to different lighting conditions, thereby improving overall efficiency.

[0003] Power conversion devices typically also include an arc fault detection circuit, which detects the current output from the photovoltaic module to the boost circuit to determine whether arcing has occurred. The arc fault detection circuit can stop arc detection when the boost circuit is in hiccup mode. In other words, once the boost circuit enters hiccup mode, the arc fault detection circuit stops arc detection and restarts arc detection when the boost circuit exits hiccup mode. This reduces the chance of misjudgment by the arc fault detection circuit in hiccup mode. However, this shortens the arc detection time and makes it impossible to provide long-term arc monitoring. If arcing occurs during the period when arc detection is stopped, it can cause more serious damage. Summary of the Invention

[0004] The present application provides a power conversion device and a control method, which can extend the arc detection time of an arc fault detection circuit, achieve longer arc monitoring, and thus improve the safety of the power conversion device.

[0005] In a first aspect, an embodiment of the present application provides a power conversion device, which may include: an arc fault detection circuit, a first boost circuit, a controller and an inverter circuit, the first boost circuit being connected between a first DC power supply and the inverter circuit, and the arc fault detection circuit being connected to the input end of the first boost circuit; the first boost circuit including a switching tube and an inductor, the switching tube being connected to the controller and the inductor respectively; the controller being used to: when the average value of the inductor current in the first boost circuit is less than a frequency reduction threshold, control the switching frequency of the switching tube in the first boost circuit to decrease from a first frequency to a second frequency; when the average value of the inductor current in the first boost circuit is less than a hiccup threshold, control the first boost circuit to enter a hiccup mode; the hiccup threshold is less than the frequency reduction threshold, and the hiccup mode is a mode in which the switching tube in the first boost circuit operates discontinuously.

[0006] In particular, based on the relationship that the hiccup threshold decreases as the switching frequency decreases, when the hiccup threshold before frequency reduction is the first hiccup threshold and after frequency reduction is the second hiccup threshold, the second hiccup threshold is lower than the first hiccup threshold. In the prior art, the first boost circuit enters hiccup mode when the average value of the inductor current is lower than the first hiccup threshold, so arc detection is stopped when the average value of the inductor current is lower than the first hiccup threshold. In the embodiment of the present application, the first boost circuit enters hiccup mode only when the average value of the inductor current is lower than the second hiccup threshold, so arc detection is stopped only when the average value of the inductor current is lower than the second hiccup threshold. Compared with the prior art, arc detection can still be performed during the period when the average value of the inductor current is greater than or equal to the second hiccup threshold and lower than the first hiccup threshold, thereby extending the arc detection time of the arc fault detection circuit and enabling longer arc monitoring, thereby improving the safety of the power conversion device.

[0007] Furthermore, when the average value of the inductor current in the first boost circuit is less than the frequency reduction threshold, it indicates that the average value of the inductor current is not high. In this case, the inverter circuit, acting as the load of the first boost circuit, may be at or below half load. Frequency reduction can reduce the number of on- and off-times of the switch, thereby reducing additional control losses, thereby improving the efficiency of the power conversion device and reducing switching losses. It should be understood that when the operating load of the device reaches approximately 50% of its rated capacity, it can be considered to be in a "half-load" state, and when it is less than 50%, it can be considered to be below half load.

[0008] Optionally, the difference between the first frequency and the second frequency is negatively correlated with the hiccup threshold. The greater the difference between the first frequency and the second frequency, the higher the degree of frequency reduction, and therefore the smaller the second hiccup threshold; the smaller the difference between the first frequency and the second frequency, the lower the degree of frequency reduction, and therefore the larger the second hiccup threshold. Furthermore, the smaller the second hiccup threshold, the smaller the average value of the corresponding inductor current when entering the hiccup mode, and thus the longer the arc detection time; the larger the second hiccup threshold, the larger the average value of the corresponding inductor current when entering the hiccup mode, and thus the shorter the arc detection time. Therefore, the second frequency can be designed according to the arc detection duration requirement, thereby improving the design flexibility and meeting the application needs of various scenarios.

[0009] Optionally, the power conversion device further includes a second boost circuit, the second boost circuit being connected between the second DC power supply and the inverter circuit, and the arc fault detection circuit being connected to the input of the second boost circuit. In the prior art, when the first boost circuit enters hiccup mode, the arc fault detection circuit ceases arc detection. If arcing occurs in the path between the second DC power supply and the second boost circuit, the arc fault detection circuit will be unable to detect the arcing phenomenon due to the cessation of arc detection, thereby causing a dangerous situation. In the embodiments of the present application, since the hiccup threshold of the first boost circuit is lowered by frequency reduction, the probability of the first boost circuit entering hiccup mode is reduced, allowing arc detection to be performed during the extended period. This solves the problem in the prior art of being unable to perform arc detection in the path between the second DC power supply and the second boost circuit during the extended period, achieving longer arc monitoring time, and thus improving the safety of the power conversion device. The extended period refers to the period during which the average value of the inductor current is greater than or equal to the second hiccup threshold and less than the first hiccup threshold.

[0010] Optionally, the first frequency corresponds to a first cycle, the second frequency corresponds to a second cycle, the switch in the first boost circuit has a first on-time during the first cycle, and the switch in the first boost circuit has a second on-time during the second cycle, and the difference between the first on-time and the second on-time is within a preset range, the lower limit of the preset range being -5% of the first cycle, and the upper limit of the preset range being 5% of the first cycle. In other words, the first on-time and the second on-time are substantially the same, and thus the on-time within a cycle before and after the frequency reduction process remains substantially unchanged. This allows, on the one hand, more accurate control of the second hiccup threshold, thereby facilitating extended arc detection duration, and on the other hand, meeting load requirements, such as avoiding failure to meet load requirements when the on-time is shortened, and avoiding increased load burden when the on-time is lengthened.

[0011] Optionally, the controller is further configured to control the switching frequency of the switch in the first boost circuit to return to the first frequency upon reaching the end of at least one second cycle, wherein the second cycle is the inverse of the second frequency. Exiting the frequency reduction process upon reaching the end of a second cycle allows for responsive adjustment of the on-time to meet load demands when the load changes. Exiting the frequency reduction process upon reaching the end of multiple second cycles can accommodate a variety of scenarios and enhance design flexibility.

[0012] Furthermore, the controller is further configured to control the switching frequency of the switch tube to return to the first frequency when an exit condition is met and at least one second cycle ends; the exit condition includes: the average value of the inductor current in the first boost circuit is greater than or equal to the frequency reduction threshold. If the controller exits without determining whether the exit condition is met, hiccups may occur. Therefore, when exiting the frequency reduction process, the switching frequency will first return to the first frequency, and then determine whether the trigger condition is met again. If the determination result is yes, the frequency reduction process will continue. Thus, exiting the frequency reduction process may require three more steps. If the exit condition is determined to be met, and the controller does not exit the frequency reduction process if the exit condition is not met, the frequency reduction process can be continued directly. This reduces the number of operational steps, the amount of computation required by the controller, and power consumption.

[0013] The controller is specifically used to: the duration of the second cycle includes the duration of the first cycle corresponding to a first frequency, the exit condition is met when the duration of the first cycle is reached, and when the end moment of at least one second cycle is reached, the switching frequency of the control switch tube is restored to the first frequency.

[0014] Alternatively, the controller is specifically configured to: the duration of the second cycle includes the durations of multiple first cycles corresponding to the first frequency, and when the exit condition is satisfied at each first cycle duration, and the exit condition is satisfied a predetermined number of times consecutively, at the end of at least one second cycle, control the switching frequency of the switch tube to return to the first frequency. This can increase the accuracy of the judgment result and avoid repeated switching of the frequency reduction process due to an inaccurate judgment result.

[0015] Optionally, the controller is specifically configured to: when the average value of the inductor current in the first boost circuit is less than a frequency reduction threshold, control the switching frequency of the switch in the first boost circuit to decrease from a first frequency to a second frequency based on the difference between the average value of the inductor current in the first boost circuit and the frequency reduction threshold. A mapping table of the difference between the average value of the inductor current in the first boost circuit and the frequency reduction threshold and the switching frequency can be determined based on actual experience. In the mapping table, different differences correspond to different switching frequencies, or different difference ranges correspond to different switching frequencies. This mapping table can be pre-configured in the controller. When the controller determines the difference between the current average value of the inductor current and the frequency reduction threshold, the corresponding switching frequency can be found in the mapping table, and the switching frequency found in the table can be used as the second frequency. In this way, the second frequency can be determined based on current actual needs, reducing the probability of hiccups occurring after the frequency reduction process, thereby facilitating the extension of arc detection duration.

[0016] Alternatively, a second frequency can be pre-configured in the controller. When the trigger condition is met, the controller performs frequency reduction processing based on the pre-configured second frequency. This eliminates the need for table lookup operations and reduces the amount of calculation of the controller, thereby reducing the power consumption of the power conversion device.

[0017] In a second aspect, an embodiment of the present application also provides a control method for a boost circuit in a power conversion device, which control method may include: receiving an inductor current in a first boost circuit; when the average value of the inductor current in the first boost circuit is less than a frequency reduction threshold, controlling the switching frequency of the switch tube in the first boost circuit to decrease from a first frequency to a second frequency; when the average value of the inductor current in the first boost circuit is less than a hiccup threshold, controlling the first boost circuit to enter a hiccup mode; wherein the hiccup threshold is less than the frequency reduction threshold, and the hiccup mode is a mode in which the switch tube in the first boost circuit operates discontinuously.

[0018] Optionally, the difference between the first frequency and the second frequency is negatively correlated with the hiccup threshold.

[0019] Optionally, the first frequency corresponds to a first cycle, the second frequency corresponds to a second cycle, the switch tube in the first boost circuit has a first on-time in the first cycle, and the switch tube in the first boost circuit has a second on-time in the second cycle. The difference between the first on-time and the second on-time is within a preset range, the lower limit of the preset range is -5% of the first cycle, and the upper limit of the preset range is 5% of the first cycle.

[0020] Optionally, the control method further includes: when reaching the end moment of at least one second cycle, controlling the switching frequency of the switch tube in the first boost circuit to return to the first frequency; the second cycle is the inverse of the second frequency.

[0021] It should be understood that since the principle of solving the problem by this control method is similar to the principle of solving the problem by the aforementioned power conversion device, the implementation and technical effects of this control method can refer to the implementation and technical effects of the aforementioned power conversion device, and the repeated parts will not be repeated.

[0022] In the third aspect, an embodiment of the present application also provides a photovoltaic system, which may include: a photovoltaic component and a power conversion device as described in the first aspect and any one of the embodiments of the first aspect, the power conversion device is connected to the photovoltaic component, and the power conversion device is used to: convert the direct current generated by the photovoltaic component into alternating current.

[0023] It should be understood that since the principle of solving the problem by the photovoltaic system is similar to that of the aforementioned power conversion device, the implementation and technical effects of the photovoltaic system can refer to the implementation and technical effects of the aforementioned power conversion device, and the repeated parts will not be repeated. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic diagram of the structure of a photovoltaic system provided in an embodiment of the present application;

[0025] Figure 2 A schematic structural diagram of a power conversion device provided in an embodiment of the present application;

[0026] Figure 3 A schematic diagram of a discontinuous current mode provided in an embodiment of the present application;

[0027] Figure 4 A schematic diagram of a frequency reduction method provided in an embodiment of the present application;

[0028] Figure 5 A schematic structural diagram of another power conversion device provided in an embodiment of the present application.

[0029] Reference numerals:

[0030] 100-PV module, 200-power conversion device, 300-energy storage device, 11-first boost circuit, 12-second boost circuit, 20-controller, 30-inverter circuit, 40-arc fault detection circuit, 51-first DC power supply, 52-second DC power supply, 61-first positive bus, 62-first negative bus, 63-second positive bus, 64-second negative bus, U c - Input voltage of the first boost circuit, U bus -Output voltage of the first boost circuit, L0-inductor, Q1-switch, D-diode, C-filter capacitor, GND-ground, T1-first cycle, T2-second cycle. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of this application clearer, this application will be further described in detail below with reference to the accompanying drawings.

[0032] It should be noted that the same reference numerals in the drawings of this application represent the same or similar structures, and thus their repeated description will be omitted. The words expressing positions and directions described in this application are all explained using the drawings as examples, but they can be modified as needed, and such modifications are included in the scope of protection of this application. The drawings of this application are only for illustrating relative positional relationships and do not represent true proportions.

[0033] It should be noted that, in this application, words such as "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described in this application as "exemplarily" or "for example" should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplarily" or "for example" is intended to present related concepts in a concrete way. In the embodiments of this application, words such as "first" and "second" do not limit the quantity and order.

[0034] In order to facilitate understanding of the technical solutions provided by the embodiments of the present application, its application scenarios are first described below. The power conversion device provided by the embodiments of the present application can be applied to photovoltaic systems. Photovoltaic systems are based on solar power generation. The electric energy generated based on solar energy can be provided to the AC power grid, to power base station equipment (for example, base station equipment in remote areas without mains electricity or with poor mains electricity), to power batteries, or to power various types of electrical equipment such as household appliances (such as refrigerators, air conditioners, etc.) in the AC power grid. The specific application scenarios can be determined according to the actual application scenarios. Of course, in addition to being applied to photovoltaic systems, the power conversion device can also be applied to non-photovoltaic systems. In this case, the power conversion device can be any device including a boost circuit and having voltage conversion power, so the application scenarios of the power conversion device are not limited in this application. The following are all explained by taking the application to the photovoltaic system as an example.

[0035] Figure 1 The schematic diagram of the application scenario of the photovoltaic system provided in the embodiment of the present application is as follows: Figure 1 As shown, the photovoltaic system includes a photovoltaic module 100 and a power conversion device 200. The photovoltaic module 100 is also called a photovoltaic array and can include multiple photovoltaic strings. Each photovoltaic string can include multiple photovoltaic panels connected in series. The photovoltaic panels are used to convert solar energy into electrical energy. The power conversion device 200 is connected to the photovoltaic module 100. The power conversion device 200 can monitor the photovoltaic module 100, perform safety shutdown or power optimization and other controls, and can also convert the direct current generated by the photovoltaic module 100 into alternating current and output it to the energy storage device 300 or the power-consuming device. The above-mentioned energy storage device 300 can be a battery or an AC power grid. In some embodiments, the power conversion device 200 can be a photovoltaic optimizer. The photovoltaic optimizer has a maximum power point tracking (MPPT) function, that is, the photovoltaic optimizer can track the maximum power point of the photovoltaic module 100 so that the photovoltaic module 100 maintains a high output power.

[0036] Exemplarily, the power conversion device 200 generally includes: a boost circuit, an inverter circuit, an arc fault detection circuit and a controller, etc. The boost circuit is connected between the photovoltaic component 100 and the inverter circuit, the controller is connected to the boost circuit, and the arc fault detection circuit is connected to the output end of the photovoltaic component 100. The arc fault detection circuit can detect the current output by the photovoltaic component 100. When it is detected that the current output by the photovoltaic component 100 is greater than the preset current, it can be determined that arcing has occurred.

[0037] A boost circuit generally includes an inductor, a switching transistor, a diode, and a filter capacitor. During operation, the inductor is charged and discharged by controlling the on and off state of the switching transistor, thereby boosting the voltage. When the switching transistor is on, the power supply charges the inductor. When the switching transistor is off, the inductor releases energy, supplying power to the inverter circuit through the diode and simultaneously charging the filter capacitor, making the output voltage higher than the input voltage, thereby boosting the voltage. When the average value of the inductor current drops to the hiccup threshold, the boost circuit enters hiccup mode. In hiccup mode, the signal collected by the arc fault detection circuit is similar to the signal of an actual arc. At this time, even if no arcing occurs, the arc fault detection circuit will mistakenly identify the presence of an arc, resulting in a misjudgment of the arc fault detection circuit.

[0038] To avoid misjudgments, the arc fault detection circuit can stop arc detection when the boost circuit is in hiccup mode. That is, once the boost circuit enters hiccup mode, the arc fault detection circuit stops arc detection and restarts arc detection when the boost circuit exits hiccup mode. This reduces the chance of misjudgments in hiccup mode. However, this shortens the arc detection time and prevents long-term arc monitoring. If arcing occurs during the period when arc detection is stopped, it can cause more serious damage.

[0039] Based on this, an embodiment of the present application provides a power conversion device that can extend the arc detection time of an arc fault detection circuit, achieve longer arc monitoring, and thus improve the safety of the power conversion device. For example, the power conversion device provided in the embodiment of the present application includes: an arc fault detection circuit, a first boost circuit, a controller, and an inverter circuit, wherein the first boost circuit is connected between a first DC power supply and the inverter circuit, and the arc fault detection circuit is connected to an input end of the first boost circuit; the first boost circuit includes a switch tube and an inductor, the switch tube being connected to the controller and the inductor, respectively; the controller is configured to: when the average value of the inductor current in the first boost circuit is less than a frequency reduction threshold, control the switching frequency of the switch tube in the first boost circuit to decrease from a first frequency to a second frequency; when the average value of the inductor current in the first boost circuit is less than a hiccup threshold, control the first boost circuit to enter a hiccup mode; the hiccup threshold is less than the frequency reduction threshold, and the hiccup mode is a mode in which the switch tube in the first boost circuit operates discontinuously. In particular, based on the relationship that the hiccup threshold decreases as the switching frequency decreases, when the hiccup threshold before frequency reduction is the first hiccup threshold and after frequency reduction is the second hiccup threshold, the second hiccup threshold is lower than the first hiccup threshold. In the prior art, the first boost circuit enters hiccup mode when the average value of the inductor current is lower than the first hiccup threshold, so arc detection is stopped when the average value of the inductor current is lower than the first hiccup threshold. In the embodiment of the present application, the first boost circuit enters hiccup mode only when the average value of the inductor current is lower than the second hiccup threshold, so arc detection is stopped only when the average value of the inductor current is lower than the second hiccup threshold. Compared with the prior art, arc detection can still be performed during the period when the average value of the inductor current is greater than or equal to the second hiccup threshold and lower than the first hiccup threshold, thereby extending the arc detection time of the arc fault detection circuit and enabling longer arc monitoring, thereby improving the safety of the power conversion device.

[0040] Figure 2 The schematic diagram of the structure of a power conversion device 200 provided by the present application is shown as an example. Figure 2As shown, the power conversion device 200 may include: an arc fault detection circuit 40, a first boost circuit 11, a controller 20 and an inverter circuit 30; the positive input terminal of the first boost circuit 11 is connected to the positive electrode of the first DC power supply 51 through the first positive bus 61, and the negative input terminal of the first boost circuit 11 is connected to the negative electrode of the first DC power supply 51 through the first negative bus 62; when the power conversion device 200 is applied to a photovoltaic system, the first DC power supply 51 may be a photovoltaic component, and when the power conversion device 200 is applied to a non-photovoltaic system, the first DC power supply 51 may be any power supply that can output DC power; the arc fault detection circuit 40 is connected to the first positive bus 61 and the first negative bus 62 respectively, so the arc fault detection circuit 40 is connected to the input terminal of the first boost circuit 11. The arc fault detection circuit 40 can be used to detect arcing of the current output by the first DC power supply 51 to the first boost circuit 11; the positive output terminal of the first boost circuit 11 is connected to the positive input terminal of the inverter circuit 30, and the negative output terminal of the first boost circuit 11 is connected to the negative input terminal of the inverter circuit 30. The first boost circuit 11 is used to boost the first DC signal output by the first DC power supply 51 under the control of the controller 20, and output the obtained second DC signal to the inverter circuit 30. The inverter circuit 30 is used to convert the second DC signal into an AC signal; wherein, when the inverter circuit 30 is connected to the power grid, the AC signal output by the inverter circuit 30 can be incorporated into the power grid, and when the inverter circuit 30 is connected to the load, the AC signal output by the inverter circuit 30 can be used to power the load.

[0041] The first boost circuit 11 may include: a switch tube Q1, an inductor L0, a diode D, and a filter capacitor C. The control end of the switch tube Q1 is connected to the controller 20. The first end of the switch tube Q1 is connected to the first end of the inductor L0 and the positive electrode of the diode D respectively. The second end of the switch tube Q1 is connected to the first negative bus 62, the first end of the filter capacitor C, and the negative input end of the inverter circuit 30 respectively; the second end of the inductor L0 is connected to the first positive bus 61; the cathode of the diode D is connected to the second end of the filter capacitor C and the positive input end of the inverter circuit 30 respectively. The input voltage of the first boost circuit 11 is represented by U c The output voltage of the first boost circuit 11 is represented by U bus express.

[0042] When the switch tube Q1 is turned on, the two ends of the inductor L0 are directly connected to the first positive bus 61 and the first negative bus 62, that is, the two ends of the inductor L0 are directly connected to the first DC power supply 51, the diode D is reversely cut off, and the output voltage U bus Provided by the electrical energy stored in the filter capacitor C; and when the switch tube Q1 is turned on, the input voltage U cThe driving current flows through the inductor L0, and the voltage across the inductor L0 is the input voltage U c , the current in inductor L0 gradually increases. Due to the characteristics of inductor L0, inductor L0 stores energy during this stage, allowing inductor L0 to be charged by the power provided by the power supply. The proportion of time that switch tube Q1 is on in each cycle is called the duty cycle. The larger the duty cycle, the more time inductor L0 stores energy, resulting in a larger inductor current.

[0043] When the switch tube Q1 is turned off, the first end of the inductor L0 is disconnected from the first negative bus 62, so the current no longer flows to the ground through the inductor L0. The current in the inductor L0 flows to the inverter circuit 30 and the filter capacitor C through the diode D, so the inductor current begins to decrease, and the inductor L0 begins to discharge. At this time, the inductor current flows to the inverter circuit 30 and charges the filter capacitor C. Since the self-induced electromotive force voltage generated by the inductor L0 is superimposed on the input voltage U c So the output voltage U bus The voltage released by the inductor L0 and the input voltage U c The sum of the output voltage U bus Greater than the input voltage U c , thereby achieving a boost effect.

[0044] The working mode of the first boost circuit 11 can include a continuous current mode and a discontinuous current mode. In the continuous current mode, the current in the inductor L0 is always non-zero, and current flows through the inductor L0 throughout the entire cycle. Therefore, the output ripple in the continuous current mode is small and the efficiency is high. This continuous current mode is suitable for high-power application scenarios. In the discontinuous current mode, combined with Figure 3 As shown, at time t1, the switch tube Q1 is turned off, and then the energy stored in the inductor L0 will be completely released. At time t2, the current in the inductor L0 is close to zero, and this state of the current in the inductor L0 being close to zero will be maintained until time t3. When the switch tube Q1 is turned on next time (that is, at time t3), the inductor L0 starts to charge again, and the current in the inductor L0 increases again, so that the current in the inductor L0 will drop to zero at a certain moment in each cycle. This discontinuous current mode is suitable for low power or large load change scenarios.

[0045] In discontinuous current mode, when the average value of the inductor current is less than the hiccup threshold, the required duty cycle of the switch tube Q1 may be less than the pre-configured duty cycle (i.e., the threshold duty cycle), which will cause the on-time of the switch tube Q1 to fail to meet the requirement, and then cause the switch tube Q1 to be unable to work continuously, resulting in hiccups. For example, combined with Figure 4As shown in the pulse signal before frequency reduction, in this pulse signal, the switch tube Q1 is turned on when the level is high and turned off when the level is low. The period of the switch tube Q1 is represented by T1. From time t4 to time t5, the switch tube Q1 will be turned on in each period T1. This mode in which the switch tube Q1 is turned on in each period T1 is called a continuous working mode; at time t5, if the required duty cycle of the switch tube Q1 is less than the threshold duty cycle, then the switch tube Q1 that should have been turned on is not turned on, so the pulse signal before frequency reduction does not change from a low level to a high level at time t5, but continues to maintain a low level, which means that the switch tube Q1 continues to remain turned off at time t5. At this time, the first boost circuit 11 breaks the original continuous working mode, or in other words, from time t5, the first boost circuit 11 enters a discontinuous working mode, that is, a hiccup mode. This phenomenon can be called a hiccup phenomenon. It should be understood that the high levels indicated by dashed lines 1 and 2 refer to the corresponding pulse signals in the continuous operation mode, while the discontinuous operation mode refers to a mode in which the pulse signal used to control the switch Q1 remains unchanged for at least one cycle T1. In the hiccup mode, the signal collected by the arc fault detection circuit 40 is similar to the signal when an arc actually occurs. In this case, even if no arcing occurs, the arc fault detection circuit 40 may mistakenly believe that an arcing phenomenon has occurred, thereby causing the arc fault detection circuit 40 to misjudge the situation.

[0046] Assume T pwm It is used to indicate the period of the switch tube Q1, and Duty is used to indicate the duty cycle of the switch tube Q1. peak Used to indicate the peak current in the inductor L0, i avg It is used to represent the average current in the inductor L0 during each cycle of the switch tube Q1 (that is, the average value of the inductor current). L is used to represent the inductance value of the inductor L0. Figure 3 As shown in on Used to indicate that the current in the inductor L0 increases to the peak current i peak time, and t on It can also be used to represent the on-time of the switch tube Q1 in each cycle, t off1 Used to indicate that the current in the inductor L0 is from the peak current i peak Time to decrease to zero, t off2 It is used to indicate the time during which the current in the inductor L0 remains zero, and S is used to indicate Figure 3 The area of the triangle shown in , the following calculation process can be performed at this time:

[0047]

[0048] T pwm =t on +t off1 +toff2

[0049]

[0050] Therefore, based on the above calculation process, the following relationship 1 can be summarized:

[0051]

[0052] The above equation 1 is a calculation equation for the average value of the inductor current of the first boost circuit 11 in the discontinuous current mode. In the above equation 1, if t on / T pwm When representing the duty cycle Duty, the above relationship 1 can be transformed to obtain the following relationship 2:

[0053]

[0054] In the above equation 2, if t on unchanged, input voltage U c And the output voltage U bus When the stability is maintained and L remains unchanged, the period T of the switch tube Q1 is pwm When a change occurs, the calculated i avg will change; if the duty cycle Duty is the calculated value of the threshold duty cycle avg As the hiccup threshold, the period T of the switch tube Q1 is pwm When the hiccup threshold changes, the hiccup threshold will also change; and the period T pwm The larger the value, the smaller the hiccup threshold. Since the frequency and period are inversely proportional, the lower the switching frequency of the switch Q1, the smaller the hiccup threshold, and vice versa. Therefore, by reducing the switching frequency of the switch Q1, the hiccup threshold can be lowered.

[0055] Based on this, the controller 20 is configured to: when the average value of the inductor current in the first boost circuit 11 is less than the frequency reduction threshold, control the switching frequency of the switch Q1 in the first boost circuit 11 to decrease from the first frequency to the second frequency; when the average value of the inductor current in the first boost circuit 11 is less than the hiccup threshold, control the first boost circuit 11 to enter the hiccup mode; when the hiccup threshold is less than the frequency reduction threshold, the hiccup mode is a mode in which the switch Q1 in the first boost circuit 11 operates discontinuously. It should be understood that the hiccup threshold in this paragraph is also the second hiccup threshold mentioned later, and will be referred to as the second hiccup threshold in the following descriptions.

[0056] Based on the conclusion drawn from equation 2 above that "the lower the switching frequency of the switch Q1, the lower the hiccup threshold," when the hiccup threshold before frequency reduction is the first hiccup threshold and the hiccup threshold after frequency reduction is the second hiccup threshold, the second hiccup threshold will be lower than the first hiccup threshold. In the prior art, the first boost circuit 11 enters hiccup mode when the average value of the inductor current is lower than the first hiccup threshold. Therefore, arc detection is stopped when the average value of the inductor current is lower than the first hiccup threshold. In the embodiment of the present application, the first boost circuit 11 enters hiccup mode only when the average value of the inductor current is lower than the second hiccup threshold. Therefore, arc detection is stopped only when the average value of the inductor current is lower than the second hiccup threshold. Compared to the prior art, arc detection can still be performed during the period when the average value of the inductor current is greater than or equal to the second hiccup threshold and lower than the first hiccup threshold (hereinafter referred to as the extended period). This extends the arc detection time of the arc fault detection circuit 40, enabling longer arc monitoring, thereby improving the safety of the power conversion device 200.

[0057] The frequency reduction threshold can be determined according to the second hiccup threshold, for example but not limited to: when the structure of the first boost circuit 11 is constant, the second hiccup threshold will change with the output voltage U of the first boost circuit 11. bus However, the output voltage U of the first boost circuit 11 fluctuates. bus Usually it is stable within a certain range, so the output voltage U bus The second hiccup threshold is relatively stable within a certain range, and thus the second hiccup threshold is also stable within a certain range, making the second hiccup threshold relatively stable within a certain range (i.e., the threshold range). In this case, the frequency reduction threshold may be the sum of the upper limit of the threshold range and a constant. The constant may be any value set according to actual needs and is not specifically limited here. If the constant is set larger, frequency reduction processing may be performed when the inductor current is higher than the larger value of the second hiccup threshold. This helps to ensure that the average value of the inductor current is always greater than the second hiccup threshold, thereby effectively avoiding the hiccup phenomenon. Therefore, this situation is suitable for scenarios with strict requirements for avoiding hiccups. If the constant is set smaller, frequency reduction processing is performed when the inductor current is slightly higher than the second hiccup threshold. This can also reduce the probability of hiccups and avoid frequent entry into the frequency reduction processing process, thereby reducing the amount of computation of the controller 20 and thus reducing power consumption. Therefore, this situation is suitable for scenarios with certain requirements for avoiding hiccups and power consumption.

[0058] Furthermore, when the average value of the inductor current in the first boost circuit 11 is less than the frequency reduction threshold, it indicates that the average value of the inductor current is not high. In this case, the inverter circuit 30, acting as the load of the first boost circuit 11, may be at or below half load. Frequency reduction can reduce the number of on- and off-cycles of the switch Q1, thereby reducing additional control losses. This improves the efficiency of the power conversion device 200 and reduces switching losses. It should be understood that when the operating load of a device reaches approximately 50% of its rated capacity, it can be considered to be in a "half-load" state, and when it is less than 50%, it can be considered to be below half load.

[0059] Furthermore, the difference between the first and second frequencies is negatively correlated with the second hiccup threshold. For example, a larger difference between the first and second frequencies indicates a higher degree of frequency reduction, and therefore a smaller second hiccup threshold. A smaller difference between the first and second frequencies indicates a lower degree of frequency reduction, and therefore a larger second hiccup threshold. Furthermore, a smaller second hiccup threshold indicates a smaller average value of the inductor current when entering hiccup mode, and thus a longer arc detection time. A larger second hiccup threshold indicates a larger average value of the inductor current when entering hiccup mode, and thus a shorter arc detection time. Therefore, the second frequency can be designed based on the arc detection duration requirements, thereby increasing design flexibility and meeting the application needs of various scenarios.

[0060] In addition, the first frequency corresponds to the first cycle, and the second frequency corresponds to the second cycle. During the first cycle, the switch Q1 in the first boost circuit 11 has a first on-time, and during the second cycle, the switch Q1 in the first boost circuit 11 has a second on-time. The difference between the first on-time and the second on-time is within a preset range, with the lower limit of the preset range being -5% of the first cycle and the upper limit of the preset range being 5% of the first cycle. In other words, the first on-time and the second on-time are substantially the same, and thus the on-time within a cycle before and after the frequency reduction process remains substantially unchanged. This allows, on the one hand, more accurate control of the second hiccup threshold, thereby facilitating extended arc detection duration, and on the other hand, meeting load requirements. For example, this avoids failing to meet load requirements when the on-time is shortened, and avoids increasing the load burden when the on-time is lengthened.

[0061] Exemplarily, the controller 20 is specifically configured to: when the average value of the inductor current in the first boost circuit 11 is less than the frequency reduction threshold, control the switching frequency of the switch Q1 in the first boost circuit 11 to decrease from a first frequency to a second frequency based on the difference between the average value of the inductor current in the first boost circuit 11 and the frequency reduction threshold. A mapping table can be determined based on practical experience, where different differences correspond to different switching frequencies, or different ranges of differences correspond to different switching frequencies. This mapping table can be pre-configured in the controller 20. When the controller 20 determines the difference between the current average value of the inductor current and the frequency reduction threshold, it can find the corresponding switching frequency from the mapping table and use the switching frequency found in the table as the second frequency. In this way, the second frequency can be determined based on current actual needs, reducing the probability of hiccups occurring after the frequency reduction process, thereby facilitating the extension of arc detection duration.

[0062] To implement frequency reduction, when the first frequency corresponds to the first cycle and the second frequency corresponds to the second cycle, the controller 20 is specifically configured to control the switch Q1 to be on during a portion of N first cycles, with the total on-time of the switch Q1 remaining unchanged during the N first cycles. That is, the total duty cycle of the switch Q1 remains unchanged before and after the frequency reduction. N is the ratio of the first frequency to the second frequency. In this case, the second cycle is N first cycles, and N is an integer greater than 1. In other words, although the conduction state of the switch Q1 is adjusted during the N first cycles, the total on-time of the switch Q1 during the N first cycles remains unchanged. If the first cycle of the switch Q1 before the frequency reduction is represented by T1 and the second cycle of the switch Q1 during the frequency reduction is represented by T2, then T2 is N times T1. This indicates that the cycle is extended N times during the frequency reduction, and the switching frequency is correspondingly reduced N times. Therefore, the switching frequency is effectively reduced during the frequency reduction. This reduces the hiccup threshold and ensures the normal operation of the first boost circuit 11.

[0063] When the average value of the inductor current in the first boost circuit 11 being less than the frequency reduction threshold is regarded as a trigger condition, specific implementations of the frequency reduction process may include the following:

[0064] (1) The controller 20 is specifically configured to, when a trigger condition is met, control the switch Q1 to be turned off during the first k first cycles of N first cycles, and to control the switch Q1 to be turned on during the Nk first cycles following the first k first cycles of N first cycles; the value of k is a positive integer less than N. In this way, by disrupting the original switching frequency of the switch Q1, an equivalent reduction in the switching frequency is achieved.

[0065] For example, combined with Figure 4 The pulse signal corresponding to the frequency reduction method 2 shown in the figure, the high level indicates that the switch Q1 is turned on, the low level indicates that the switch Q1 is turned off, the first cycle is represented by T1, the second cycle is represented by T2, and N is 2, k is 1, and the conduction time in each first cycle T1 is represented by a. For example, when the trigger condition is met, it reaches time t5, from time t5 to time t6 is the first first cycle T1, during which the switch Q1 is always turned off, from time t6 to time t8 is the second first cycle T1, during which the switch Q1 is turned on, and the conduction time is 2a; therefore, from time t5 to time t8 is the frequency reduction processing stage, and from time t5 to time t8 is the second cycle T2, and the second cycle T2 is twice the first cycle T1. Of course, the frequency reduction method is not limited to Figure 4 The frequency reduction method 2 shown in is only used as an example for explanation here.

[0066] (2) The controller 20 is specifically configured to, when a trigger condition is met, control the switch Q1 to be turned on during the first k first cycles among the N first cycles, and to control the switch Q1 to be turned off during the Nk first cycles after the first k first cycles among the N first cycles; the value of k is a positive integer less than N. In this way, by disrupting the original switching frequency of the switch Q1, an equivalent reduction in the switching frequency is achieved.

[0067] For example, combined with Figure 4 The pulse signal corresponding to the frequency reduction method 1 shown in the figure, the high level indicates that the switch Q1 is turned on, the low level indicates that the switch Q1 is turned off, the first cycle is represented by T1, the second cycle is represented by T2, and N is 2, k is 1, and the conduction time in each first cycle T1 is represented by a. For example, when the trigger condition is met, it reaches time t5, from time t5 to time t6 is the first first cycle T1, during which the switch Q1 is turned on, and the conduction time is 2a; from time t6 to time t8 is the second first cycle T1, during which the switch Q1 is always turned off; therefore, from time t5 to time t8 is the frequency reduction processing stage, and from time t5 to time t8 is the second cycle T2, and the second cycle T2 is twice the first cycle T1. Of course, the frequency reduction method is not limited to Figure 4 The frequency reduction method 1 shown in is only used as an example for explanation here.

[0068] (3) The controller 20 is specifically configured to: when a trigger condition is met, control the switch tube Q1 to be turned off during the first k1 first cycles and the last k2 first cycles among the N first cycles, and control the switch tube Q1 to be turned on during the N-k1-k2 first cycles that are after the first k1 first cycles and before the last k2 first cycles among the N first cycles; the values of k1 and k2 are positive integers less than N.

[0069] In summary, during specific implementation, when performing frequency reduction processing, any of the above-described implementation methods can be selected based on actual needs, and no specific limitations are imposed herein. For example, in the first and second implementation methods described above, the control logic is relatively simple and easy to implement, so these two implementation methods are suitable for scenarios where the logic control function of the controller 20 is not very strong; in the third implementation method described above, the control logic is relatively complex, so this implementation method is suitable for scenarios where the logic control function of the controller 20 is relatively strong. Furthermore, when performing frequency reduction processing, if the value of N is constant, regardless of which of the above-described implementation methods is adopted, the second hiccup threshold is the same, that is, the implementation method of the frequency reduction processing does not affect the size of the hiccup threshold.

[0070] For example, if the average value of the inductor current in the first boost circuit 11 being greater than or equal to the frequency reduction threshold is referred to as an exit condition, the controller 20 is further configured to: when the exit condition is met and at the end of at least one second cycle, control the switching frequency of the switch Q1 to return to the first frequency. For example, at the end of a second cycle and the exit condition is met, the frequency reduction process is exited, causing the switching frequency to return to the first frequency; or, at the end of multiple second cycles and the exit condition is met, the frequency reduction process is exited, causing the switching frequency to return to the first frequency. If exiting without determining whether the exit condition is met, hiccups may occur. In this case, when exiting the frequency reduction process, the switching frequency will first return to the first frequency, and then the trigger condition will be determined again. If the determination result is yes, the frequency reduction process will continue. In this way, exiting the frequency reduction process may require three more steps. If the exit condition is determined and the exit condition is not met, the frequency reduction process will not be exited, and the frequency reduction process can be directly continued. This reduces the number of operational steps, the amount of computation required by the controller 20, and power consumption.

[0071] Taking the example of exiting the frequency reduction process when the end time of a second cycle is reached and the exit condition is met, when setting the timing for determining whether the exit condition is met, any of the following methods can be used:

[0072] Method 1: When the second cycle ends, it is determined whether the exit condition is met. At this time, the average value of the inductor current in the first boost circuit 11 can be the average value corresponding to the duration of the second cycle, or the average value corresponding to the duration of the first cycle. The specific setting can be based on actual needs and is not specifically limited here.

[0073] Method 2: The duration of the second cycle includes the duration of one first cycle. When the duration of the first cycle is reached, it is determined whether the exit condition is met. At this time, the average value of the inductor current in the first boost circuit 11 is the average value corresponding to the duration of the first cycle. If the judgment result is yes, then when the end time of at least one second cycle is reached, the switching frequency of the control switch Q1 is restored to the first frequency.

[0074] Method 3: The duration of the second cycle includes the duration of multiple first cycles. A check is performed each time a first cycle is reached to determine whether the exit condition is met, and this check is repeated multiple times. If the exit condition is met for a predetermined number of consecutive times, the switching frequency of switch Q1 is restored to the first frequency at the end of at least one second cycle. This increases the accuracy of the determination result and avoids repeated switching of the frequency reduction process due to an inaccurate determination result.

[0075] For example, before the frequency reduction process, the inductor current will be collected according to a preset collection period. The structure for implementing the inductor current collection can be any collection circuit known in the art and is not specifically limited here. When the inductor current is collected, it will be output to the controller 20. Therefore, the controller 20 will periodically obtain the inductor current, calculate the average value of the inductor current, and then compare it with the frequency reduction threshold. Once the trigger condition is met, the frequency reduction process will begin.

[0076] During the frequency reduction process, the inductor current can still be periodically collected and output to the controller 20. In this case, the controller 20 can still calculate the average value of the inductor current when obtaining it and compare it with the frequency reduction threshold, but the frequency reduction process will not be stopped. Alternatively, even if the controller 20 receives the inductor current, it is not necessary to compare the average value of the inductor current with the frequency reduction threshold. This is because the frequency reduction process will proceed normally and will not be terminated midway regardless of whether the trigger condition is met. Therefore, even if the average value of the inductor current is compared with the frequency reduction threshold during the frequency reduction process, no operation will be triggered. Not performing the comparison operation can reduce the amount of calculation required by the controller 20 and reduce the power consumption of the controller 20. Furthermore, during the frequency reduction process, the controller 20 can control the acquisition circuit to stop collecting the inductor current and then control the acquisition circuit to resume collecting the inductor current at the end of N first cycles, thereby further reducing power consumption.

[0077] For example, in addition to the first boost circuit 11, the controller 20, the arc fault detection circuit 40 and the inverter circuit 30, the power conversion device 200 may further include more components according to actual needs, such as but not limited to: a power tracking circuit connected to the controller 20, relays provided in the first positive bus 61 and the first negative bus 62, etc. The power tracking circuit is used to track the power of the photovoltaic module and output the maximum power to the controller 20, so that the controller 20 controls the switch tube Q1 based on the maximum power, thereby improving the power generation efficiency of the photovoltaic system; the relay can be connected to the controller 20, and the arc fault detection circuit 40 can also be connected to the controller 20. When the arc fault detection circuit 40 detects an arc, it outputs a fault signal to the controller 20. When the controller 20 receives the fault signal, it controls the relay to disconnect, so as to disconnect the first DC power supply 51 from the first boost circuit 11, thereby avoiding damage to the first boost circuit 11, thereby improving the reliability and safety of the power conversion device 200.

[0078] In another embodiment of a power conversion device 200 provided in this application, the structure of the power conversion device 200 in this embodiment is similar to the aforementioned Figure 2 The power conversion device 200 in the described embodiments is substantially similar in structure, differing in the manner in which the degree of frequency reduction is determined. For example, a second frequency can be preconfigured in the controller 20. When a trigger condition is met, the controller 20 performs frequency reduction based on the preconfigured second frequency. This eliminates the need for table lookup operations, reduces the amount of computation required by the controller 20, and thus reduces the power consumption of the power conversion device 200.

[0079] It should be understood that the structure of the power conversion device 200 in this embodiment is similar to the above Figure 2 The similarities in the structure of the power conversion device 200 in the introduced embodiment can be found in the relevant introduction in the aforementioned embodiment, and the repeated parts will not be repeated here.

[0080] In another embodiment of a power conversion device 200 provided by the present application, the structure of the power conversion device 200 in this embodiment is similar to the aforementioned Figure 2 The power conversion device 200 described in the embodiments is essentially similar in structure, differing in the frequency reduction method. For example, while maintaining the same on-time, the duty cycle of the switch Q1 is extended from the first cycle to the second cycle. This changes the total duty cycle of the switch Q1 before and after the frequency reduction. This extends the switching cycle of the switch Q1 while maintaining the same on-time, correspondingly reducing the switching frequency. This lowers the hiccup threshold and extends the monitoring time for arc detection.

[0081] For example, combined with Figure 4The pulse signal corresponding to frequency reduction mode 3 shown in FIG. 1 shows that the high level indicates that the switch Q1 is turned on, and the low level indicates that the switch Q1 is turned off. The first period is represented by T1, and the second period is represented by T2. When the trigger condition is met and the time reaches t5, the switch Q1 is turned on and the on-time is a. At t8, the second period T2 ends. Therefore, the time from t5 to t8 is the second period T2. It is obvious that the total duty cycle of the switch Q1 has changed before and after the frequency reduction, but the on-time remains unchanged and is a. It should be understood that Figure 4 Any pulse signal in the figure is illustrated by taking the example that a high level indicates that the switch tube Q1 is turned on and a low level indicates that the switch tube Q1 is turned off. However, in actual situations, it can also be set to a low level to indicate that the switch tube Q1 is turned on and a high level to indicate that the switch tube Q1 is turned off. The specific setting can be based on actual needs and is not specifically limited here.

[0082] Or, combined Figure 4 The pulse signal corresponding to the frequency reduction method 4 shown in FIG. 4 is different from the frequency reduction method 3 in that the duration of the second cycle is different. In the frequency reduction method 4, the second cycle T2 is from time t5 to time t7.

[0083] That is to say, the second period can be an integer multiple or a non-integer multiple of the first period. As long as the second period is greater than the first period, it falls within the protection scope of the embodiments of the present application.

[0084] It should be understood that the structure of the power conversion device 200 in this embodiment is similar to the above Figure 2 The similarities in the structure of the power conversion device 200 in the introduced embodiment can be found in the relevant introduction in the aforementioned embodiment, and the repeated parts will not be repeated here.

[0085] In another embodiment of a power conversion device 200 provided by the present application, the structure of the power conversion device 200 in this embodiment is similar to the above Figure 2 The power conversion device 200 in the described embodiments is essentially similar in structure, differing in the mechanism for exiting the frequency reduction process. Exemplarily, the controller 20 is further configured to control the switching frequency of the switch Q1 to return to the first frequency upon reaching the end of at least one second cycle. In other words, in the case of exiting the frequency reduction process upon reaching the end of a second cycle, the controller 20 does not determine whether the exit condition has been met. Instead, it directly exits the frequency reduction process upon reaching the end of the second cycle, and then continues to monitor the inductor current to determine whether to resume the frequency reduction process. This reduces the amount of computation required by the controller 20, lowering its power consumption, and also allows the on-time to be adjusted to meet load demands as the load changes.

[0086] It should be understood that the structure of the power conversion device 200 in this embodiment is similar to the above Figure 2The similarities in the structure of the power conversion device 200 in the introduced embodiment can be found in the relevant introduction in the aforementioned embodiment, and the repeated parts will not be repeated here.

[0087] Figure 5 Schematic diagram of another power conversion device 200 provided by the present application is shown. Figure 5 As shown, the structure of the power conversion device 200 in this embodiment is similar to that of the aforementioned Figure 2 The power conversion device 200 described in the embodiment is substantially similar in structure, differing in that the power conversion device 200 may further include a second boost circuit 12. For example, the positive input of the second boost circuit 12 is connected to the positive electrode of the second DC power supply 52 via the second positive bus 63, and the negative input of the second boost circuit 12 is connected to the negative electrode of the second DC power supply 52 via the second negative bus 64. In this case, the arc fault detection circuit 40 may also be connected to the second positive bus 63 and the second negative bus 64. In this case, the arc fault detection circuit 40 can be used to detect whether arcing occurs at the inputs of multiple boost circuits. The positive output of the second boost circuit 12 is connected to the positive input of the inverter circuit 30, and the negative output of the second boost circuit 12 is connected to the negative input of the inverter circuit 30. Therefore, the first boost circuit 11 and the second boost circuit 12 are connected to different DC power supplies, and the inverter circuit 30 is connected to the first boost circuit 11 and the second boost circuit 12, respectively.

[0088] The structure of the second boost circuit 12 may be the same as or different from that of the first boost circuit 11. Figure 5 The structure of the second boost circuit 12 is the same as that of the first boost circuit 11. The switch tubes Q1 in the second boost circuit 12 and the first boost circuit 11 are both connected to the controller 20, so that the controller 20 can control the switch tubes Q1 in the two boost circuits respectively.

[0089] In the prior art, when the first boost circuit 11 enters hiccup mode, the arc fault detection circuit 40 stops arc detection. If arcing occurs in the path between the second DC power supply 52 and the second boost circuit 12, the arc fault detection circuit 40 will be unable to detect the arcing phenomenon due to the cessation of arc detection, which may lead to a dangerous situation. In the embodiment of the present application, because the hiccup threshold of the first boost circuit 11 is lowered through frequency reduction processing, the probability of the first boost circuit 11 entering hiccup mode is reduced, allowing arc detection to be performed during the extended period. This solves the problem in the prior art of being unable to perform arc detection on the path between the second DC power supply 52 and the second boost circuit 12 during the extended period, and achieves longer arc monitoring, thereby improving the safety of the power conversion device 200.

[0090] It should be understood that the structure of the power conversion device 200 in this embodiment is similar to the above Figure 2 The similarities in the structure of the power conversion device 200 in the introduced embodiment can be found in the relevant introduction in the aforementioned embodiment, and the repeated parts will not be repeated here.

[0091] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application also intends to include such modifications and variations.

Claims

1. A power conversion device, characterized in that: include: An arc fault detection circuit, a first boost circuit, a controller, and an inverter circuit, wherein the first boost circuit is connected between a first DC power supply and the inverter circuit, and the arc fault detection circuit is connected to an input end of the first boost circuit; the first boost circuit includes a switching tube and an inductor, wherein the switching tube is connected to the controller and the inductor respectively; The controller is configured to: when the average value of the inductor current in the first boost circuit is less than a frequency reduction threshold, control the switching frequency of the switch tube in the first boost circuit to decrease from a first frequency to a second frequency; when the average value of the inductor current in the first boost circuit is less than a hiccup threshold, control the first boost circuit to enter a hiccup mode; when the hiccup threshold is less than the frequency reduction threshold, the hiccup mode is a mode in which the switch tube in the first boost circuit operates discontinuously.

2. The power conversion device according to claim 1, wherein: The difference between the first frequency and the second frequency is negatively correlated with the hiccup threshold.

3. The power conversion device according to claim 1 or 2, characterized in that: The power conversion device further includes a second boost circuit connected between a second DC power supply and the inverter circuit, and the arc fault detection circuit is connected to an input end of the second boost circuit.

4. The power conversion device according to any one of claims 1 to 3, characterized in that: The first frequency corresponds to a first cycle, the second frequency corresponds to a second cycle, the switch tube in the first boost circuit has a first on-time in the first cycle, and the switch tube in the first boost circuit has a second on-time in the second cycle, and the difference between the first on-time and the second on-time is within a preset range, the lower limit of the preset range is -5% of the first cycle, and the upper limit of the preset range is 5% of the first cycle.

5. The power conversion device according to any one of claims 1 to 4, characterized in that: The controller is further configured to: control the switching frequency of the switch in the first boost circuit to return to the first frequency when at least one second cycle ends; the second cycle is the inverse of the second frequency.

6. The power conversion device according to claim 5, wherein: The controller is further configured to: when an exit condition is met and at least one of the second cycles ends, control the switching frequency of the switch tube to return to the first frequency; The exit condition includes: an average value of the inductor current in the first boost circuit is greater than or equal to the frequency reduction threshold.

7. The power conversion device according to claim 6, wherein: The controller is specifically used to: the duration of the second cycle includes the duration of a first cycle corresponding to the first frequency, the exit condition is met when the duration of the first cycle is reached, and when the end moment of at least one second cycle is reached, control the switching frequency of the switching tube to return to the first frequency.

8. The power conversion device according to claim 6, wherein: The controller is specifically configured to: the duration of the second cycle includes the durations of multiple first cycles corresponding to the first frequencies, the exit condition is satisfied each time the duration of one of the first cycles is reached, and the exit condition is satisfied for a preset number of consecutive times, and when at least one end moment of the second cycle is reached, control the switching frequency of the switch tube to return to the first frequency.

9. The power conversion device according to any one of claims 1 to 8, wherein: The controller is specifically configured to control, when an average value of the inductor current in the first boost circuit is less than a frequency reduction threshold, to reduce a switching frequency of a switch in the first boost circuit from a first frequency to a second frequency according to a difference between the average value of the inductor current in the first boost circuit and the frequency reduction threshold.

10. A method for controlling a first boost circuit in a power conversion device, characterized in that: include: receiving an inductor current in the first boost circuit; When the average value of the inductor current in the first boost circuit is less than a frequency reduction threshold, controlling the switching frequency of the switch tube in the first boost circuit to decrease from a first frequency to a second frequency; when the average value of the inductor current in the first boost circuit is less than a hiccup threshold, controlling the first boost circuit to enter a hiccup mode; The hiccup threshold is smaller than the frequency reduction threshold, and the hiccup mode is a mode in which the switch tube in the first boost circuit operates discontinuously.

11. The control method according to claim 10, wherein: The difference between the first frequency and the second frequency is negatively correlated with the hiccup threshold.

12. The control method according to claim 10 or 11, characterized in that: The first frequency corresponds to a first cycle, the second frequency corresponds to a second cycle, the switch tube in the first boost circuit has a first on-time in the first cycle, and the switch tube in the first boost circuit has a second on-time in the second cycle, and the difference between the first on-time and the second on-time is within a preset range, the lower limit of the preset range is -5% of the first cycle, and the upper limit of the preset range is 5% of the first cycle.

13. The control method according to any one of claims 10 to 12, characterized in that: The control method further includes: when reaching the end time of at least one second cycle, controlling the switching frequency of the switch tube in the first boost circuit to return to the first frequency; the second cycle is the inverse of the second frequency.

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