A back contact battery with a specific transparent conductive film layer, its manufacturing method and application

Abstract

This invention belongs to the field of back-contact battery technology, specifically relating to a back-contact battery with a specific transparent conductive film layer, its manufacturing method, and its application. It includes a silicon wafer, a semiconductor film layer disposed on the back side of the silicon wafer, a transparent conductive film layer disposed on the outer surface of the semiconductor film layer, and metal fine grid electrodes. The metal fine grid electrodes are disposed on the outer surface of their respective corresponding transparent conductive film layers in a predetermined semiconductor region. The transparent conductive film layer has a sandwich structure comprising a first transparent conductive oxide, a first ultrathin metal film, and a second transparent conductive oxide arranged sequentially. The thickness of the first ultrathin metal film is 1-10 nm. Along the extension direction of the metal fine grid electrodes, the metal fine grid electrodes have at least one interval breakpoint, and the interval length W4 of the interval breakpoint is 2-5 mm. This invention can significantly reduce silver paste consumption, reduce the risk of short circuits during subsequent solder ribbon connection, maintain a high bifaciality, and improve battery conversion efficiency.

Description

Technical Field

[0001] This invention belongs to the field of back contact battery technology, specifically relating to a back contact battery with a specific transparent conductive film layer, its manufacturing method, and its application. Background Technology

[0002] Currently, HJT batteries or combined passivated back contact batteries include two semiconductor layers with different polarities on the back side. A conductive film layer is disposed on the outer surface of the semiconductor layer. The conductive film layer is a transparent conductive film layer or a stack of a transparent conductive film and a metal film. The transparent conductive film layer is generally indium tin oxide (ITO). ITO has a high resistivity, generally 5E-4 Ω·cm. The metal film is generally made of metals such as copper, aluminum, and silver.

[0003] However, when the conductive film layer uses either of the above two schemes, different problems arise, as follows:

[0004] ① When the conductive film layer is a transparent conductive film layer, it is generally indium tin oxide (ITO). ITO has a high resistivity and poor conductivity. Currently, the sheet resistance of the transparent conductive film of HJT battery or combined passivated back contact battery is about 50-200Ω / □. ITO can only be used to collect charge carriers over short distances. It requires that the spacing W4 between two adjacent silver paste grid electrodes in the extension direction of the silver paste grid electrode is very short, generally not open or the spacing is within 1mm. This increases the risk of short circuit with the opposite polarity grid when the solder ribbon is connected, and also increases the amount of silver paste used.

[0005] ② When the conductive film layer is a stack of a transparent conductive film layer and a metal film, the metal film layer is thicker, and the transmittance of the conductive film layer in the spectrum range available to the solar cell is almost zero. Therefore, it will greatly reduce the ability of the back of the cell to absorb light and generate electricity (i.e., bifaciality), thus affecting the cell conversion efficiency.

[0006] It should be noted that this part of the present invention only provides background technology related to the present invention, and does not necessarily constitute prior art or known technology. Summary of the Invention

[0007] The purpose of this invention is to overcome the shortcomings of existing back-contact batteries, such as high silver paste consumption and the inability to simultaneously achieve bifaciality and battery conversion efficiency due to the conductive film structure. This invention provides a back-contact battery with a specific transparent conductive film layer, its manufacturing method, and its application. This invention can significantly reduce silver paste consumption, reduce the risk of short circuits during subsequent soldering, maintain a high bifaciality, and improve battery conversion efficiency.

[0008] To achieve the above objectives, in a first aspect, the present invention provides a back contact battery having a specific transparent conductive film layer, comprising a silicon wafer, a semiconductor film layer disposed on the back side of the silicon wafer, the semiconductor film layer comprising a first semiconductor layer and a second semiconductor layer alternately disposed along the back side, a transparent conductive film layer disposed on the outer surface of the semiconductor film layer, and a metal fine grid electrode, the metal fine grid electrode being disposed on the outer surface of each corresponding transparent conductive film layer in a predetermined semiconductor region; the transparent conductive film layer has a sandwich structure comprising a first transparent conductive oxide, a first ultrathin metal film, and a second transparent conductive oxide disposed sequentially, the thickness of the first ultrathin metal film being 1-10 nm, the thickness ratio of the first ultrathin metal film to the thickness of the first transparent conductive oxide and the second transparent conductive oxide being 1:(1-20):(1-20); and the overall average transmittance of the transparent conductive film layer at a wavelength of 400-1100 nm is greater than 50%, the overall sheet resistance of the transparent conductive film layer being 0.6-6 Ω / □; along the extension direction of the metal fine grid electrode, the metal fine grid electrode has at least one interval breakpoint, the interval length W4 of the interval breakpoint being 2-5 mm.

[0009] In some preferred embodiments of the present invention, the transparent conductive film layer has one or more sandwich structures, and the ultrathin metal film and the transparent conductive oxide are alternately arranged in the multiple sandwich structures.

[0010] In some preferred embodiments of the present invention, the transparent conductive film layer further includes: a second ultrathin metal film disposed on the outer surface of the sandwich structure, the second ultrathin metal film serving as a surface layer.

[0011] In some preferred embodiments of the present invention, the total thickness of the ultrathin metal film contained in the transparent conductive film layer is 1-12 nm.

[0012] In some preferred embodiments of the present invention, the materials of each ultrathin metal film contained in the transparent conductive film layer are independently selected from metallic silver or metallic gold.

[0013] In some preferred embodiments of the present invention, the thickness of each transparent conductive oxide monolayer is 10-60 nm, and the sum of the thicknesses of each transparent conductive oxide contained in the transparent conductive film layer is 20-100 nm.

[0014] In some preferred embodiments of the present invention, the materials of each transparent conductive oxide contained in the transparent conductive film layer are independently selected from at least one of indium oxide-based thin film and zinc oxide-based thin film, wherein the doping element of the indium oxide-based thin film is selected from at least one of tin, tungsten, titanium, zinc and gallium, and the doping element of the zinc oxide-based thin film is selected from at least one of aluminum, gallium and boron.

[0015] In some preferred embodiments of the present invention, an isolation groove is formed on the portion of the transparent conductive film layer located between two semiconductor regions of different polarities.

[0016] In some preferred embodiments of the present invention, in the semiconductor film layer, the two ends of the second semiconductor layer extend outward to cover the back side of the portion of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is formed on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening regions and the first semiconductor opening regions are arranged alternately, and the area between them is a gap region. An isolation groove is formed on the portion of the transparent conductive film layer located in the gap region.

[0017] In some preferred embodiments of the present invention, the intervals on adjacent metal grid electrodes are arranged in an intersecting pattern along the vertical direction of the metal grid electrodes.

[0018] In some preferred embodiments of the present invention, the back contact battery further includes a metal main grid electrode and an insulating block disposed at the interval break point. The metal main grid electrode and the metal fine grid electrode of the same polarity are arranged perpendicularly and connected at the intersection of the two, and cover the insulating block on their corresponding axis.

[0019] In some preferred embodiments of the present invention, the first semiconductor layer is a stack comprising a tunneling oxide layer and a first doped polysilicon layer or a stack comprising a first intrinsic silicon layer and a first doped silicon layer, and the second semiconductor layer comprises a second intrinsic silicon layer and a second doped silicon layer.

[0020] In some preferred embodiments of the present invention, the back contact battery further includes a front passivation layer and an antireflection layer sequentially disposed on the front side of the silicon wafer.

[0021] In a second aspect, the present invention provides a method for preparing a back contact battery with a specific transparent conductive film layer, which is used to prepare the back contact battery with a specific transparent conductive film layer as described in the first aspect. The preparation method includes: sequentially forming a semiconductor film layer and a transparent conductive film layer with a sandwich structure on the back side of a silicon wafer.

[0022] In some preferred embodiments of the present invention, the process of forming a transparent conductive film includes: first depositing a sandwich structure, and then depositing a second ultrathin metal film.

[0023] In some preferred embodiments of the present invention, the preparation method further includes: sequentially forming a front passivation layer and an antireflection layer on the front side of a silicon wafer, then forming the transparent conductive film layer, and forming an isolation groove on the transparent conductive film layer, followed by forming a fine metal gate electrode.

[0024] Thirdly, the present invention provides a battery assembly comprising a back contact battery having a specific transparent conductive film layer as described in the first aspect.

[0025] Beneficial effects:

[0026] This invention, through the aforementioned technical solution, particularly by employing a sandwich structure comprising a first transparent conductive oxide, a first ultrathin metal film, and a second transparent conductive oxide arranged sequentially as the transparent conductive film layer, and by controlling the overall transmittance of the transparent conductive film layer, can significantly reduce the sheet resistance of the transparent conductive film layer to a suitable low range, thereby improving its conductivity. This is because the electrical transport loss of charge carriers in the direction of the metal grid electrode is actually determined by the parallel resistance of the metal grid electrode and the transparent conductive film layer. When the conductivity of the transparent conductive film layer is improved, the amount of silver paste consumed can be reduced accordingly (the reduction in silver paste consumption includes a reduction in the cross-sectional area of ​​the metal electrode or at the breakpoints; the cross-sectional area includes thickness and width). In addition, because the conductivity of the transparent conductive film layer is significantly improved, the spacing length W4 of the metal grid electrode can be significantly increased to a suitable wide range. This not only ensures an effective reduction in electrical transport loss but also further reduces the amount of silver paste consumed. It also reduces the risk of short circuits during the subsequent formation of battery components (such as battery modules) when soldering ribbons, while maintaining a high bifaciality. These synergistic effects are beneficial for improving battery conversion efficiency.

[0027] In addition, the present invention controls the thickness of the first ultrathin metal film to be 1-10nm, which is beneficial to balance transmittance and sheet resistance; and the thickness ratio of the first ultrathin metal film to the first transparent conductive oxide and the second transparent conductive oxide is within an appropriate range, which is beneficial to effectively reduce the amount of silver paste consumed while improving battery reliability. Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of a specific embodiment of the back contact battery semi-finished product for forming the semiconductor film layer and the front film layer according to the present invention.

[0030] Figure 2 for Figure 1 A schematic diagram of the structure in which a transparent conductive film layer is formed on the back.

[0031] Figure 3 for Figure 2 A schematic diagram of the structure forming the isolation groove.

[0032] Figure 4 for Figure 3A schematic diagram of the structure forming the metal fine gate electrode and the main gate electrode.

[0033] Figure 5 for Figure 4 A schematic diagram of the structure of the fine metal grid electrodes and their spacing and breakpoint arrangement.

[0034] Figure 6 for Figure 5 A schematic diagram of the structure with the main gate electrode and insulating block set on top.

[0035] Figure 7 The figures show the transmittance curves of two transparent conductive films at different wavelengths, namely ITO 40nm / Ag 5nm / ITO 20nm and ITO 40nm / Ag 10nm / ITO 20nm.

[0036] Explanation of reference numerals in the attached figures

[0037] 1. Silicon wafer; 2. Tunneling oxide layer; 3. N-type doped polycrystalline silicon layer; 4. Front passivation layer; 5. Anti-reflection layer; 6. Amorphous passivation layer; 7. P-type doped amorphous silicon layer; 8A. Transparent conductive oxide; 8B. Ultrathin metal film; 9N. First metal fine gate electrode; 9P. Second metal fine gate electrode; 10P. Second insulating ink; 10N. First insulating ink; 11N. First main gate electrode; 11P. Detailed Implementation

[0038] In this invention, unless otherwise stated, directional terms such as "up," "down," "left," and "right" are generally understood in conjunction with the accompanying drawings and the directions shown in actual applications.

[0039] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0040] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0041] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges. For numerical ranges, the endpoint values ​​of the ranges, the endpoint values ​​of the ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein. The terms "optional" and "optional" mean that they may or may not be included (or may or may not be present).

[0042] In this invention, the area closer to the silicon wafer is considered the inside, and the area farther from the silicon wafer is considered the outside.

[0043] The present invention provides a back contact battery having a specific transparent conductive film layer, including a silicon wafer, a semiconductor film layer disposed on the back side of the silicon wafer, the semiconductor film layer including a first semiconductor layer and a second semiconductor layer disposed alternately along the back side, a transparent conductive film layer disposed on the outer surface of the semiconductor film layer, and a metal fine grid electrode disposed on the outer surface of each corresponding transparent conductive film layer in a predetermined semiconductor region.

[0044] The transparent conductive film layer has a sandwich structure comprising a first transparent conductive oxide, a first ultrathin metal film, and a second transparent conductive oxide arranged sequentially. The thickness of the first ultrathin metal film is 1-10 nm, and the thickness ratio of the first ultrathin metal film to the thickness of the first transparent conductive oxide and the second transparent conductive oxide is 1:(1-20):(1-20). The overall average transmittance of the transparent conductive film layer in the wavelength of light 400-1100 nm is greater than 50%, preferably greater than 60%, and the overall sheet resistance of the transparent conductive film layer is 0.6-6 Ω / □. Along the extension direction of the metal fine gate electrode, the metal fine gate electrode has at least one interval breakpoint, and the interval length W4 of the interval breakpoint is 2-5 mm.

[0045] The thickness ratio of the first ultrathin metal film to the first transparent conductive oxide and the second transparent conductive oxide is 1:(1-20):(1-20), specifically it can be 1:(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 or 20):(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 or 20), for example it can be 1:1:1, 1:1:2, 1:1:3, 1:1:4, 1:1:5, 1:1:6, 1:1:7, 1:1:8, 1:1:9 , 1:1:10, 1:1:11, 1:1:12, 1:1:13, 1:1:14, 1:1:15, 1:1:16, 1:1:17, 1:1:18, 1:1:19, 1:1:20, 1:2:1, 1:3:1, 1:4:1, 1:5:1, 1:6:1, 1:7:1, 1:10:1, 1:12:1, 1:15:1, 1:20:1, 1:2:3, 1:2:10, 1:4:4, 1:4:5, 1:4:6, 1:4:10, 1:5:12, etc., and the range between any two point values; for example, 1:(5-20):(3-20) can be preferred.

[0046] The interval length W4 of the interval breakpoint is 2-5mm, for example, it can be 2mm, 2.5mm, 3mm, 3.5mm, 4mm, 4.5mm, 5mm, or any range between two point values.

[0047] The overall sheet resistance of the transparent conductive film layer is 0.6-6Ω / □, specifically it can be 0.6Ω / □, 1Ω / □, 1.5Ω / □, 2Ω / □, 2.5Ω / □, 3Ω / □, 3.5Ω / □, 4Ω / □, 4.5Ω / □, 5Ω / □, 5.5Ω / □, 6Ω / □, or any range between two point values.

[0048] In some preferred embodiments of the present invention, the transparent conductive film layer has one or more sandwich structures, in which corresponding ultrathin metal films and corresponding transparent conductive oxides are alternately arranged. For example, 8A represents a transparent conductive oxide, and 8B represents an ultrathin metal film; a transparent conductive film layer with one sandwich structure can be, for example, 8A / 8B / 8A, and a transparent conductive film layer with multiple sandwich structures can be, for example, 8A / 8B / 8A / 8B, 8A / 8B / 8A / 8B / 8A, etc. Of course, the two 8A's in the sandwich structure can be made of the same material or different materials.

[0049] The present invention employs a multi-sandwich structure, which can effectively reduce the oxidation of the ultra-thin metal film layer, improve battery reliability, and maintain high battery conversion efficiency.

[0050] In some preferred embodiments of the present invention, the transparent conductive film layer further includes a second ultrathin metal film disposed on the outer surface of the sandwich structure, the second ultrathin metal film serving as a surface layer. This preferred embodiment of the present invention is more conducive to reducing the contact resistance between the transparent conductive film layer and the metal grid electrode, thus maintaining a high battery conversion efficiency.

[0051] In some preferred embodiments of the present invention, the total thickness of the ultrathin metal film contained in the transparent conductive film layer is 1-12 nm, which is more conducive to controlling the transmittance of the metal film and improving the bifaciality while maintaining a high battery conversion efficiency.

[0052] In some preferred embodiments of the present invention, the materials of each ultrathin metal film contained in the transparent conductive film layer are independently selected from metallic silver or metallic gold. Using metallic silver or metallic gold is more conducive to improving transmittance and reducing sheet resistance.

[0053] In some preferred embodiments of the present invention, the thickness of each transparent conductive oxide monolayer is between 10-60 nm, specifically 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, and any range between two points.

[0054] Preferably, the sum of the thicknesses of the transparent conductive oxides contained in the transparent conductive film layer is between 20 and 100 nm, specifically 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, and any range between two points.

[0055] In some preferred embodiments of the present invention, the materials of each transparent conductive oxide contained in the transparent conductive film layer are each independently selected from at least one of indium oxide-based thin films and zinc oxide-based thin films.

[0056] Preferably, the doping element of the indium oxide-based thin film is selected from at least one of tin, tungsten, titanium, zinc, and gallium, and the doping element of the zinc oxide-based thin film is selected from at least one of aluminum, gallium, and boron.

[0057] In some preferred embodiments of the present invention, an isolation trench is formed on the portion of the transparent conductive film layer located between two semiconductor regions of different polarities. It is understood that the semiconductor layers attached to the back side of the silicon wafer on both sides of the isolation trench respectively form two semiconductor regions of different polarities.

[0058] In some preferred embodiments of the present invention, in the semiconductor film layer, both ends of the second semiconductor layer extend outward to cover the back side of the portion of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is formed on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers, and the second semiconductor opening regions and the first semiconductor opening regions are spaced apart, with the area between them forming a gap region. An isolation trench is formed on the portion of the transparent conductive film layer located in the gap region. It is understood that a fine metal gate electrode is disposed on the outer surface of the corresponding transparent conductive film layer of the second semiconductor opening region and the first semiconductor opening region. The widths of the second semiconductor opening region, the first semiconductor opening region, and the isolation trench in the present invention can be within the ranges described in the prior art.

[0059] In this invention, a mask layer may or may not be provided between the first semiconductor layer and the second semiconductor layer within the spacer region.

[0060] Preferably, in this invention, a portion of the silicon wafer located at the second semiconductor opening region has a textured surface, while a portion of the silicon wafer located at the position corresponding to the first semiconductor layer has a polished surface.

[0061] In some preferred embodiments of the present invention, the intervals on adjacent metal grid electrodes are arranged in a cross pattern along the vertical direction of the metal grid electrodes, which is more conducive to reducing the amount of silver paste consumed, while taking into account current transmission and maintaining a high battery conversion efficiency.

[0062] In some preferred embodiments of the present invention, the back contact battery further includes a metal main grid electrode and an insulating block disposed at the interval break. The metal main grid electrode and the metal fine grid electrode of the same polarity are arranged perpendicularly and connected at their intersection, and cover the insulating block on their corresponding axis. The insulating block can be, for example, insulating ink, as long as it can provide insulation for metal electrodes of different polarities.

[0063] The back contact battery of the present invention may also include conventional film layers such as insulating ink for preventing short circuits between grid electrodes of different polarities, which are existing technologies and will not be described in detail here.

[0064] In some preferred embodiments of the present invention, the first semiconductor layer is a stack comprising a tunneling oxide layer and a first doped polysilicon layer, or a stack comprising a first intrinsic silicon layer and a first doped silicon layer, and the second semiconductor layer comprises a second intrinsic silicon layer and a second doped silicon layer. The thickness and corresponding doping concentration of the tunneling oxide layer or each intrinsic silicon layer, the first doped polysilicon layer or the first doped silicon layer, and the second doped silicon layer described in the present invention can all refer to the range of the prior art and can all be used in the present invention. For example, the thickness of the tunneling oxide layer is 1-2 nm, the thickness of each intrinsic silicon layer is 5-15 nm, and the thickness of the second doped silicon layer is 7-45 nm with an effective doping concentration of 2e18 cm⁻¹.-3 -3e20cm -3 The first doped polycrystalline silicon layer and the first doped silicon layer each independently satisfy the following conditions: thickness of 30-250 nm and effective doping concentration greater than 5e18 cm⁻¹. -3 .

[0065] More preferably, the first semiconductor layer is a stack comprising a tunneling oxide layer and a first doped polysilicon layer, and the second semiconductor layer comprises a second intrinsic silicon layer and a second doped silicon layer. This combined passivation structure, along with the specific transparent conductive film layer of the present invention, further facilitates the reduction of electrical transport losses in the metal electrode and improves battery conversion efficiency.

[0066] In some preferred embodiments of the present invention, the back contact battery further includes a front passivation layer and an antireflection layer sequentially disposed on the front side of the silicon wafer. The materials and thicknesses of the front passivation layer and the antireflection layer can be referred to in the prior art. For example, the front passivation layer can be any one or more materials selected from alumina, silicon oxide, amorphous silicon, and microcrystalline silicon, and the antireflection layer can be at least one of silicon nitride, silicon oxynitride, and silicon oxide.

[0067] In a second aspect, the present invention provides a method for preparing a back contact battery with a specific transparent conductive film layer, which is used to prepare the back contact battery with a specific transparent conductive film layer as described in the first aspect. The preparation method includes: sequentially forming a semiconductor film layer and a transparent conductive film layer with a sandwich structure on the back side of a silicon wafer.

[0068] This invention does not impose any restrictions on the preparation process of each film layer contained in the transparent conductive film layer. The corresponding process in the existing technology can be referred to, as long as the target film layer can be formed.

[0069] In some preferred embodiments of the present invention, the process of forming a transparent conductive film includes: first depositing a sandwich structure, and then depositing a second ultrathin metal film, thereby forming an ultrathin metal film as the surface layer and a transparent conductive film with the sandwich structure.

[0070] In some preferred embodiments of the present invention, the preparation method further includes: sequentially forming a front passivation layer and an antireflection layer on the front side of a silicon wafer, then forming the transparent conductive film layer, and forming isolation trenches on the transparent conductive film layer, followed by forming a fine metal gate electrode. The preparation method of the present invention may also include the steps of forming a metal main gate electrode and optionally an insulating ink, which are prior art and will not be described in detail here.

[0071] Thirdly, the present invention provides a battery assembly comprising a back contact battery having a specific transparent conductive film layer as described in the first aspect. The battery assembly, for example, includes a battery module comprising solder strips, the assembly structure of which is described in the prior art.

[0072] The embodiments of the present invention described below are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0073] Example 1

[0074] A back-contact battery is obtained by the following manufacturing method:

[0075] S101, such as Figure 1 As shown, a silicon wafer 1 is provided with a front passivation layer 4 (alumina) and an anti-reflection layer 5 (silicon nitride) formed on the front side, and a polishing area and a texturing area spaced apart along the width direction of the back side. A first semiconductor layer is formed on the polishing area, wherein the first semiconductor layer includes a tunneling oxide layer 2 (thickness of 1.5 nm) and an N-type doped polysilicon layer 3 (thickness of 100 nm, effective doping concentration 1e20 cm⁻¹). -3 The texturing region includes a second semiconductor layer, comprising an amorphous passivation layer 6 (10 nm thick) and a P-type doped amorphous silicon layer 7 (20 nm thick, effective doping concentration 1e20 cm⁻¹). -3 The two ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region W1 that does not cover the second semiconductor layer is opened on the back side of the first semiconductor layer. A second semiconductor opening region W2 is formed between adjacent first semiconductor layers. The second semiconductor opening region W2 and the first semiconductor opening region W1 are arranged alternately, and the area between them is the gap region.

[0076] S102, such as Figure 2 As shown, a transparent conductive film layer is formed on the back side obtained in S101. The transparent conductive film layer is composed of transparent conductive oxide 8A / ultra-thin metal film 8B / transparent conductive oxide 8A arranged sequentially from the back side outwards: ITO 40nm / Ag 5nm / ITO 20nm. The transmittance curves of the transparent conductive film layer at different wavelengths are shown below. Figure 7 As shown, the overall transparent conductive film layer has an average transmittance of 75% and a sheet resistance of 6 Ω / □ in the wavelength range of 400-1100 nm.

[0077] S103, such as Figure 3 As shown, the transparent conductive film layer portion on the back side obtained in S102, located between the second semiconductor opening region W2 and the first semiconductor opening region W1, is then etched to form an isolation trench W3.

[0078] S104, such as Figure 4 , Figure 5 , Figure 6As shown, alternating first metal gate electrodes 9N and second metal gate electrodes 9P are formed on the second semiconductor opening region W2 and the first semiconductor opening region W1 on the back side obtained in S103, respectively. The first metal gate electrodes 9N and the second metal gate electrodes 9P are respectively provided with intervals along their extension directions, such as... Figure 5 As shown, a second insulating ink 10P is disposed at the intervals on the first metal fine gate electrode 9N, and a first insulating ink 10N is disposed at the intervals on the second metal fine gate electrode 9P. Then, a main gate electrode (specifically composed of a first main gate electrode 11N and a second main gate electrode 11P) is formed connecting the metal fine gate electrodes. The first main gate electrode 11N is perpendicular to the first metal fine gate electrode 9N and their intersection points are connected. At its corresponding intervals, the first main gate electrode 11N covers the first insulating ink 10N. The second main gate electrode 11P is perpendicular to the second metal fine gate electrode 9P and their intersection points are connected. At its corresponding intervals, the second main gate electrode 11P covers the second insulating ink 10P. Figure 6 As shown; in its extending direction, the interval length W4 of the breakpoints is 3mm. In its vertical direction, the breakpoints on adjacent metal grid electrodes are arranged in an interlaced pattern, as shown... Figure 5 As shown. Both the fine gate electrode and the main gate electrode are made of silver paste.

[0079] Example 2

[0080] The method described in Example 1 was followed, except that the transparent conductive film layer was ITO 40nm / Ag 10nm / ITO 20nm. The transmittance curves of the transparent conductive film layer at different wavelengths are shown below. Figure 7 As shown, the overall transparent conductive film layer has an average transmittance of 52% and a sheet resistance of 2.8 Ω / □ in the wavelength range of 400-1100 nm.

[0081] Example 3

[0082] The method described in Example 1 is followed, except that the transparent conductive film layer has a multi-sandwich structure, specifically ITO 40nm / Ag 5nm / ITO 20nm / Ag 5nm / ITO 20nm. The overall transparent conductive film layer has an average transmittance of 55% and a sheet resistance of 3.5Ω / □ in the wavelength range of 400-1100nm.

[0083] Example 4

[0084] The method described in Example 1 was followed, except that the transparent conductive film layer was ITO 40nm / Ag 5nm / ITO 20nm / Ag 5nm. The overall transparent conductive film layer had an average transmittance of 56% and a sheet resistance of 3.6Ω / □ in the wavelength range of 400-1100nm.

[0085] Example 5

[0086] The method was carried out according to Example 1, except that the first ultrathin metal film in the transparent conductive film layer was metallic gold, while the thickness remained unchanged. The overall transparent conductive film layer had an average transmittance of 55% and a sheet resistance of 4Ω / □ in the wavelength range of 400-1100nm.

[0087] Example 6

[0088] The method is carried out in accordance with Example 1, except that the interval length W4 of the interval breakpoint is 4 mm.

[0089] Example 7

[0090] The method is the same as in Example 1, except that the structure of the first semiconductor layer is different. The passivation structure is a heterojunction. Specifically, the first semiconductor layer is an intrinsic amorphous silicon layer and an N-type doped amorphous silicon layer. The thickness of the intrinsic amorphous silicon layer is 10 nm, and the thickness of the N-type doped amorphous silicon layer is 30 nm with an effective doping concentration of 1e20 cm⁻¹. -3 .

[0091] Comparative Example 1

[0092] The method is carried out in accordance with Example 1, except that the transparent conductive film layer is a conventional ITO film layer with a thickness of 60 nm, an average transmittance of 90% in the wavelength of light 400-1100 nm, and a sheet resistance of 80 Ω / □; and the spacing length W4 of the interval of the metal fine grid electrode in the extension direction is very short, only 1 mm.

[0093] Comparative Example 2

[0094] The method of Example 1 was followed, except that the transparent conductive film layer was a conventional ITO film layer (specifically the same as Comparative Example 1).

[0095] Comparative Example 3

[0096] The method is the same as in Example 1, except that the transparent conductive film layer is an ITO film layer and a metal film layer (the same as the first transparent conductive oxide and the first ultrathin metal film in Example 1), which are arranged sequentially. It is not a sandwich structure. The average transmittance of the transparent conductive film layer in the wavelength of light 400-1100nm is 76%, and the sheet resistance is 8Ω / □.

[0097] Comparative Example 4

[0098] The method was carried out in accordance with Example 1, except that the thickness of the first ultrathin metal film was 20 nm, and the calculated thickness ratio of the first ultrathin metal film to the first transparent conductive oxide and the second transparent conductive oxide was 1:2:1. The average transmittance of the transparent conductive film layer in the wavelength range of 400-1100 nm was 30%, and the sheet resistance was 1.3 Ω / □.

[0099] Test case

[0100] The back-contact batteries obtained in the above embodiments and comparative examples were tested for battery conversion efficiency and bifaciality, and their silver paste usage was calculated. The results are shown in Table 1. Battery modules with the same structure were fabricated using the corresponding back-contact batteries, and their short-circuit failure rate was tested to calculate the proportion of short-circuit failures. The results are also shown in Table 1. The bifaciality test method is the ratio of battery conversion efficiency measured by light incident on the back of the battery to that measured by light incident on the front of the battery during IV testing. The silver paste usage for each embodiment and comparative example was calculated using Example 1 as a reference. The data in Example 1 is normalized to reference 1. Other examples are calculated based on Example 1; for example, the silver paste usage in Comparative Example 1 / the silver paste usage in Example 1 is 2.

[0101] Table 1

[0102]

[0103] The results above show that, compared with the comparative example, the embodiment of the present invention can significantly reduce the amount of silver paste consumed, reduce the risk of short circuits during subsequent solder ribbon connection, and maintain a high bifaciality while ensuring a high level of battery conversion efficiency.

[0104] Furthermore, as can be seen from Examples 1 and 2-7, the preferred scheme of the present invention is more conducive to reducing the amount of silver paste consumed, while also taking into account reducing the risk of short circuit, high bifaciality, and high battery conversion efficiency.

[0105] The preferred embodiments of the present invention have been described in detail above; however, the present invention is not limited thereto. Within the scope of the inventive concept, various simple modifications can be made to the technical solutions of the present invention, including combinations of various technical features in any other suitable manner. These simple modifications and combinations should also be considered as the content disclosed in the present invention and are all within the protection scope of the present invention.

Claims

1. A back-contact battery with a specific transparent conductive film layer, comprising a silicon wafer, a semiconductor film layer disposed on the back side of the silicon wafer, the semiconductor film layer including a first semiconductor layer and a second semiconductor layer alternately disposed along the back side, a transparent conductive film layer disposed on the outer surface of the semiconductor film layer, and metal fine grid electrodes disposed on the outer surface of corresponding transparent conductive film layers in a predetermined semiconductor region; wherein, in the semiconductor film layer, both ends of the second semiconductor layer extend outward to cover the back side of a portion of the adjacent first semiconductor layer, and a first semiconductor opening region not covering the second semiconductor layer is formed on the back side of the first semiconductor layer, a second semiconductor opening region is formed between adjacent first semiconductor layers, the second semiconductor opening regions and the first semiconductor opening regions are arranged alternately, and the region between them is a gap region; an isolation groove is formed on the portion of the transparent conductive film layer located in the gap region; characterized in that... The specific transparent conductive film layer has a sandwich structure comprising a first transparent conductive oxide, a first ultrathin metal film, and a second transparent conductive oxide arranged sequentially. The thickness of the first ultrathin metal film is 1-5 nm, the thickness of the first transparent conductive oxide is 30-60 nm, and the thickness of the second transparent conductive oxide is 10-25 nm. The thickness ratio of the first ultrathin metal film to the thickness of the first transparent conductive oxide and the second transparent conductive oxide is 1:(5-20):(4-20). The overall average transmittance of the transparent conductive film layer in the wavelength of light 400-1100 nm is greater than 60%, and the overall sheet resistance of the transparent conductive film layer is 1-6 Ω / □. Along the extension direction of the metal fine grid electrode, the metal fine grid electrode has at least one interval breakpoint, and the interval length W4 of the interval breakpoint is 2-5 mm.

2. The back contact battery with a specific transparent conductive film layer according to claim 1, characterized in that, The transparent conductive film layer has one or more sandwich structures, and the ultra-thin metal film and the transparent conductive oxide are alternately arranged in the multiple sandwich structures.

3. The back contact battery with a specific transparent conductive film layer according to claim 1, characterized in that, The transparent conductive film layer further includes a second ultrathin metal film disposed on the outer surface of the sandwich structure, the second ultrathin metal film serving as a surface layer.

4. The back contact battery with a specific transparent conductive film layer according to claim 3, characterized in that, The total thickness of the ultrathin metal films contained in the transparent conductive film layer is 1-12 nm, and / or, the materials of each ultrathin metal film contained in the transparent conductive film layer are independently selected from metallic silver or metallic gold.

5. The back contact battery having a specific transparent conductive film layer according to any one of claims 1-3, characterized in that, The sum of the thicknesses of the transparent conductive oxides contained in the transparent conductive film layer is 20-100 nm.

6. The back contact battery having a specific transparent conductive film layer according to any one of claims 1-3, characterized in that, The materials of each transparent conductive oxide contained in the transparent conductive film layer are independently selected from at least one of indium oxide-based thin films and zinc oxide-based thin films. The doping element of the indium oxide-based thin film is selected from at least one of tin, tungsten, titanium, zinc and gallium, and the doping element of the zinc oxide-based thin film is selected from at least one of aluminum, gallium and boron.

7. The back contact battery with a specific transparent conductive film layer according to claim 1, characterized in that, Along the vertical direction of the metal grid electrode, the intervals on two adjacent metal grid electrodes are arranged in an intersecting pattern.

8. The back contact battery with a specific transparent conductive film layer according to claim 1, characterized in that, The back contact battery also includes a metal main grid electrode and an insulating block disposed at the interval break. The metal main grid electrode and the metal fine grid electrode of the same polarity are arranged perpendicularly and connected at the intersection of the two, and cover the insulating block on their corresponding extended axis.

9. The back contact battery with a specific transparent conductive film layer according to claim 1, characterized in that, The first semiconductor layer is a stack comprising a tunneling oxide layer and a first doped polysilicon layer or a stack comprising a first intrinsic silicon layer and a first doped silicon layer; the second semiconductor layer comprises a second intrinsic silicon layer and a second doped silicon layer. And / or, The back contact cell also includes a front passivation layer and an anti-reflection layer sequentially disposed on the front side of the silicon wafer.

10. A method for preparing a back contact battery having a specific transparent conductive film layer, characterized in that, It is used to prepare a back contact battery with a specific transparent conductive film layer as described in any one of claims 1-9. The preparation method includes: sequentially forming a semiconductor film layer and a transparent conductive film layer with a sandwich structure on the back side of a silicon wafer.

11. The method for preparing a back contact battery with a specific transparent conductive film layer according to claim 10, characterized in that, The formation process of the transparent conductive film layer includes: first depositing a sandwich structure, and then depositing a second ultrathin metal film; And / or, The preparation method also includes: sequentially forming a front passivation layer and an antireflection layer on the front side of a silicon wafer, then forming the transparent conductive film layer, and opening isolation trenches on the transparent conductive film layer, followed by forming a fine metal gate electrode.

12. A battery assembly, characterized in that, It includes a back contact battery having a specific transparent conductive film layer as described in any one of claims 1-9.

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