Ultra-wideband input matching circuit, ultra-wideband power amplifier and power amplifier module

Abstract

The invention provides an ultra-wideband input matching circuit, an ultra-wideband power amplifier and a power amplifier module, and the ultra-wideband input matching circuit comprises a high-frequency pre-matching circuit which is connected with the input end of the power amplifier and is used for adjusting the input impedance at the upper limit frequency of a working frequency range to a target impedance value; the resistive matching circuit comprises a grounding resistor, and the grounding resistor is connected between a radio frequency signal input path connected with the input end of the power amplifier and a ground potential; the blocking capacitor is connected between the resistive matching circuit and the high-frequency pre-matching circuit, and the self-resonant frequency of the blocking capacitor is out of the working frequency band of the radio frequency amplifier; and the biasing circuit is connected to the joint between the blocking capacitor and the high-frequency pre-matching circuit.

Description

Technical Field

[0001] The present application relates to the technical field of power amplifiers, and in particular to an ultra-wideband input matching circuit, an ultra-wideband power amplifier, and a power amplifier module. Background Art

[0002] The power amplifier (PA) consumes the most energy in a radio frequency (RF) transceiver, and its performance determines the overall system's energy efficiency and emissions reduction. To integrate communication systems across different frequency bands and modes into the same equipment, ultra-wideband (UWB) PAs have become a research focus. UWB PAs often cover multiple frequency bands, enabling the integration and miniaturization of front-end communication equipment.

[0003] The design of ultra-wideband power amplifiers (UWBPAs) primarily addresses gain roll-off and input standing wave mismatch (SWR) issues. From a circuit implementation perspective, UWB PAs require good input-output matching over an octave. High-power UWB PAs, however, suffer from lower gain at high frequencies due to the larger physical size of their transistors compared to low-power amplifiers, resulting in increased junction capacitance and lower characteristic frequency. This makes gain roll-off more challenging than in low-power PAs, increasing the complexity of input matching design. Summary of the Invention

[0004] To solve the existing technical problems, the present application provides an ultra-wideband input matching circuit, an ultra-wideband power amplifier and a power amplifier module that improve high-frequency gain and avoid excessively rapid high-frequency gain roll-off in the design frequency band.

[0005] In a first aspect, an ultra-wideband input matching circuit is provided, which includes: a high-frequency pre-matching circuit connected to the input end of a power amplifier, and used to adjust the input impedance at the upper limit frequency of an operating frequency range to a target impedance value; a resistive matching circuit, including a grounding resistor, wherein the grounding resistor is connected between a radio frequency signal input path connected to the input end of the power amplifier and a ground potential; a DC blocking capacitor connected between the resistive matching circuit and the high-frequency pre-matching circuit, wherein the self-resonant frequency of the DC blocking capacitor is outside the operating frequency band of the radio frequency amplifier; and a bias circuit connected to the connection between the DC blocking capacitor and the high-frequency pre-matching circuit.

[0006] Optionally, the resistive matching circuit further includes an impedance matching inductor, and the impedance matching inductor and the grounding resistor are connected in series between the RF signal input path and the ground potential.

[0007] Optionally, the resistive matching circuit further includes a tuning inductor and a tuning capacitor; wherein, the tuning inductor and the DC blocking capacitor are connected in series on the RF signal input path, and the tuning capacitor is connected in parallel to a circuit segment formed by the tuning inductor and the impedance matching inductor.

[0008] Optionally, the tuning inductor and the DC blocking capacitor are connected in series to form a first electrical node, and the impedance matching inductor and the grounding resistor are connected in series between the first electrical node and the ground potential; the impedance matching inductor and the grounding resistor are connected in series to form a second electrical node, one end of the tuning capacitor is connected to the end of the tuning inductor away from the isolation capacitor, and the other end is connected to the second electrical node.

[0009] Optionally, the resistive matching circuit and the high-frequency pre-matching circuit are connected to form a fourth electrical node; the bias circuit includes a single-arm bias circuit connected to the fourth electrical node; or, the bias circuit includes a double-arm bias circuit connected to the fourth electrical node.

[0010] Optionally, the bias circuit includes a bias inductor, a bias resistor and a bias grounding capacitor, the bias inductor and the bias resistor are connected in series between the bias voltage and the fourth electrical node, and the bias grounding capacitor is connected between the electrical node formed between the bias inductor and the bias voltage and the ground potential.

[0011] Optionally, the ultra-wideband input matching circuit further includes a reactance matching circuit, which is provided on the radio frequency signal input path and connected to the resistive matching circuit.

[0012] Optionally, in the direction of RF signal input, the reactance matching circuit is arranged at the front end or rear end of the resistive matching circuit; or, in the direction of RF signal input, the reactance matching circuit includes a first reactance matching circuit connected to the front end of the resistive matching circuit, and a second reactance matching circuit connected to the rear end of the resistive matching circuit.

[0013] In a second aspect, an ultra-wideband power amplifier is provided, comprising a power amplifier and a matching network connected to an input end of the power amplifier; wherein the matching network is the ultra-wideband input matching circuit described in any embodiment of the present application.

[0014] According to a third aspect, a power amplifier module is provided, comprising a chip and a packaging substrate, wherein the chip or the packaging substrate is provided with an ultra-wideband power amplifier as described in any embodiment of the present application.

[0015] The ultra-wideband input matching circuit provided in the above embodiment is configured with a high-frequency pre-matching circuit and a resistive matching circuit. The high-frequency pre-matching circuit is used to adjust the input impedance at the upper limit frequency of the operating frequency range to a target impedance value, and can match the input impedance below the upper edge of the frequency band to near the target impedance value. The bias circuit provides a stable bias current to the power amplifier, and the DC blocking capacitor can isolate the DC component in the RF signal path to play a high-frequency suppression role. In the resistive matching circuit, the low-frequency insertion loss of the grounding resistor is large, and the high-frequency insertion loss is small, which can compensate for the gain roll-off phenomenon of the ultra-wideband power amplifier, which monotonically decreases from low frequency to high frequency, and improve the gain flatness.

[0016] The ultra-wideband power amplifier and power amplifier module provided in the above embodiments have the same concept as the corresponding ultra-wideband input matching circuit embodiments, and thus have the same technical effects as the corresponding ultra-wideband input matching circuit embodiments, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 FIG. 4 is a schematic diagram of an ultra-wideband input matching circuit according to an embodiment.

[0018] Figure 2 FIG. 4 is a circuit topology diagram of an ultra-wideband input matching circuit in one embodiment.

[0019] Figure 3 FIG. 4 is a circuit topology diagram of an ultra-wideband input matching circuit in another embodiment.

[0020] Figure 4 FIG. 4 is a circuit topology diagram of an ultra-wideband input matching circuit in yet another embodiment.

[0021] Figure 5 FIG. 4 is a circuit topology diagram of an ultra-wideband input matching circuit in yet another embodiment.

[0022] Figure 6 FIG. 4 is a circuit topology diagram of an ultra-wideband input matching circuit in another embodiment.

[0023] Figure 7 This is an S-parameter performance diagram after preliminary impedance matching of the RF input signal by a high-frequency pre-matching circuit in an optional example.

[0024] Figure 8 FIG. 4 is a diagram of the small signal performance of an ultra-wideband power amplifier in an optional example.

[0025] Figure 9 FIG. 4 is a diagram of the large signal performance of an ultra-wideband power amplifier in an optional example.

[0026] Figure 10 Schematic diagram of a power amplifier module in one embodiment.

[0027] Component Symbol Description:

[0028] Reactance matching circuit 10, resistive matching circuit 20, first electrical node 21, second electrical node 22, bias circuit 30, high-frequency pre-matching circuit 40, third electrical node 41, fourth electrical node 42, power amplifier 50;

[0029] Grounding capacitor C1, DC blocking capacitor C2, tuning capacitor C3, fourth capacitor C4, bias grounding capacitor C5, first inductor L1, second inductor L2, tuning inductor L3, impedance matching inductor L4, fifth inductor L5, bias inductor L6, grounding resistor R1, bias resistor R2, RF signal input terminal RFin, RF signal output terminal RFout, bias voltage Vgs. DETAILED DESCRIPTION

[0030] The technical solution of the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0031] In order to make the purpose, technical solutions and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limiting this application. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0032] In the following description, the expression "some embodiments" is involved, which describes a subset of all possible embodiments. It should be noted that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict.

[0033] It should also be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time. The terms "vertical", "horizontal", "inner", "outer", "left", "right" and similar expressions used herein are only for illustrative purposes in conjunction with the embodiments of the accompanying drawings and do not represent the only implementation methods.

[0034] An ultra-wideband power amplifier (UWBPA) is a power amplifier that can cover multiple frequency bands. The design of an UWBPA primarily addresses the issues of gain roll-off and input standing wave mismatch. From a circuit implementation perspective, an UWBPA needs to achieve good input-output matching over an octave range. To address the issue of achieving good input-output matching over an octave range in an UWB PA, the inventors conducted the following research:

[0035] The output matching circuit of an ultra-wideband power amplifier (UWBPA) requires power matching, which is easy to achieve due to its high tolerance. However, the input matching circuit often requires conjugate matching, and the quality of this matching directly determines the degree of mismatch within the power amplifier's link. The difficulty in designing the input matching circuit for UWBPAs is essentially the conflict between low impedance, high Q, and broadband requirements. Innovative technologies such as feedback topology, multi-harmonic pulling, and three-dimensional integration are gradually breaking through the input matching bottleneck, but the design complexity remains significantly higher than that of output matching, a long-standing challenge for UWBPAs.

[0036] In addition, for high-power ultra-wideband power amplifiers, since their transistors themselves have larger physical sizes than low-power transistors, their junction capacitance increases and their characteristic frequency decreases, so their gain is lower at high frequencies. Their gain roll-off problem is more difficult to overcome than that of low-power power amplifiers, further increasing the difficulty of input matching design.

[0037] Based on this, the inventors of this application proposed the design of an ultra-wideband input matching circuit comprising a high-frequency pre-matching circuit and a resistive matching circuit. The high-frequency pre-matching circuit is used to perform preliminary adjustments to the input impedance in the high-frequency band, adjusting the input impedance to the desired matching impedance, improving the transmission characteristics in the high-frequency band, and reducing the reflection and loss of high-frequency signals. The resistive matching circuit primarily implements conjugate impedance matching to achieve maximum power transmission and minimize reflection loss. The resistive matching circuit utilizes a grounding resistor design to achieve an impedance transformation transition from high impedance to low impedance in ultra-wideband input matching, compensating for the gain roll-off phenomenon of the ultra-wideband power amplifier, which monotonically decreases from low frequency to high frequency, and improving gain flatness.

[0038] See also Figure 1 and Figure 2 , an ultra-wideband input matching circuit provided by an embodiment of the present application, includes: a high-frequency pre-matching circuit 40, connected to the input end of a power amplifier 50, and used to adjust the input impedance at the upper limit frequency of the operating frequency range to a target impedance value; a resistive matching circuit 20, connected to the high-frequency pre-matching circuit 40, including a grounding resistor R1, the grounding resistor R1 being connected between the radio frequency signal input path connected to the input end of the power amplifier 50 and the ground potential; a DC blocking capacitor C2, connected between the resistive matching circuit 20 and the high-frequency pre-matching circuit 40, wherein the self-resonant frequency of the DC blocking capacitor C2 is outside the operating frequency band of the power amplifier 50; and a bias circuit 30, connected to the connection between the DC blocking capacitor C2 and the high-frequency pre-matching circuit 40.

[0039] The upper frequency limit of the operating frequency range refers to the highest frequency band in which a high-frequency circuit or antenna system can effectively operate. The input impedance at the upper frequency limit of the operating frequency range generally refers to the equivalent impedance presented by the input terminal at the upper frequency limit of the operating frequency range of a high-frequency circuit or antenna system. It can also be called the input impedance at the upper edge of the operating frequency band.

[0040] The target impedance value typically refers to the impedance required for input matching in RF and microwave systems. In one example, the target impedance is 50 ohms, a characteristic standard impedance commonly used in RF and microwave systems. It offers advantages in withstand voltage, power transfer, and loss, maximizing power transfer and minimizing signal reflections.

[0041] The RF signal input path refers to the transmission path for the RF signal to be incident on the input terminal of the power amplifier 50. One end of the RF signal input path is the RF signal input terminal RFin, and the other end is connected to the input terminal of the power amplifier 50. The RF signal is incident on the input path, along which the RF signal propagates and enters the power amplifier 50. The emitter of the power amplifier 50 serves as the RF signal output terminal RFout.

[0042] The ultra-wideband input matching circuit provided in the above embodiment, through the setting of the high-frequency pre-matching circuit 40 and the resistive matching circuit 20, the high-frequency pre-matching circuit 40 is used to adjust the input impedance of the high-frequency signal to the target impedance value, and can match the input impedance below the upper edge of the band to near the target impedance value. The bias circuit 30 provides a stable bias current to the power amplifier 50, and the DC blocking capacitor C2 can isolate the DC component in the RF signal path, playing a high-frequency suppression role. Gain roll-off refers to the monotonically decreasing gain of the power amplifier 50 from low frequency to high frequency. Overcoming gain roll-off refers to compensating for the physical property of monotonically decreasing gain to achieve good gain flatness. In the resistive matching circuit 20, the grounding resistor R1 has a large low-frequency insertion loss and a small high-frequency insertion loss, thereby compensating for the gain roll-off phenomenon of the ultra-wideband power amplifier and improving gain flatness.

[0043] In some embodiments, see Figure 2 The resistive matching circuit 20 further includes an impedance matching inductor L4, which is connected in series with the grounding resistor R1 between the RF signal input path and the ground potential. The impedance matching inductor L4 is further provided in the resistive matching circuit 20. The impedance matching of the impedance matching inductor L4 is utilized to pull the high-frequency resistor close to the conjugate matching point of the power amplifier 50, thereby increasing the high-frequency gain.

[0044] Optionally, the resistive matching circuit 20 further includes a tuning inductor L3 and a tuning capacitor C3; wherein the tuning inductor L3 and the DC blocking capacitor C2 are connected in series to the RF signal input path, and the tuning capacitor C3 is connected in parallel to the circuit segment formed by the tuning inductor L3 and the impedance matching inductor L4. The tuning capacitor C3 is connected in parallel to the circuit segment formed by the tuning inductor L3 and the impedance matching inductor L4, which is equivalent to the tuning capacitor C3 and the tuning inductor L3, and the tuning capacitor C3 and the impedance matching inductor L4 forming a pairwise parallel connection. At the same time, the tuning capacitor C3 is connected in series with the grounding resistor R1 and connected to the ground through the grounding resistor R1. The values of the tuning capacitor C3 and the tuning inductor L3 can be optimized through parameter tuning according to actual needs, and are jointly used to tune the overall in-band gain flatness of the input matching of the power amplifier 50.

[0045] In an optional example, the tuning inductor L3 and the DC blocking capacitor C2 are connected in series to form a first electrical node 21, the impedance matching inductor L4 and the grounding resistor R1 are connected in series between the first electrical node 21 and the ground potential; the impedance matching inductor L4 and the grounding resistor R1 are connected in series to form a second electrical node 22, one end of the tuning capacitor C3 is connected to the end of the tuning inductor L3 away from the blocking capacitor, and the other end is connected to the second electrical node 22. In the extension direction of the RF signal input path, the first electrical node 21 is located in front of the DC blocking capacitor C2, and the electrical node formed by the bias circuit 30 connected to the RF signal input path is located behind the DC blocking capacitor C2. The DC blocking capacitor C2 can block the DC component in the RF signal transmission path from interfering with the RF signal, thereby ensuring the transmission quality of the RF signal. The impedance matching inductor L4 and the grounding resistor R1 are connected in series between the first electrical node 21 and the ground potential. Through the impedance matching of the impedance matching inductor L4, the high-frequency impedance is pulled to the vicinity of the conjugate matching point close to the power amplifier 50, thereby improving the high-frequency gain. The grounding resistor R1 can realize the impedance transformation transition from high impedance to low impedance to better compensate for the gain roll-off problem.

[0046] In some embodiments, the high-frequency pre-matching circuit 40 includes a first inductor L1, a second inductor L2, and a grounding capacitor C1. The first inductor L1 and the second inductor L2 are connected in series in the RF signal input path, and a third electrical node 41 is formed between the first inductor L1 and the second inductor L2. The grounding capacitor C1 is connected between the third electrical node 41 and the ground potential. In this embodiment, the high-frequency pre-matching circuit 40 adopts a T-shaped structure consisting of the first inductor L1, the second inductor L2, and the grounding capacitor C1. By connecting the first inductor L1 and the second inductor L2 in series in the RF signal input path, the high-frequency pre-matching circuit 40 adjusts the impedance in the high-frequency band, so that the input impedance of the power amplifier 50 can be closer to the desired target impedance value.

[0047] The connection between the DC blocking capacitor C2 and the high frequency pre-matching circuit 40 forms a fourth electrical node 42, and the bias circuit 30 is connected to the fourth electrical node 42. The bias circuit 30 may include one or more paths. As shown in FIG2 , the bias circuit 30 includes a single-arm bias circuit 30 connected to the fourth electrical node 42. In other embodiments, see Figure 3 The bias circuit 30 includes a dual-arm bias circuit 30 connected to the fourth electrical node 42. The dual-arm bias circuit 30 is symmetrically distributed relative to the RF signal input path, which helps to improve the linearity index of the ultra-wideband power amplifier.

[0048] The bias circuit 30 includes a bias inductor L6, a bias resistor R2, and a bias grounding capacitor C5. The bias inductor L6 and the bias resistor R2 are connected in series between the bias voltage Vgs and the fourth electrical node 42. The bias grounding capacitor C5 is connected between the electrical node formed between the bias inductor L6 and the bias voltage Vgs and the ground potential. The bias circuit 30 comprises the bias inductor L6, the bias resistor R2, and the bias grounding capacitor C5, forming a DC bias circuit 30 that collectively achieves RF energy suppression.

[0049] Optionally, the ultra-wideband input matching circuit further includes a reactance matching circuit 10, which is provided on the RF signal input path and connected to the resistive matching circuit 20. The reactance matching circuit 10 can be a first-order or multi-order LC reactance matching compensation circuit. In this embodiment, based on the ultra-wideband input matching circuit including the resistive matching circuit 20, the bias circuit 30, and the high-frequency pre-matching circuit 40, the input standing wave S11 within the required frequency band is ensured to be less than approximately -10 dB within the band according to the input matching. If this requirement cannot be met, the selection of a first-order or multi-order matching circuit is considered based on whether the ultra-wideband input matching circuit as a whole meets the index requirements.

[0050] like Figure 2 As shown, the reactance matching circuit 10 is provided at the front end of the resistive matching circuit 20 and is a first-order LC circuit connected to the front end of the resistive matching circuit 20, including a T-shaped structure consisting of a fifth inductor L5 and a fourth capacitor C4. Figure 3 , the reactance matching circuit 10 can select a multi-stage LC structure, such as Figure 3 In (a), the π-type structure consists of two series inductors and a capacitor to ground, such as Figure 3 In (b), the π-type structure consists of an inductor and two capacitors to ground, such as Figure 3 In (c) and (d), the LCCL structure consists of two inductors and a capacitor.

[0051] It should be noted that the reactance matching circuit 10 can also be arranged at the back end of the resistive matching circuit 20. In the design process of the ultra-wideband input matching circuit provided in the embodiment of the present application, the parameters of the circuit device can be determined by parameter tuning based on the design of the high-frequency pre-matching circuit 40, the resistive matching circuit 20 and the bias circuit 30. Then, simulation and experimental verification can be used to determine whether the performance of the current design schematic meets the index requirements. In an optional example, the index requirement can be that the input standing wave S11 within the frequency band is less than about -10dB within the band. If the index requirement is met, no additional reactance matching circuit 10 is required. If not, a first-order or multi-order reactance matching circuit 10 can be added according to the index requirement until the index requirement is met and the parameters of each component are reasonable. This application does not impose any restrictions on this.

[0052] In some embodiments, please refer to Figures 4 to 6 In the direction of RF signal input, the reactance matching circuit 10 may include one or more components respectively arranged at the front end and the back end of the resistive matching circuit 20, such as Figure 4 As shown, the reactance matching circuit 10 is only provided at the front end of the resistive matching circuit 20, and different multi-stage LC structures can be selected. Figure 5 As shown, the reactance matching circuit 10 includes a first reactance matching circuit connected to the front end of the resistive matching circuit 20, and a second reactance matching circuit connected to the rear end of the resistive matching circuit 20 and located in front of the DC blocking capacitor C2. The first reactance matching circuit and the second reactance matching circuit can each be selected from one of a T-type structure, a Pi-type structure, and an LCCL structure.

[0053] In other embodiments, the circuit structure of the high frequency pre-matching circuit 40 may be the same as that of the reactance matching circuit 10, such as Figure 6 As shown, the high-frequency pre-matching circuit 40 can also be selected from one of a T-type structure, a π-type structure, and an LCCL structure. In this case, in the direction of RF signal input, the ultra-wideband input matching circuit includes a first reactance matching circuit provided at the front end of the resistive matching circuit 20, a second reactance matching circuit provided at the rear end of the resistive matching circuit 20 and located at the front end of the DC blocking capacitor C2, and a third reactance matching circuit provided at the rear end of the DC blocking capacitor C2. The third reactance matching circuit also serves as the high-frequency pre-matching circuit 40. The structures of the multiple reactance matching circuits 10 can be selected from one of a T-type structure, a π-type structure, and an LCCL structure, and the three can be the same or different.

[0054] On the other hand, an embodiment of the present application further provides an ultra-wideband power amplifier, which includes a power amplifier 50 and a matching network connected to the input end of the power amplifier 50; wherein the matching network is the ultra-wideband input matching circuit of any of the aforementioned embodiments of the present application.

[0055] Take the design frequency band of the ultra-wideband power amplifier as an example, which is 0.3-2.5GHz. Figure 7 In order to achieve the desired design bandwidth, a high-frequency pre-matching circuit 40 is used to match the input impedance at the upper edge of the band to the target impedance value. The circuit performance diagram of impedance matching using the high-frequency pre-matching circuit 40 is shown. The high-frequency pre-matching circuit 40 matches the input impedance to around 50 ohms when the design frequency band is 2.5 GHz, and the high-frequency gain S21 is significantly improved.

[0056] See also Figure 8 Still taking the design frequency band of the ultra-wideband power amplifier as 0.3-2.5 GHz as an example, the small signal performance diagram of the ultra-wideband power amplifier using the ultra-wideband input matching circuit provided in the embodiment of the present application is shown, where S11 is less than -11 dB within the band and S21 is greater than 13.1 dB.

[0057] See also Figure 9 Still taking the ultra-wideband power amplifier's design frequency range of 0.3-2.5 GHz as an example, the following graph shows the large-signal performance of an ultra-wideband power amplifier using the ultra-wideband input matching circuit provided in an embodiment of the present application. The output power is greater than 50 watts across the entire frequency band, the power-added efficiency is greater than 38.1%, and the power gain is greater than 6.1 dB.

[0058] The ultra-wideband input matching circuit, as the input matching circuit of the power amplifier 50, offers high design flexibility, good versatility, and considerable practical value. The ultra-wideband power amplifier employing the ultra-wideband input matching circuit provided in the embodiments of the present application not only overcomes the problem of rapid high-frequency gain roll-off in the power amplifier 50, but also achieves excellent input standing wave matching over several octaves. This is particularly suitable for addressing the design difficulty of input matching for high-power ultra-wideband power amplifiers.

[0059] See also Figure 10 Another embodiment of the present application provides a power amplifier module, including a chip 61 and a package substrate 62. An ultra-wideband power amplifier according to any embodiment of the present application is provided within the chip 61 or the package substrate 62. The ultra-wideband power amplifier can be integrated within the chip 61 or the package substrate 62, and the power amplifier module can be any type of radio frequency power amplifier product.

[0060] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0061] The above are only specific embodiments of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. An ultra-wideband input matching circuit, characterized in that: include: A high-frequency pre-matching circuit is connected to the input terminal of the power amplifier and is used to adjust the input impedance at the upper limit frequency of the operating frequency range to a target impedance value; a resistive matching circuit, comprising a grounding resistor connected between a radio frequency signal input path connected to an input terminal of the power amplifier and a ground potential; a DC blocking capacitor connected between the resistive matching circuit and the high-frequency pre-matching circuit, wherein a self-resonant frequency of the DC blocking capacitor is outside the operating frequency band of the radio frequency amplifier; The bias circuit is connected to the connection between the DC blocking capacitor and the high-frequency pre-matching circuit.

2. The ultra-wideband input matching circuit according to claim 1, wherein: The resistive matching circuit further includes an impedance matching inductor, which is connected in series with the grounding resistor between the RF signal input path and the ground potential.

3. The ultra-wideband input matching circuit according to claim 2, wherein: The resistive matching circuit further includes a tuning inductor and a tuning capacitor; The tuning inductor and the DC blocking capacitor are connected in series on the RF signal input path, and the tuning capacitor is connected in parallel to a circuit segment formed by the tuning inductor and the impedance matching inductor.

4. The ultra-wideband input matching circuit according to claim 3, wherein: The tuning inductor and the DC blocking capacitor are connected in series to form a first electrical node, and the impedance matching inductor and the grounding resistor are connected in series between the first electrical node and the ground potential; The impedance matching inductor and the grounding resistor are connected in series to form a second electrical node. One end of the tuning capacitor is connected to the end of the tuning inductor away from the isolation capacitor, and the other end is connected to the second electrical node.

5. The ultra-wideband input matching circuit according to claim 1, wherein: The resistive matching circuit and the high-frequency pre-matching circuit are connected to form a fourth electrical node; The bias circuit includes a single-arm bias circuit connected to the fourth electrical node; or, the bias circuit includes a double-arm bias circuit connected to the fourth electrical node.

6. The ultra-wideband input matching circuit according to claim 5, wherein: The bias circuit includes a bias inductor, a bias resistor and a bias grounding capacitor. The bias inductor and the bias resistor are connected in series between a bias voltage and the fourth electrical node. The bias grounding capacitor is connected between an electrical node formed between the bias inductor and the bias voltage and a ground potential.

7. The ultra-wideband input matching circuit according to claim 1, wherein: It also includes a reactance matching circuit, which is arranged on the radio frequency signal input path and connected to the resistive matching circuit.

8. The ultra-wideband input matching circuit according to claim 7, wherein: In the direction of RF signal input, the reactance matching circuit is arranged at the front end or the rear end of the resistive matching circuit; or, In the direction of RF signal input, the reactance matching circuit includes a first reactance matching circuit connected to a front end of the resistive matching circuit and a second reactance matching circuit connected to a rear end of the resistive matching circuit.

9. An ultra-wideband power amplifier, characterized in that: comprising a power amplifier and a matching network connected to an input terminal of the power amplifier; Wherein, the matching network is an ultra-wideband input matching circuit according to any one of claims 1 to 8.

10. A power amplifier module, characterized in that: The device comprises a chip and a packaging substrate, wherein the ultra-wideband power amplifier according to claim 9 is provided in the chip or the packaging substrate.

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