Chip, manufacturing method of chip and electronic equipment

Abstract

The embodiment of the invention provides a chip, a manufacturing method of the chip and electronic equipment, and relates to the technical field of electronics, the chip comprises a main device layer, a substrate layer and a buffer layer, the substrate layer is provided with a substrate groove and a substrate bonding area located on the same side face with the substrate groove, a first buffer surface of the buffer layer is provided with a first buffer bonding area, and a second buffer surface of the buffer layer is provided with a second buffer bonding area. The second buffer surface is provided with a second buffer bonding area; the first buffer bonding region is in bonding connection with the substrate bonding region, and the substrate groove and the first buffer surface form a buffer cavity; the second buffer bonding area is in bonding connection with the main device layer, the main device layer comprises at least one device with a specific function, and the first buffer bonding area corresponds to the second buffer bonding area in position. Influence of stress on the device is reduced, and accuracy and stability of output signals of the device are improved.

Description

Technical Field

[0001] The present application relates to the field of electronic technology, and in particular to a chip, a chip manufacturing method, and an electronic device. Background Art

[0002] Micro-Electro-Mechanical Systems (MEMS), also known as micro-electromechanical systems, microsystems, and micromachines, are independent intelligent systems whose internal structures are generally at the micron or even nanometer level. Developed based on microelectronics technology (semiconductor manufacturing technology), MEMS integrates technologies such as photolithography, etching, thin films, LIGA, silicon micromachining, non-silicon micromachining, and precision machining to create high-tech electronic mechanical devices. Common MEMS products include: MEMS accelerometers, MEMS microphones, micro-vibrators, MEMS optical sensors, MEMS pressure sensors, MEMS gyroscopes, MEMS humidity sensors, MEMS gas sensors, and integrated products of these devices. Among them, MEMS accelerometers and MEMS gyroscopes are MEMS inertial devices. These MEMS inertial devices have small chips and can be integrated into mobile phones, computers, in-vehicle devices, or wearable devices to measure acceleration and angular velocity, etc.

[0003] In the related art, MEMS inertial device chips are generally expected to be sensitive only to acceleration and angular velocity signals, and insensitive to other environmental influences. However, in reality, all structures in MEMS inertial device chips will generate stress due to temperature changes or be subject to direct external stress. These stress interferences can easily cause misinterpretation of acceleration or angular velocity signals, resulting in large errors in the inertial data (including acceleration, angular velocity, etc.) obtained by the application end.

[0004] like Figure 1 Figure 2 shows the stress transmission path of a MEMS inertial device in related technology when it is subjected to external stress. It can be seen that the stress is transmitted to the substrate through the printed circuit board and finally to the sensitive structure of the MEMS inertial device chip, resulting in signal misreading. It can also be seen that the stress vertical path is the main path for stress to affect transmission.

[0005] Therefore, there is an urgent need to redesign a chip and overcome the above-mentioned defects. Summary of the Invention

[0006] The embodiments of the present application provide a chip, a chip manufacturing method, and an electronic device to reduce the impact of stress on the device and improve the accuracy of the device operation.

[0007] In the first aspect, an embodiment of the present application provides a chip, which includes a main device layer, a substrate layer, and a buffer layer, wherein a substrate groove and a substrate bonding area on the same side as the substrate groove are provided on the substrate layer, a first buffer bonding area is provided on the first buffer surface of the buffer layer, and a second buffer bonding area is provided on the second buffer surface; the first buffer bonding area is bonded to the substrate bonding area, and the substrate groove and the first buffer surface form a buffer cavity; the second buffer bonding area is bonded to the main device layer, and the main device layer includes at least one device with a specific function, and the positions of the first buffer bonding area and the second buffer bonding area correspond to each other; wherein the main device layer includes any one or more devices selected from the group consisting of accelerometers, gyroscopes, temperature sensors, humidity sensors, microelectromechanical resonators, microelectromechanical galvanometers, and microelectromechanical switching devices.

[0008] Optionally, the chip further includes a sub-device layer, wherein the first device surface of the sub-device layer has a first device bonding area, and the second device surface has a second device bonding area, and the sub-device layer includes at least one device with a specific function; the first device bonding area is bonded to the substrate bonding area, and the substrate groove and the first device surface form a buffer cavity; the second device bonding area is bonded to the first buffer bonding area, and the positions of the first buffer bonding area, the second buffer bonding area, the first device bonding area and the second device bonding area correspond to each other; wherein the sub-device layer includes any one or more devices selected from the group consisting of accelerometers, gyroscopes, temperature sensors, humidity sensors, microelectromechanical resonators, microelectromechanical galvanometers, and microelectromechanical switching devices.

[0009] Optionally, the main device layer includes an accelerometer and / or a gyroscope, and / or the auxiliary device layer includes an accelerometer and / or a gyroscope; the accelerometer and the gyroscope are both provided with an electrode structure and a sensitive structure, and the relative position change between the sensitive structure and the electrode structure is used to obtain inertia-related parameters.

[0010] Optionally, the device type of the devices in the main device layer is the same as the device type of the corresponding devices in the auxiliary device layer; or the device type of the devices in the main device layer is different from the device type of the corresponding devices in the auxiliary device layer.

[0011] Optionally, a groove or through-groove is provided between the sensitive area and the bonding area of the buffer layer, the sensitive area being the area corresponding to the sensitive structure in the main device layer and / or the auxiliary device layer, and the bonding area being the area corresponding to the first buffer bonding area and the second buffer bonding area. In a second aspect, an embodiment of the present application provides an electronic device comprising a chip as described in any one of the first aspects above.

[0012] In a third aspect, an embodiment of the present application provides a method for manufacturing a chip, comprising:

[0013] Based on the deposition and etching process, a substrate layer and a buffer layer are prepared, wherein a substrate groove and a substrate bonding area on the same side as the substrate groove are provided on the substrate layer, a first buffer bonding area is provided on the first buffer surface of the buffer layer, and a second buffer bonding area is provided on the second buffer surface; based on the bonding process, the first buffer bonding area is bonded to the substrate bonding area to form a bonding connection, and a main device layer is prepared on the second buffer surface of the buffer layer, so that the second buffer bonding area is bonded to the main device layer, the substrate groove and the first buffer surface form a buffer cavity, the main device layer contains at least one device with a specific function, and the positions of the first buffer bonding area and the second buffer bonding area correspond to each other; wherein, the main device layer contains any one or more devices selected from the group consisting of accelerometers, gyroscopes, temperature sensors, humidity sensors, microelectromechanical resonators, microelectromechanical galvanometers, and microelectromechanical switching devices.

[0014] Optionally, after preparing the main device layer on the second buffer surface of the buffer layer, the first buffer bonding area is bonded to the substrate bonding area to form a bonding connection, including: based on the bonding process, preparing a secondary device layer on the first buffer surface, so that the first buffer bonding area is bonded to the second device bonding area on the second device surface of the secondary device layer, and the secondary device layer contains at least one device with a specific function; bonding the first device bonding area on the first device surface of the secondary device layer to the substrate bonding area to form a bonding connection, the substrate groove and the first device surface form a buffer cavity, and the first buffer bonding area, the second buffer bonding area, the first device bonding area and the second device bonding area correspond to each other; wherein the secondary device layer contains any one or more devices selected from the group consisting of accelerometers, gyroscopes, temperature sensors, humidity sensors, microelectromechanical resonators, microelectromechanical galvanometers, and microelectromechanical switching devices.

[0015] Optionally, the main device layer includes an accelerometer and / or a gyroscope, and / or the auxiliary device layer includes an accelerometer and / or a gyroscope; preparing the main device layer on the second buffer surface of the buffer layer includes: based on a deposition and etching process, preparing the accelerometer or the gyroscope including an electrode structure and a sensitive structure on the second buffer surface of the buffer layer; preparing the auxiliary device layer on the first buffer surface includes: based on a deposition and etching process, preparing the accelerometer or the gyroscope including an electrode structure and a sensitive structure on the first buffer surface, and the relative position change between the sensitive structure and the electrode structure is used to obtain inertia-related parameters.

[0016] Optionally, based on the bonding process, after preparing the main device layer on the second buffer surface of the buffer layer, it also includes: performing etching between the sensitive area and the bonding area of the buffer layer to obtain a groove or a through groove on the buffer layer; the sensitive area is the area corresponding to the sensitive structure in the main device layer and / or the auxiliary device layer, and the bonding area is the area corresponding to the first buffer bonding area and the second buffer bonding area.

[0017] The beneficial effects of this application are as follows:

[0018] The embodiment of the present application provides a chip, which includes a main device layer, a substrate layer, and a buffer layer. The substrate layer is connected to the first buffer surface of the buffer layer, and the second buffer surface of the buffer layer is connected to the main device layer. A substrate groove is provided on the substrate layer. At the connection between the buffer layer and the substrate layer, the substrate groove and the first buffer surface of the buffer layer form a cavity. In the stress transmission path, the cavity can isolate the stress transmission in the vertical direction, effectively reducing the influence of stress on the sensitive structure of the device. Compared with the MEMS inertial device chip structure in the related art, the chip structure in the present application can obtain more accurate acceleration and angular velocity signals. In addition, the first buffer bonding area and the second buffer bonding area are correspondingly arranged to ensure that there is no "empty" force point in the force area during the bonding process, thereby ensuring bonding reliability.

[0019] Other features and advantages of the present application will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present application. The purposes and other advantages of the present application can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0021] Figure 1 A transmission path for inertial device stress in a related technology provided in an embodiment of the present application;

[0022] Figure 2 A schematic diagram of the structure of device integration in a related technology provided in an embodiment of the present application;

[0023] Figure 3 A schematic diagram of the structure of device integration in a related technology provided in an embodiment of the present application;

[0024] Figure 4 A schematic diagram of the structure of a chip provided in an embodiment of the present application;

[0025] Figure 5 A schematic diagram of a structure in which an accelerometer or a gyroscope is included in a main device layer provided in an embodiment of the present application;

[0026] Figure 6 A schematic structural diagram of a chip including a main device layer and a secondary device layer provided in an embodiment of the present application;

[0027] Figure 7 A schematic structural diagram of a double-layer chip provided in an embodiment of the present application;

[0028] Figure 8 A schematic diagram of the structure of an accelerometer in a chip provided in an embodiment of the present application;

[0029] Figure 9 A schematic diagram of a chip structure in which the corresponding devices in the main device layer and the auxiliary device layer are of the same device type provided in an embodiment of the present application;

[0030] Figure 10 A schematic structural diagram of a chip with a groove provided in an embodiment of the present application;

[0031] Figure 11 A schematic structural diagram of a chip with a through-groove provided in an embodiment of the present application;

[0032] Figure 12 A schematic top view of a buffer layer and related structures provided in an embodiment of the present application;

[0033] Figure 13 A schematic flow chart of a chip manufacturing method provided in an embodiment of the present application;

[0034] Figure 14 A schematic diagram of a cross-section bonding area of a chip provided in an embodiment of the present application;

[0035] Figure 15 A schematic diagram of a cross-section bonding area of a chip in a related art embodiment of the present application;

[0036] Figure 16 A top view of a chip provided in an embodiment of the present application;

[0037] FIG17 is a schematic diagram of a chip manufacturing method according to an embodiment of the present application;

[0038] Figure 18 A schematic diagram of a chip structure with a multi-layer buffer layer 3 provided in an embodiment of the present application;

[0039] Figure 19A schematic diagram of a method for preparing a chip having a multi-layer buffer layer 3 provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] To make the objectives, technical solutions and advantages of this application more clearly understood, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only some of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application. In the absence of conflict, the embodiments and features in the embodiments of this application can be combined with each other in any way. It should be noted that in the description of this application, words such as "first" and "second" are only used to distinguish the purpose of description and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order. It should be pointed out that in the embodiments of this application, "connection" can be understood as a mechanical connection, and the connection between one component structure and another component structure can be direct or indirect. For example, A and B are connected, which can be either A and B directly connected or A and B indirectly connected through one or more other components. For example, A and B are connected, which can also be A and C directly connected, C and B directly connected, and A and B connected through C.

[0041] An inertial sensor, also known as an inertial device, is a sensor used to measure inertial effects. It primarily detects and measures acceleration, tilt, shock, vibration, rotation, and multi-degree-of-freedom (DoF) motion, and is an important component for solving navigation, orientation, and motion control issues. Inertial sensors include: accelerometers (or acceleration sensors), angular velocity sensors (gyroscopes), single-, dual-, and tri-axis combinations of accelerometers and gyroscopes (IMUs), AHRSs (attitude reference systems including magnetic sensors), and others. Inertial devices manufactured using MEMS technology are called MEMS inertial devices. For MEMS inertial devices, the ability to measure accurate inertial data is one of the key performance indicators. Furthermore, as more and more portable electronic devices require the use of MEMS inertial devices, in many cases, the smaller the size of the MEMS inertial device, the better.

[0042] In terms of measurement: Figure 1 As shown, when the MEMS inertial device in the related art is affected by stress, the stress is transmitted to the substrate through the printed circuit board, and finally transmitted to the sensitive structure of the MEMS inertial device chip, which can easily lead to signal misreading.

[0043] In terms of volume: In related technologies, generally, the integration method of MEMS devices is to manufacture multiple devices separately on the package base plate to save the space occupied by independently manufacturing and packaging each MEMS device, such as Figure 2 As shown in FIG, a schematic diagram of a structure of a MEMS device integration in the related art is shown, in which the accelerometer and the gyroscope are respectively arranged horizontally on the package base plate. In order to further save the space occupied by the MEMS device, the accelerometer and the gyroscope can also be arranged on the same substrate, such as Figure 3 FIG2 is a schematic diagram of a structure of a MEMS device integration in the related art. That is to say, in the MEMS device integration method in the related art, the space occupied by the device is still relatively large, which does not meet the requirements of small-volume electronic devices.

[0044] In view of this, an embodiment of the present application provides a chip, which includes a main device layer, a substrate layer, and a buffer layer. The second buffer surface of the buffer layer is bonded to the main device layer via a second buffer bonding area, and the first buffer bonding area of the corresponding first buffer surface and the second buffer bonding area of the second buffer surface of the buffer layer are filled with conductive material to electrically connect the main device layer to the substrate and the printed circuit board, and to conduct the electrical connection between the main device layer and other devices and / or power supply when in use. One side of the substrate layer has a substrate groove and a substrate bonding area. After the substrate bonding area is bonded to the first buffer bonding area on the first buffer surface of the buffer layer, the substrate groove and the first buffer surface form a cavity. When the substrate of the chip or the printed circuit board on which it is located is affected by stress, the stress is promptly isolated on the substrate to prevent the stress from being transmitted to the sensitive structure in the main device layer, thereby ensuring the accuracy of the chip signal.

[0045] The following briefly introduces the application scenarios to which the technical solutions of the embodiments of the present application can be applied. It should be noted that the application scenarios described below are only used to illustrate the embodiments of the present application and are not limiting. In the specific implementation process, the technical solutions provided by the embodiments of the present application can be flexibly applied according to actual needs.

[0046] The solution provided by the embodiment of the present application can be applied to most chip use and manufacturing scenarios. For example, the chip provided by the embodiment of the present application can be applied to inertial measurement units and temperature and humidity sensors, micro-electromechanical resonant devices, micro-electromechanical galvanometer devices, micro-electromechanical switch devices, etc. of consumer electronics, vehicles, aerospace, robots and automation equipment, virtual reality and augmented reality, medical equipment, etc., and the chips with various functions obtained by the chip manufacturing method of the present application can be correspondingly applied to the aforementioned various scenarios. It should be noted that the above application scenario is only an example and does not limit the chip and its manufacturing method in this application.

[0047] The following describes the chip and its manufacturing method provided by the exemplary embodiment of the present application in combination with the application scenarios described above and with reference to the accompanying drawings. It should be noted that the above application scenarios are only shown to facilitate understanding of the spirit and principles of the present application, and the implementation methods of the present application are not limited in this respect.

[0048] See also Figure 4 1 is a schematic structural diagram of a chip provided in an embodiment of the present application, wherein the chip comprises a main device layer 1, a substrate layer 2, and a buffer layer 3. The substrate layer is provided with a substrate groove 4 and a substrate bonding area 5 on the same side as the substrate groove 4. The buffer layer 3 has a first buffer bonding area 6 on a first buffer surface and a second buffer bonding area 7 on a second buffer surface.

[0049] The first buffer bonding area 6 is bonded to the substrate bonding area 5, and the substrate groove 4 and the first buffer surface form a buffer cavity;

[0050] The second buffer bonding area 7 is bonded to the main device layer 1. The main device layer 1 includes at least one device with a specific function. The positions of the first buffer bonding area 6 and the second buffer bonding area 7 correspond to each other.

[0051] The main device layer 1 includes any one or more devices selected from the group consisting of an accelerometer, a gyroscope, a temperature sensor, a humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device.

[0052] In one embodiment, the substrate bonding region 5 between the substrate layer 2 and the buffer layer 3 corresponds to the first buffer bonding region 6, as shown in FIG. Figure 4 The substrate bonding area 5 and the first buffer bonding area 6 are shown bonded, and the substrate bonding area 5 and the first buffer bonding area 6 can be made of insulating material 8. In one embodiment, the buffer layer portion between the first buffer bonding area 6 and the second buffer bonding area 7, which are opposed to each other, can be etched and filled with a conductive material 9 to obtain a structure that can be used to ground the main device layer 1 or electrically connect it to other related devices. Similarly, the main device layer 1 can be etched and filled with conductive material 9 to obtain a conductive structure that can electrically connect the lines leading out of the buffer layer 3 to the various devices in the main device layer 1.

[0053] In one embodiment, before the substrate layer 2 is bonded to the buffer layer 3, a substrate groove 4 is etched on the substrate layer 2 so that the substrate groove 4 and the first buffer surface form a buffer cavity, such as Figure 1 and Figure 4 As shown, the buffer cavity in the embodiment of the present application can block the stress transmission in the relatively vertical direction from the substrate layer 2 to the buffer layer and the main device layer 1 .

[0054] In one embodiment, an insulating layer may be provided between the buffer layer 3 and the main device layer 1 to isolate the circuits arranged on the second buffer surface from the main device layer 1 to prevent short circuits, adhesion, and other conditions that may affect the operation of the main device layer 1. The insulating layer may also include some support points, such as Figure 4 In the cavity between the buffer layer and the main device layer 1 shown in FIG, the shaded part of the square is an insulating support point. The structure of the insulating support point can be set on the buffer layer 3 or the main device layer 1. In order to simplify the process, the insulating support point can be set on the second buffer surface of the buffer layer 3. Illustratively, with respect to the adhesion phenomenon, generally after adhesion occurs, the adhesion force generated on the surface where the adhesion occurs is much greater than the elastic force of the MEMS structure, causing the movable structure to be unable to rebound and the device to fail. By setting the above-mentioned insulating support points (insulating stoppers), when the main device layer 1 or the buffer layer 3 is under stress, the facing area of adhesion caused by the maximum displacement can be reduced to ensure the normal operation of the chip.

[0055] In one embodiment, the buffer layer 3 and the substrate layer 2 may be connected via another buffer layer. The buffer layer may have a primary device layer on one side and a secondary device layer on the other side. There is no restriction on the number of buffer layers included in the chip, nor is there any restriction on the arrangement of devices on the buffer layers, which can be arranged as needed.

[0056] In one embodiment, the main device layer 1 is any one or more of an accelerometer, a gyroscope, a temperature / humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device. This is only an example of the device included in the main device layer 1 of the present application and does not limit the specific implementation of this solution. It can be set as needed. The embodiment of the present application provides a structural diagram of a main device layer 1 containing an accelerometer or a gyroscope, such as Figure 5 shown.

[0057] The aforementioned chip structure can resolve the problem in related technologies where stress is transferred to the sensitive structure 10 of the device layer, resulting in low accuracy of the output device signal. This improves the accuracy and stability of the obtained device signal. For example, in applications that directly characterize acceleration and angular velocity (such as mobile games and in-car navigation), the device signal obtained each time is highly accurate. The cumulative process can significantly reduce device signal errors, resulting in excellent attitude control effects or accurate navigation.

[0058] Based on the above Figure 4 、 5 The chip in the embodiment of the present application provides a structural schematic diagram of a chip including a main device layer 1 and a secondary device layer 11, as shown in FIG. Figure 6As shown, the chip further includes a secondary device layer 11, the first device surface of the secondary device layer 11 has a first device bonding area 12, the second device surface has a second device bonding area 13, and the secondary device layer 11 includes at least one device with a specific function;

[0059] The first device bonding area 12 is bonded to the substrate bonding area 5, and the substrate groove 8 and the first device surface form a buffer cavity;

[0060] The second device bonding area 13 is bonded to the first buffer bonding area 6, and the first buffer bonding area 6, the second buffer bonding area 7, the first device bonding area 12 and the second device bonding area 13 correspond to each other in position;

[0061] The auxiliary device layer 11 includes any one or more devices selected from the group consisting of an accelerometer, a gyroscope, a temperature sensor, a humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device.

[0062] In one embodiment, Figure 6 From the chip structure shown in the figure, it can be seen that the positions of the first buffer bonding area 6, the second buffer bonding area 7, the first device bonding area 12 and the second device bonding area 13 correspond to each other. This correspondence can ensure that during the bonding process, the main device layer 1, the auxiliary device layer 11, the buffer layer 3 and the substrate layer 2 provide mutual support force to prevent the bonding areas between layers from having empty grooves, which will lead to pressure deformation between layers and loose bonding connections.

[0063] In one embodiment, the first buffer surface and the second buffer surface of the buffer layer 3 can be connected to the auxiliary device layer 11 and the main device layer 1 respectively. The buffer layer 3 has a conductive structure to connect the devices in the main device layer 1 and the auxiliary device layer 11. The specific electrical connection method can be set as needed.

[0064] The chip structure of the above-mentioned dual-layer device can improve the integration of the IMU (inertial measurement unit), reduce the chip size, facilitate the miniaturization of intelligent hardware, and reduce costs. For example, if the main device layer 1 and the auxiliary device layer 11 of the chip include accelerometers and gyroscopes, the overall size of the accelerometers and gyroscopes is smaller than the overall size of the accelerometers and gyroscopes in the related art. Accordingly, the volume of the chip containing the accelerometer and gyroscope in this application is smaller than the volume of the chip containing the accelerometer and gyroscope in the related art.

[0065] Based on the above Figure 6The chip structure shown in the embodiment of the present application provides a double-layer chip structure, wherein the main device layer 1 includes an accelerometer and / or a gyroscope, and / or the auxiliary device layer 11 includes an accelerometer and / or a gyroscope; both the accelerometer and the gyroscope are provided with an electrode structure and a sensitive structure 10, and the relative position change between the sensitive structure 10 and the electrode structure is used to obtain inertia-related parameters.

[0066] In one embodiment, the present application provides a double-layer chip structure, such as Figure 7 As shown, an accelerometer or a gyroscope is provided in the main device layer 1 , and an accelerometer or a gyroscope is provided in the auxiliary device layer 11 .

[0067] In one embodiment, the eutectic bonding region 14 of the MEMS Cap on the main device layer 1 is bonded to the main device layer 1 .

[0068] In one embodiment, Figure 8 As shown, the accelerometers involved in the aforementioned chip structures may include an electrode structure, an anchor point 15, an elastic beam 16, and a movable mass structure (sensitive structure 10). The movable mass structure 10 is connected to the anchor point 15 via the elastic beam 16. The anchor point 15 is fixedly connected to the first buffer surface (accelerometer in the secondary device layer 11) or the second buffer surface (accelerometer in the main device layer 1) of the buffer layer 3. When the chip experiences acceleration, the movable mass structure 10 is displaced, and the elastic beam 16 is deformed as the movable mass structure 10 moves. The anchor point 15 supports the elastic beam and the movable mass structure 10 through the elastic beam 16.

[0069] Based on the above Figure 6-8 In the structure, an embodiment of the present application provides a schematic diagram of a double-layer chip structure, wherein the device type of the device in the main device layer 1 is the same as the device type of the corresponding device in the auxiliary device layer 11; or the device type of the device in the main device layer 1 is different from the device type of the corresponding device in the auxiliary device layer 11.

[0070] In one embodiment, the present application provides a schematic diagram of a chip structure in which the device type of the device in the main device layer 1 is the same as the device type of the corresponding device in the auxiliary device layer 11, as shown in FIG. Figure 9 As shown, in this example, the main device layer 1 and the auxiliary device layer 11 each include two devices. The devices that are opposite to each other and are in the same dotted box are of the same device type. The signals of the two devices can be differentially transmitted to further improve the accuracy of the device signals.

[0071] Based on the above chip structures and related embodiments, the present application provides a chip structure in which the buffer layer 3 has a groove 17 or a through groove 18, such as Figure 10 and Figure 11As shown, a groove 17 or a through groove 18 is provided between the sensitive area and the bonding area of the buffer layer 3. The sensitive area is the area corresponding to the sensitive structure in the main device layer 1 and / or the auxiliary device layer 11, and the bonding area is the area corresponding to the first buffer bonding area 6 and the second buffer bonding area 7.

[0072] In one embodiment, Figure 10 In the embodiment, the groove 17 is in the same vertical direction. The groove 17 can be etched on both the first buffer surface and the second buffer surface, or only on the first buffer surface or the second buffer surface. If only one groove 17 is etched in the same vertical direction, the groove can be set on the first buffer surface or the second buffer surface in different areas of the buffer layer 3. In this way, the main stress transmission path of the buffer layer MEMS stress bufferwafer is grooved to reduce the stress effect. The through groove 18 is dug into the main stress transmission path of the buffer layer MEMS stress bufferwafer to further reduce the stress effect.

[0073] In one embodiment, the present application provides a schematic diagram of the location of the groove 17 or the through groove 18 of the buffer layer 3, as shown in FIG. Figure 12 This figure shows the MEMS Cap layer through the lens, looking down at the MEMS stress buffer (shaded area with a slash), which includes the grooved (white) area.

[0074] Based on the above Figures 4 to 11 The chip structure and related embodiments thereof, the present application embodiment provides a chip manufacturing method, such as Figure 13 As shown, including:

[0075] Step 1301: Prepare a substrate layer and a buffer layer based on a deposition and etching process. The substrate layer is provided with a substrate groove and a substrate bonding area on the same side as the substrate groove. The buffer layer has a first buffer bonding area on a first buffer surface and a second buffer bonding area on a second buffer surface.

[0076] Step 1302: Based on a bonding process, the first buffer bonding region is bonded to the substrate bonding region to form a bonded connection. A main device layer is prepared on the second buffer surface of the buffer layer, so that the second buffer bonding region is bonded to the main device layer. The substrate groove and the first buffer surface form a buffer cavity. The main device layer includes at least one device with a specific function, and the first buffer bonding region and the second buffer bonding region are positioned correspondingly.

[0077] The main device layer includes any one or more devices selected from the group consisting of an accelerometer, a gyroscope, a temperature sensor, a humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device.

[0078] In one embodiment, the deposition process may include depositing an insulating material to obtain an insulating layer, depositing a metal conductive material to obtain a conductive layer, and the like.

[0079] In one embodiment, the etching process includes etching the substrate layer and the buffer layer, and etching the deposited insulating material and the conductive material to obtain the corresponding circuit structure.

[0080] In one embodiment, the substrate groove is formed by etching, while the substrate bonding area, first buffer bonding area, and second buffer bonding area are formed by deposition. The buffer cavity formed by the substrate groove and the first buffer surface can block stress transfer and ensure the accuracy of device signals in the main device layer.

[0081] In one embodiment, the first and second buffer bonding areas are positioned relative to each other, meaning that, at the chip cross-section angle, their upper and lower projections overlap. This allows the first and second buffer bonding areas to support each other during bonding, improving bonding reliability.

[0082] Based on the above Figure 13 In the method flow, an embodiment of the present application provides a method for manufacturing a double-layer chip. In step 1302, after preparing the main device layer on the second buffer surface of the buffer layer, the first buffer bonding area is bonded to the substrate bonding area to form a bonding connection, including:

[0083] Step 1401: Based on a bonding process, prepare an auxiliary device layer on a first buffer surface, so that the first buffer bonding area forms a bonding connection with a second device bonding area on a second device surface of the auxiliary device layer, wherein the auxiliary device layer includes at least one device with a specific function;

[0084] Step 1402: Bonding a first device bonding region on a first device surface of the auxiliary device layer to a substrate bonding region to form a bonded connection, wherein the substrate groove and the first device surface form a buffer cavity, and the first buffer bonding region, the second buffer bonding region, the first device bonding region, and the second device bonding region are positioned correspondingly.

[0085] The auxiliary device layer includes any one or more devices selected from the group consisting of an accelerometer, a gyroscope, a temperature sensor, a humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device.

[0086] In one embodiment, the secondary device layer is positioned between the buffer layer and the substrate layer, and the first buffer bonding area, the second buffer bonding area, the first device bonding area, and the second device bonding area are positioned in correspondence with each other. This means that, at the chip cross-section angle, the first buffer bonding area, the second buffer bonding area, the first device bonding area, and the second device bonding area overlap in their upper and lower projections. This allows the first device bonding area, the second device bonding area, the first buffer bonding area, and the second buffer bonding area to support each other during the bonding process, improving bonding reliability.

[0087] Here, the embodiment of the present application provides a schematic diagram of the cross-section bonding area of a chip, such as Figure 14 As shown in the figure, through the bonding material, the lower surface of wafer 1 and the upper surface of wafer 2 are 100% vertically interconnected, and the force is evenly distributed during the bonding process. During each bonding process, there is a solid object under the bonding point, and there is no overhang, ensuring that the bonding surface is fully combined and there is no void. In related technologies, such as Figure 15 As shown, the bonding between the mutually bonded wafers is incomplete. When wafer 1 is bonded to wafer 2, wafer 2 is suspended below the impact implementation point, resulting in insufficient bonding at that point and voids, which leads to unreliable bonding and affects chip performance.

[0088] Based on the above-mentioned method for manufacturing a double-layer chip, an embodiment of the present application provides another method for manufacturing a double-layer chip, wherein the main device layer includes an accelerometer and / or a gyroscope, and / or the auxiliary device layer includes an accelerometer and / or a gyroscope; the main device layer is prepared on the second buffer surface of the buffer layer, including: based on a deposition and etching process, an accelerometer or gyroscope including an electrode structure and a sensitive structure is prepared on the second buffer surface of the buffer layer; the auxiliary device layer is prepared on the first buffer surface, including: based on a deposition and etching process, an accelerometer or gyroscope including an electrode structure and a sensitive structure is prepared on the first buffer surface, and the relative position change between the sensitive structure and the electrode structure is used to obtain inertia-related parameters.

[0089] Based on the above Figure 13 The method in this application embodiment provides a chip manufacturing method, which includes, in step 1302, after preparing the main device layer on the second buffer surface of the buffer layer, further comprising:

[0090] Etching is performed between the sensitive area and the bonding area of the buffer layer to form grooves or through-holes in the buffer layer. The sensitive area corresponds to the sensitive structure in the main device layer and / or the auxiliary device layer, and the bonding area corresponds to the first buffer bonding area and the second buffer bonding area. In this way, the substrate grooves can isolate stress transmitted in the vertical direction of the chip cross-section, while the grooves or through-holes in the buffer layer can isolate stress transmitted in the horizontal plane of the chip cross-section, significantly reducing the impact of stress on the accuracy of device signals in the chip and improving device signal accuracy.

[0091] Based on the above Figures 4 to 12 The chip structures and related embodiments shown, and Figure 13 The chip manufacturing process and its related embodiments are shown. The embodiment of the present application provides a top view of a chip, such as Figure 16 As shown, the MEMS cap wafer cover structure is hidden in this figure. 1601: Metal - Aluminum trace, 1602: X-axis accelerometer - anchor point, 1603: X-axis accelerometer - elastic beam, 1604: X-axis accelerometer - capacitor comb, 1605: X-axis accelerometer - mass block, 1606: X-axis accelerometer - Pad, 1607: X-axis accelerometer - fixed comb, 1608: X-axis accelerometer - fixed comb, 1609: X-axis accelerometer - movable comb, 1610: Z-axis stopper, 1611: MEMS sensitive structure layer, 1612: MEMS stress buffer layer, 1613: Z-axis lower electrode, 1614: Metal-aluminum trace, 1615: Z-axis accelerometer-Pad, 1616: Bonding layer-germanium, 1617: Bonding layer-aluminum, 1618: Z-axis accelerometer-mass block, 1619: Z-axis accelerometer-anchor point, 1620: MEMS stress buffer layer through hole, 1621: Z-axis accelerometer-elastic beam.

[0092] Based on the above-mentioned method processes, an embodiment of the present application provides a double-layer chip manufacturing method, as shown in FIG17 , comprising:

[0093] S1. Prepare and clean the MEMS stress buffer wafer (3). High-resistance silicon is generally used for electrical insulation. In other words, to prevent the entire buffer layer from having conductive properties, high-resistance silicon is used. In the next step, the blind vias do not need an insulating layer to prevent the buffer layer from separating the electrical energy conducted by the blind via filling material.

[0094] S2, back-etching blind holes. This serves as a channel for interconnecting the upper and lower surfaces of the subsequent MEMS stress buffer wafer (3)(3).

[0095] S3: The metal material used to fill the blind vias. Usually, tungsten or copper is used.

[0096] S4. The lower surface of the MEMS stress buffer wafer (3) is ground flat and excess metal is removed.

[0097] S5. Silicon oxide SiOx is deposited on the lower surface of the MEMS stress buffer wafer (3) to insulate it from the substrate.

[0098] S6, silicon oxide openings are made to facilitate subsequent metal routing and metal interconnection within the through-holes.

[0099] S7: Deposit a metal layer, typically aluminum, which will later serve as the traces. S8: Etch the metal to form the trace metal into the desired pattern. S9: Deposit silicon oxide. S10: Etch the silicon oxide. Steps S7-S10 can be repeated one or two times as needed to form two or three metal layers.

[0100] S11. Etching silicon oxide to form a low stopper structure.

[0101] S12. Using silicon-silicon oxide bonding, the lower surface of the MEMS stress buffer (3) is bonded to a silicon wafer, which is generally made of low-resistance silicon.

[0102] S13, turning to the upper surface process of the MEMS stress buffer wafer (3), thinning to the through hole.

[0103] S14. Depositing silicon oxide.

[0104] S15, silicon oxide openings are made to facilitate subsequent metal routing and metal interconnection within the through-holes.

[0105] S16. Deposit a metal layer, typically aluminum, which will be used as wiring later.

[0106] S17, etching the metal to form the designed pattern of the routing layer metal.

[0107] S18. Depositing silicon oxide. Silicon oxide is an insulating material and may be replaced with other alternative insulating materials, such as silicon dioxide.

[0108] S19, etching silicon oxide.

[0109] S20, etching silicon oxide to form a low stopper structure.

[0110] S21. If necessary, a stress relief groove is arranged in the MEMS stress buffer (3) layer, and a through groove or a half-depth groove is etched.

[0111] S22. Using silicon-silicon oxide bonding, the lower surface of the MEMS stress buffer (3) is bonded to a silicon wafer, which is generally made of low-resistance silicon.

[0112] S23, back thinning.

[0113] S24. Deep etching to form a through hole.

[0114] S25. Filling the through silicon vias, usually with metal tungsten or copper.

[0115] S26. Deposit metal, usually aluminum.

[0116] S27. Etching aluminum.

[0117] S28. Deep etching to release the MEMS structure.

[0118] S29, MEMS substrate (2) cleaning, generally choose high-resistance silicon

[0119] S30, depositing an oxide layer.

[0120] S31, etching the oxide layer.

[0121] S32, deep etching to form a cavity. Here, if the chip needs to have a shielding function, the substrate can be made of normal silicon and grounded to eliminate the electric field effect. If the chip does not need to have a shielding function, the substrate can be made of normal silicon or high-resistance silicon.

[0122] S33, bonding. Bond the structure formed in S32 - MEMS substrate (2) to the structure formed in S28. If the MEMS structure in the cavity is an accelerometer, low vacuum is used; if it is a gyroscope / resonator, high vacuum is used.

[0123] S34, front thinning.

[0124] S35. Deep etching to form a through hole.

[0125] S36, filling the through hole.

[0126] S37, depositing metal.

[0127] S38, etching metal.

[0128] S39, deep etching to release the MEMS structure.

[0129] S40: Deposit bonding metal on the MEMS Cap wafer (sealing cover).

[0130] S41. Etching metal.

[0131] S42, deep etching to form a MEMS cap cavity.

[0132] S43, bonding, bonding the structure formed in S39 to the MEMS cap wafer.

[0133] Here, the bonding portion of the structure formed by the MEMS cap wafer and S39 can be aluminum-germanium bonding to form a eutectic

[0134] S44, MEMS Cap thinning.

[0135] S45, cut (saw), open the window above the pad openpad window.

[0136] It should be noted here that the above method process steps are not unique and are only used to explain the scheme in this application. For example, S29-S32 is the process of preparing the substrate layer, S40-S42 is the process of preparing the MEMS cap cover structure, S29-S32 can be executed before or after any step before S33, S40-S42 can be executed before or after any step before S43, and S21 can be executed or not.

[0137] In addition, in one embodiment, the buffer layer can be provided in multiple layers in one chip, such as Figure 18 As shown in FIG. 1 , a schematic diagram of a chip structure with a multi-layer buffer layer 3 provided in an embodiment of the present application is provided. Accordingly, in the manufacturing process, any buffer layer 3 in the multi-layer buffer layer 3 can be used to prepare a main device layer and a secondary device layer based on the buffer layer 3, and finally the prepared buffer layers 3 with the main device layer and the secondary device layer are bonded to each other, that is, a hybrid bonding method is adopted to bond the upper and lower structures together to realize the design of a double buffer layer and four MEMS structure layers. Afterwards, packaging is performed to obtain a chip with a multi-layer buffer layer 3, as shown in FIG. Figure 19 As shown, it is a brief schematic diagram of a method for preparing a chip with a multi-layer buffer layer 3 provided in an embodiment of the present application. In addition, it should be noted that if there is a main device layer or a sub-device layer close to the substrate layer 2 and the upper packaging cover MEMS Cap in the chip, the device structure in the main device layer or the sub-device layer can be prepared by the corresponding process after hybrid bonding.

[0138] This method significantly reduces the impact of stress by blocking the vertical path of stress transmission through substrate grooves. Stress transmission occurs only along horizontal paths. This improved stress provides a broader range of scenarios and more possibilities for high-precision applications. Furthermore, the introduction of a buffer layer enables the implementation of dual MEMS sensitive layers in a vertical direction. If the upper and lower components are of the same type, the stress impact can be further reduced by differentiating them. If the upper and lower components are of different types, vertical integration can reduce the overall size of the chip, significantly improving miniaturization. Furthermore, for designs with the same upper and lower components, in high-reliability applications such as automotive applications, one component can be used as the primary component and the other as a backup, significantly improving safety.

[0139] Based on the above Figures 4 to 12 The chip structures and corresponding embodiments thereof, the embodiment of the present application provides an electronic device, which can be used in the electronic device Figures 4 to 12 And any chip composition in each corresponding embodiment.

[0140] Those skilled in the art will understand that Figures 4 to 12 The chip structure shown in FIG, and Figure 13 The chip manufacturing process shown in Figure 17 does not constitute a limitation on the chip and its manufacturing method, and may include more or fewer process steps and structures than shown in the figure. It can be understood that without departing from the conceptual scope of the chip manufacturing method and the chip obtained by the embodiment of the present application, all simple variations (including replacement of equivalent process steps, reduction or addition of conventional process steps, replacement of equivalent materials and replacement of equivalent structures, etc.) should be within the scope of protection of this application.

Claims

1. A chip, characterized in that: The chip comprises a main device layer, a substrate layer, and a buffer layer. The substrate layer is provided with a substrate groove and a substrate bonding area on the same side as the substrate groove. The buffer layer has a first buffer bonding area on a first buffer surface and a second buffer bonding area on a second buffer surface. The first buffer bonding area is bonded to the substrate bonding area, and the substrate groove and the first buffer surface form a buffer cavity; The second buffer bonding area is bonded to the main device layer, the main device layer includes at least one device with a specific function, and the positions of the first buffer bonding area and the second buffer bonding area correspond to each other; The main device layer includes any one or more devices selected from the group consisting of an accelerometer, a gyroscope, a temperature sensor, a humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device.

2. The chip according to claim 1, wherein: The chip further comprises a secondary device layer, wherein a first device surface of the secondary device layer comprises a first device bonding region, a second device surface of the secondary device layer comprises a second device bonding region, and the secondary device layer comprises at least one device having a specific function; The first device bonding region is bonded to the substrate bonding region, and the substrate groove and the first device surface form a buffer cavity; The second device bonding area is bonded to the first buffer bonding area, and the first buffer bonding area, the second buffer bonding area, the first device bonding area, and the second device bonding area are located correspondingly; The auxiliary device layer includes any one or more devices selected from the group consisting of an accelerometer, a gyroscope, a temperature sensor, a humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device.

3. The chip according to claim 2, wherein: The main device layer includes an accelerometer and / or a gyroscope, and / or the auxiliary device layer includes an accelerometer and / or a gyroscope; the accelerometer and the gyroscope are both provided with an electrode structure and a sensitive structure, and the relative position change between the sensitive structure and the electrode structure is used to obtain inertia-related parameters.

4. The chip according to claim 2, wherein: The device type of the devices in the main device layer is the same as the device type of the corresponding devices in the auxiliary device layer; Or the device type of the devices in the main device layer is different from the device type of the corresponding devices in the secondary device layer.

5. The chip according to any one of claims 1 to 4, wherein: A groove or a through groove is provided between the sensitive area and the bonding area of the buffer layer, the sensitive area is the area corresponding to the sensitive structure in the main device layer and / or the auxiliary device layer, and the bonding area is the area corresponding to the first buffer bonding area and the second buffer bonding area.

6. An electronic device, characterized in that: The electronic device comprises the chip according to any one of claims 1 to 5.

7. A method for manufacturing a chip, characterized in that: include: Based on deposition and etching processes, a substrate layer and a buffer layer are prepared, wherein the substrate layer is provided with a substrate groove and a substrate bonding area on the same side as the substrate groove, and the buffer layer has a first buffer bonding area on a first buffer surface and a second buffer bonding area on a second buffer surface; Based on a bonding process, the first buffer bonding area is bonded to the substrate bonding area to form a bonded connection, and a main device layer is prepared on the second buffer surface of the buffer layer, so that the second buffer bonding area is bonded to the main device layer, the substrate groove and the first buffer surface form a buffer cavity, the main device layer includes at least one device with a specific function, and the positions of the first buffer bonding area and the second buffer bonding area correspond to each other; The main device layer includes any one or more devices selected from the group consisting of an accelerometer, a gyroscope, a temperature sensor, a humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device.

8. The method according to claim 7, wherein After preparing a main device layer on the second buffer surface of the buffer layer, bonding the first buffer bonding area to the substrate bonding area to form a bonding connection includes: Based on a bonding process, a secondary device layer is prepared on the first buffer surface, so that the first buffer bonding area forms a bonding connection with the second device bonding area on the second device surface of the secondary device layer, and the secondary device layer includes at least one device with a specific function; Bonding a first device bonding region on the first device surface of the auxiliary device layer to the substrate bonding region to form a bonding connection, wherein the substrate groove and the first device surface form a buffer cavity, and the first buffer bonding region, the second buffer bonding region, the first device bonding region, and the second device bonding region are located correspondingly; The auxiliary device layer includes any one or more devices selected from the group consisting of an accelerometer, a gyroscope, a temperature sensor, a humidity sensor, a micro-electromechanical resonator, a micro-electromechanical galvanometer, and a micro-electromechanical switch device.

9. The method according to claim 8, wherein The main device layer includes an accelerometer and / or a gyroscope, and / or the auxiliary device layer includes an accelerometer and / or a gyroscope; Preparing a main device layer on the second buffer surface of the buffer layer, comprising: Based on a deposition and etching process, preparing the accelerometer or the gyroscope including an electrode structure and a sensitive structure on the second buffer surface of the buffer layer; Preparing a secondary device layer on the first buffer surface comprises: Based on deposition and etching processes, the accelerometer or the gyroscope including an electrode structure and a sensitive structure is prepared on the first buffer surface, and the relative position change between the sensitive structure and the electrode structure is used to obtain inertia-related parameters.

10. The method according to claim 7, wherein: The method further comprises, after preparing the main device layer on the second buffer surface of the buffer layer based on the bonding process: Performing etching between the sensitive area and the bonding area of the buffer layer to obtain a groove or a through groove on the buffer layer; The sensitive region is a region corresponding to the sensitive structure in the main device layer and / or the auxiliary device layer, and the bonding region is a region corresponding to the first buffer bonding area and the second buffer bonding area.

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