Semiconductor module arrangement, electronic component carrier for semiconductor module arrangement, and method for producing semiconductor module arrangement

By setting a sealing gasket between the connector element and the electronic device carrier, the poor electrical connection problem caused by the infiltration of the encapsulation material is solved, ensuring the electrical connection stability and test accuracy of the semiconductor module device.

CN120511235APending Publication Date: 2025-08-19INFINEON TECHNOLOGIES AG
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Patent Information

Application Number
CN202510169103.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-02-19
Filing Date
2025-02-17
Publication Date
2025-08-19

AI Technical Summary

Technical Problem

In existing semiconductor module devices, the electrical ports of the connector elements are easily coated by the encapsulation material, resulting in poor electrical connections or contamination of the measurement adapter, affecting the reliability and test accuracy of the electrical connection.

Method used

A sealing gasket is provided between the lower end of the connector element and the electronic device carrier to seal the gap to prevent infiltration of the encapsulation material and ensure reliability of the electrical connection.

Benefits of technology

Effectively prevent the encapsulation material from entering the connector element, ensure the stability and reliability of the electrical connection, and avoid contamination of the poor electrical connection and measurement adapter.

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Abstract

The invention relates to a semiconductor module arrangement, to an electronic component carrier for a semiconductor module arrangement, and to a method for producing a semiconductor module arrangement. A semiconductor module apparatus includes a housing, an electronics carrier disposed inside the housing or forming a bottom of the housing, a connector element disposed on and electrically coupled to the electronics carrier, and a sealing gasket surrounding a lower end of the connector element, the lower end is an end of the connector element facing the electronics carrier, and wherein the sealing gasket is arranged to seal a gap between the lower end of the connector element and the electronics carrier.
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Description

Technical Field

[0001] The present disclosure relates to a semiconductor module arrangement, an electronics carrier for a semiconductor module arrangement, and a method for producing a semiconductor module arrangement. Background Art

[0002] A semiconductor module device typically includes at least one semiconductor substrate arranged in a housing. A semiconductor device including multiple controllable semiconductor elements (e.g., two IGBTs in a half-bridge configuration) is arranged on each of the at least one substrate. Each substrate typically includes a substrate layer (e.g., a ceramic layer), a first metallization layer deposited on a first side of the substrate layer, and a second metallization layer deposited on a second side of the substrate layer. The controllable semiconductor elements are mounted on, for example, the first metallization layer. The second metallization layer can optionally be attached to a base plate. Some semiconductor module devices also include a printed circuit board arranged away from and parallel to the substrate. The printed circuit board can also be arranged inside the housing. Multiple different electrical or conductive components (e.g., semiconductor elements, terminal elements, connecting elements, etc.) can be arranged on the substrate and / or the printed circuit board. One or more connector elements can be arranged on at least one substrate and / or the printed circuit board. One or more connector elements allow electrical contact with the substrate and / or the printed circuit board from outside the housing.

[0003] The semiconductor module arrangement typically also includes an encapsulation that at least partially fills the interior of the housing, thereby covering the substrate and any semiconductor body arranged thereon, and also partially covering one or more connector elements. In order to form the encapsulation, a liquid or viscous encapsulating material is filled into the housing and subsequently hardened / cured. Before it is sufficiently hardened / cured, the liquid or viscous encapsulating material may penetrate into the one or more connector elements due to capillary effects or adhesion effects. As a result, the electrical ports of one or more connector elements may be at least partially coated by the encapsulating material. When the corresponding counterparts are subsequently inserted into the one or more connector elements, any encapsulating material coating the electrical ports may result in a poor electrical connection between the one or more connector elements and their corresponding counterparts, or the measurement adapter may be contaminated during electrical testing of the component.

[0004] There is a need for a semiconductor module arrangement, an electronic device carrier for a semiconductor module arrangement, and a method for producing a semiconductor module arrangement that can overcome the above-mentioned disadvantages. Summary of the Invention

[0005] A semiconductor module arrangement comprises a housing, an electronic device carrier arranged inside the housing or forming a bottom of the housing, a connector element arranged on the electronic device carrier and electrically coupled to the electronic device carrier, and a sealing gasket surrounding a lower end of the connector element, wherein the lower end is an end of the connector element facing the electronic device carrier, and wherein the sealing gasket is arranged to seal a gap between the lower end of the connector element and the electronic device carrier.

[0006] An electronic device carrier for a semiconductor module arrangement comprises: a connector element arranged on the electronic device carrier and electrically coupled to the electronic device carrier; and a sealing gasket surrounding a lower end of the connector element, wherein the lower end is an end of the connector element facing the electronic device carrier, and wherein the sealing gasket is arranged to seal a gap between the lower end of the connector element and the electronic device carrier.

[0007] A method includes: arranging a connector element on an electronic device carrier for a semiconductor module arrangement; forming a sealing gasket so that the sealing gasket surrounds a lower end of the connector element, wherein the lower end is an end of the connector element facing the electronic device carrier, and wherein the sealing gasket is arranged to seal a gap between the lower end of the connector element and the electronic device carrier.

[0008] The present invention may be better understood with reference to the following drawings and description. The components in the drawings are not necessarily drawn to scale, but rather are intended to illustrate the principles of the present invention. In addition, in the drawings, like reference numerals indicate corresponding parts throughout the different views. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a cross-sectional view of a semiconductor module device.

[0010] Figure 2 is a cross-sectional view of another semiconductor module device.

[0011] Figure 3 is a side view of the connector component.

[0012] Figure 4 is a 3D view of the connector component.

[0013] Figure 5 is a top view of the connector components.

[0014] Figure 6 is a cross-sectional view of the connector components and sealing gasket arranged on a printed circuit board.

[0015] Figure 7 is a cross-sectional view of a semiconductor module device according to an embodiment of the present disclosure.

[0016] Figure 8is a cross-sectional view of a semiconductor module arrangement according to another embodiment of the present disclosure. DETAILED DESCRIPTION

[0017] In the following detailed description, reference is made to the accompanying drawings. The accompanying drawings show specific examples in which the present invention can be practiced. It should be understood that, unless expressly stated otherwise, the features and principles described with respect to the various examples can be combined with each other. In the specification and the claims, the designation of certain elements as "first element", "second element", "third element", etc. should not be understood as enumerative. On the contrary, such designations are only used to refer to different "elements". That is, for example, the presence of a "third element" does not require the presence of a "first element" and a "second element". The wires or electrical connections described herein can be a single conductive element, or include at least two separate conductive elements connected in series and / or in parallel. The wires and electrical connections can include metal and / or semiconductor materials and can be permanently conductive (i.e., non-switchable). The semiconductor body described herein can be made of (doped) semiconductor material and can be a semiconductor chip or be included in a semiconductor chip. The semiconductor body has electrical connection pads and includes at least one semiconductor element having electrodes.

[0018] refer to Figure 1 , schematically shows a cross-sectional view of a semiconductor module arrangement 100. Semiconductor module arrangement 100 includes a housing 7 and an electronics carrier. The electronics carrier is implemented as a substrate 10. Substrate 10 includes a dielectric insulation layer 11, a (structured) first metallization layer 111 attached to dielectric insulation layer 11, and a (structured) second metallization layer 112 attached to dielectric insulation layer 11. Dielectric insulation layer 11 is disposed between first metallization layer 111 and second metallization layer 112.

[0019] Each of the first metallization layer 111 and the second metallization layer 112 may be composed of or include one of the following materials: copper; a copper alloy; aluminum; an aluminum alloy; or any other metal or alloy that remains solid during operation of the semiconductor module device. Substrate 10 may be a ceramic substrate, i.e., a substrate in which dielectric insulating layer 11 is a ceramic (e.g., a thin ceramic layer). The ceramic may be composed of or include one of the following materials: aluminum oxide; aluminum nitride; zirconium oxide; silicon nitride; boron nitride; or any other dielectric ceramic. For example, dielectric insulating layer 11 may be composed of or include one of the following materials: Al2O3, AlN, SiC, BeO, or Si3N4. For example, substrate 10 may be a direct copper bonding (DCB) substrate, a direct aluminum bonding (DAB) substrate, or an active metal brazing (AMB) substrate. Furthermore, substrate 10 may be an insulated metal substrate (IMS). The insulated metal substrate typically includes a dielectric insulating layer 11, which includes a (filling) material such as an epoxy resin or polyimide. For example, the material of the dielectric insulating layer 11 can be filled with ceramic particles. Such particles can include, for example, SiO2, Al2O3, AlN, or BN, and can have a diameter between about 1 μm and about 50 μm. The electronic device carrier can also be a conventional printed circuit board (PCB) having a non-ceramic dielectric insulating layer 11. For example, the non-ceramic dielectric insulating layer 11 can be composed of a cured resin or include a cured resin.

[0020] The substrate 10 is arranged in the housing 7. Figure 1 In the illustrated example, substrate 10 forms the grounding surface of housing 7, while housing 7 itself comprises only sidewalls and a cover or lid. However, this is merely an example. For example, the cover or lid may be omitted. It is also possible that substrate 10 is disposed on a base plate that forms the grounding surface of housing 7, or that housing 7 further comprises a grounding surface, and substrate 10 and, optionally, the base plate, are disposed within housing 7. In some semiconductor module arrangements 100, more than one substrate 10 is disposed on a single base plate 12 or on the grounding surface of housing 7.

[0021] One or more semiconductor bodies 20 may be arranged on at least one substrate 10. Each of the semiconductor bodies 20 arranged on the at least one substrate 10 may include a diode, an IGBT (insulated gate bipolar transistor), a MOSFET (metal oxide semiconductor field effect transistor), a JFET (junction field effect transistor), a HEMT (high electron mobility transistor), and / or any other suitable semiconductor element.

[0022] One or more semiconductor bodies 20 may form a semiconductor device on the substrate 10. Figure 1In FIG. 2 , only two semiconductor bodies 20 are shown by way of example. Figure 1 The second metallization layer 112 of the substrate 10 is a continuous layer. Figure 1 In the example shown, the first metallization layer 111 is a structured layer. "Structured layer" means that the first metallization layer 111 is not a continuous layer, but comprises recesses between different sections of the layer. Figure 1 Such a recess is schematically shown in . In this example, the first metallization layer 111 includes three different segments. However, this is only an example. Any other number of segments is possible. Different semiconductor bodies 20 can be mounted to the same or different segments of the first metallization layer 111. The different segments of the first metallization layer 111 may not have an electrical connection, or may be electrically connected to one or more other segments using an electrical connector 3 (e.g., a bonding wire). For example, to name just a few examples, the electrical connector 3 may also include a bonding ribbon, a connecting plate, or a conductor track. One or more semiconductor bodies 20 can be electrically and mechanically connected to the substrate 10 via a conductive connection layer 60. For example, such a conductive connection layer 60 may be a solder layer, a conductive adhesive layer, or a sintered metal powder (e.g., a sintered silver powder) layer.

[0023] According to other examples, it is also possible that the second metallization layer 112 is a structured layer. It is also possible to completely omit the second metallization layer 112. For example, the first metallization layer 111 can also generally be a continuous layer.

[0024] Figure 1 The semiconductor module device 100 shown also includes terminal elements 4. A first group of terminal elements 4 is electrically connected to the first metallization layer 111 and provides an electrical connection between the interior and the exterior of the housing 7. The first group of terminal elements 4 can be electrically connected to the first metallization layer 111 via a first end 41, while the second end 42 of each of the first group of terminal elements 4 protrudes from the housing 7. The first group of terminal elements 4 can be electrically contacted from the exterior of the housing 7 at their respective second ends 42. A first portion of the first group of terminal elements 4 can extend through the interior of the housing 7 in a vertical direction y. The vertical direction y is a direction perpendicular to the top surface of the substrate 10, wherein the top surface of the substrate 10 is the surface on which at least one semiconductor body 20 is mounted. However, Figure 1 The terminal elements 4 shown are only examples. The terminal elements 4 can be implemented in any other way and can be arranged at any position within the housing 7. For example, one or more terminal elements 4 can be arranged further away from the side wall of the housing 7. The first end 41 of the terminal element 4 can be connected to the conductive connecting layer (in the Figure 1The first end 41 of the terminal element 4 may also be electrically coupled to the substrate 10 via one or more electrical connectors 3.

[0025] Figure 1 The semiconductor module device 100 shown also includes an additional electronic device carrier. The additional electronic device carrier in this example is implemented as a printed circuit board 81. The printed circuit board 81 is arranged inside the housing 7 and can be coupled to a first group of terminal elements 4, and can further be coupled to a second group of terminal elements 4. The second group of terminal elements 4 can include shorter terminal elements arranged completely inside the housing 7. For example, the printed circuit board 81 can be electrically and mechanically coupled to the second ends 42 of the terminal elements of the second group. The first group of terminal elements 4 can extend from the substrate 10 to the outside of the housing 7 through through-holes in the printed circuit board 81.

[0026] For example, by arranging an additional electronic device carrier (e.g., printed circuit board 81) within housing 7, semiconductor module arrangement 100 can be implemented in a compact and space-saving manner. This is because at least a group of components that are typically arranged on substrate 10 or on an external printed circuit board (a printed circuit board arranged outside housing 7) can be arranged on internal printed circuit board 81 instead of on substrate 10 or the external printed circuit board. In other words, some (or all) components can be arranged on printed circuit board 81 within housing 7, while other (or no) components are arranged on the (optional) external printed circuit board. As a result, the size of substrate 10 and / or external printed circuit board can be reduced compared to an arrangement that includes only substrate 10, or includes substrate 10 and an external printed circuit board outside housing 7 without including printed circuit board 81 within housing 7.

[0027] The semiconductor module arrangement 100 further comprises an encapsulation 5. For example, the encapsulation 5 may consist of or comprise silicone gel, or may be a rigid molding compound. The encapsulation 5 may at least partially fill the interior of the housing 7, thereby covering the components and electrical connections arranged on the substrate 10. In order to protect the printed circuit board 81 within the housing 7 and the components arranged on the printed circuit board 81 from certain environmental conditions and mechanical damage, the printed circuit board 81 may optionally also be covered by the encapsulation 5. The terminal elements 4 may be at least partially embedded in the encapsulation 5. However, at least the second end 42 of the first group is not covered by the encapsulation 5 and protrudes from the encapsulation 5 through the housing 7 to the outside of the housing 7. The encapsulation 5 is configured to protect the components and electrical connections of the semiconductor module 100, in particular the components arranged on the substrate 10 inside the housing 7 from certain environmental conditions and mechanical damage.

[0028] As described above, the substrate 10 and the internal printed circuit board 81 may be electrically coupled to the exterior of the housing 7 via one or more terminal elements 4. However, for some applications, one or more connector elements 22 are provided which are configured to (further) form an electrical connection to the exterior of the housing 7. Figure 1 , a connector element 22 is schematically shown, and the connector element 22 is arranged on a printed circuit board 81. Figure 2 , schematically shows a semiconductor module device without a printed circuit board 81. In this case, the connector element 22 is arranged on the substrate 10. That is, in general, the semiconductor module device according to the embodiment of the present disclosure includes the connector element 22 arranged on the electronic device carrier (substrate 10 or printed circuit board 81). Figure 1 and Figure 2 , only one connector element 22 is shown by way of example. However, the semiconductor module arrangement may also include more than one connector element 22.

[0029] The connector element 22 generally includes an electrically insulating housing 220 and a plurality of electrical ports 222, wherein each of the plurality of electrical ports 222 is partially molded into the electrically insulating housing 220. Figure 3 、 Figure 4 and Figure 5 It is schematically shown in FIG, wherein, Figure 3 shows a side view, Figure 4 A three-dimensional view is shown, and Figure 5A top view of an exemplary connector element 22 is shown. The connector element 22 can be considered a socket. A corresponding counterpart can be inserted into the connector element 22 to electrically contact the semiconductor module device 100 from outside the housing 7. The connector element 22 is generally a relatively simple element and is typically manufactured by an injection molding process. By the injection molding process, the electrical port 222 can be molded into the material forming the housing 220. The housing 220 can provide a cavity 224 surrounded by the side walls of the connector element 22, and the electrical port 222 can extend into the cavity 224 with a first end. The second end of the electrical port 222 can extend out of the housing 220 at the lower end (bottom) of the housing 220, wherein the lower end is the end of the connector element 22 that is configured to be connected to the electronic device carrier 10, 81. In the case where the electrical port 222 extends through the housing 220, there is a risk of a small cavity remaining between the electrical port 222 and the housing 220. When forming the enclosure 5, a liquid or viscous encapsulating material is filled into the housing 7 and subsequently hardened to form the enclosure 5. Any connector element 22 arranged on the substrate 10 or printed circuit board 81 is typically partially covered by the encapsulating material. The top side of the connector element 22 typically remains free of encapsulating material so that it can be contacted by a corresponding counterpart. When the encapsulating material is still liquid or viscous, there is a risk that the encapsulating material will enter the cavity 224 through the tiny cavity between the electrical port 222 and the housing 220 due to capillary effects (in the case of the connector 224). Figure 3 ). Such encapsulating material may at least partially coat the end of the electrical port 222 that extends into the cavity 224, which may result in a poor electrical connection between the connector element 22 and a corresponding counterpart.

[0030] Thus, a semiconductor module arrangement 100 according to an embodiment of the present disclosure includes: a housing 7; an electronic device carrier 10, 81 arranged inside the housing 7 or forming the bottom of the housing 7; a connector element 22 arranged on the electronic device carrier 10, 81 and electrically coupled to the electronic device carrier 10, 81; and a sealing gasket 90 surrounding the lower end of the connector element 22, wherein the lower end is the end of the connector element 22 facing the electronic device carrier 10, and wherein the sealing gasket 90 is arranged to seal the gap between the lower end of the connector element 22 and the electronic device carrier 10, 81. When the encapsulation material is still liquid or viscous, the sealing gasket 90 prevents the encapsulation material from even reaching any tiny cavities that may be present in the connector element 22 (e.g., between the electrical port 222 and the housing 220). Since the electrical port 222 generally protrudes from the housing 220 on the bottom side of the connector element 22 (the bottom side being the side of the connector element 22 that faces the electronic device carrier 10, 81), a sealing gasket 90 that extends around the entire circumference of the connector element 22 and seals the gap between the connector element 22 and the electronic device carrier 10, 81 is sufficient to prevent any encapsulation material from entering the connector element 22 and contaminating the electrical port 222. That is, the sealing gasket 90 can partially cover the side wall of the connector element 22 (i.e., of the housing 220) and can further partially cover the electronic device carrier 10, 81. This is in Figure 6 It is shown schematically in FIG.

[0031] It is also possible that the sealing gasket 90 is partially arranged between the connector element 22 and the electronic device carrier 10, 81. That is, the material used to form the sealing gasket 90 can penetrate to a certain extent into the gap between the lower end of the connector element 22 and the electronic device carrier 10, 81. This is also Figure 6 It is schematically shown in FIG.

[0032] However, the material used to form the sealing gasket 90 can have different properties than the encapsulating material used to form the enclosure 5. For example, the sealing gasket 90 can include or consist of one of the following: a silicone adhesive, an epoxy adhesive, an acrylic adhesive, a polyimide, and a polyurethane. For example, the material used to form the sealing gasket 90 can be much thicker and more viscous than the encapsulating material used to form the enclosure 5. In this way, due to the capillary effect, the material used to form the sealing gasket 90 will not penetrate into the connector element 22 (i.e., into the cavity 224).

[0033] According to one example, the sealing gasket 90 is composed of a first material having at least one of the following: a dynamic viscosity between 10 and 100 Pa*s; a tensile shear strength of at least 0.5 MPa; and a hardness between 30 Shore A and 90 Shore A, or between 9 Shore C and 59 Shore C, or between 6 Shore D and 39 Shore D. A hardness of 30 Shore A defines a relatively soft material, such as a rubber band, while 90 Shore A refers to a relatively hard material, such as a shopping cart wheel. Shore C is typically used for medium-hard materials, and Shore D partially encompasses rubber and polyurethane, as well as a portion of known plastics such as Teflon, polypropylene, and polystyrene. The Shore A, Shore C, and Shore D grades partially overlap. In the present case, Shore B (e.g., between 15 and 65 Shore B) or Shore 00 (e.g., between 65 and 100 Shore 00) grades may also be commonly used. For example, a durometer of 70 on the Shore A scale is equivalent to a durometer of approximately 98 on the Shore 00 scale, a durometer of 10 on the Shore B scale, a durometer of 42 on the Shore C scale, or a durometer of 25 on the Shore D scale. Most soft, medium-soft, and medium-hard rubbers have a durometer of between about 20 and about 90 on the Shore A scale.

[0034] For example, the first material can be at least one of a thermally curable material, an addition-curable material, a condensation-curable material, a UV-curable material, and a free-radical-curable material. According to one example, the sealing gasket 90 is composed of a thixotropic material. A thixotropic material is typically a unique solid or fluid that changes viscosity (becoming less viscous) when subjected to stress. The first material can have a saturated joint structure (containing only a small amount of oligomer components) such that no or only a small amount of fluid (e.g., water) leaks out of the sealing gasket 90.

[0035] Before the electronic device carrier 10, 81 is arranged in the housing 7 of the semiconductor module arrangement 100, the connector element 22 can be attached to the electronic device carrier 10, 81 and the sealing gasket 90 can be formed on the electronic device carrier 10, 81. The (pre-fabricated) electronic device carrier 10, 81 according to an embodiment of the present disclosure includes: the connector element 22 arranged on the electronic device carrier 10, 81 and electrically coupled to the electronic device carrier 10, 81, and the sealing gasket 90 surrounding the lower end of the connector element 22, wherein the lower end is the end of the connector element 22 facing the electronic device carrier 10, 81, and wherein the sealing gasket 90 is arranged to seal the gap between the lower end of the connector element 22 and the electronic device carrier 10, 81. Forming the sealing gasket 90 before the electronic device carrier 10, 81 is arranged in the housing 7 generally allows easy access to the electronic device carrier 10, 81 (i.e., the connector element 22 arranged on the electronic device carrier 10, 81) by means of appropriate tools required to form the sealing gasket 90.

[0036] According to an embodiment of the present disclosure, a method for manufacturing a semiconductor module device 100 includes: arranging a connector element 22 on an electronic device carrier 10, 81 for the semiconductor module device 100; and forming a sealing gasket 90 so that the sealing gasket 90 surrounds the lower end of the connector element 22, wherein the lower end is an end of the connector element 22 facing the electronic device carrier 10, 81, and wherein the sealing gasket 90 is arranged to seal the gap between the lower end of the connector element 22 and the electronic device carrier 10, 81.

[0037] As described above, the connector element 22 may include an electrically insulating housing 220 and a plurality of electrical ports 222, wherein each of the plurality of electrical ports 222 is partially molded into the electrically insulating housing 220, and arranging the connector element 22 on the electronic device carrier 10, 81 may include electrically and mechanically coupling each of the plurality of electrical ports 222 to the electronic device carrier 10, 81. For example, the electrical ports 222 may be electrically coupled (e.g., soldered or sintered) to conductive traces formed on the printed circuit board 81, or electrically coupled to different sections of the first metallization layer 111 of the substrate 10.

[0038] As described above, the electronic device carriers 10, 81 can be prefabricated. However, it is also possible to form at least the sealing gasket 90 only after the electronic device carriers 10, 81 have been arranged in the housing 7 of the semiconductor module arrangement 100. The sealing gasket 90 can be formed, for example, by a needle valve or a pneumatically or piezoelectrically controlled injection valve. Such a tool is generally able to reach the connector element 22 inside the housing 7, even if other components are already arranged on the electronic device carriers 10, 81 and space is limited. In some cases, a curing step may be required after the sealing gasket 90 is formed on the electronic device carriers 10, 81.

[0039] Figure 7 Schematically shows a semiconductor module device 100 according to an embodiment of the present disclosure. The semiconductor module device 100 includes a connector element 22 mounted on a first surface of a printed circuit board 81. Figure 2 As described, the connector element 22 may also be mounted on another electronic device carrier (e.g., substrate 10) instead of being mounted on the printed circuit board 81. Some connector elements 22 include electrical ports 222 that extend through corresponding through-holes provided in the printed circuit board 81. That is, the connector element 22 is arranged on a first side of the printed circuit board 81, and the electrical ports 222 extend from the first side through the printed circuit board 81 to the opposite side of the printed circuit board 81. This is Figure 8In this case, the encapsulating material can also penetrate through the through-hole provided in the printed circuit board 81 and from there through the tiny cavity formed between the electrical port 222 and the housing 220. In order to prevent this, as shown in FIG. Figure 8 As schematically shown in FIG, a sealing gasket 90 may also be applied to the bottom side of the printed circuit board 81 , thereby covering the electrical port 222 and any gap formed between the electrical port 222 and the printed circuit board 81 .

Claims

1. A semiconductor module device (100), comprising: housing (7); an electronic device carrier (10, 81), the electronic device carrier (10, 81) being arranged inside the housing (7) or forming the bottom of the housing (7); a connector element (22) arranged on the electronics carrier (10, 81) and electrically coupled to the electronics carrier (10, 81); as well as A sealing gasket (90) surrounding the lower end of the connector element (22), wherein the lower end is the end of the connector element (22) facing the electronic device carrier (10, 81), and wherein the sealing gasket (90) is arranged to seal a gap between the lower end of the connector element (22) and the electronic device carrier (10, 81).

2. The semiconductor module arrangement (100) according to claim 1, wherein The electronic device carrier (10, 81) is a substrate (10) comprising a ceramic substrate layer (11) and a first metallization layer (111) deposited on a first side of the ceramic substrate layer (11).

3. The semiconductor module arrangement (100) according to claim 1, wherein The electronic device carrier (10, 81) is a printed circuit board (81), The semiconductor module device (100) further comprises a substrate (10) arranged inside the housing (7) or forming the bottom of the housing (7), and The printed circuit board (81) is arranged inside the housing (7), vertically above the substrate (10) and parallel to the substrate (10).

4. The semiconductor module device (100) according to any one of claims 1 to 3 further comprises an encapsulation (5), which at least partially fills the interior of the housing (7), thereby covering the electronic device carrier (10, 81) and the sealing gasket (90), and partially covers the connector element (22).

5. The semiconductor module arrangement (100) according to claim 1, wherein: The connector element (22) includes an electrically insulating housing (220) and a plurality of electrical ports (222), wherein each electrical port of the plurality of electrical ports (222) is partially molded into the electrically insulating housing (220).

6. The semiconductor module arrangement (100) according to claim 1, wherein: The sealing gasket (90) comprises one of the following or consists of one of the following: silicone adhesive, epoxy resin adhesive, acrylic adhesive, polyimide and polyurethane.

7. The semiconductor module arrangement (100) according to claim 1, wherein: The sealing gasket (90) is composed of a first material having at least one of the following: Dynamic viscosity between 10 and 100 Pa*s; A tensile shear strength of at least 0.5 MPa; and A hardness between 30 Shore A and 90 Shore A, or between 9 Shore C and 59 Shore C, or between 6 Shore D and 39 Shore D.

8. The semiconductor module arrangement (100) according to claim 7, wherein: The first material is at least one of a thermal curing material, an addition curing material, a condensation curing material, a UV curing material, and a free radical curing material.

9. The semiconductor module arrangement (100) according to claim 1, wherein: The sealing gasket (90) is made of thixotropic material.

10. The semiconductor module arrangement (100) according to claim 1, wherein: The sealing gasket (90) is partially arranged between the connector element (22) and the electronics carrier (10, 81).

11. An electronic device carrier (10, 81) for a semiconductor module arrangement (100), the electronic device carrier (10, 81) comprising: a connector element (22) arranged on the electronics carrier (10, 81) and electrically coupled to the electronics carrier (10, 81); as well as A sealing gasket (90) surrounding the lower end of the connector element (22), wherein the lower end is the end of the connector element (22) facing the electronic device carrier (10, 81), and wherein the sealing gasket (90) is arranged to seal a gap between the lower end of the connector element (22) and the electronic device carrier (10, 81).

12. A method comprising: Arranging a connector element (22) on an electronics carrier (10, 81) for a semiconductor module arrangement (100); as well as A sealing gasket (90) is formed so that the sealing gasket (90) surrounds the lower end of the connector element (22), wherein the lower end is the end of the connector element (22) facing the electronic device carrier (10, 81), and wherein the sealing gasket (90) is arranged to seal a gap between the lower end of the connector element (22) and the electronic device carrier (10, 81).

13. The method according to claim 12, wherein: The sealing gasket (90) is formed by a needle valve or a pneumatically or piezoelectrically controlled injection valve.

14. The method according to claim 12 or 13, wherein: The connector element (22) comprises an electrically insulating housing (220) and a plurality of electrical ports (222), wherein each of the plurality of electrical ports (222) is partially molded into the electrically insulating housing (220), and wherein arranging the connector element (22) on the electronic device carrier (10, 81) comprises electrically and mechanically coupling each of the plurality of electrical ports (222) to the electronic device carrier (10, 81).