Processing method of high-heat-dissipation substrate and packaging structure of high-heat-dissipation substrate
By using Dummy layer and blind groove structure in the substrate to form a vertically interconnected thermal conduction path, the problem of limited dielectric layer thickness is solved, the heat dissipation efficiency and reliability of RF equipment is improved, the processing process is simplified and the cost is reduced.
Patent Information
- Application Number
- CN202510594712.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-09
- Publication Date
- 2025-08-22
AI Technical Summary
The prior art is difficult to achieve a thicker dielectric layer while ensuring heat dissipation performance, resulting in limited performance and reliability of RF devices.
Dummy layer and blind groove structure are used to form a vertically interconnected thermal conduction path in the substrate, and a circuit board core structure with embedded heat dissipation strips is formed through the Tenting process and lamination process. The blind grooves are accurately processed in combination with selective etching and laser drilling technology and filled with high thermal conductivity materials.
A dielectric layer with a height of more than 150μm is realized, which improves the heat dissipation efficiency and mechanical strength of the substrate, ensures the stability and reliability of RF equipment when operating at high power, simplifies the processing process and reduces production costs.
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Figure CN120529503A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of circuit board processing, and in particular to a processing method of a high-heat dissipation substrate and a packaging structure thereof. Background Art
[0002] Existing RF (radio frequency) technology has high requirements for heat dissipation and requires the use of thermal bars. However, due to the limitations of laser drilling and electroplating hole filling capabilities, coreless processes are currently mostly used for processing. This process limits the thickness of PP (polypropylene), and the thickness of a single layer of dielectric is difficult to meet the requirements of a single-layer build-up layer (build-up layer) with a core thickness of more than 150μm in RF. Specifically, in traditional designs, increasing the thickness of the dielectric layer will reduce the heat dissipation performance, while improving the heat dissipation capacity may cause the dielectric layer to be too thin, affecting signal integrity. Existing technologies make it difficult to achieve a thicker dielectric layer while ensuring heat dissipation performance, which limits the performance and reliability of RF equipment.
[0003] Chinese Patent Publication No. CN116133238A discloses a PCB and its manufacturing method. The method first provides a flexible substrate, forms multiple thermally conductive structures on the flexible substrate, and then bonds the thermally conductive structures on the flexible substrate to the various chip layers and outer copper foil of the PCB via an adhesive layer. Compared to the prior art method of placing thermally conductive metals one by one on the PCB, this method avoids the misplacement and offset of the thermally conductive structures when placing them one by one, thereby avoiding short circuits and poor heat dissipation caused by the offset placement of the thermally conductive structures, effectively improving work efficiency and PCB product yield. Although the above-mentioned reference document solves the problem of poor heat dissipation caused by misalignment and offset when placing thermally conductive structures one by one through the flexible substrate and pre-formed thermally conductive structures, it still has technical drawbacks such as high process complexity, limited heat dissipation efficiency, and insufficient dielectric layer thickness.
[0004] Therefore, how to overcome the above-mentioned defects has become an important issue to be solved urgently by those skilled in the art. Summary of the Invention
[0005] The present invention overcomes the deficiencies of the above-mentioned technologies and provides a processing method for a high-heat dissipation substrate and a high-aspect-ratio substrate structure.
[0006] To achieve the above object, the present invention adopts the following technical solutions:
[0007] In a first aspect, this case provides a method for processing a high heat dissipation substrate, comprising the following steps:
[0008] Step A, preparing the heat dissipation strip to be processed;
[0009] Step B, forming at least one blind groove in the heat dissipation key area of the heat dissipation strip and forming a first dummy layer in the blind groove;
[0010] Step C: laminating dielectric layers on the front and back sides of the heat dissipation strips, and pressing copper foil layers onto the outer surfaces of the dielectric layers on the front and back sides to form a circuit board core structure with embedded heat dissipation strips inside;
[0011] Step D: In the circuit board core layer structure, a second blind groove and a third blind groove are respectively formed along the vertical direction of the heat dissipation bar, penetrating the copper foil layer and the dielectric layer, and a second dummy layer and a third dummy layer are respectively formed inside the second blind groove and the third blind groove, so that the second dummy layer and the third dummy layer form a vertically interconnected heat conduction path with the first dummy layer;
[0012] Step E: Patterning the copper foil layers on the front and back sides of the circuit board structure to form a circuit layer and a surface treatment layer, so as to form a high heat dissipation substrate.
[0013] Preferably, it also includes:
[0014] Step F: forming a conductive through hole between the top circuit layer and the bottom circuit layer of the high heat dissipation substrate formed in step E and filling the hole with conductive metal.
[0015] Preferably, the step B comprises:
[0016] At least one window is formed in a heat dissipation key area of the heat dissipation strip by a tenting process;
[0017] A first blind groove is formed in the window area of the heat dissipation strip by selective etching or laser drilling;
[0018] Each first blind trench is filled with a high thermal conductivity material through a hole filling process to form a first Dummy layer.
[0019] Preferably, the high thermal conductivity material includes: one of copper and aluminum.
[0020] Preferably, the first blind groove, the second blind groove and the third blind groove are all step-shaped blind grooves; and the width of the three blind grooves is 80-150 μm.
[0021] Preferably, the second blind groove and the third blind groove are symmetrically distributed on the upper and lower sides of the heat dissipation strip.
[0022] Preferably, between step D and step E, at least one lamination step is further included:
[0023] Each lamination step includes:
[0024] Continue laminating the dielectric layer on the outer surface of the circuit board structure formed in step D and press the copper foil layer onto the outer surface of the dielectric layer to form a stacked dielectric layer structure;
[0025] In the stacked dielectric layer structure, a blind groove is formed along the vertical direction of the heat dissipation bar and penetrates the copper foil layer and the dielectric layer, and a Dummy layer is formed inside the blind groove to form a heat conduction path vertically interconnected with the Dummy layer below.
[0026] Preferably, the copper foil layer is an ultra-thin copper layer with a thickness of 3-12 μm.
[0027] Preferably, in the vertically interconnected heat conduction path, the contact area between the second Dummy layer and the third Dummy layer and the first Dummy layer accounts for ≥80%.
[0028] In a second aspect, the present case provides a packaging structure of a high heat dissipation substrate, which is manufactured by the processing method described in the first aspect.
[0029] Compared with the prior art, the present invention has the following beneficial effects:
[0030] 1. By using a dummy layer and a blind groove structure, this case can realize a dielectric layer with a height exceeding 150μm in the substrate, solving the problem of limited single-layer dielectric thickness in the existing technology and meeting the requirements of RF devices for thick dielectric layers.
[0031] 2. In this case, dummy layers are formed in the first blind groove, the second blind groove, and the third blind groove respectively, and vertically interconnected heat conduction paths are formed to construct a three-dimensional heat dissipation structure, which significantly improves the heat dissipation efficiency of the substrate and ensures the stability and reliability of the RF equipment during high-power operation.
[0032] 3. This solution utilizes tenting and lamination processes to create a substrate with internal heat dissipation strips. This not only meets the requirements of the standard MSAP process, but also avoids the complex core detachment step of the traditional coreless process, simplifying the process and reducing production costs and technical difficulty. Precise blind grooves are precisely machined through selective etching or laser drilling techniques, and then electroplated with a highly thermally conductive material (such as copper or aluminum) to ensure uniformity and consistency of the dummy layer, improving the overall performance of the substrate.
[0033] 4. A dielectric layer is laminated on both the front and back sides of the heat sink, and an ultra-thin copper foil layer is pressed into the core layer, forming a circuit board structure with embedded heat sinks, enhancing the mechanical strength and thermal stability of the substrate. The dummy layer, a non-functional filler layer, not only improves heat dissipation performance but also provides support and fixation within the circuit, helping to improve the reliability and durability of the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 1 is a flow chart of a method for manufacturing a high aspect ratio substrate according to a first embodiment of the present invention.
[0035] Figure 1-1 to Figure 1-3 This is a process flow chart of the method for manufacturing a high aspect ratio substrate in Example 1.
[0036] in, Figure 1-1 It is a structural schematic diagram of forming a dummy layer heat dissipation strip in step B of Example 1. Figure 1-2 It is a schematic diagram of the structure of forming a pressing dielectric layer and pressing in a copper foil layer in step C of Example 1. Figure 1-3 It is a schematic diagram of the structure of the high heat dissipation substrate finally formed. DETAILED DESCRIPTION
[0037] The following examples further illustrate the features of the present invention and other related features to facilitate understanding by those skilled in the art:
[0038] Example 1
[0039] like Figure 1 As well as Figure 1-1 to Figure 1-3 As shown, a method for processing a high heat dissipation substrate includes the following steps:
[0040] Step A: prepare a heat dissipation bar 1 to be processed, which may also be called a Thermal Bar; for example, a high thermal conductivity ceramic substrate is selected, with a thickness of 0.5 mm.
[0041] Step B, use the Tenting process to form at least one window in the heat dissipation key area of the heat dissipation strip (the middle area in the figure); in each window area of the heat dissipation strip, a first blind groove 11 is processed by selective etching or laser drilling, and a first Dummy layer 12 is formed in each first blind groove 11 to form a heat dissipation strip 1 with a Dummy layer embedded inside; thereby achieving precise production of the heat dissipation strip. In this way, the Dummy layer acts as a filling structure in the heat dissipation strip, which can balance the stress distribution in different areas and reduce the risk of warping or cracking caused by excessive thickness of the dielectric layer, thereby enhancing the mechanical stability of the structure and making the thicker dielectric layer (more than 150μm) less prone to deformation during processing. Among them, the Dummy layer is a non-functional filling layer. In electronic packaging or PCB design, the Dummy layer refers to an additional layer that does not carry electrical functions and is only used to optimize the structure or process.
[0042] In specific implementation, the Dummy layer can be integrated through electroplating, sputtering or lamination processes. For example, a copper block or an aluminum block can be electroplated in the first blind groove 11 as the Dummy layer; in this way, the Dummy layer is a thermally conductive copper layer or a thermally conductive aluminum layer; in this embodiment, the electroplated copper block is preferred.
[0043] In step C, a dielectric layer is added to the front and back sides of the heat dissipation bar 1 with the Dummy layer embedded therein in step B respectively by lamination, and a first ultra-thin copper foil layer 22 is pressed into the upper surface of the upper dielectric layer 21 to form an upper dielectric layer structure 2; a second ultra-thin copper foil layer 32 is pressed into the lower surface of the lower dielectric layer 31 to form a lower dielectric layer structure 3, thereby forming a circuit board core layer structure 100 with an embedded heat dissipation bar 1 inside through the upper dielectric layer structure 2, the heat dissipation bar 1, and the lower dielectric layer structure 3.
[0044] Step D: Form a second blind groove 23 in communication with the upper and lower surfaces of the first dummy layer 12 of the heat dissipation strip inside the upper dielectric layer structure 2 and the lower dielectric layer structure 3, respectively, and fill the second blind groove 33 with a thermally conductive material to form a second dummy layer 24 and a third dummy layer 34, thereby forming a substrate with three dummy layers. Moreover, the second dummy layer and the third dummy layer form a vertically interconnected heat conduction path with the first dummy layer; specifically, the formation method of the second dummy layer 24 and the third dummy layer 34 refers to the first dummy layer 12. In this way, on the one hand, a heat dissipation structure with a height of more than 150um is formed by superposition; on the other hand, through the vertically interconnected heat conduction path, heat can be more efficiently conducted from the heat dissipation strip to the substrate surface, further optimizing the heat dissipation performance.
[0045] Step E: Patterning the ultra-thin copper foil layers on the front and back sides of the circuit board to form a top circuit layer 41, a top surface treatment layer 42, a bottom circuit layer 51, and a top surface treatment layer 52, thereby forming a high-heat dissipation substrate. The surface treatment layer includes a solder mask layer or a metal anti-oxidation layer. Thus, forming the top circuit layer and surface treatment layer (such as a solder mask layer or a metal anti-oxidation layer) through a patterning process improves the electrical performance and environmental corrosion resistance of the substrate, extending the service life of the device.
[0046] As mentioned above, this case realizes the precise processing of local blind grooves by opening windows only in the areas where the dummy layer needs to be filled, protecting other areas from subsequent etching or laser processing. By using the dummy layer and blind groove structure, this case facilitates the realization of a dielectric layer with a height of more than 150μm in the substrate, solving the problem of limited thickness of a single-layer dielectric in the prior art and meeting the demand for thick dielectric layers in RF devices. This case forms dummy layers in the first blind groove, the second blind groove and the third blind groove respectively, and forms a vertically interconnected heat conduction path. Such a three-dimensional heat dissipation structure can better conduct heat away, significantly improving the heat dissipation efficiency of the substrate and ensuring the stability and reliability of the RF equipment when working at high power. Moreover, by adopting the tenting process and the lamination process, a substrate with an internal heat dissipation strip is formed, which not only meets the normal MSAP process requirements, but also avoids the complicated Detach Core (peeling core layer) step in the traditional Coreless process, simplifies the processing flow, and reduces production costs and technical difficulties. By precisely processing blind grooves through selective etching or laser drilling technology and filling them with high thermal conductivity materials (such as copper or aluminum) in combination with electroplating technology, the uniformity and consistency of the Dummy layer are ensured, thereby improving the overall performance of the substrate. This case also forms a circuit board core layer structure with embedded heat dissipation strips inside by laminating dielectric layers on the front and back sides of the heat dissipation strips and pressing in ultra-thin copper foil layers, thereby enhancing the mechanical strength and thermal stability of the substrate. In addition, the introduction of the Dummy layer not only improves the heat dissipation performance, but also enhances the overall structural strength of the circuit board. As a non-functional filling layer, the Dummy layer plays a supporting and fixing role in the circuit, which helps to improve the reliability and durability of the circuit board.
[0047] As a preferred embodiment, the first blind groove, the second blind groove and the third blind groove are all stepped blind grooves. The second blind groove and the third blind groove are symmetrically distributed on the upper and lower sides of the heat dissipation strip.
[0048] As mentioned above, the blind groove in the embodiment of this case adopts a stepped design, which can change the stress transfer path, disperse the stress at the groove wall and groove bottom, and avoid stress concentration in a specific area. The stepped surface of the stepped blind groove provides additional contact area, making the connection with the adjacent structure or material more firm. Not only does it increase the thickness of the dielectric layer, but it also expands the heat dissipation area and improves the heat dissipation efficiency. The second and third blind grooves in this case are symmetrically distributed on the upper and lower sides of the heat dissipation strip. On the one hand, they form symmetrical heat dissipation channels, which allows heat to be more evenly transferred through the heat dissipation strip and the dielectric layer around it, avoiding excessive heat accumulation on one side; on the other hand, it further balances the stress distribution on the upper and lower sides of the substrate, improving the structural stability and deformation resistance of the substrate.
[0049] As a preferred embodiment, the copper foil layer is an ultra-thin copper layer, preferably with a thickness of 3-12 μm. In this way, it is easier to carry out fine patterning processing by adopting an ultra-thin copper layer, thereby improving the precision and consistency of the circuit layer. Moreover, the ultra-thin copper layer enables the substrate to have better flexibility while maintaining mechanical strength, thereby enhancing the flexibility of the substrate, so as to adapt to complex application scenarios. The preferred thickness is 3-12 μm, and this thickness range is technologically compatible with MSAP and laser drilling, balancing the lamination flatness and mechanical strength (too thick and easy to warp, too thin and easy to tear), while improving the graphical accuracy (reducing lateral etching and supporting 10 μm line width). Moreover, the ultra-thin copper foil reduces thermal resistance and optimizes the vertical heat conduction path between the heat dissipation strip and the Dummy layer.
[0050] As a preferred method, in step F, a conductive through-hole 6 is formed between the top circuit layer 41 and the bottom circuit layer 51 of the formed high-heat dissipation substrate and filled with conductive metal. In this way, the through-hole filled with conductive metal establishes a low thermal resistance path between the top and bottom circuit layers, and synergizes with the vertical heat conduction structure of the Dummy layer to significantly improve the longitudinal heat dissipation efficiency of the substrate, which is particularly suitable for scenarios with a thick dielectric layer of more than 150μm. In addition, the conductive through-hole realizes the electrical interconnection of the double-sided circuit layers, reduces the transmission impedance, avoids high-frequency signal loss, and balances the current distribution, reducing the risk of local overheating.
[0051] As a preferred approach, in the vertically interconnected heat conduction path, the contact area between the second and third dummy layers and the first dummy layer accounts for ≥ 80%. In this way, the heat conduction efficiency is ensured by quantifying the contact area, and heat dissipation failure caused by virtual connection is avoided.
[0052] Example 2
[0053] In specific implementation, if the number of layers of the high heat dissipation substrate is to be increased, at least one lamination step can be added between step D and step E as required:
[0054] Each lamination step includes:
[0055] A dielectric layer is laminated to the outer surface of the circuit board structure formed in step D, and a copper foil layer is pressed into the outer surface of the dielectric layer to form a new dielectric layer. A new dummy layer is then formed within the stacked dielectric layer structure, vertically interconnecting the upper and lower dummy layers to form a heat conduction path.
[0056] In this way, the processing method of the embodiment of this case supports multi-layer stacking design, which is convenient for freely expanding the number of layers according to the required number of layers. By adding dielectric layers and dummy layers, the heat dissipation performance and electrical performance can be further optimized to meet the design requirements of complex RF equipment.
[0057] Example 3
[0058] A packaging structure of a high heat dissipation substrate is manufactured according to the processing method described in the first embodiment.
[0059] In summary, the embodiments of this case solve the contradiction between heat dissipation performance and dielectric layer thickness in the prior art through innovative processing methods and structural designs, significantly improving the performance and reliability of RF equipment while reducing production costs and technical difficulties.
[0060] As mentioned above, this case protects a processing method for a high-heat dissipation substrate and its packaging structure. All technical solutions that are the same or similar to those in this case should be deemed to fall within the scope of protection of this case.
Claims
1. A method for processing a high heat dissipation substrate, characterized in that: The steps include: Step A, preparing the heat dissipation strip to be processed; Step B, forming at least one blind groove in the heat dissipation key area of the heat dissipation strip and forming a first dummy layer in the blind groove; Step C: laminating dielectric layers on the front and back sides of the heat dissipation strips, and pressing copper foil layers onto the outer surfaces of the dielectric layers on the front and back sides to form a circuit board core structure with embedded heat dissipation strips inside; Step D: In the circuit board core layer structure, a second blind groove and a third blind groove are respectively formed along the vertical direction of the heat dissipation bar, penetrating the copper foil layer and the dielectric layer, and a second dummy layer and a third dummy layer are respectively formed inside the second blind groove and the third blind groove, so that the second dummy layer and the third dummy layer form a vertically interconnected heat conduction path with the first dummy layer; Step E: Patterning the copper foil layers on the front and back sides of the circuit board structure to form a circuit layer and a surface treatment layer, so as to form a high heat dissipation substrate.
2. The method for processing a high heat dissipation substrate according to claim 1, wherein: Also includes: Step F: forming a conductive through hole between the top circuit layer and the bottom circuit layer of the high heat dissipation substrate formed in step E and filling the hole with conductive metal.
3. The method for processing a high heat dissipation substrate according to claim 1, wherein: The step B comprises: At least one window is formed in a heat dissipation key area of the heat dissipation strip by a tenting process; A first blind groove is formed in the window area of the heat dissipation strip by selective etching or laser drilling; Each first blind trench is filled with a high thermal conductivity material through a hole filling process to form a first Dummy layer.
4. The method for processing a high heat dissipation substrate according to claim 3, wherein: The high thermal conductivity material includes: one of copper and aluminum.
5. The method for processing a high heat dissipation substrate according to claim 1, wherein: The first blind groove, the second blind groove and the third blind groove are all step-shaped blind grooves.
6. The method for processing a high heat dissipation substrate according to claim 1, wherein: The second blind groove and the third blind groove are symmetrically distributed on the upper and lower sides of the heat dissipation strip.
7. The method for processing a high heat dissipation substrate according to claim 1, wherein: Between step D and step E, at least one lamination step is further included: Each lamination step includes: Continue laminating the dielectric layer on the outer surface of the circuit board structure formed in step D and press the copper foil layer onto the outer surface of the dielectric layer to form a stacked dielectric layer structure; In the stacked dielectric layer structure, a blind groove is formed along the vertical direction of the heat dissipation bar and penetrates the copper foil layer and the dielectric layer, and a Dummy layer is formed inside the blind groove to form a heat conduction path vertically interconnected with the Dummy layer below.
8. The method for processing a high heat dissipation substrate according to claim 1, wherein: The copper foil layer is an ultra-thin copper layer with a thickness of 3-12 μm.
9. The method for processing a high heat dissipation substrate according to claim 1, wherein: In the vertically interconnected heat conduction path, the contact area between the second Dummy layer and the third Dummy layer and the first Dummy layer accounts for ≥80%.
10. A packaging structure of a high heat dissipation substrate, characterized in that: The high heat dissipation substrate is manufactured by the processing method of any one of claims 1 to 8.
Citation Information
Patent Citations
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