Methods, devices, equipment and media for improving the flatness of navigation system modules

Abstract

This application discloses a method, apparatus, equipment, and medium for improving the flatness of a navigation system module, relating to the field of PCB and PCBA manufacturing technology. The method includes: acquiring basic information corresponding to the navigation system module, including design information and module information; optimizing the design information based on board size processing strategies, ink distribution processing strategies, and panelization processing strategies to generate target design information; optimizing the module information based on surface mount pressing fixture design and board separation processing strategies to generate target module information; and optimizing the target flatness information based on the target design information and target module information to obtain target flatness information. By adjusting the PCB design and modifying the PCBA design, a final navigation system module design scheme is obtained. This optimizes the PCB design process and precisely controls key parameters in the production process, thereby improving the flatness of the PCB and PCBA in the navigation system module.

Description

Technical Field

[0001] This invention relates to the field of PCB manufacturing and PCBA processing technology, and in particular to a method, apparatus, equipment and medium for improving the flatness of navigation system modules. Background Technology

[0002] With the rapid development of electronic technology, the performance and functionality of electronic devices are constantly improving, placing increasingly higher demands on the precision and reliability of internal components. Especially in fields such as navigation systems, missiles, aircraft, marine equipment, and land-based equipment, the flatness of modules directly affects their soldering quality, electrical performance stability, and overall reliability. In modern electronic manufacturing, printed circuit boards (PCBs) and their modules (PCBAs) are core components. The flatness of the PCB not only affects its own soldering quality but also the placement accuracy of components during subsequent module assembly processes.

[0003] However, current PCB manufacturing process optimizations primarily focus on material selection and lamination, with insufficient consideration given to panelization methods and deformation control during transportation. In PCBA module assembly, the lack of systematic optimization in surface mount bonding fixture design and depaneling processes leads to a decrease in flatness after module assembly. Therefore, a more efficient and comprehensive method is needed to improve the flatness of PCBs and PCBAs. Summary of the Invention

[0004] The main objective of this application is to provide a method, apparatus, device, and medium for improving the flatness of navigation system modules, aiming to solve the technical problem of how to improve the flatness of PCBs and PCBAs.

[0005] To achieve the above objectives, this application proposes a method for improving the flatness of a navigation system module, the method comprising:

[0006] Obtain basic information corresponding to the navigation system module, including design information and module information;

[0007] The design information is optimized based on the board size processing strategy, ink distribution processing strategy, and panel assembly method processing strategy to generate the target design information.

[0008] Based on the design and processing strategies of the patch crimping fixture and the board splitting processing strategy, the module information is optimized to generate target module information;

[0009] Based on the target design information and the target module information, optimization processing is performed to obtain the target flatness information.

[0010] In one embodiment, the step of optimizing the design information based on the board size processing strategy, ink distribution processing strategy, and panelization method processing strategy to generate target design information includes:

[0011] Based on the design information, the board size, ink distribution data, and panel assembly method are obtained;

[0012] The board size is adjusted to a preset size according to the board size processing strategy to obtain the adjusted board size;

[0013] The ink distribution data is optimized according to the ink distribution processing strategy to obtain optimized ink distribution data;

[0014] The puzzle method is modified according to the puzzle method processing strategy to obtain the modified puzzle method;

[0015] The PCB board is designed based on the adjusted board size, the optimized ink distribution, and the modified panelization method to obtain the target design information.

[0016] In one embodiment, the step of designing the PCB board based on the adjusted board size, the optimized ink distribution, and the modified panelization method to obtain target design information includes:

[0017] The PCB layout is planned based on the adjusted material dimensions to obtain PCB layout data.

[0018] Based on the optimized ink distribution data, ink printing parameters are obtained;

[0019] The ink printing parameters are adjusted to obtain the adjusted ink distribution data;

[0020] The PCB panel design is updated based on the modified panelization method to obtain PCB panelization data;

[0021] The PCB board is constructed based on the planned PCB layout data, the adjusted ink distribution data, and the PCB board panelization data to obtain the target design information.

[0022] In one embodiment, after the step of designing the PCB board based on the adjusted board size, the optimized ink distribution, and the modified panelization method to obtain the target design information, the method further includes:

[0023] Based on the target design information, a PCB board is designed to obtain the PCB board.

[0024] The PCB board is baked using a multi-layer rack placed flat for baking, resulting in a baked PCB board.

[0025] The baked PCB board is corrected by a preset pressure-reverse warping treatment to obtain the target circuit board.

[0026] In one embodiment, the step of performing module optimization processing on the module information according to the crimping fixture design processing strategy and the board separation processing strategy to generate target module information includes:

[0027] Based on the module information, the surface mount method and the board separation method are obtained;

[0028] The patch crimping fixture method is modified according to the patch crimping fixture design and processing strategy to obtain the modified patch method;

[0029] The board splitting method is adjusted according to the board splitting processing strategy to obtain the adjusted board splitting method;

[0030] Based on the modified surface mount method and the adjusted board separation method, the PCBA is designed to obtain the target module information.

[0031] In one embodiment, the step of designing the PCBA based on the modified surface mount crimping fixture method and the adjusted board separation method to obtain target module information includes:

[0032] Based on the modified surface mount crimping fixture design, the surface mount process parameters are obtained;

[0033] Based on the adjusted board separation method, the board separation process parameters are obtained;

[0034] The component layout and placement path of the adjustment module are adjusted according to the design process parameters of the surface mount crimping fixture to obtain the surface mount data;

[0035] The board separation position of the adjustment module is determined according to the board separation process parameters to obtain board separation data;

[0036] The target module information is determined based on the patch crimping fixture design data and the board separation data.

[0037] In one embodiment, after the step of optimizing based on the target design information and the target module information to obtain the target flatness information, the process includes:

[0038] By combining the target design information and the target module information, a navigation system module design scheme is obtained;

[0039] When the target flatness information meets the preset flatness requirements, the navigation system module design scheme is adopted as the target navigation system module design scheme.

[0040] Furthermore, to achieve the above objectives, this application also proposes a navigation system module flatness improvement device, which includes:

[0041] The acquisition module is used to acquire basic information corresponding to the navigation system module, including design information and module information.

[0042] The processing module is used to perform design optimization processing on the design information according to the board size processing strategy, ink distribution processing strategy and panel assembly method processing strategy to generate target design information;

[0043] The processing module is also used to perform module optimization processing on the module information according to the chip pressing fixture design processing strategy and the board splitting processing strategy to generate target module information;

[0044] The optimization module is used to perform optimization processing based on the target design information and the target module information to obtain target flatness information.

[0045] In addition, to achieve the above objectives, this application also proposes a medium, which is a computer-readable medium, on which a computer program is stored, which, when executed by a processor, implements the steps of the navigation system module flatness improvement method described above.

[0046] In addition, to achieve the above objectives, this application also provides a computer program product, which includes a computer program that, when executed by a processor, implements the steps of the navigation system module flatness improvement method described above.

[0047] This application obtains basic information corresponding to the navigation system module, including design information and module information. Based on board size processing strategies, ink distribution processing strategies, and panelization methods, the design information is optimized to generate target design information. Based on surface mount molding fixture design and board separation strategies, the module information is optimized to generate target module information. Based on the target design information and target module information, optimization is performed to obtain target flatness information. By comprehensively applying board processing, ink distribution, and panelization strategies to adjust the PCB design, and by modifying the PCBA design through surface mount molding fixture design and board separation strategies, the final navigation system module design scheme is obtained. The PCB and PCBA design process is optimized, and key parameters in the production process are precisely controlled, improving the flatness of the PCB and PCBA in the navigation system module. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without creative effort.

[0049] Figure 1 This is a flowchart illustrating the first embodiment of the method for improving the flatness of a navigation system module according to this application;

[0050] Figure 2 This is an optimized 1-to-2 panel flatness data bar chart of the first embodiment of the navigation system module flatness improvement method of this application;

[0051] Figure 3 This is an initial PCB flatness bar chart of the first embodiment of the navigation system module flatness improvement method of this application;

[0052] Figure 4 This is a bar graph showing the flatness data of a 1-to-4 L-shaped panel in the first embodiment of the navigation system module flatness improvement method of this application;

[0053] Figure 5 This is a bar graph showing the flatness data of a fixture patch with a precision of 1mm, representing the first embodiment of the navigation system module flatness improvement method of this application.

[0054] Figure 6 This is a bar graph showing the flatness data of the optimized 1-to-2 fixture patch with a precision of 0.05mm, according to the first embodiment of the navigation system module flatness improvement method of this application.

[0055] Figure 7 This is a bar graph showing the flatness data of the optimized 1-to-2 fixture with a precision of 0.05mm after high and low temperatures in the first embodiment of the navigation system module flatness improvement method of this application.

[0056] Figure 8 This is a bar graph showing the flatness data of the 1-to-4 fixture patch with a precision of 0.05mm in the first embodiment of the navigation system module flatness improvement method of this application.

[0057] Figure 9 This is a flowchart illustrating the second embodiment of the method for improving the flatness of a navigation system module according to this application;

[0058] Figure 10 This is a flowchart illustrating the third embodiment of the method for improving the flatness of a navigation system module according to this application;

[0059] Figure 11 This is a flowchart illustrating the fourth embodiment of the method for improving the flatness of a navigation system module according to this application;

[0060] Figure 12This is a schematic diagram of the module structure of the navigation system module flatness improvement device according to an embodiment of this application;

[0061] Figure 13 This is a schematic diagram of the device structure of the hardware operating environment involved in the navigation system module flatness improvement method in this application embodiment.

[0062] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0063] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0064] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0065] In the design and manufacturing process of navigation system modules, traditional design and assembly methods often face several challenges. For example, improper handling of board dimensions can lead to material waste; uneven ink distribution may affect the flatness of the PCB, resulting in decreased soldering quality; and an inappropriate choice of panelization method may cause PCB deformation or damage. Furthermore, in the surface mount technology (SMT) stage, issues such as low precision in the design of the SMT pressing fixture and stress generated during board separation can also negatively impact the quality and performance of the final product.

[0066] To address the aforementioned issues, this application proposes an optimized PCB design scheme for a navigation system module. The main solution of this application embodiment is as follows: by acquiring the basic information corresponding to the navigation system module, including design information and module information, the design information is optimized according to the board size processing strategy, ink distribution processing strategy, and panelization method processing strategy to generate target design information. The module information is optimized according to the surface mount pressing fixture design processing strategy and the board separation processing strategy to generate target module information. Based on the target design information and target module information, optimization processing is performed to obtain target flatness information.

[0067] Based on this, embodiments of this application provide a method for improving the flatness of a navigation system module, referring to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the method for improving the flatness of a navigation system module according to this application.

[0068] In this embodiment, the method for improving the flatness of the navigation system module includes steps S10 to S40:

[0069] Step S10: Obtain the basic information corresponding to the navigation system module.

[0070] It should be noted that the basic information of the navigation system module includes design information and module information. The design information mentioned above is the PCB design information, and the module information mentioned above is the PCBA design information.

[0071] Furthermore, several key factors need to be considered in the PCB design of the navigation system module. First are electrical characteristics requirements, including signal integrity and electromagnetic compatibility (EMI / EMC) design considerations. To ensure high-precision positioning and navigation, the design of the radio frequency (RF) circuitry is crucial, ensuring low signal loss and stability. Additionally, with the trend towards miniaturization, such as PCB height requirements not exceeding 1.0mm, the choice of layer stack-up becomes particularly important. A reasonable layer stack-up design not only helps improve electrical performance but also enhances mechanical strength and thermal management efficiency. Material selection is also an important aspect of PCB design. Typically, substrates with excellent high-frequency characteristics are chosen to reduce signal loss and improve overall system efficiency. Simultaneously, considering the impact of temperature changes on material properties, the product's durability needs to be enhanced through design, such as using materials adaptable to a wide temperature range or adding heat dissipation paths. For component layout on the PCB, not only functional connections must be considered, but also how to minimize interference and noise. This may involve the arrangement of power lines, the design of ground planes, and the application of shielding measures. Furthermore, manufacturing process requirements must be followed, such as pad size and spacing, to ensure manufacturability.

[0072] Furthermore, once the PCB design is complete, the next step is PCBA design, which involves mounting all the necessary electronic components onto the PCB to form a complete circuit board. In this process, the choice of surface mount fixture design technology is particularly crucial. Using high-precision automated placement machines can improve assembly accuracy and consistency, which is essential for ensuring that each component is installed accurately. Soldering processes are equally important; reflow soldering is widely used in surface mount technology due to its ability to provide uniform heating, thus ensuring the quality of solder joints. In addition, depending on the component type and application scenario, different surface mount fixture design methods are required. Board separation technology is also a vital part of PCBA design. Proper board separation methods can not only avoid damaging the PCB but also effectively control costs. For example, CNC board separation can simplify subsequent board separation processes and improve production efficiency without affecting product quality. At the same time, strict finished product inspection standards need to be established to ensure that each PCBA meets the expected functional requirements and quality standards.

[0073] Step S20: Based on the board size processing strategy, ink distribution processing strategy, and panelization method processing strategy, the design information is optimized to generate the target design information.

[0074] It is important to note that in modern electronics manufacturing, PCB flatness directly impacts product reliability and performance. Therefore, optimization from the design stage is crucial for improving PCB flatness. By employing strategies for handling board dimensions, ink distribution, and panelization methods, PCB design information can be systematically optimized to generate target design information that meets high flatness requirements.

[0075] Furthermore, the board size processing strategy emphasizes selecting appropriately sized boards. Smaller boards are easier to control during production, thus reducing flatness issues caused by oversized boards. By optimizing board size, the risk of PCB warping can be reduced at the source, laying a solid foundation for subsequent production stages. Secondly, the ink distribution processing strategy focuses on ink uniformity. In PCB manufacturing, uneven ink distribution can lead to localized warping, thereby affecting flatness. By precisely controlling the ink distribution and ensuring its uniform coverage on the PCB surface, flatness deviations caused by ink problems can be effectively reduced.

[0076] Furthermore, a reasonable panelization method can reduce stress concentration and deformation caused by improper splicing. The panelization method has a significant impact on optimizing the overall PCB structure. In this embodiment, a 1-to-4 L-type panelization method or an optimized 1-to-2 panelization method is used. Compared with the traditional 2-panel method, this method can better distribute stress and improve the overall flatness of the PCB. Specifically, as shown in Table 1, the flatness data of the optimized 1-to-2 panelization is as follows: Figure 2 The bar chart showing the optimized 1-to-2 panel flatness data is shown.

[0077] Table 1. Optimized Flatness Data for 1-to-2 Panel Splicing

[0078] PCB flatness 0.1mm 0.13mm 0.15mm 0.20mm 0.23m percentage 40.00％ 23.33％ 33.33％ 1.67％ 1.67％

[0079] The study found that PCB flatness data ≤0.15mm accounted for 96.66%, PCB flatness between 0.2mm and 0.23mm accounted for 3.34%, and the average PCB flatness was 0.1275mm. Figure 3 The initial PCB flatness bar chart shows that, within the same batch without changing the panelization method, 26% of the PCBs with flatness of 0.15mm or less, and 74% with flatness of 0.18mm or more. Taking the average flatness of the PCBs without changing the panelization method as 0.1972mm, the optimized 1-to-2 panelization improves the overall PCB flatness by 0.0667mm compared to the traditional 2-to-1 panelization. See Table 2 for the flatness data of the 1-to-4 L-type panelization. Figure 4 The bar chart showing the flatness data of the 1-to-4 L-type panel is shown.

[0080] Table 2 Flatness Data of 1-to-4 L-Type Panels

[0081] 1-to-4 PCB flatness 0.13mm 0.18mm 0.2mm 0.23mm 0.25mm 0.3mm percentage 3.70％ 7.40％ 7.40％ 2.22％ 3.70％ 55.56％

[0082] The data showed that PCB flatness below 0.25mm accounted for 24.22%, PCB flatness below 0.3mm accounted for 55.56%, and the average PCB flatness was 0.26mm.

[0083] Step S30: Based on the surface mount crimping fixture design and board splitting strategies, the module information is optimized to generate target module information.

[0084] It should be noted that the flatness and reliability of the PCBA are key factors affecting product quality. To ensure the high performance of the module in the overall system, optimization needs to begin from the module design stage. By implementing surface mount bonding fixture design strategies and board separation strategies, the module information is optimized to obtain the target module information that meets the requirements.

[0085] Furthermore, improper cutting or separation during the board separation process can lead to PCB edge deformation or warping, thereby affecting the flatness and reliability of the module. By optimizing the board separation method, in this embodiment, CNC board separation is used, combined with advanced board separation process parameters (such as cutting speed, tool selection, etc.), the mechanical stress on the PCB during the board separation process can be effectively reduced. At the same time, the introduction of a flatness detection and correction process after board separation can further ensure that the flatness of the PCB after assembly meets the design requirements.

[0086] Furthermore, in PCBA production, the design precision of the surface mount crimping fixture directly affects the soldering quality of components and the electrical performance of the module. Designing and using high-precision surface mount crimping fixtures can improve the accuracy and consistency of component placement. For example, using a fixture with a precision of 0.05mm, compared to a traditional fixture with a precision of 0.1mm, can further reduce positional deviations during placement, ensuring that components are accurately placed in their intended positions. In addition, optimized fixture design can provide better support during placement, reducing deformation caused by component weight or irregular shape, thereby improving the overall flatness of the module. Specifically, Table 3 shows the surface flatness data for a 1mm precision fixture. Figure 5 The bar chart shown represents the flatness data of the fixture patch with a precision of 1mm; Table 4 shows the flatness data of the optimized 1-to-2 fixture patch with a precision of 0.05mm. Figure 6 The bar chart showing the flatness data of the optimized 1-to-2 fixture patch with a precision of 0.05mm is shown in Figure 5. Table 5 shows the flatness data of the optimized 1-to-2 fixture patch with a precision of 0.05mm after high and low temperatures. Figure 7The bar chart showing the flatness data of the optimized 1-to-2 fixture patch with a precision of 0.05mm after high and low temperatures, and Table 6 showing the flatness data of the 1-to-4 fixture patch with a precision of 0.05mm, are also provided. Figure 8 The bar chart shown shows the flatness data of the 1-to-4 fixture patch with an accuracy of 0.05mm.

[0087] Table 3. Data on the flatness of fixture patch with a precision of 1mm.

[0088]

[0089] Table 4 shows the flatness data of the 1-to-2 jig patch with an accuracy of 0.05mm.

[0090]

[0091] Table 5. Flatness data of the 1-to-2 jig patch with an accuracy of 0.05mm after high and low temperatures.

[0092] 1-to-2 PCBA flatness 0.09mm 0.1mm 0.13mm 0.15mm percentage 4.16％ 75.00％ 16.67％ 4.16％

[0093] Table 6. Flatness data of 1-to-4 fixture patch with a precision of 0.05mm

[0094] 1-to-4 PCBA flatness 0.09mm 0.1mm 0.13mm percentage 0.93％ 69.44％ 29.63％

[0095] The table above shows that for 1-to-2 PCBAs, 95% of the flatness is controlled below 0.1mm, and 5% is controlled within the range of 0.1mm to 0.13mm. For 1-to-4 PCBAs, 70% of the flatness is controlled below 0.1mm, and 30% is controlled within the range of 0.1mm to 0.13mm. The solution using 0.05mm fixtures (regardless of whether it's a 1-to-2 or 1-to-4 panelization) outperforms the solution using 1mm fixtures in terms of flatness control. In particular, the 1-to-2 solution with 0.05mm precision fixtures exhibits the best flatness performance, with 95% of the flatness controlled below 0.1mm. This indicates that using higher precision fixtures and optimized panelization methods can significantly improve the flatness of PCBAs.

[0096] Step S40: Based on the target design information and target module information, perform optimization processing to obtain target flatness information.

[0097] It is important to note that when determining the target flatness information for the navigation system module, both target design information and target module information must be comprehensively considered to ensure optimization throughout the entire process from design to module, thereby meeting the navigation system's requirements for high precision and high reliability. First, based on the target design information, the PCB board dimensions are optimized, selecting smaller boards to reduce the risk of warping, and optimizing ink distribution to ensure uniformity. Simultaneously, the panelization method is adjusted to reduce stress concentration. These design optimizations improve the PCB's flatness and stability from the outset. Second, combined with the target module information, a high-precision fixture for surface mount technology (SMT) is employed to ensure accurate component positioning during mounting, reducing SMT deviation. Simultaneously, the depaneling process is optimized, improving the PCBA's flatness and reducing mechanical stress on the PCB during depaneling, further ensuring the flatness and reliability of the assembled device.

[0098] Specifically, as shown in Table 7, the data on the flatness of the PCB and PCBA processes shows that when both PCB and PCBA are simultaneously improved using a 1-to-2 panelization method and a 0.05mm flatness fixture, the average flatness value of the PCB is 0.1275mm and the average flatness value of the PCBA is 0.091917mm. This is the lowest flatness value for PCBA among all conditions, indicating that this process combination is the most effective in improving flatness.

[0099] Table 7. PCB and PCBA Process Flatness Data Table

[0100]

[0101] This embodiment provides a method for improving the flatness of a navigation system module. By acquiring basic information corresponding to the navigation system module, including design information and module information, the design information is optimized according to board size processing strategies, ink distribution processing strategies, and panelization method processing strategies to generate target design information. The module information is then optimized according to surface mount bonding fixture design processing strategies and board separation processing strategies to generate target module information. Based on the target design information and target module information, optimization processing is performed to obtain target flatness information. By adjusting the PCB design and modifying the PCBA design, the final navigation system module design scheme is obtained. Optimizing the PCB design process and precisely controlling key parameters in the production process improves the flatness of the PCB and PCBA in the navigation system module.

[0102] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to that in Embodiment 1 above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 9The method for improving the flatness of the navigation system module, step S20, further includes steps S201 to S205:

[0103] Step S201: Based on the design information, obtain the board size, ink distribution data, and panel assembly method.

[0104] It's important to note that the selection of board material size requires consideration of multiple factors. Firstly, it should meet the size requirements of a single PCB and reserve sufficient edge space for subsequent processing, facilitating fixation and handling. Traditional designs generally use larger boards to reduce the impact of deformation caused by stress during processing. Ink distribution data primarily involves the design data for two layers: the solder mask and the silkscreen layer. The solder mask prevents unnecessary short circuits during soldering and provides electrical insulation protection; the silkscreen layer is used to identify component locations, models, and orientations. For high-precision applications like navigation systems, the proper planning of the position and coverage of these two layers is crucial. Panelization refers to the strategy of mass-producing multiple identical or different PCBs on a single large board. Common panelization methods include V-cut and stamp hole connections. V-cuts are suitable for modules with regular shapes and straight edges, facilitating subsequent separation by cutting V-grooves; while stamp hole connections are suitable for irregularly shaped modules or modules with special requirements, providing stronger mechanical support and reducing damage during separation.

[0105] Step S202: Adjust the board size to the preset size according to the board size processing strategy to obtain the adjusted board size.

[0106] It should be noted that a small-size board material specification is determined based on project requirements. The preset size is the smaller board material size. In this embodiment, a standard 100×100 inch board material can be selected for the navigation system module. This size must simultaneously meet the design requirements and manufacturing process standards of a single PCB board. Through meticulous planning, the PCB layout can be efficiently arranged on the small-size board material. CAD software can be used to simulate the material utilization rate under different arrangement methods, and the optimal solution can be adjusted accordingly. In addition, small-size board materials are more adaptable to the rhythm of automated production lines, reducing changeover time and improving production efficiency. The final adjusted board material size not only meets the product design and functional requirements but also achieves the dual goals of efficient production and resource conservation, providing a good start for subsequent processes such as ink distribution and component mounting, while also ensuring the maximization of product quality and production efficiency.

[0107] Step S203: Optimize the ink distribution data according to the ink distribution processing strategy to obtain optimized ink distribution data.

[0108] It's important to note that uniform ink distribution not only improves soldering quality but also enhances the durability and reliability of the PCB board. Specifically, the uniformity of the solder mask directly affects the quality of the solder joints, preventing soldering defects caused by ink that is too thick or too thin. By using high-precision printing equipment and techniques, consistent ink thickness can be ensured, reducing short circuits or open circuits caused by uneven ink distribution. For the bottom layer design, pin 1 markings are crucial information, indicating the location of the first pin of a component, which is essential for ensuring correct component soldering. Placing these markings on the bottom layer avoids conflicts with the functional areas of the top layer, especially when the top layer contains complex signal paths or high-frequency components. This simplifies design complexity and improves the accuracy and efficiency of the module placement process. Meanwhile, placing part numbers and other important markings, such as version numbers and manufacturing dates, on the top layer helps to quickly identify and trace specific batches of products. Furthermore, the information layout on the top layer should prioritize visibility, ensuring it is not obscured or damaged even during subsequent processing.

[0109] Step S204: Modify the panel arrangement method according to the panel arrangement method processing strategy to obtain the modified panel arrangement method.

[0110] It's worth noting that when optimizing PCB panelization, using a 1-to-2 direct connection or a 1-to-4 L-shaped direct connection can significantly improve production efficiency and reduce costs. These two panelization strategies are particularly suitable for PCB designs requiring efficient production and easy post-processing. A 1-to-2 direct connection is a design method that directly connects two identical or similar PCBs. This method reduces the need for complex panelization structures and simplifies the production process by connecting two units with a simple straight line. For products requiring high precision and consistency, such as navigation system modules, this panelization method helps ensure uniformity and consistency between each unit. It also allows for more efficient placement of multiple PCBs on a larger board, improving material utilization. In contrast, the 1-to-4 L-shaped direct connection is more complex, but it offers higher space utilization and flexibility. The L-shaped layout means that four PCBs are connected in an L-shape. This method not only maximizes the number of PCBs on a single board within a limited space but also effectively utilizes the edge areas of the board, reducing waste. For navigation system modules with specific shape constraints or requiring special positioning, the L-shaped layout can flexibly adjust the positional relationship of each unit according to actual needs, avoiding unnecessary space waste.

[0111] Step S205: Design the PCB board based on the adjusted board size, optimized ink distribution, and modified panelization method to obtain the target design information.

[0112] It's important to note that the target design information is also influenced by the lamination and pressing of the prepreg (PP) and core, as well as the material selection. Specifically, different types of PP and core materials affect the electrical performance, mechanical strength, and thermal stability of the PCB board. For example, using materials with low dielectric constants can reduce signal transmission loss, making them suitable for high-frequency applications; while materials with high glass transition temperature (Tg) can improve heat resistance, making them suitable for applications requiring high-temperature processing. Through field simulation experiments, the effects of various combinations can be tested for specific application scenarios, observing their performance under real-world conditions. Furthermore, in terms of lamination design, the appropriate number and arrangement of PP and core layers are crucial to the performance of the final product.

[0113] Further, step S205 also includes: planning the PCB layout according to the adjusted board size to obtain PCB layout data; then, based on the optimized ink distribution data, obtaining ink printing parameters; adjusting the ink printing parameters to obtain adjusted ink distribution data; updating the PCB panelization design according to the modified panelization method to obtain PCB panelization data; and finally, constructing the PCB board based on the planned PCB layout data, adjusted ink distribution data, and PCB panelization data to obtain the target design information. Specifically, planning the PCB layout according to the adjusted board size is crucial because it directly affects the PCB board's performance and manufacturing cost. A reasonable layout can maximize the use of board space while reducing signal interference and electromagnetic interference, improving the PCB board's electrical performance. Next, based on the optimized ink distribution data, ink printing parameters are obtained. Uniform ink distribution is crucial for ensuring the PCB board's conductivity and preventing short circuits. By precisely adjusting the ink printing parameters, uniform ink coverage on the PCB board can be ensured, thereby improving the PCB board's reliability and durability. Then, the ink printing parameters are adjusted to obtain adjusted ink distribution data. This step involves multiple trials and corrections to ensure optimal ink distribution. The adjusted ink distribution data will guide the actual printing process, ensuring print quality meets design requirements. The PCB panelization design is then updated based on the revised panelization method, resulting in PCB panelization data. Optimizing the panelization method improves production efficiency, reduces material waste, and simplifies subsequent board separation and assembly processes. Finally, the PCB is constructed based on the planned PCB layout data, the adjusted ink distribution data, and the PCB panelization data to obtain the target design information.

[0114] Furthermore, after step S205, the process includes: designing based on the target design information to obtain a PCB board; baking the PCB board using a multi-layer rack for flat baking to obtain a baked circuit board; and performing a pre-set anti-warping treatment on the baked PCB board to correct the warping, resulting in the target circuit board. Specifically, after obtaining the target design information, the corresponding circuit board is produced and baked using a multi-layer rack for flat baking. This method ensures uniform heating of the entire PCB board during baking by evenly distributing heat, effectively removing moisture and other volatile substances from the board material, and preventing cracking or delamination during subsequent high-temperature processes such as soldering. The baking temperature and time need to be precisely controlled according to the specific material characteristics and process requirements, typically set between 120℃ and 150℃, with a duration of 1 to 2 hours. The baked circuit board may exhibit a certain degree of warping deformation due to uneven stress release within the material. Therefore, a pre-set anti-warping treatment must be performed on the baked circuit board for correction. First, specialized testing equipment, such as a flatness tester, is needed to assess the specific degree of warpage on each circuit board. Then, a corresponding correction plan is developed based on the measurement results. Common correction methods include pressure correction, which involves placing the circuit board under a specialized press, applying appropriate pressure, and maintaining this pressure for a period of time to restore the board's flatness. Another method utilizes a combination of heating and cooling cycles with pressure to gradually eliminate internal stress by altering the material's plastic deformation characteristics at different temperatures, until the ideal flatness is achieved. This meticulous process not only effectively solves the warpage problem caused by the manufacturing process but also further improves the overall quality and lifespan of the circuit board.

[0115] This embodiment obtains the board size, ink distribution data, and panelization method based on design information. The board size is adjusted to a preset size according to a board size processing strategy, resulting in an adjusted board size. The ink distribution data is optimized according to an ink distribution processing strategy, resulting in optimized ink distribution data. The panelization method is modified according to a panelization method processing strategy, resulting in a modified panelization method. Based on the adjusted board size, optimized ink distribution, and modified panelization method, the PCB board is designed to obtain the target design information. By adjusting the board size, optimizing the ink distribution, and modifying the panelization method, system optimization of the PCB design is achieved, improving the flatness of the PCB board.

[0116] Based on the first embodiment of this application, in the third embodiment of this application, the content that is the same as or similar to that in the first embodiment described above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 10 The method for improving the flatness of the navigation system module further includes steps S301 to S304 after step S30:

[0117] Step S301: Based on the module patch information, obtain the patch crimping fixture design method and the board separation method.

[0118] It's important to note that the initial surface mount method should be chosen based on the component type and its layout on the PCB. For miniaturized, high-density components, such as microprocessors or sensors in navigation system modules, fine-pitch surface mount technology allows for precise placement and improves soldering quality. Furthermore, selecting the appropriate placement machine is crucial for the characteristics and requirements of different components. For instance, high-speed placement machines are suitable for standard components like resistors and capacitors, while multi-functional placement machines are better suited for handling complex shapes or larger components. The design of the depaneling method is equally important, directly impacting the quality and production efficiency of the finished PCB. Common depaneling methods include V-cut and stamp hole connections. V-cuts are suitable for standard-shaped PCBs with straight edges, facilitating rapid subsequent separation by cutting V-grooves; while stamp hole connections are suitable for irregularly shaped or specially designed PCBs, providing stronger mechanical support and reducing damage to the PCB during depaneling.

[0119] Step S302: Modify the placement method according to the design and processing strategy of the placement crimping fixture to obtain the modified placement method.

[0120] It's important to note that for products requiring high integration and precision assembly, such as navigation system modules, using fixtures with an accuracy of 0.05mm or 0.1mm ensures the precise placement of even micro-pitch components (such as 0201 resistors and capacitors, or even smaller ones), effectively preventing poor soldering or other potential problems due to positional deviations. During the design phase, special attention must be paid to the selection of fixture materials and processing techniques. For example, materials with excellent stability and wear resistance, such as hardened aluminum alloys or specific engineering plastics, should be selected to ensure the fixture's accuracy remains unchanged over long-term use. Furthermore, for different types of components and application scenarios, customized fixture structures may be necessary, such as designs with anti-static features, which are particularly important for sensitive electronic components. This fixture-based placement method not only significantly improves placement speed and quality but also reduces the need for manual adjustments, lowering the probability of human error. Especially in large-scale production environments, this optimized placement method enables smoother production line operation while improving product reliability and consistency.

[0121] Step S303: Adjust the board splitting method according to the board splitting processing strategy to obtain the adjusted board splitting method.

[0122] It should be noted that in this embodiment, CNC depaneling technology can improve the accuracy and efficiency of module separation. CNC depaneling is a high-precision, automated method, particularly suitable for modules with complex shapes or high-density component layouts. The outline and dimensions of each sub-board are precisely planned during the design phase, and this data is input into the CNC machine. Compared to traditional V-cut or stamp hole connection methods, CNC depaneling can achieve more complex geometric cuts, ensuring smooth, burr-free edges on each individual PCB board, greatly reducing the risk of physical damage to the PCB board during the depaneling process. Furthermore, CNC depaneling allows for precise cutting in irregular shapes or areas requiring special handling, such as avoiding sensitive component areas, thus preventing potential failure points caused by mechanical stress.

[0123] By using CNC panel splitting technology, not only can the quality of finished modules be improved, but production flexibility can also be enhanced. For small-batch, multi-variety production needs, different panel splitting requirements can be quickly adapted simply by changing the CNC program, without the need to change molds or tools, which greatly shortens preparation time and reduces costs.

[0124] Step S304: Based on the modified patch press fixture design and the adjusted board separation method, the module assembly is designed to obtain the target module information.

[0125] It should be noted that the specific process steps are as follows: based on the modified surface mount method, obtain the surface mount crimping fixture design process parameters; then, based on the adjusted board separation method, obtain the board separation process parameters; then, based on the surface mount process parameters, adjust the component layout and surface mount path of the module assembly to obtain surface mount data; then, based on the board separation process parameters, adjust the board separation position of the module assembly to obtain board separation data; finally, based on the surface mount crimping fixture data and board separation data, determine the target module information.

[0126] Furthermore, when determining the surface mount technology (SMT) process parameters, the component size, type, and precise position on the PCB must be considered. For example, using fixtures with a precision of 0.05mm or 0.1mm enables accurate placement of components with fine pitch. These parameters include placement speed, temperature control, and nozzle selection; optimizing these parameters can reduce errors and improve soldering quality. Based on the above SMT process parameters, the component layout and placement path in the PCBA are adjusted to generate detailed placement data. A reasonable layout not only helps improve production efficiency but also optimizes thermal management and electrical performance. Simultaneously, meticulously planned placement paths can avoid the time-consuming problems caused by frequent robotic arm movements, further accelerating the production pace.

[0127] For PCB depaneling process parameters, the key is to determine the optimal cutting path and parameter settings, such as cutting speed, depth, and tool selection. Using CNC depaneling technology allows for the cutting of complex shapes to meet specific design requirements, ensuring that each individual PCB has smooth, burr-free edges. Based on these parameters, the depaneling positions in the PCBA are adjusted to generate accurate depaneling data.

[0128] Finally, the target module information is determined by combining the surface mount crimping fixture data and the board separation data. This step ensures the consistency and reliability of the entire process from component placement to finished product separation.

[0129] This embodiment obtains the surface mount crimping fixture design method and board separation method based on module information. The surface mount method is modified according to the surface mount crimping fixture design processing strategy to obtain a modified surface mount crimping fixture method. The board separation method is then adjusted according to the board separation processing strategy to obtain an adjusted board separation method. Based on the modified surface mount crimping fixture design method and the adjusted board separation method, module assembly is designed to obtain the target module information. By adjusting the surface mount method and board separation method, system optimization of the PCBA design is achieved, improving the flatness of the PCBA.

[0130] Based on the first embodiment of this application, in the fourth embodiment of this application, the content that is the same as or similar to that in the first embodiment described above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 11 After step S40 of the navigation system module flatness improvement method, steps S401 to S403 are also included:

[0131] Step S401: Combine the target design information and target module information to obtain the navigation system module design scheme.

[0132] It should be noted that a complete navigation system module design scheme is formed by combining target design information and target module information, covering the entire process from PCB design to PCBA implementation. First, in the PCB design stage, PCB layout planning is performed based on the adjusted board dimensions. CAD software is used to optimize the position and spacing of each component, ensuring electrical isolation while maximizing material utilization. Simultaneously, specific parameters for the solder mask and silkscreen layers are set based on optimized ink distribution data to ensure signal transmission integrity and label clarity. In the PCBA assembly stage, fixture-based surface mount technology (such as 0.05mm fixture-based surface mount) is used. Component layout and surface mount paths are adjusted according to surface mount process parameters to generate detailed surface mount data. For depaneling, CNC depaneling technology is used to adjust cutting paths and parameter settings according to depaneling process parameters, generating accurate module information. During production, high-precision inspection equipment (such as flatness testers or 3D scanners) is used to acquire module flatness data. These devices provide micron-level measurement accuracy, precisely capturing any minute deformations on the module surface. By analyzing this data, it is possible to identify whether there are warping, dents, or other irregularities, and to determine their severity and specific location.

[0133] Step S402: When the target flatness information meets the preset flatness requirements, the navigation system module design scheme is adopted as the target navigation system module design scheme.

[0134] It should be noted that when the target flatness information meets the preset flatness requirements, for example, the preset flatness requirement is below 0.13mm, and the actual measured flatness data is 0.091917mm, this indicates that our navigation system module design has achieved the expected goal and can be used as the target PCB board design for the navigation system module.

[0135] Specifically, this means that by optimizing board size, ink distribution, and panelization methods, as well as precisely controlling the surface mount and demount processes, the flatness of the modules was successfully kept within a very strict range. For example, by using a 1-to-2 panelization method and a PCBA improvement process with a 0.05mm flatness fixture, we were able to control the average flatness of the PCB and PCBA to 0.1275mm and 0.091917mm respectively, which is far below the preset requirement of 0.13mm.

[0136] This embodiment optimizes PCB design and assembly processes to ensure that the flatness of the final module meets preset standards, thereby improving product quality and reliability and reducing the failure rate.

[0137] This application also provides a navigation system module flatness improvement device, please refer to... Figure 12 The device includes:

[0138] The acquisition module 10 is used to acquire basic information corresponding to the navigation system module, including design information and module information.

[0139] The processing module 20 is used to optimize the design information according to the board size processing strategy, ink distribution processing strategy and panelization method processing strategy to generate target design information.

[0140] The processing module 20 is also used to perform module optimization processing on the module information according to the chip pressing fixture design processing strategy and the board splitting processing strategy to generate target module information.

[0141] The optimization module 30 is used to perform optimization processing based on the target design information and the target module information to obtain the target flatness information.

[0142] The navigation system module flatness improvement device provided in this application, employing the navigation system module flatness improvement method in the above embodiments, can solve the technical problem of how to improve the flatness of PCBs and PCBAs. Compared with the prior art, the beneficial effects of the navigation system module flatness improvement device provided in this application are the same as those of the navigation system module flatness improvement method provided in the above embodiments, and other technical features in the navigation system module flatness improvement device are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.

[0143] In one embodiment, the processing module 20 is further configured to: obtain board size, ink distribution data, and panelization method based on design information; adjust the board size to a preset size according to a board size processing strategy to obtain an adjusted board size; optimize the ink distribution data according to an ink distribution processing strategy to obtain optimized ink distribution data; modify the panelization method according to a panelization method processing strategy to obtain a modified panelization method; and design the PCB board based on the adjusted board size, optimized ink distribution, and modified panelization method to obtain target design information.

[0144] In one embodiment, the processing module 20 is further configured to: plan the PCB layout according to the adjusted board size to obtain PCB layout data; obtain ink printing parameters based on the optimized ink distribution data; adjust the ink printing parameters to obtain adjusted ink distribution data; update the PCB panelization design according to the modified panelization method to obtain PCB panelization data; and construct the PCB board according to the planned PCB layout data, the adjusted ink distribution data, and the PCB panelization data to obtain target design information.

[0145] In one embodiment, the processing module 20 is further configured to design based on target design information to obtain a circuit board; bake the PCB board using a multi-layer rack for baking to obtain a baked circuit board; and correct the baked PCB board by performing a preset pressure-reverse warping treatment to obtain the target PCB board.

[0146] In one embodiment, the processing module 20 is further configured to obtain the surface mount method and the board separation method based on the module information; modify the surface mount method according to the surface mount crimping fixture design processing strategy to obtain the modified surface mount method; adjust the board separation method according to the board separation processing strategy to obtain the adjusted board separation method; and design the PCBA based on the modified surface mount method and the adjusted board separation method to obtain the target module information.

[0147] In one embodiment, the processing module 20 is further configured to: obtain surface mount technology (SMT) process parameters based on the modified SMT method; obtain board separation process parameters based on the adjusted board separation method; adjust the component layout and SMT path of the module based on the SMT process parameters to obtain SMT data; adjust the board separation position of the PCBA based on the board separation process parameters to obtain board separation data; and determine target module information based on the SMT data and the board separation data.

[0148] In one embodiment, the optimization module 30 is further configured to combine the target design information and the target module information to obtain a navigation system module design scheme; when the target flatness information meets the preset flatness requirements, the navigation system module design scheme is used as the target navigation system module design scheme.

[0149] This application provides a navigation system module flatness improvement device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the navigation system module flatness improvement method in the above embodiment 1.

[0150] The following is for reference. Figure 13This document illustrates a structural schematic diagram of a navigation system module flatness improvement device suitable for implementing embodiments of this application. The navigation system module flatness improvement device in this application may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Description), PMPs (Portable Media Players), and in-vehicle terminals (e.g., in-vehicle navigation terminals), as well as fixed terminals such as digital TVs and desktop computers. Figure 13 The navigation system module flatness improvement device shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0151] like Figure 13 The navigation system module smoothness improvement device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in ROM (Read Only Memory) 1002 or a program loaded from storage device 1003 into RAM (Random Access Memory) 1004. RAM 1004 also stores various programs and data required for the operation of the navigation system module smoothness improvement device. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via bus 1005. Input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to I / O interface 1006: input devices 1007 including, for example, touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including, for example, magnetic tapes, hard disks, etc.; and communication devices 1009. Communication device 1009 allows the navigation system module flatness improvement device to communicate wirelessly or wiredly with other devices to exchange data. Although the figure shows a navigation system module flatness improvement device with various systems, it should be understood that it is not required to implement or possess all the systems shown. More or fewer systems can be implemented alternatively.

[0152] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods described in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0153] The navigation system module flatness improvement device provided in this application, employing the navigation system module flatness improvement method in the above embodiments, can solve the technical problem of how to improve the flatness of PCBs and PCBAs. Compared with the prior art, the beneficial effects of the navigation system module flatness improvement device provided in this application are the same as those of the navigation system module flatness improvement method provided in the above embodiments, and other technical features in this navigation system module flatness improvement device are the same as those disclosed in the previous embodiment method, and will not be repeated here.

[0154] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0155] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0156] This application provides a computer-readable medium having computer-readable program instructions (i.e., a computer program) stored thereon that perform calculations to obtain computer-readable program instructions for executing the navigation system module flatness improvement method in the above embodiments.

[0157] The computer-readable medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or any combination thereof. More specific examples of computer-readable media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. Calculations performed in this embodiment show that the computer-readable medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0158] The aforementioned computer-readable medium may be included in the navigation system module flatness improvement device; or it may exist independently and not assembled into the navigation system module flatness improvement device.

[0159] The aforementioned computer-readable medium carries one or more programs that, when executed by the navigation system module leveling improvement device, enable the device to write computer program code for performing the operations of this application in one or more programming languages ​​or combinations thereof. These programming languages ​​include object-oriented programming languages—such as Java, Smalltalk, and C++—and conventional procedural programming languages—such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0160] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0161] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0162] The readable medium provided in this application is a computer-readable medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-described method for improving the flatness of navigation system modules, and can solve the technical problem of how to improve the flatness of PCBs and PCBAs. Compared with the prior art, the beneficial effects of the computer-readable medium provided in this application are the same as the beneficial effects of the method for improving the flatness of navigation system modules provided in the above embodiments, and will not be repeated here.

[0163] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the navigation system module flatness improvement method described above.

[0164] The computer program product provided in this application can solve the technical problem of how to improve the flatness of PCBs and PCBAs. Compared with the prior art, the beneficial effects of the computer program product provided in this application are the same as those of the navigation system module flatness improvement method provided in the above embodiments, and will not be repeated here.

[0165] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A method for improving the flatness of a navigation system module, characterized in that, The method includes: Obtain basic information corresponding to the navigation system module, including design information and module information; The design information is optimized based on the board size processing strategy, ink distribution processing strategy, and panel assembly method processing strategy to generate the target design information. Based on the design and processing strategies of the patch crimping fixture and the board splitting processing strategy, the module information is optimized to generate target module information; Based on the target design information and the target module information, optimization processing is performed to obtain the target flatness information; The step of optimizing the design information based on the board size processing strategy, ink distribution processing strategy, and panelization method processing strategy to generate target design information includes: Based on the design information, the board size, ink distribution data, and panel assembly method are obtained; The board size is adjusted to a preset size according to the board size processing strategy to obtain the adjusted board size; The ink distribution data is optimized according to the ink distribution processing strategy to obtain optimized ink distribution data; The puzzle method is modified according to the puzzle method processing strategy to obtain the modified puzzle method; The PCB board is designed based on the adjusted board size, the optimized ink distribution, and the modified panelization method to obtain the target design information; The step of optimizing the module information according to the patch press fixture design and board separation strategies to generate target module information includes: Based on the module information, the surface mount method and the board separation method are obtained; The surface mount method is modified according to the surface mount crimping fixture design and processing strategy to obtain the modified surface mount method; The board splitting method is adjusted according to the board splitting processing strategy to obtain the adjusted board splitting method; Based on the modified surface mount method and the adjusted board separation method, the PCBA is designed to obtain the target module information.

2. The method as described in claim 1, characterized in that, The step of designing the PCB board based on the adjusted board size, the optimized ink distribution, and the modified panelization method to obtain the target design information includes: The PCB layout is planned based on the adjusted material dimensions to obtain PCB layout data. Based on the optimized ink distribution data, ink printing parameters are obtained; The ink printing parameters are adjusted to obtain the adjusted ink distribution data; The PCB panel design is updated based on the modified panelization method to obtain PCB panelization data; The PCB board is constructed based on the PCB layout data, the adjusted ink distribution data, and the PCB board panelization data to obtain the target design information.

3. The method as described in claim 1, characterized in that, After the step of designing the PCB board based on the adjusted board size, the optimized ink distribution, and the modified panelization method to obtain the target design information, the method further includes: Based on the target design information, a PCB board is designed to obtain the PCB board. The PCB board is baked using a multi-layer rack placed flat for baking, resulting in a baked PCB board. The baked PCB board is corrected by a preset pressure-reverse warping treatment to obtain the target circuit board.

4. The method as described in claim 1, characterized in that, The step of designing the PCBA based on the modified surface mount method and the adjusted board separation method to obtain the target module information includes: Based on the modified placement method, the placement process parameters are obtained; Based on the adjusted board separation method, the board separation process parameters are obtained; Adjust the component layout and placement path of the PCB according to the surface mount process parameters to obtain the surface mount data; The board separation position of the adjustment module is determined according to the board separation process parameters to obtain board separation data; The target module information is determined based on the patch data and the board separation data.

5. The method as described in claim 1, characterized in that, After the step of optimizing based on the target design information and the target module information to obtain the target flatness information, the following steps are included: By combining the target design information and the target module information, a navigation system module design scheme is obtained; When the target flatness information meets the preset flatness requirements, the navigation system module design scheme is adopted as the target navigation system module design scheme.

6. A device for improving the flatness of a navigation system module, characterized in that, The device includes: The acquisition module is used to acquire basic information corresponding to the navigation system module, including design information and module information. The processing module is used to optimize the design information according to the board size processing strategy, ink distribution processing strategy, and panelization method processing strategy to generate target design information; it is also used to obtain board size, ink distribution data, and panelization method according to the design information; adjust the board size to a preset size according to the board size processing strategy to obtain the adjusted board size; optimize the ink distribution data according to the ink distribution processing strategy to obtain optimized ink distribution data; modify the panelization method according to the panelization method processing strategy to obtain the modified panelization method; and design the PCB board based on the adjusted board size, the optimized ink distribution, and the modified panelization method to obtain the target design information. The processing module is further configured to perform module optimization processing on the module information according to the surface mount crimping fixture design processing strategy and the board separation processing strategy to generate target module information; it is also configured to obtain the surface mount method and the board separation method according to the module information; modify the surface mount method according to the surface mount crimping fixture design processing strategy to obtain the modified surface mount method; adjust the board separation method according to the board separation processing strategy to obtain the adjusted board separation method; and design the PCBA based on the modified surface mount method and the adjusted board separation method to obtain the target module information. The optimization module is used to perform optimization processing based on the target design information and the target module information to obtain target flatness information.

7. A device for improving the flatness of a navigation system module, characterized in that, The device includes: a memory, a processor, and a navigation system module flatness improvement program stored in the memory and executable on the processor, the navigation system module flatness improvement program being configured to implement the steps of the navigation system module flatness improvement method as described in any one of claims 1 to 5.

8. A medium, characterized in that, The medium stores a navigation system module flatness improvement program, which, when executed by a processor, implements the steps of the navigation system module flatness improvement method as described in any one of claims 1 to 5.

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