Phase adjusting method and phase adjusting device

Abstract

The invention discloses a phase adjustment method and a phase adjustment device, and belongs to the technical field of data transmission, and the method comprises the steps: determining a target adjustment amount according to the phase difference between an I clock signal and a Q clock signal of an obtained IQ phase clock signal; when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, determining a first adjustment code word according to the target adjustment amount; based on the first adjustment code word, the first adjustment module is controlled to adjust the phase of a first signal to obtain a second signal, and the first signal is the I clock signal or the Q clock signal; screening an extreme value adjusting variable from a maximum value and a minimum value in the adjusting range according to the target adjusting variable; and controlling the second adjusting module to adjust the phase of the second signal based on the extreme value adjusting quantity to obtain a target IQ phase clock signal. The adjustment range of the IQ phase is expanded, so that the phase difference of the adjusted IQ phase clock signal is closer to 90 degrees.

Description

Technical Field

[0001] The present application relates to the technical field of data transmission, and more specifically, to a phase adjustment method and a phase adjustment device. Background Art

[0002] In high-speed serial receiver / decoder (SerDes) chips, the I / Q phase clock is a set of clock signals with an orthogonal phase relationship, primarily used for data sampling and clock recovery at the receiver. The I clock (In-phase) and Q clock (Quadrature-phase) have a phase difference of 90 degrees. This orthogonal relationship enables the receiver to simultaneously capture the data signal at different phase points, thereby more accurately determining the optimal data sampling location. However, due to factors such as circuit component characteristics, noise and interference, and environmental factors, the phase difference between the I and Q clock signals of the I / Q phase clock cannot reach the ideal 90-degree phase difference. Furthermore, the limited phase adjustment range makes it difficult to adjust the phase difference between the I and Q clock signals to 90 degrees. Summary of the Invention

[0003] The present application proposes a phase adjustment method and a phase adjustment device to improve the above-mentioned defects.

[0004] In a first aspect, the present application provides a phase adjustment method, which is applied to a control module of a phase adjustment device, wherein the phase adjustment device also includes a cascaded first adjustment module and a second adjustment module, and the method includes: determining a target adjustment amount based on the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal; when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, determining a first adjustment codeword based on the target adjustment amount; controlling the first adjustment module to adjust the phase of the first signal based on the first adjustment codeword to obtain a second signal, where the first signal is the I clock signal or the Q clock signal; filtering out an extreme value adjustment amount from the maximum value and the minimum value in the adjustment range based on the target adjustment amount; and controlling the second adjustment module to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

[0005] Optionally, for a possible implementation, it also includes: when it is detected that the target adjustment amount does not exceed the adjustment range of the second adjustment module, controlling the second adjustment module to adjust the phase of the first signal based on the target adjustment amount to obtain a target IQ phase clock signal, where the first signal is the I clock signal or the Q clock signal.

[0006] Optionally, for a possible implementation, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, the first adjustment codeword is determined according to the target adjustment amount, including: when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, then the first adjustment codeword is obtained based on the default codeword plus m, where n is a positive integer and m is a positive integer.

[0007] Optionally, for a possible implementation, the extreme value adjustment amount is screened out from the maximum value and the minimum value in the adjustment range according to the target adjustment amount, including: when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, the maximum value in the adjustment range is determined to be the extreme value adjustment amount.

[0008] Optionally, for a possible implementation, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, the first adjustment codeword is determined according to the target adjustment amount, including: when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, then the first adjustment codeword is obtained based on the default codeword minus m, where n is a positive integer and m is a positive integer.

[0009] Optionally, for a possible implementation, the extreme value adjustment amount is screened out from the maximum value and the minimum value in the adjustment range according to the target adjustment amount, including: when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, determining that the minimum value in the adjustment range is the extreme value adjustment amount.

[0010] Optionally, for a possible implementation, after the second adjustment module is controlled based on the extreme value adjustment amount to adjust the phase of the second signal and obtain the target IQ phase clock signal, it also includes: if the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90°, then the first adjustment codeword is used as the new default codeword; returning to execute the operation of determining the target adjustment amount based on the phase difference between the I clock signal and the Q clock signal of the obtained IQ phase clock signal and subsequent operation steps until it is detected that the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is 90°.

[0011] Optionally, for a possible implementation, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, before determining the first adjustment codeword based on the target adjustment amount, it also includes: if it is detected within k consecutive clock cycles that the phase difference of the IQ phase clock signal obtained in each clock cycle is within a preset range, then it is determined that the target adjustment amount exceeds the adjustment range of the second adjustment module, k is a positive integer; if it is detected within k consecutive clock cycles that the phase difference of the IQ phase clock signal obtained in at least one clock cycle is not within the preset range, then it is determined that the target adjustment amount does not exceed the adjustment range of the second adjustment module.

[0012] In the second aspect, the present application also provides a phase adjustment device, comprising: a cascaded first adjustment module and a second adjustment module; a control module, the control module being connected to the first adjustment module and the second adjustment module respectively, the control module being used to determine a target adjustment amount based on the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal; when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, determining a first adjustment codeword based on the target adjustment amount; based on the first adjustment codeword, controlling the first adjustment module to adjust the phase of the first signal to obtain a second signal, the first signal being the I clock signal or the Q clock signal; based on the target adjustment amount, filtering out an extreme value adjustment amount from the maximum value and the minimum value in the adjustment range; based on the extreme value adjustment amount, controlling the second adjustment module to adjust the phase of the second signal to obtain a target IQ phase clock signal.

[0013] Optionally, for a possible implementation, the control module is also used to control the second adjustment module to adjust the phase of the first signal based on the target adjustment amount when it is detected that the target adjustment amount does not exceed the adjustment range of the second adjustment module, so as to obtain a target IQ phase clock signal, where the first signal is the I clock signal or the Q clock signal.

[0014] Optionally, for a possible implementation, the control module is also used to, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, then a first adjustment codeword is obtained based on the default codeword plus m, where n is a positive integer and m is a positive integer.

[0015] Optionally, for a possible implementation, the control module is also used to, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, determine the maximum value in the adjustment range as the extreme adjustment amount.

[0016] Optionally, for a possible implementation, the control module is also used to, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, then a first adjustment codeword is obtained based on the default codeword minus m, where n is a positive integer and m is a positive integer.

[0017] Optionally, for a possible implementation, the control module is also used to, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, determine the minimum value in the adjustment range as the extreme adjustment amount.

[0018] Optionally, for a possible implementation, the control module is also used to use the first adjustment codeword as a new default codeword if the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90°; return to execute the operation of determining the target adjustment amount based on the acquired phase difference between the I clock signal and the Q clock signal of the IQ phase clock signal and subsequent operation steps until it is detected that the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is 90°.

[0019] Optionally, for a possible implementation, the control module is also used to determine that the target adjustment amount exceeds the adjustment range of the second adjustment module if it is detected within k consecutive clock cycles that the phase difference of the IQ phase clock signal obtained in each clock cycle is within a preset range, where k is a positive integer; if it is detected within k consecutive clock cycles that the phase difference of the IQ phase clock signal obtained in at least one clock cycle is not within the preset range, then it is determined that the target adjustment amount does not exceed the adjustment range of the second adjustment module.

[0020] The present application proposes a phase adjustment method. First, a target adjustment amount is determined based on the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal; second, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, a first adjustment codeword is determined based on the target adjustment amount; then, based on the first adjustment codeword, the first adjustment module is controlled to adjust the phase of the first signal to obtain a second signal, where the first signal is the I clock signal or the Q clock signal; based on the target adjustment amount, an extreme value adjustment amount is screened out from the maximum value and the minimum value in the adjustment range; finally, based on the extreme value adjustment amount, the second adjustment module is controlled to adjust the phase of the second signal to obtain a target IQ phase clock signal.

[0021] Compared with adjusting the phase of the IQ clock signal only through a first-level phase interpolator, which has a limited adjustment range, the present application performs phase adjustment through a first adjustment module and a second adjustment module, thereby expanding the range of phase adjustment. In addition, the first adjustment codeword and the extreme value adjustment amount are determined through the target adjustment amount. The first adjustment codeword is used to control the first adjustment module to adjust the phase of the first signal to obtain the second signal. Then, the extreme value adjustment amount is controlled to control the second adjustment module to adjust the phase of the second signal to obtain the target IQ phase clock signal, thereby expanding the adjustment range of the IQ phase and making the phase difference of the adjusted IQ clock signal closer to 90 degrees.

[0022] Other features and advantages of the present application will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present application. The purposes and other advantages of the present application can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0024] Figure 1 A flow chart of a phase adjustment method provided in an embodiment of the present application is shown;

[0025] Figure 2 A flow chart of a phase adjustment method provided by another embodiment of the present application is shown;

[0026] Figure 3 A flow chart of a phase adjustment method provided in another embodiment of the present application is shown;

[0027] Figure 4 A flow chart of a phase adjustment method provided in another embodiment of the present application is shown;

[0028] Figure 5 A flow chart of a phase adjustment method provided in another embodiment of the present application is shown;

[0029] Figure 6 The following is a structural block diagram of a phase adjustment device provided in an embodiment of the present application;

[0030] Figure 7 The figure shows a structural block diagram of the control module provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application for which protection is claimed, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work fall within the scope of protection of the present application.

[0032] It should be noted that similar reference numerals and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and should not be understood as indicating or implying relative importance.

[0033] In high-speed serial receiver / decoder (SerDes) chips, the I / Q phase clock is a set of clock signals with an orthogonal phase relationship, primarily used for data sampling and clock recovery at the receiver. The I clock (In-phase) and Q clock (Quadrature-phase) have a phase difference of 90 degrees. This orthogonal relationship enables the receiver to simultaneously capture the data signal at different phase points, thereby more accurately determining the optimal data sampling location. However, due to factors such as circuit component characteristics, noise and interference, and environmental factors, the phase difference between the I and Q clock signals of the I / Q phase clock cannot reach the ideal 90-degree phase difference. Furthermore, the limited phase adjustment range makes it difficult to adjust the phase difference between the I and Q clock signals to 90 degrees.

[0034] Therefore, in an embodiment of the present application, a phase adjustment method and a phase adjustment device are provided to solve or partially solve the above problems.

[0035] See also Figure 1 , which shows a flow chart of a phase adjustment method provided in an embodiment of the present application. The method is applied to a control module of a phase adjustment device. The phase adjustment device also includes a cascaded first adjustment module and a second adjustment module, wherein both the first adjustment module and the second adjustment module are phase interpolators for adjusting the phase of a signal. Specifically, the method includes steps S101 to S105.

[0036] Step S101: determining a target adjustment amount according to a phase difference between an I clock signal and a Q clock signal of an acquired IQ phase clock signal.

[0037] It's important to note that in high-speed serial communications, data typically requires modulation techniques to transfer a baseband signal onto a carrier signal for transmission. At the receiving end, demodulation is used to restore the carrier signal to its original baseband signal. The IQ phase clock signal is used to both sample the demodulated baseband signal and recover the clock signal from the received signal, making it crucial for correct data deserialization and processing. The IQ phase clock signal consists of the I clock signal and the Q clock signal.

[0038] It should be noted that the IQ phase clock signal is obtained by the clock source and the processing module. Specifically, the clock source generates a first clock signal, and then the first clock signal is processed by the processing module to obtain the IQ phase clock signal. The IQ phase clock signal includes a first clock signal and a second clock signal. In theory, the phase difference between the first clock signal and the second clock signal is 90 degrees. However, due to the influence of various factors, the phase difference between the first clock signal and the second clock signal is difficult to reach the ideal 90 degrees. For this reason, it is necessary to adjust the phase difference between the I clock signal and the Q clock signal of the IQ phase clock signal. Different phase differences correspond to different target adjustment amounts, and the target adjustment amount represents the control amount of the adjustment phase interpolator. For this reason, it is necessary to determine the target adjustment amount based on the phase difference between the I clock signal and the Q clock signal of the obtained IQ phase clock signal.

[0039] It should be noted that the target adjustment value can be positive or negative. If the target adjustment value is positive, it means that the current signal phase is lagging and the phase angle value needs to be increased. If the target adjustment value is negative, it means that the current signal phase is leading and the phase angle value needs to be decreased.

[0040] Step S102: when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, determining a first adjustment codeword according to the target adjustment amount.

[0041] It should be noted that the adjustment range of the second adjustment module includes both positive and negative numbers. For example, the adjustment range of the second adjustment module is [-P, P], where P is a positive number. If the phase angle corresponding to the target adjustment amount is outside the adjustment range, it is considered that the target adjustment amount exceeds the adjustment range of the second adjustment module.

[0042] The first adjustment codeword represents an adjustment amount for controlling the first adjustment module. The first adjustment module can adjust the phase of the signal based on the first adjustment codeword. The larger the absolute value of the first adjustment codeword, the larger the phase adjustment amount of the first adjustment module, and vice versa.

[0043] Because the phase adjustment range of the second adjustment module is limited, when the target adjustment range exceeds the adjustment range of the second adjustment module, the first adjustment module and the second adjustment module need to be combined to adjust the phase of the signal. When the target adjustment range does not exceed the adjustment range of the second adjustment module, the phase is adjusted based on the second adjustment module.

[0044] It should be noted that the target adjustment amount is obtained by comparing the detected phase difference between the I clock signal and the Q clock signal with 90 degrees. The ideal phase difference between the I clock signal and the Q clock signal is 90 degrees. When the actual phase difference is not 90 degrees, the actual phase difference needs to be adjusted to 90 degrees.

[0045] Moreover, the target adjustment amount corresponds to the actual phase adjustment amount. For example, the adjustment range of the phase interpolator is -9 degrees to 9 degrees, and the corresponding adjustment amount is -3 to 3. If the phase difference is detected to be greater than 100 degrees, the phase needs to be adjusted by at least 10 degrees through the phase interpolator, and this adjustment amount has exceeded the adjustment range of the phase interpolator.

[0046] To this end, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, it means that only based on the phase of the signal adjusted by the second adjustment module, the phase difference between the adjusted I clock signal and the Q clock signal still cannot reach 90 degrees, and the phase needs to be adjusted jointly by the second adjustment module and the first adjustment module. To this end, it is necessary to determine the first adjustment codeword.

[0047] It should be noted that the phase adjustment amount corresponding to the first adjustment codeword does not exceed the target adjustment amount. The first adjustment codeword can be determined based on the target adjustment amount, or based on the target adjustment amount within multiple clock cycles. For details, please refer to subsequent embodiments.

[0048] Step S103: Based on the first adjustment codeword, the first adjustment module is controlled to adjust the phase of the first signal to obtain a second signal, where the first signal is the I clock signal or the Q clock signal.

[0049] It should be noted that the first adjustment module is controlled to adjust the phase of the first signal based on the first adjustment codeword to obtain the second signal. When the first signal is an I clock signal, this indicates that the first adjustment module adjusts the phase of the I clock signal, while the phase of the Q clock signal remains unchanged. Adjusting the phase of the I clock signal achieves the purpose of changing the phase difference between the I clock signal and the Q clock signal. When the first signal is a Q clock signal, this indicates that the first adjustment module adjusts the phase of the Q clock signal, while the phase of the I clock signal remains unchanged. Adjusting the phase of the Q clock signal achieves the purpose of changing the phase difference between the I clock signal and the Q clock signal.

[0050] It should be noted that the phase interpolator requires multiple input clocks with different phases, such as four-phase or eight-phase inputs. Taking the four-phase input phase interpolator as an example, it includes four inputs: 0 degrees, 90 degrees, 180 degrees, and 270 degrees. To generate an output clock of 150 degrees, select two adjacent phases of 90 degrees and 180 degrees, superimpose them according to a certain weight, and thus obtain an output clock of 150 degrees. If the adjustment amount is positive, it means that the phase of the current signal lags behind the target phase, and the phase angle value needs to be increased. At this time, the phase interpolator will increase the weight of the phase advance, so that the output signal phase is adjusted in the advance direction. If the adjustment amount is negative, it means that the phase of the current signal is ahead of the target phase, and the phase angle value needs to be reduced. At this time, the phase interpolator will increase the weight of the phase lag, so that the output signal phase is adjusted in the lag direction.

[0051] Step S104: selecting an extreme adjustment amount from the maximum value and the minimum value in the adjustment range according to the target adjustment amount.

[0052] It should be noted that the extreme value adjustment variable represents the control variable of the second adjustment module. The phase of the adjustment signal of the second adjustment module can be controlled based on the extreme value adjustment variable. The extreme value adjustment variable is the maximum or minimum value within the adjustment range of the second adjustment module. When the target adjustment variable exceeds the adjustment range of the second adjustment module, the second adjustment module adjusts based on the maximum adjustment range. However, different signs of the target adjustment variable correspond to different values ​​of the extreme value adjustment variable.

[0053] For example, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if the sign of the target adjustment amount is positive, the extreme adjustment amount is the maximum value of the adjustment range; if the sign of the target adjustment amount is negative, the extreme adjustment amount is the minimum value of the adjustment range. For details, please refer to the subsequent embodiments.

[0054] Step S105: controlling the second adjustment module to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

[0055] It should be noted that the second adjustment module is controlled based on the extreme value adjustment amount to adjust the phase of the second signal. That is, after the phase of the first signal is adjusted by the first adjustment module, the phase is further adjusted by the second adjustment module to achieve two-stage phase adjustment. In order to expand the adjustment range of the phase, the target IQ phase clock signal is obtained. The target IQ phase clock signal includes an I clock signal and a Q clock signal. The target IQ phase clock signal is used for data sampling and clock recovery processes at the receiving end.

[0056] The present application proposes a phase adjustment method. First, a target adjustment amount is determined based on the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal; second, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, a first adjustment codeword is determined based on the target adjustment amount; then, based on the first adjustment codeword, the first adjustment module is controlled to adjust the phase of the first signal to obtain a second signal, where the first signal is the I clock signal or the Q clock signal; based on the target adjustment amount, an extreme value adjustment amount is screened out from the maximum value and the minimum value in the adjustment range; finally, based on the extreme value adjustment amount, the second adjustment module is controlled to adjust the phase of the second signal to obtain a target IQ phase clock signal.

[0057] Compared with adjusting the phase of the IQ clock signal only through a first-level phase interpolator, which has a limited adjustment range, the present application performs phase adjustment through a first adjustment module and a second adjustment module, thereby expanding the range of phase adjustment. In addition, the first adjustment codeword and the extreme value adjustment amount are determined through the target adjustment amount. The first adjustment codeword is used to control the first adjustment module to adjust the phase of the first signal to obtain the second signal. Then, the extreme value adjustment amount is controlled to control the second adjustment module to adjust the phase of the second signal to obtain the target IQ phase clock signal, thereby expanding the adjustment range of the IQ phase and making the phase difference of the adjusted IQ clock signal closer to 90 degrees.

[0058] It should be noted that the adjustment range of the first adjustment module may be the same as or different from the adjustment range of the second adjustment module, depending on actual conditions.

[0059] See also Figure 2 , which shows a flow chart of a phase adjustment method provided in an embodiment of the present application. The method is applied to a control module of a phase adjustment device, and the phase adjustment device also includes a cascaded first adjustment module and a second adjustment module, specifically including steps S201 to S206.

[0060] Step S201: determining a target adjustment amount according to the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal.

[0061] Step S202: when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, determining a first adjustment codeword according to the target adjustment amount.

[0062] Step S203: Based on the first adjustment codeword, the first adjustment module is controlled to adjust the phase of the first signal to obtain a second signal, where the first signal is the I clock signal or the Q clock signal.

[0063] Step S204: selecting an extreme adjustment amount from the maximum value and the minimum value in the adjustment range according to the target adjustment amount.

[0064] Step S205: controlling the second adjustment module to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

[0065] Among them, step S201 and step S205 have been described in detail in the above embodiments and will not be repeated here.

[0066] Step S206: When it is detected that the target adjustment amount does not exceed the adjustment range of the second adjustment module, the second adjustment module is controlled based on the target adjustment amount to adjust the phase of the first signal to obtain a target IQ phase clock signal, where the first signal is the I clock signal or the Q clock signal.

[0067] It should be noted that if it is detected that the target adjustment amount does not exceed the adjustment range of the second adjustment module, the second adjustment module performs phase adjustment on the first signal to obtain a target IQ phase clock signal. The target IQ phase clock signal includes an I clock signal and a Q clock signal.

[0068] As an exemplary embodiment, the adjustment range of the second adjustment module is -9 degrees to 9 degrees, and the corresponding adjustment amount is -3 to 3. If the phase difference is detected to be in the range of 93 degrees to 95 degrees, and the adjustment range does not exceed the adjustment range of the second adjustment module, it is determined that the target adjustment amount does not exceed the adjustment range of the second adjustment module.

[0069] See also Figure 3 , which shows a flow chart of a phase adjustment method provided in an embodiment of the present application. The method is applied to a control module of a phase adjustment device, and the phase adjustment device also includes a cascaded first adjustment module and a second adjustment module, specifically including steps S301 to S305.

[0070] Step S301: determining a target adjustment amount according to the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal.

[0071] Among them, step S301 has been described in detail in the above embodiment and will not be repeated here.

[0072] Step S302: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, then the first adjustment codeword is obtained based on the default codeword plus m, where n is a positive integer and m is a positive integer.

[0073] It should be noted that, considering that the clock signals at the transmitting and receiving ends may have deviations and jitters, and that the phase and amplitude of the signals may change during transmission, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, it is necessary to determine whether the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle for n consecutive clock cycles is greater than the maximum value of the adjustment range. If it is detected that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle for n consecutive clock cycles is greater than the maximum value of the adjustment range, a first adjustment codeword is obtained based on the default codeword plus m. This can obtain a more accurate first adjustment codeword.

[0074] It is understood that the adjustment range includes 0, positive values, and negative values. A positive adjustment value indicates that the current signal phase lags relative to the target phase and needs to be increased by an angle. A target adjustment value greater than the maximum value of the adjustment range indicates that the target adjustment value is greater than the maximum value of the adjustment range, and the phase after adjustment based on the maximum value of the second adjustment module still lags. To this end, the first adjustment codeword is required to continue to increase the phase angle value, and therefore the first adjustment codeword is a positive value.

[0075] In an exemplary embodiment, the default codeword is 0 and m is 1. When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, the first adjustment codeword obtained by adding 1 to the default codeword 0 is 1.

[0076] It should be noted that the first adjustment codeword corresponds to the phase adjustment amount, and the adjustment amount corresponding to the first adjustment codeword is pre-set. For example, one unit of the first adjustment codeword corresponds to an actual new phase adjustment amount of 2 degrees. For example, one unit of the first adjustment codeword corresponds to an actual new phase adjustment amount of 0.65 degrees.

[0077] Step S303: Based on the first adjustment codeword, the first adjustment module is controlled to adjust the phase of the first signal to obtain a second signal, where the first signal is the I clock signal or the Q clock signal.

[0078] Among them, step S303 has been described in detail in the above embodiment and will not be repeated here.

[0079] Step S304: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected in n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, the maximum value in the adjustment range is determined to be the extreme adjustment amount.

[0080] It can be understood that when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, it means that the target adjustment amount is positive, the phase of the current signal is lagging, and the phase angle value needs to be increased. For this purpose, the second adjustment module is determined to adjust based on the adjustment amount of the maximum value in the adjustment range, and the extreme value adjustment amount is the maximum value of the adjustment range.

[0081] Step S305: controlling the second adjustment module to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

[0082] Among them, step S305 has been described in detail in the above embodiment and will not be repeated here.

[0083] See also Figure 4 , which shows a flow chart of a phase adjustment method provided in an embodiment of the present application. The method is applied to a control module of a phase adjustment device, and the phase adjustment device also includes a cascaded first adjustment module and a second adjustment module, specifically including steps S401 to S405.

[0084] Step S401: determining a target adjustment amount according to the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal.

[0085] Among them, step S401 has been described in detail in the above embodiment and will not be repeated here.

[0086] Step S402: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, then the first adjustment codeword is obtained based on the default codeword minus m, where n is a positive integer and m is a positive integer.

[0087] It should be noted that, taking into account the possible deviation and jitter of the clock signals at the transmitting and receiving ends, and the changes in the phase and amplitude of the signal during the transmission process, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, it is necessary to determine whether the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle for n consecutive clock cycles is less than the minimum value of the adjustment range. If it is detected that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle for n consecutive clock cycles is less than the minimum value of the adjustment range, then the first adjustment codeword is obtained based on the default codeword minus m, and a more accurate first adjustment codeword can be obtained.

[0088] It is understood that the adjustment range includes 0, positive values, and negative values. A negative adjustment value indicates that the current signal phase is leading and needs to be reduced. If the target adjustment value is less than the minimum value of the adjustment range, it means that the target adjustment value is less than the minimum value of the adjustment range, and the phase after adjustment based on the minimum value of the second adjustment module is still leading. To this end, the first adjustment codeword is required to continue to reduce the phase angle value, and therefore the first adjustment codeword is a negative value.

[0089] In an exemplary embodiment, the default codeword is 0 and m is 1. When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, the first adjustment codeword obtained based on the default codeword 0 minus 1 is -1.

[0090] Step S403: controlling the first adjustment module to adjust the phase of the first signal based on the first adjustment codeword to obtain a second signal, where the first signal is the I clock signal or the Q clock signal.

[0091] Among them, step S403 has been described in detail in the above embodiment and will not be repeated here.

[0092] Step S404: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, the minimum value in the adjustment range is determined to be the extreme adjustment amount.

[0093] It can be understood that when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, it means that the target adjustment amount is negative, the phase of the current signal is advanced, and the phase angle value needs to be reduced. For this purpose, the second adjustment module is determined to perform adjustment based on the minimum adjustment amount, and the extreme value adjustment amount is the minimum value of the adjustment range.

[0094] Step S405: controlling the second adjustment module to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

[0095] Among them, step S405 has been described in detail in the above embodiment and will not be repeated here.

[0096] See also Figure 5, which shows a flow chart of a phase adjustment method provided in an embodiment of the present application. The method is applied to a control module of a phase adjustment device, and the phase adjustment device also includes a cascaded first adjustment module and a second adjustment module, specifically including steps S501 to S507.

[0097] Step S501: determining a target adjustment amount according to the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal.

[0098] Step S502: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, then the first adjustment codeword is obtained based on the default codeword plus m, where n is a positive integer and m is a positive integer.

[0099] Step S503: Based on the first adjustment codeword, the first adjustment module is controlled to adjust the phase of the first signal to obtain a second signal, where the first signal is the I clock signal or the Q clock signal.

[0100] Step S504: selecting an extreme adjustment amount from the maximum value and the minimum value in the adjustment range according to the target adjustment amount.

[0101] Step S505: controlling the second adjustment module to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

[0102] Among them, step S501 and step S505 have been described in detail in the above embodiments and will not be repeated here.

[0103] Step S506: If the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90°, the first adjustment codeword is used as a new default codeword.

[0104] It can be understood that the target IQ phase clock signal represents the signal after phase adjustment. If the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is 90 degrees, the phase adjustment is completed. If the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90 degrees, it indicates that the adjustment amount needs to be further adjusted. For this purpose, the first adjustment codeword is used as the new default codeword.

[0105] Step S507: Return to the operation of determining the target adjustment amount based on the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal and subsequent operation steps until it is detected that the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is 90°.

[0106] It should be noted that after the first adjustment codeword is used as the new default codeword, the operation of determining the target adjustment amount by the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal and subsequent operation steps are returned until it is detected that the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is 90°.

[0107] In an optional embodiment, a target adjustment amount is determined based on the phase difference between the I clock signal and the Q clock signal of the obtained IQ phase clock signal. A first adjustment codeword is determined to be 1 based on the target adjustment amount. Based on the first adjustment codeword 1, the first adjustment module is controlled to adjust the phase of the first signal to obtain a second signal. Based on the target adjustment amount, an extreme adjustment amount is determined to be the maximum value in the adjustment range. Based on the extreme adjustment amount, the second adjustment module is controlled to adjust the phase of the second signal to obtain a target IQ phase clock signal. If the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90 degrees, the first adjustment codeword 1 is used as the new default codeword, and the above process is returned to obtain the target IQ phase clock signal. It is then determined whether the phase difference of the target IQ phase clock signal is 90 degrees. If the phase difference of the target IQ phase clock signal is 90 degrees at this time, the loop is no longer repeated, and the phase adjustment is completed. If the phase of the target IQ phase clock signal is not 90 degrees at this time, the phase adjustment is detected and adjusted again. It should be noted that each return execution obtains the IQ phase clock signal at the current moment.

[0108] Exemplarily, the first adjustment codeword obtained for the first time is 1, the extreme adjustment amount is the maximum value in the adjustment range, the first adjustment module is controlled based on the first adjustment codeword to perform phase adjustment on the first signal to obtain the second signal, and the second adjustment module is controlled based on the extreme adjustment amount to perform phase adjustment on the second signal to obtain the target IQ phase clock signal. If the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90 degrees, the default codeword is determined to be 1, and a new codeword 2 is obtained. Similarly, when the first codeword is 4, the phase difference between the I clock signal and the Q clock signal of the obtained target IQ phase clock signal is 90 degrees or approximately 90 degrees, and it is considered that the IQ phase adjustment is completed, wherein the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal obtained when the first codeword is 4 is the first phase difference, and the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal obtained when the first codeword is 5 is the second phase difference, and 90 degrees is between the first phase difference and the second phase difference. The first code word "1" represents the minimum adjustment amount of the first adjustment module.

[0109] In an optional embodiment, a target adjustment amount is determined based on the phase difference between the I clock signal and the Q clock signal of the obtained IQ phase clock signal. When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, a first adjustment codeword is obtained based on the default codeword minus m, where n is a positive integer and m is a positive integer. Based on the target adjustment amount, the first adjustment codeword is determined to be -1, and based on the first adjustment codeword -1, the first adjustment module is controlled to adjust the phase of the first signal to obtain the second signal. Based on the target adjustment amount, an extreme value adjustment amount is determined to be the minimum value in the adjustment range, and based on the extreme value adjustment amount, the second adjustment module is controlled to adjust the phase of the second signal to obtain the target IQ phase clock signal. If the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90 degrees, the first adjustment codeword -1 is used as the new default codeword, and the above process is returned to obtain the target IQ phase clock signal. Then, it is determined whether the phase difference of the target IQ phase clock signal is 90 degrees. If the phase difference of the target IQ phase clock signal is 90 degrees at this time, the loop is no longer repeated, and the phase adjustment is completed. If the phase of the target IQ phase clock signal is not 90 degrees at this time, the loop is repeated to detect and adjust the phase. It should be noted that each return execution obtains the IQ phase clock signal at the current moment.

[0110] Exemplarily, the first adjustment codeword obtained for the first time is -1, the extreme adjustment amount is the minimum value in the adjustment range, the first adjustment module is controlled based on the first adjustment codeword to perform phase adjustment on the first signal to obtain the second signal, and the second adjustment module is controlled based on the extreme adjustment amount to perform phase adjustment on the second signal to obtain a target IQ phase clock signal. If the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90 degrees, the default codeword is determined to be -1, and a new codeword -2 is obtained. Similarly, when the first codeword is -5, the phase difference between the I clock signal and the Q clock signal of the obtained target IQ phase clock signal is 90 degrees or approximately 90 degrees, and it is considered that the IQ phase adjustment is completed, wherein the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal obtained when the first codeword is -5 is the first phase difference, and the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal obtained when the first codeword is -3 is the second phase difference, and 90 degrees is between the first phase difference and the second phase difference. The first code word "1" represents the minimum adjustment amount of the first adjustment module.

[0111] An embodiment of the present application provides a phase adjustment method. On the one hand, the present application provides the conditions for extended phase adjustment in hardware through a first adjustment module and a second adjustment module. The extended phase adjustment amount can be achieved by combining the adjustment logic of the first adjustment codeword and the extreme value adjustment amount. On the other hand, the present application detects whether the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is 90 degrees, and gradually adjusts the size of the first codeword until the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is 90 degrees. This method can quickly and accurately adjust the phase difference of the IQ clock signal to 90 degrees, thereby improving the transmission quality of the signal.

[0112] In an optional embodiment, when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, before determining the first adjustment codeword according to the target adjustment amount, the method further includes:

[0113] If it is detected within k consecutive clock cycles that the phase difference of the IQ phase clock signal obtained in each clock cycle is within a preset range, it is determined that the target adjustment amount exceeds the adjustment range of the second adjustment module, where k is a positive integer.

[0114] If the phase difference of the IQ phase clock signal obtained in at least one clock cycle is detected to be outside the preset range within k consecutive clock cycles, then it is determined that the target adjustment amount does not exceed the adjustment range of the second adjustment module. This can avoid false detection caused by factors such as the transmission process and clock signals.

[0115] See also Figure 6 , which shows a phase adjustment device 700 provided by an embodiment of the present application, including: a cascaded first adjustment module 710 and a second adjustment module 720; a control module 730, the control module 730 being connected to the first adjustment module 710 and the second adjustment module 720 respectively, the control module 730 being used to determine a target adjustment amount according to the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal; when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, determining a first adjustment codeword according to the target adjustment amount; controlling the first adjustment module to adjust the phase of the first signal based on the first adjustment codeword to obtain a second signal, where the first signal is the I clock signal or the Q clock signal; filtering out an extreme value adjustment amount from the maximum value and the minimum value in the adjustment range according to the target adjustment amount; controlling the second adjustment module to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

[0116] In an optional embodiment, the control module 730 is also used to control the second adjustment module to adjust the phase of the first signal based on the target adjustment amount when it is detected that the target adjustment amount does not exceed the adjustment range of the second adjustment module, so as to obtain the target IQ phase clock signal, where the first signal is the I clock signal or the Q clock signal.

[0117] In an alternative embodiment, see Figure 7 The control module 730 includes: an acquisition submodule 7301 , a first calculation submodule 7302 , a first control submodule 7303 , a second calculation submodule 7304 , and a second control submodule 7305 .

[0118] The acquisition submodule 7301 is used to determine the target adjustment amount according to the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal;

[0119] The first calculation submodule 7302 is configured to determine a first adjustment codeword according to the target adjustment amount when detecting that the target adjustment amount exceeds the adjustment range of the second adjustment module;

[0120] The first control submodule 7303 is configured to control the first adjustment module to adjust the phase of the first signal based on the first adjustment codeword to obtain a second signal, where the first signal is the I clock signal or the Q clock signal;

[0121] The second calculation submodule 7304 is configured to filter out an extreme value adjustment amount from the maximum value and the minimum value in the adjustment range according to the target adjustment amount;

[0122] The second control submodule 7305 is used to control the second adjustment module to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

[0123] It should be noted that the various submodules of the control module 730 are interconnected according to actual needs.

[0124] In this embodiment, the modules / units contained in the various devices and products described in the above embodiments may be software modules / units, hardware modules / units, or partly software modules / units and partly hardware modules / units.

[0125] For example, for each device or product applied to or integrated into a chip, each module / unit contained therein may be implemented in the form of hardware such as circuits, or at least some modules / units may be implemented in the form of software programs, the software programs running on the processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits; for each device or product applied to or integrated into a chip module, each module / unit contained therein may be implemented in the form of hardware such as circuits, and different modules / units may be located in the same component (such as a chip, circuit module, etc.) or different components of the chip module, or at least some modules / units may be implemented in the form of software programs running on the processor integrated inside the chip. It can be implemented in the form of a software program, which runs on the processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated in the terminal, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or different components in the terminal, or at least some modules / units can be implemented in the form of a software program, which runs on the processor integrated inside the terminal, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits.

[0126] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A phase adjustment method, characterized in that: A control module applied to a phase adjustment device, wherein the phase adjustment device further includes a first adjustment module and a second adjustment module connected in cascade, and the method includes: Determining a target adjustment amount based on a phase difference between an I clock signal and a Q clock signal of the acquired IQ phase clock signal; determining a first adjustment codeword according to the target adjustment amount when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module; Controlling the first adjustment module to adjust the phase of the first signal based on the first adjustment codeword to obtain a second signal, where the first signal is the I clock signal or the Q clock signal; Filtering an extreme value adjustment amount from a maximum value and a minimum value in the adjustment range according to the target adjustment amount; The second adjustment module is controlled based on the extreme value adjustment amount to adjust the phase of the second signal to obtain a target IQ phase clock signal.

2. The method according to claim 1, characterized in that Also includes: When it is detected that the target adjustment amount does not exceed the adjustment range of the second adjustment module, the second adjustment module is controlled based on the target adjustment amount to adjust the phase of the first signal to obtain a target IQ phase clock signal, where the first signal is the I clock signal or the Q clock signal.

3. The method according to claim 1, characterized in that The step of determining a first adjustment codeword according to the target adjustment amount when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module includes: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, the first adjustment codeword is obtained based on the default codeword plus m, where n is a positive integer and m is a positive integer.

4. The method according to claim 3, characterized in that The step of selecting an extreme value adjustment amount from a maximum value and a minimum value in the adjustment range according to the target adjustment amount includes: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is greater than the maximum value of the adjustment range, the maximum value in the adjustment range is determined to be the extreme adjustment amount.

5. The method according to claim 1, characterized in that The step of determining a first adjustment codeword according to the target adjustment amount when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module includes: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, the first adjustment codeword is obtained based on the default codeword minus m, where n is a positive integer and m is a positive integer.

6. The method according to claim 5, characterized in that The step of selecting an extreme value adjustment amount from a maximum value and a minimum value in the adjustment range according to the target adjustment amount includes: When it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, if it is detected within n consecutive clock cycles that the target adjustment amount corresponding to the IQ phase clock signal obtained in each clock cycle is less than the minimum value of the adjustment range, the minimum value in the adjustment range is determined to be the extreme adjustment amount.

7. The method according to claim 3 or 5, characterized in that After the second adjustment module is controlled based on the extreme value adjustment amount to adjust the phase of the second signal to obtain a target IQ phase clock signal, the method further includes: If the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is not 90°, using the first adjustment codeword as a new default codeword; Return to the operation of determining the target adjustment amount based on the phase difference between the I clock signal and the Q clock signal of the acquired IQ phase clock signal and subsequent operation steps until it is detected that the phase difference between the I clock signal and the Q clock signal of the target IQ phase clock signal is 90°.

8. The method according to claim 1, characterized in that Before determining the first adjustment codeword according to the target adjustment amount when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module, the method further includes: If it is detected within k consecutive clock cycles that the phase difference of the IQ phase clock signal obtained in each clock cycle is within a preset range, it is determined that the target adjustment amount exceeds the adjustment range of the second adjustment module, where k is a positive integer; If it is detected within k consecutive clock cycles that the phase difference of the IQ phase clock signal obtained in at least one clock cycle is not within the preset range, it is determined that the target adjustment amount does not exceed the adjustment range of the second adjustment module.

9. A phase adjustment device, characterized in that: include: A cascaded first regulating module and a second regulating module; a control module, the control module being connected to the first adjustment module and the second adjustment module respectively, and the control module being configured to determine a target adjustment amount according to a phase difference between an I clock signal and a Q clock signal of an acquired IQ phase clock signal; determining a first adjustment codeword according to the target adjustment amount when it is detected that the target adjustment amount exceeds the adjustment range of the second adjustment module; Controlling the first adjustment module to adjust the phase of the first signal based on the first adjustment codeword to obtain a second signal, where the first signal is the I clock signal or the Q clock signal; An extreme value adjustment amount is screened out from the maximum value and the minimum value in the adjustment range according to the target adjustment amount; and the second adjustment module is controlled to adjust the phase of the second signal based on the extreme value adjustment amount to obtain a target IQ phase clock signal.

10. The phase adjustment device according to claim 9, characterized in that: The control module is further configured to, when detecting that the target adjustment amount does not exceed the adjustment range of the second adjustment module, control the second adjustment module to adjust the phase of the first signal based on the target adjustment amount to obtain a target IQ phase clock signal, where the first signal is the I clock signal or the Q clock signal.

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