Transparent display device

Abstract

Disclosed is a transparent display device for mitigating edge artifacts by optimizing a layout of a four-color light emitting region, the transparent display device comprising: a plurality of pixel regions having a non-transmissive region and a transmissive region; and a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel sequentially arranged in order in a first direction in a non-transmissive region of the plurality of pixel regions, in which one of the second sub-pixel and the third sub-pixel is a green sub-pixel and the other is a white sub-pixel, and in which the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel are sequentially arranged in order in the first direction in a non-transmissive region of the plurality of pixel regions. When the second sub-pixel is a green sub-pixel, the first sub-pixel is a red sub-pixel, or when the third sub-pixel is a green sub-pixel, the fourth sub-pixel is a red sub-pixel, or when the third sub-pixel is a green sub-pixel, the fourth sub-pixel is a red sub-pixel.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2024-0029127, filed on February 28, 2024, which is hereby incorporated by reference as if fully set forth herein. Technical Field

[0003] The present disclosure relates to a transparent display device that can improve image quality by reducing edge artifacts. Background Art

[0004] The transparent display device may include a non-transmissive area and a transmissive area. The non-transmissive area may display full colors using four-color sub-pixels including a white emission area, a red emission area, a green emission area, and a blue emission area.

[0005] In a four-color transparent display device, the interval between emission sub-pixels may be increased to display a specific color, or the interval between emission sub-pixels may be deviated.

[0006] Therefore, the four-color transparent display device may exhibit edge artifacts that are perceived as white lines, black lines, or color stripes at edges where there is a brightness difference between adjacent pixels, resulting in degraded image quality. Summary of the Invention

[0007] Accordingly, the present disclosure is directed to a transparent display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.

[0008] One aspect of the present disclosure provides a transparent display device capable of alleviating edge artifacts by optimizing the layout of four-color light-emitting areas.

[0009] To achieve these and other advantages, and in accordance with the purposes of the present disclosure, a transparent display device is provided as embodied and broadly described herein, comprising: a display area having a plurality of pixel regions, the plurality of pixel regions having a non-transmissive region and a transmissive region; and a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel arranged sequentially in order in a first direction in the non-transmissive regions of the plurality of pixel regions, wherein one of the second sub-pixel and the third sub-pixel is a green sub-pixel and the other sub-pixel is a white sub-pixel, and wherein, when the second sub-pixel is a green sub-pixel, the first sub-pixel is a red sub-pixel, or when the third sub-pixel is a green sub-pixel, the fourth sub-pixel is a red sub-pixel.

[0010] According to one aspect of the present disclosure, a transparent display device may include: a display area having multiple pixel areas, the multiple pixel areas having non-transmission areas and transmission areas; and red sub-pixels, green sub-pixels, white sub-pixels and blue sub-pixels arranged sequentially in a vertical direction in the non-transmission areas of the multiple pixel areas.

[0011] According to one aspect of the present disclosure, a transparent display device may include: a display area having multiple pixel areas, the multiple pixel areas having non-transmission areas and transmission areas; and blue sub-pixels, white sub-pixels, green sub-pixels and red sub-pixels arranged sequentially in a vertical direction in the non-transmission areas of the multiple pixel areas.

[0012] It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0014] Figure 1 is a block diagram schematically illustrating an example of a configuration of a transparent display device according to one embodiment of the present disclosure.

[0015] Figure 2 is a block diagram schematically illustrating an example of a configuration of a transparent display device according to one embodiment of the present disclosure.

[0016] Figures 3A to 3C is a diagram illustrating an example of a pixel structure according to one embodiment of the present disclosure.

[0017] Figures 4A to 4C is a diagram illustrating an example of a pixel structure according to one embodiment of the present disclosure.

[0018] Figure 5 is an equivalent circuit diagram illustrating an example of the configuration of each sub-pixel according to one embodiment of the present disclosure.

[0019] Figure 6 is an equivalent circuit diagram illustrating an example of the configuration of each sub-pixel according to one embodiment of the present disclosure.

[0020] Figure 7 is an exemplary diagram illustrating an area of ​​each pixel according to one embodiment of the present disclosure.

[0021] Figures 8A to 8Cis a graph showing transmittances of a transparent display device according to a comparative example and a transparent display device according to one embodiment of the present disclosure.

[0022] Figure 9 FIG. 1 is a diagram illustrating a color stripe phenomenon according to an arrangement order of three-color sub-pixels according to a comparative example.

[0023] Figures 10A to 11C is a diagram illustrating an example of an edge artifact phenomenon of a transparent display device according to a comparative example.

[0024] 12A to 12C is a diagram illustrating an example of an edge artifact reduction effect of a transparent display device according to one embodiment of the present disclosure.

[0025] Figures 13A to 15B is a diagram illustrating an example of edge artifacts of a transparent display device according to a comparative example.

[0026] Figure 16A and Figure 16B is a diagram illustrating an example of an edge artifact reduction effect of a transparent display device according to one embodiment of the present disclosure. DETAILED DESCRIPTION

[0027] The following aspects, described with reference to the accompanying drawings, will illustrate the advantages and features of the present disclosure and their implementation methods. However, the present disclosure may be implemented in various forms and should not be construed as limited to the aspects set forth herein. Rather, these aspects are provided so that the present disclosure will be thorough and complete and will fully convey the scope of the present disclosure to those skilled in the art. Furthermore, the present disclosure is limited only by the scope of the claims.

[0028] The shapes, sizes, ratios, angles and numbers disclosed in the drawings for describing aspects of the present disclosure are merely examples, and therefore, the present disclosure is not limited to the details shown. Throughout the specification, the same reference numerals refer to the same elements. In the following description, when a detailed description of a related known function or configuration is determined to be unnecessary to obscure the focus of the disclosure, the detailed description will be omitted. Where “including,” “having,” and “comprising” described in this specification are used, another part may be added unless “only” is used. Terms in the singular may include plural forms unless otherwise indicated.

[0029] When explaining an element, although not explicitly described, the element is explained to include an error range.

[0030] When describing a positional relationship, for example, when the positional relationship between two parts is described as "on", "above", "below", and "immediately adjacent to", one or more other parts may be set between the two parts, unless more restrictive terms such as "exactly" or "directly" are used.

[0031] When describing temporal relationships, for example, when a time sequence is described as "after," "subsequently," "next," and "before," discontinuities may be included unless more restrictive terms such as "directly," "immediately," or "directly" are used.

[0032] It should be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from other elements. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of this disclosure.

[0033] When describing elements of the present disclosure, the terms "first," "second," "A," "B," "(a)," "(b)," etc. may be used. These terms are intended to distinguish the corresponding elements from other elements, and the basis, order, sequence, or number of the corresponding elements should not be defined or limited by these terms. To the extent that an element or layer is "connected," "coupled," or "adhered" to another element or layer, the element or layer can be directly connected or adhered to the other element or layer, and can also be indirectly connected or adhered to the other element or layer, with one or more intermediate elements or layers "disposed" between the elements or layers, unless otherwise specified.

[0034] The term "at least one" should be understood to include any and all combinations of one or more of the associated listed elements. For example, the meaning of "at least one or more of the first element, the second element, and the third element" refers to all combinations of elements selected from two or more of the first element, the second element, and the third element, as well as the first element, the second element, or the third element.

[0035] As will be fully understood by those skilled in the art, the features of the various aspects of the present disclosure may be coupled or combined with each other in part or in whole, and may interoperate with each other in various ways and be driven technically. The various aspects of the present disclosure may be performed independently of each other, or may be performed together in a mutually dependent relationship.

[0036] Hereinafter, aspects of the present disclosure will be described with reference to the accompanying drawings. Since the proportions of each of the elements shown in the drawings differ from the actual proportions for ease of description, the present disclosure is not limited to the proportions shown. Furthermore, all components of each display device according to all aspects of the present disclosure are operatively coupled and configured.

[0037] Figure 1 and Figure 2 is a block diagram schematically illustrating an example of a configuration of a transparent display device according to one embodiment of the present disclosure, Figures 3A to 3C and Figures 4A to 4C is a diagram illustrating an example of a pixel structure according to one embodiment of the present disclosure.

[0038] The display device 1000 or 1000A according to one embodiment may be a liquid crystal display device, an electroluminescent display device using a self-luminescent element, or a micro-light emitting diode display device using micro-light emitting diodes. The electroluminescent display device may be an organic light emitting diode (OLED) display device, a quantum dot light emitting diode display device, or an inorganic light emitting diode display device.

[0039] Reference Figure 1 and Figure 2 According to one embodiment, a transparent display device 1000 or 1000A may include a display panel 100, a gate driver 300, a data driver 400, a timing controller 600, a gamma voltage generator 700, a power management circuit 800 or 800A, etc. The gate driver 300 and the data driver 400 may be represented by the panel driver 200 that drives the display panel 100. The gate driver 300, the data driver 400, the timing controller 600, and the gamma voltage generator 700 may be represented by the display driver 500.

[0040] Reference Figure 2 The transparent display device 1000A according to one embodiment may further include a light blocking panel 1100 disposed on the rear surface of the display panel 100 and overlapping the display panel 100 , and a light blocking panel driver 1200 driving the light blocking panel 1100 .

[0041] Reference Figure 1 and Figure 2 The display panel 100 may be a rigid display panel or a deformable flexible display panel, such as a foldable, bendable, rollable or stretchable display panel.

[0042] The display panel 100 is a transparent display panel that allows the background behind the display panel 100 to be seen through the display panel 100. The display panel 100 may include a display area AA, in which a plurality of pixel areas PX are arranged in a matrix to display an image, and a frame area located around the display area AA. According to one embodiment, the display panel 100 may be a panel in which a touch sensor screen is embedded or attached when superimposed on the display area AA.

[0043] Each of the plurality of pixel regions PX may include an emission region EA in which a plurality of sub-pixels displaying an image on a screen are arranged, and a transmission region TA that transmits light. The emission region EA may be represented by a non-transmission region, and the transmission region TA may be represented by a transparent region.

[0044] Reference Figures 3A to 4C According to various embodiments, each of the pixel areas PX11, PX12, PX13, PX21, PX22, and PX23 may include a non-transmission area NTA in which first to fourth subpixels SP1, SP2, SP3, and SP4 are arranged side by side in a first direction Y (vertical direction), and a transmission area TA adjacent to the non-transmission area NTA in a second direction X (horizontal direction). The non-transmission area NTA may include first to fourth emission areas EA1, EA2, EA3, and EA4 of the first to fourth subpixels SP1, SP2, SP3, and SP4 arranged side by side in the first direction Y (vertical direction), and a black matrix BM surrounding the emission areas EA1, EA2, EA3, and EA4.

[0045] The first type pixel area PX11 according to one embodiment and the second type pixel area PX21 according to one embodiment may have a structure in which the non-transmission area NTA is disposed on the left and the transmission area TA is disposed on the right.

[0046] The first type pixel area PX12 according to one embodiment and the second type pixel area PX22 according to one embodiment may have a structure in which the non-transmission area NTA is disposed on the right side and the transmission area TA is disposed on the left side.

[0047] The first type pixel area PX13 according to one embodiment and the second type pixel area PX23 according to one embodiment may have a structure in which the non-transmission area NTA is disposed at the center and the transmission area TA is disposed on both the left and right sides of the non-transmission area NTA.

[0048] The first to fourth emission areas EA1, EA2, EA3 and EA4 of the first to fourth subpixels SP1, SP2, SP3 and SP4 may be respectively disposed on first to fourth row lines RL1, RL2, RL3 and RL4 arranged side by side in the first direction Y.

[0049] Reference Figures 3A to 3C The first type pixel areas PX11, PX12 and PX13 may include a blue (hereinafter B) sub-pixel SP1, a white (hereinafter W) sub-pixel SP2, a green (hereinafter G) sub-pixel SP3 and a red (hereinafter R) sub-pixel SP4 sequentially arranged in the first direction Y in the non-transmission area NTA.

[0050] Reference Figures 4A to 4C , the second type pixel areas PX21 , PX22 , and PX23 may include an R sub-pixel SP1 , a G sub-pixel SP2 , a W sub-pixel SP3 , and a B sub-pixel SP4 sequentially arranged in the first direction Y in the non-transmission area NTA.

[0051] Reference Figures 3A to 4C In each of the pixel areas PX11, PX12, PX13, PX21, PX22, and PX23 according to various embodiments, the G sub-pixel and the W sub-pixel may be centered in the non-transmission area NTA in the first direction Y. Therefore, edge artifacts such as white and black lines that may appear at the edge of an image pattern due to separation or difference in separation distances of the G sub-pixels and the W sub-pixels between pixels may be avoided.

[0052] Reference Figures 3A to 4C In each of the pixel areas PX11, PX12, PX13, PX21, PX22, and PX23 according to various embodiments, the R subpixel may be disposed adjacent to the G subpixel in the first direction Y. Therefore, color stripe artifacts that may occur at the edge of an image pattern due to the separation distance of the R subpixel and the G subpixel between pixels may be prevented.

[0053] Reference Figures 3A to 4C In each of the pixel areas PX11, PX12, PX13, PX21, PX22, and PX23 according to various embodiments, one of the second subpixel SP2 and the third subpixel SP3 centered in the first direction Y may be a G subpixel, and the other may be a W subpixel. Figures 4A to 4C As shown, if the second sub-pixel SP2 is a G sub-pixel, the first sub-pixel SP1 may be an R sub-pixel, the third sub-pixel SP3 may be a W sub-pixel, and the fourth sub-pixel SP4 may be a B sub-pixel. Figures 3A to 3C As shown, if the third subpixel SP3 is a G subpixel, the fourth subpixel SP4 is an R subpixel, the first subpixel SP1 is a B subpixel, and the second subpixel SP2 is a W subpixel.

[0054] Each of the multiple sub-pixels SP1 to SP2 may include a light-emitting element and a pixel circuit that independently drives the light-emitting element. The light-emitting element may be an organic light-emitting diode, a quantum dot light-emitting diode, or an inorganic light-emitting diode. The pixel circuit may include various configurations of TFTs, including a driver TFT that drives the light-emitting element and a switching TFT that delivers data signals to the driver TFT; and a storage capacitor that stores the drive voltage of the driver TFT. The pixel circuit is electrically connected to signal lines provided in the display panel 100, including gate lines, data lines, power lines, and the like.

[0055] The power management circuits 800 and 800A can utilize externally supplied input voltages to generate and output various driving voltages required to operate all configurations of the transparent display device, namely, the display panel 100 and the display driver 500. The power management circuit 800A can also supply the driving voltages required to drive the light shielding panel 1100 and the light shielding panel driver 1200.

[0056] The gate driver 300 can be controlled according to a plurality of gate control signals supplied from the timing controller 600 and can individually drive the gate lines of the display panel 100. The gate driver 300 can supply a scan signal of a gate-on voltage to the corresponding gate line during a driving period of each gate line, and can supply a gate-off voltage to the corresponding gate line during a non-driving period of each gate line. The gate driver 300 can be embedded in the frame area of ​​the display panel 100 in the form of a gate in panel (GIP) formed together with the TFTs in the display area AA.

[0057] According to one embodiment, the gate driver 300 embedded in the display panel 100 may receive a plurality of gate control signals from the timing controller 600 via a level shifter. The level shifter may receive the control signals from the timing controller 600 and level-shift or logic-process them to generate a plurality of gate control signals and supply them to the gate driver 300.

[0058] The gamma voltage generator 700 generates a plurality of reference gamma voltages having different gamma voltage levels and supplies them to the data driver 400. Under the control of the timing controller 600, the gamma voltage generator 700 may generate a plurality of reference gamma voltages corresponding to the gamma characteristics of the display device and supply them to the data driver 400. The gamma voltage generator 700 may adjust the reference gamma voltage levels according to gamma data supplied from the timing controller 600 and output them to the data driver 400. The gamma voltage generator 700 may adjust a high-potential power supply voltage, which is a maximum gamma voltage, according to peak brightness control from the timing controller 600, and may adjust the plurality of reference gamma voltages according to the adjusted high-potential power supply voltage and output them to the data driver 400.

[0059] The data driver 400 can be controlled according to a data control signal supplied from the timing controller 600 and can convert digital data supplied from the timing controller 600 into analog data signals using a digital-to-analog conversion circuit. The data driver 400 can subdivide a plurality of reference gamma voltages supplied from the gamma voltage generator 700 into gradient voltages and convert the digital data into analog data signals using the subdivided gradient voltages. The data driver 400 can supply the converted data signals to the data lines of the display panel 100.

[0060] Additionally, the data driver 400 may supply reference voltages to reference lines of the display panel 100 under the control of the timing controller 600. The data driver 400 may separately supply reference voltages for display and sensing purposes under the control of the timing controller 600.

[0061] The data driver 400 may sense a signal reflecting driving characteristics of each of the sub-pixels SP1 to SP4 via a reference line using a sensing circuit in a voltage sensing method or a current sensing method under the control of the timing controller 600 .

[0062] The timing controller 600 can receive source image data and timing control signals from a host system. The host system can be a computer, a television system, a set-top box, a system on a mobile device such as a tablet or a cell phone, or a system in an automobile. The timing control signals may include a dot clock, a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and the like.

[0063] The timing controller 600 can control the gate driver 300 and the data driver 400 using timing control signals supplied from the host system and internally stored timing setting information. The timing controller 600 can generate a plurality of gate control signals for controlling the driving timing of the gate driver 300 and supply them to the gate driver 300. The timing controller 600 can generate a plurality of data control signals for controlling the driving timing of the data driver 400 and supply them to the data driver 400.

[0064] The timing controller 600 may perform various image processing including image quality correction, degradation correction, brightness correction to reduce power consumption, etc. on input image data supplied from the host system, and may supply the image-processed data to the data driver 400. The timing controller 600 may be denoted as an image processing unit.

[0065] In one embodiment, the timing controller 600 can use a peak brightness control (PLC) method to control the peak brightness based on the image data. The timing controller 600 can determine the average picture level (APL) of the image data, and the higher the APL, the lower the peak brightness can be set to reduce power consumption.

[0066] In one embodiment, the timing controller 600 may operate the display device 1000 in a sensing mode. In the sensing mode, the timing controller 600 may receive sensing data of electrical characteristics of the display panel 100 via a sensing circuit embedded in any one of the data driver 400 and the power management circuit 800, 800A.

[0067] In one embodiment, the timing controller 600 may accumulate image data and determine a sensing area by predicting a degradation area in the display panel 100 based on the accumulated data. In the sensing mode, sensing data for sensing electrical characteristics of the sensing area of ​​the display panel 100 using the data driver 400 or the power management circuit 800, 800A may be supplied to the timing controller 600.

[0068] Based on the sensing data, the timing controller 600 can calculate the amount of change in the electrical characteristics (threshold voltage offset value) of the driving transistor and / or light-emitting element of each sub-pixel SP1, SP2, SP3, SP4, and can calculate and store a compensation value in a memory to compensate for the change. The timing controller 600 can compensate the image data by applying the compensation value stored in the memory to compensate for the brightness deviation caused by the deviation of the characteristics of each sub-pixel SP1, SP2, SP3, SP4, or to compensate for afterimages caused by degradation.

[0069] The sensing mode of the display device 1000 , 1000A according to one embodiment may be performed according to an instruction from the host system, may be performed by a user request via the host system, or may be performed according to a driving sequence determined by the timing controller 600 .

[0070] Reference Figure 2 According to one embodiment, the transparent display device 1000A can operate in a screen critical mode and a see-through critical mode by controlling the transmittance of the light shielding panel 1100. The screen critical mode may include a normal mode for displaying TV images, etc. The see-through critical mode may include a transparent mode.

[0071] The timing controller 600 can determine the on-screen critical mode and the perspective critical mode based on the type of input video. When in the on-screen critical mode, the timing controller 600 operates in the normal mode, and under the control of the timing controller 600, the light shielding panel driver 1200 can operate the light shielding panel 1100 in the shadow mode for displaying black. Therefore, the display panel 100 can display an on-screen image using the pixel area PX on the black background of the light shielding panel 1100 visible through the transmissive area TA, thereby improving the visibility of the on-screen image.

[0072] When in the see-through critical mode, the light blocking panel driver 1200 may drive the light blocking panel 1100 in the see-through mode under the control of the timing controller 600. Thus, a viewer may see the on-screen image displayed by the pixel area PX against a rear background visible through the transmissive area TA of the display panel 100 and the light blocking panel 1100.

[0073] Figure 5 is an equivalent circuit diagram illustrating an example of the configuration of each sub-pixel according to one embodiment of the present disclosure.

[0074] Reference Figure 5 Each sub-pixel 10A includes: a light-emitting element EL connected between a first power line VDDL supplying a high-potential driving voltage ELVDD (first power supply voltage) and a second power line VSSL supplying a low-potential driving voltage ELVSS (second power supply voltage); and a pixel circuit including first and second switching TFTs ST1 and ST2, a driving TFT DT, and a storage capacitor Cst to independently drive the light-emitting element EL.

[0075] The light-emitting element EL may include an anode connected to the source node N2 of the drive TFT DT, a cathode connected to the second power line VSSL, and an organic light-emitting layer between the anode and the cathode. The anode may be independent for each sub-pixel, but the cathode may be a common electrode shared by all sub-pixels. When a drive current is supplied from the drive TFT DT, the light-emitting element EL can generate light with a brightness proportional to the current value of the drive current by injecting electrons from the cathode into the organic light-emitting layer, injecting holes from the anode into the organic light-emitting layer, and emitting fluorescent or phosphorescent light due to recombination of the electrons and holes in the organic light-emitting layer.

[0076] The first switching TFT ST1 may be driven by a scan signal SCAN supplied from the gate driver 300 to the gate line GL, and a data voltage Vdata supplied from the data driver 400 to the data line DL may be supplied to the gate node N1 of the driving TFT DT.

[0077] The second switching TFT ST2 may be driven by a scan signal SCAN supplied from the gate driver 300 to the gate line GL, and a reference voltage Vref supplied from the data driver 400 to the reference line RL may be supplied to the source node N2 of the driving TFT DT. On the other hand, in a sensing mode, the second switching TFT ST2 may supply a current reflecting the characteristics of the driving TFT DT or the characteristics of the light emitting element EL to the reference line RL.

[0078] The first switching TFT ST1 and the second switching TFT ST2 may be controlled by the same gate line, or may be controlled by different gate lines, such as Figure 5 shown.

[0079] The storage capacitor Cst connected between the gate node N1 and the source node N2 of the driving TFT DT charges a differential voltage of the data voltage Vdata and the reference voltage Vref supplied to the gate node N1 and the source node N2 respectively through the first switching TFT ST1 and the second switching TFT ST2 into the driving voltage (Vgs) of the driving TFT DT, and maintains the charged driving voltage Vgs during a light emitting period when the first switching TFT ST1 and the second switching TFT ST2 are turned off.

[0080] The driving TFT DT may control the light emission intensity of the light emitting element EL by controlling the current Ids flowing to the light emitting element EL according to the driving voltage Vgs charged in the storage capacitor Cst.

[0081] exist Figure 5 In the embodiment, the gate line GL may be driven by the gate driver 300 , receive a data voltage Vdata and a reference voltage Vref from the data driver 400 , and receive a high potential driving voltage ELVDD and a low potential driving voltage ELVSS from the power management circuit 800 , 800A.

[0082] Figure 6 is an equivalent circuit diagram illustrating an example of the configuration of each sub-pixel according to one embodiment of the present disclosure.

[0083] Reference Figure 6 Each sub-pixel 10B may include: a light-emitting element EL; and a pixel circuit including a driving TFT DT that supplies current to the light-emitting element EL, a plurality of TFTs T1 to T6, and a storage capacitor Cst. The TFT in each pixel circuit may be a TFT using any one of a polycrystalline silicon semiconductor, an amorphous silicon semiconductor, and an oxide semiconductor.

[0084] For example, the driving TFT DT and the TFTs T1 to T6 may include polysilicon TFTs having a P-type channel using fast-mobility polysilicon.

[0085] On the other hand, the driving TFT DT and TFTs T1 to T3, T5 to T6 may be composed of polysilicon TFTs with a P-type channel, and the compensation TFT T4, which connects the driving TFT DT in a diode structure, may be composed of an oxide TFT with an N-type channel, using an oxide semiconductor with less leakage current than polysilicon. When the screen update rate is relatively slow, the fourth switching TFT T4 can block leakage current to prevent flicker during low-speed operation.

[0086] The light emitting element EL may include an anode connected to the drain electrode of the driving TFT DT via the light emitting control TFT T5, a cathode connected to the second power line 110 supplying the second power supply voltage ELVSS, and an organic light emitting layer between the anode and the cathode. The light emitting element EL may generate light with a brightness proportional to the current value of the driving current supplied from the driving TFT DT.

[0087] The compensation TFT T4 can be controlled by the first gate line 104 and can connect the second node N2 connected to the gate electrode of the driving TFT DT and the third node N3 connected to the drain electrode of the driving TFT DT. The compensation TFT T4 can be turned on by the gate-on voltage of the first gate signal SC1[n] supplied via the first gate line 104, connecting the gate electrode and the drain electrode of the driving TFT DT, thereby connecting the driving TFT DT in a diode structure. The first gate line 104 can be arranged on two row lines, namely, the n-1th row line and the nth row line (where n is an integer greater than or equal to 2), which can reduce the size of the gate driver 300 embedded in the border area of ​​the display panel 100 and the size of the border.

[0088] The switching TFT T1 is controlled by the second gate line 105 and can connect the data line 102 to the first node N1 connected to the source electrode of the driving TFT DT. The switching TFT T1 can be turned on by the gate-on voltage of the second gate signal SC2[n] supplied through the second gate line 105 and can supply the data voltage Vdata supplied through the data line 102 to the source electrode of the driving TFT DT.

[0089] The operation control TFT T2 is controlled by the light emission control line 111 and can connect the first power line 103 to the first node N1 connected to the source electrode of the driving TFT DT. The operation control TFT T2 can be turned on by the gate-on voltage of the light emission control signal EM[n] supplied via the light emission control line 111 and can supply the first power supply voltage ELVDD supplied via the first power line 103 to the source electrode of the driving TFT DT.

[0090] The light emission control TFT T5 is controlled by the light emission control line 111 and can connect the third node N3 connected to the drain electrode of the driving TFT DT and the fourth node N4 connected to the anode electrode of the light emitting element EL. The light emission control TFT T5 can be turned on by the gate-on voltage of the light emission control signal EM[n] supplied via the light emission control line 111 and can connect the drain electrode of the driving TFT DT to the anode electrode of the light emitting element EL.

[0091] The first initialization TFT T3 is controlled by the third gate line 106 and may connect the third node N3 connected to the drain electrode of the driving TFT DT to the first initialization line 108. The first initialization TFT T3 may be turned on by the gate-on voltage of the third gate signal SC3[n] supplied via the third gate line 106 and may supply the first initialization voltage Vini supplied via the first initialization line 108 to the third node N3 connected to the drain electrode of the driving TFT DT.

[0092] The second initialization TFT T6 is controlled by the fourth gate line 107 and can connect the second initialization line 109 to the fourth node N4 connected to the anode electrode of the light-emitting element EL. The second initialization TFT T6 can be turned on by the gate-on voltage of the fourth gate signal SC3[n+1] supplied via the fourth gate line 107, and can supply the second initialization voltage (VAR, anode reset voltage) supplied via the second initialization line 109 to the fourth node N4 connected to the anode electrode of the light-emitting element LED. The fourth gate line 107 can share the third gate line that supplies the third gate signal (SC3[n]) on the n+1th (n is a positive integer) low line.

[0093] A storage capacitor Cst may be connected between the first power line 103 and a second node N2, which is connected to the gate electrode of the driving TFT DT. The storage capacitor Cst may be charged with a voltage difference between a first power supply voltage ELVDD supplied via the first power line 103 and a data voltage Vdata supplied to the second node N2. The data voltage Vdata may be supplied from the data line 102 to the second node N2 via the operation control TFT T2, the driving TFT DT, and the switching TFT T1. When the driving TFT DT is connected in a diode structure via the compensation TFT T4, the storage capacitor Cst may sample and store the threshold voltage Vth of the driving TFT DT and provide a data voltage (Vdata+Vth) compensated by the threshold voltage Vth to the gate electrode of the driving TFT DT. Therefore, the storage capacitor Cst may be charged with a target voltage, which is the difference between the first power supply voltage ELVDD and the data voltage (Vdata+Vth) compensated by the threshold voltage Vth of the driving TFT DT, and may provide the charged target voltage as the driving voltage Vgs between the gate and source electrodes of the driving TFT DT. Therefore, characteristic deviation of the driving TFT DT between sub-pixels can be compensated.

[0094] The driving TFT DT may control the light emission intensity of the light emitting element EL by controlling the current Ids flowing to the light emitting element EL according to the driving voltage Vgs charged in the storage capacitor Cst.

[0095] exist Figure 6 In the embodiment, the gate lines 104, 105, 106, and 107 may be driven by the gate driver 300, and the light emission control line 111 may be driven by a light emission control driver embedded in the gate driver 300 and disposed in a bezel region of the display panel 100. The data voltage Vdata may be supplied from the data driver 400. The first power supply voltage ELVDD, the second power supply voltage ELVSS, the first initialization voltage Vini, and the second initialization voltage VAR may be supplied from the power management circuit 800 or 800A.

[0096] Figure 7 is an exemplary diagram illustrating an example of a corresponding pixel area according to an embodiment of the present disclosure, and Figures 8A to 8C is a graph showing transmittance of a transparent display device according to an embodiment of the present disclosure compared with a transparent display device according to a comparative example.

[0097] Reference Figure 7, the pixel area PX according to one embodiment may include a non-transmission area NTA disposed in the center in the second direction X and a transmission area TA disposed on either side of the non-transmission area NTA in the second direction X. The non-transmission area NTA may include emission areas EA1 to EA4 of the R sub-pixel SP1, the G sub-pixel SP2, the W sub-pixel SP3, and the B sub-pixel SP4 arranged side by side and sequentially in the first direction Y. The pixel circuits of the R sub-pixel SP1, the G sub-pixel SP2, the W sub-pixel SP3, and the B sub-pixel SP4 may be disposed below the emission areas EA1 to EA4 while overlapping with the emission areas EA1 to EA4.

[0098] The R subpixel SP1, the G subpixel SP2, the W subpixel SP3, and the B subpixel SP4 may be individually connected to first to fourth data lines DL1 to DL4 extending from the left side of the non-transmission area NTA along the first direction Y and arranged side by side in the second direction X. The R subpixel SP1, the G subpixel SP2, the W subpixel SP3, and the B subpixel SP4 may be commonly connected to each of a first power line VDDL, a reference line RL, and a second power line VSSL extending from the right side of the non-transmission area NTA along the first direction Y and arranged side by side in the second direction X. The R subpixel SP1, the G subpixel SP2, the W subpixel SP3, and the B subpixel SP4 may be commonly connected to a gate line GL extending in the second direction X.

[0099] Reference Figures 8A to 8C , and according to the comparative example Figure 8A and Figure 8B Compared with the transmittance (45%) of the pixel area (PX) in which the emission areas EA of the four-color (R, G, W, B) sub-pixels are arranged in a matrix form, the transmittance of the pixel area (PX) according to the embodiment is as shown in FIG. Figure 8C As shown, the transmittance (55%) of the pixel area (PX) of the vertical array structure in which the emission areas EA of the four-color (R, G, W, B) sub-pixels are arranged side by side in the vertical direction is improved.

[0100] Figure 9 is a diagram illustrating color stripes according to the arrangement order of three-color sub-pixels according to a comparative example, Figures 10A to 11C is a diagram showing an example of an edge artifact phenomenon of a transparent display device according to a comparative example, and 12A to 12C is a diagram illustrating an example of an edge artifact reduction effect of a transparent display device according to an embodiment of the present disclosure, Figures 13A to 15B is a diagram showing an example of edge artifacts of a transparent display device according to a comparative example, and Figure 16A and Figure 16B is a diagram illustrating an example of an edge artifact reduction effect of a transparent display device according to an embodiment of the present disclosure.

[0101] Reference Figure 9, it can be seen that in the basic structure of stripes of three-color (R, G, B) sub-pixels, the RGB array structure in which the G sub-pixel is centered can display a white line without color fringes. On the other hand, when a white line is displayed using a GBR array structure in which the G sub-pixel is tilted to the left, a red fringe may appear at the right edge of the white line, and when a white line is displayed using a BRG array structure in which the G sub-pixel is tilted to the right, a blue fringe may appear at the left edge of the white line. As in the GBR array structure, when the R sub-pixel and the G sub-pixel are separated by another sub-pixel (B) in between, the color fringes are more easily visible.

[0102] Reference 10A to 10C 、 Figure 13A and Figure 13B , for the use according to the comparative example according to the comparative example Figure 10A and Figure 13A In the display device of the pixel area PXa in which R / W / B / G sub-pixels are arranged sequentially in the vertical direction, it can be seen that in the pixel area PXa, the G sub-pixel is not centered and the R sub-pixel and the G sub-pixel are spaced apart from each other, with the W sub-pixel and the B sub-pixel located therebetween. Therefore, it can be seen that the display device according to the comparative example may have black lines (BL) and white lines (WL) at the edges of the letter patterns G and D shown in green on a white background, as shown in FIG. Figure 10B as shown, or with red stripes at the edges of the line pattern shown in yellow, as Figure 10C As shown, or there are edge artifacts such as white lines, black lines and color stripes at the edges of the frame patterns of various colors, as shown Figure 13B shown.

[0103] Reference Figures 11A to 11C 、 Figure 14A and Figure 14B , it can be seen that in the comparative example, the Figure 11A and Figure 14A In the display device of the pixel area PXb in which R / G / B / W sub-pixels are arranged sequentially in the vertical direction, the W sub-pixel is not centered in the pixel area PXb. Therefore, it can be seen that the display device according to the comparative example may have black lines (BL) and white lines (WL) at the edges of the letter patterns G and D shown in green on a white background, as shown in FIG. Figure 11B or have artifacts such as white and black lines at the edges of various color patterns, as shown in Figure 14B However, it can be seen that the display device according to the comparative example does not display the same pixel area PXb as the adjacent arrangement of the R sub-pixel and the G sub-pixel in the pixel area PXb. Figure 10C The result is a color fringing artifact in the yellow line pattern.

[0104] Reference 12A to 12C 、 Figure 16A and Figure 16B , it can be seen that in accordance with one embodiment, the method according to one embodiment is as follows Figure 12A and Figure 16A In the display device of the pixel area PX in which R / G / W / B sub-pixels are arranged sequentially in the vertical direction, the G sub-pixel and the W sub-pixel are centered in the pixel area PX, and the R sub-pixel and the G sub-pixel are adjacent. Therefore, it can be seen that the display device according to one embodiment does not generate black or white line artifacts at the edges of the letter patterns G and D shown in green on a white background, as shown in FIG. Figure 12B As shown, no color stripe artifacts are generated in the yellow line pattern, such as Figure 12C As shown, edge artifacts such as white lines, dark lines, and color stripe artifacts are not generated at the edges of various color patterns. Figure 16B shown.

[0105] Reference Figure 15A and Figure 15B , it can be seen that in the comparative example, the Figure 15A In the display device of the pixel area PXc in which R / W / G / B sub-pixels are sequentially arranged in the vertical direction, in the pixel area PXc, the R sub-pixel and the G sub-pixel are spaced apart from each other, with the W sub-pixel located therebetween. Therefore, the display device according to the comparative example may generate edge artifacts such as color stripes at the edges of various color patterns, such as Figure 15B shown.

[0106] As described above, a transparent display device according to one embodiment is capable of improving image quality by reducing edge artifacts such as black lines, white lines, and color stripes by arranging the green sub-pixel and the white sub-pixel among the four-color sub-pixels in the non-transmission area of ​​each pixel area in the center of the non-transmission area and arranging the red sub-pixel and the green sub-pixel to be adjacent to each other.

[0107] According to one embodiment, a transparent display device may include red / green / white / blue or blue / white / green / red sub-pixels arranged side by side in a vertical direction in a non-transmissive area of ​​each pixel area to improve image quality by reducing edge artifacts such as white lines, black lines, and color stripes, and may achieve a low power consumption effect by increasing the transmissive area to improve transmittance.

[0108] According to one embodiment, a transparent display device may include a plurality of pixel areas, the plurality of pixel areas including a non-transmission area and a transmission area, wherein the non-transmission area of ​​each pixel area includes a first sub-pixel, a second sub-pixel, a third sub-pixel and a fourth sub-pixel arranged sequentially in order in a first direction, one of the second sub-pixel and the third sub-pixel is a green sub-pixel and the other sub-pixel is a white sub-pixel, wherein when the second sub-pixel is a green sub-pixel, the first sub-pixel may be a red sub-pixel, or when the third sub-pixel is a green sub-pixel, the fourth sub-pixel may be a red sub-pixel.

[0109] In the transparent display device according to one embodiment, the first to fourth sub-pixels may be a red sub-pixel, a green sub-pixel, a white sub-pixel, and a blue sub-pixel sequentially arranged in the first direction.

[0110] In the transparent display device according to the embodiment, the first to fourth sub-pixels may be a blue sub-pixel, a white sub-pixel, a green sub-pixel, and a red sub-pixel sequentially arranged in the first direction.

[0111] In each pixel region of the transparent display device according to one embodiment, the transmission region may be provided in a region on the left or right side of the non-transmission region, or may be provided in regions on both the left and right sides of the non-transmission region.

[0112] According to one embodiment, a transparent display device may include a plurality of pixel areas, the plurality of pixel areas including a non-transmitting area and a transmissive area, wherein the non-transmitting area of ​​each pixel area may include a red sub-pixel, a green sub-pixel, a white sub-pixel, and a blue sub-pixel arranged sequentially in order in a vertical direction.

[0113] According to one embodiment, a transparent display device may include a plurality of pixel areas, the plurality of pixel areas including a non-transmitting area and a transmissive area, wherein the non-transmitting area of ​​each pixel area may include a blue sub-pixel, a white sub-pixel, a green sub-pixel, and a red sub-pixel arranged sequentially in order in a vertical direction.

[0114] The transparent display device according to the present disclosure can be applied to various electronic devices. For example, the transparent display device according to the present disclosure can be applied to mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, navigation, car navigation, car display devices, televisions, wallpaper display devices, signage devices, and home appliances.

[0115] The above-mentioned features, structures and effects of the present disclosure are included in at least one embodiment of the present disclosure, but are not limited to only one embodiment. In addition, those skilled in the art can realize the features, structures and effects described in at least one embodiment of the present disclosure by combining or modifying other embodiments. Therefore, the content associated with the combination and modification should be interpreted as being within the scope of the present disclosure.

[0116] It will be apparent to those skilled in the art that various substitutions, modifications and variations may be made within the scope of the present disclosure without departing from the spirit and scope of the present disclosure. Therefore, the scope of the present disclosure is indicated by the appended claims, and all changes or modifications derived from the meaning, scope and equivalent concepts of the claims should be interpreted as included within the scope of the present disclosure.

Claims

1. A transparent display device, comprising: A display area having a plurality of pixel regions, wherein the plurality of pixel regions have a non-transmissive region and a transmissive region; as well as a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel sequentially arranged in order in a first direction in the non-transmission areas of the plurality of pixel areas, wherein one of the second sub-pixel and the third sub-pixel is a green sub-pixel and the other sub-pixel is a white sub-pixel, and When the second sub-pixel is a green sub-pixel, the first sub-pixel is a red sub-pixel, or when the third sub-pixel is a green sub-pixel, the fourth sub-pixel is a red sub-pixel.

2. The transparent display device according to claim 1, in, The first to fourth sub-pixels are a red sub-pixel, a green sub-pixel, a white sub-pixel, and a blue sub-pixel sequentially arranged in the first direction.

3. The transparent display device according to claim 1, in, The first to fourth sub-pixels are a blue sub-pixel, a white sub-pixel, a green sub-pixel, and a red sub-pixel sequentially arranged in the first direction.

4. The transparent display device according to claim 1, in, In the plurality of pixel areas, the transmission area is disposed on a left side or a right side of the non-transmission area, or on both a left side and a right side of the non-transmission area.

5. The transparent display device according to claim 1, wherein: The first direction is a vertical direction, and the second sub-pixel and the third sub-pixel are centered in the non-transmission area in the first direction.

6. A transparent display device, comprising: A display area having a plurality of pixel regions, wherein the plurality of pixel regions have a non-transmissive region and a transmissive region; as well as A red sub-pixel, a green sub-pixel, a white sub-pixel, and a blue sub-pixel are sequentially arranged in order in a vertical direction in the non-transmission areas of the plurality of pixel areas.

7. The transparent display device according to claim 6, in, In the plurality of pixel areas, the transmission area is disposed on a left side or a right side of the non-transmission area, or on both a left side and a right side of the non-transmission area.

8. A transparent display device, comprising: A display area having a plurality of pixel regions, wherein the plurality of pixel regions have a non-transmissive region and a transmissive region; as well as A blue sub-pixel, a white sub-pixel, a green sub-pixel, and a red sub-pixel are sequentially arranged in order in a vertical direction in the non-transmission areas of the plurality of pixel areas.

9. The transparent display device according to claim 8, in, In the plurality of pixel areas, the transmission area is disposed on a left side or a right side of the non-transmission area, or on both a left side and a right side of the non-transmission area.

10. The transparent display device according to claim 6 or 8, wherein: The white sub-pixel and the green sub-pixel are centered in the non-transmissive region in the vertical direction.

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