Packaging quality detection method and system for semiconductor power devices

Abstract

The application relates to the technical field of semiconductor package detection, in particular to a package quality detection method and system suitable for semiconductor power devices. The method comprises the following steps: acquiring ultrasonic scanning images of different depth layers of a semiconductor power device and echo signals of each scanning position; calculating edge, internal irregularity of each closed edge region in the ultrasonic scanning images and distortion degree of the echo signals in the closed edge region; combining the edge, internal irregularity, distortion degree of the echo signals and the nearest distance calculated between the closed edge region and an adjacent depth layer of the depth layer where the closed edge region is located to determine a potential defect region; and marking the potential defect region of each depth layer, so as to determine the package quality of the semiconductor power device. The application aims to improve the detection precision of the package quality of the semiconductor power device by combining ultrasonic scanning with depth analysis.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging testing technology, and in particular to a packaging quality testing method and system suitable for semiconductor power devices. Background Art

[0002] Semiconductor power devices are used to control and convert electrical energy, and are designed to handle high voltage, high current, and high power applications. With the rapid development of semiconductor technology, the integration level of semiconductor power devices has gradually increased, requiring the integration of semiconductor devices through packaging technology. The high-intensity operating environment of power devices directly affects their reliability, performance, and lifespan.

[0003] There are currently some studies on the inspection of semiconductor devices. The existing literature (Li Qingsong, Luo Xiangyang, Wang Ruisong, et al., "Limitations of Ultrasonic Scanning Inspection of Plastic-Encapsulated Microcircuits," [J]. Electronics & Packaging, 2018, 18(12): 8-11) proposes the basic principles of ultrasonic scanning inspection and factors affecting the surface shape and internal wiring structure of the packaged device. However, no effective measures have been proposed to address interference factors and improve inspection accuracy.

[0004] Since semiconductor power devices may have defects such as delamination, pores, cracks and inclusions, the existing ultrasonic scanning process for semiconductor power device packaging quality inspection is easily affected by the internal structure of the device and the accuracy of the equipment, resulting in insufficient detection accuracy. Summary of the Invention

[0005] In order to solve the above technical problems, this application provides a packaging quality inspection method and system for semiconductor power devices. The technical solutions adopted are as follows:

[0006] In a first aspect, an embodiment of the present application provides a packaging quality inspection method for a semiconductor power device, the method comprising the following steps:

[0007] S1: Perform C-scan on the semiconductor power device through the ultrasonic detection module to obtain ultrasonic scan images of different depth layers and echo signals at each scanning position;

[0008] S2: extracting the closed edge regions in the ultrasound scan image, and calculating the edge and internal irregularities of each closed edge region and the degree of distortion of the echo signal within the closed edge region;

[0009] S3: Obtain the closest closed edge region in the depth layer where each closed edge region is located and its adjacent depth layer; determine the potential defect area by combining the edge and internal irregularities, the degree of distortion of the echo signal, and the closest distance calculated between the closed edge region and its adjacent depth layer;

[0010] S4: Mark the potential defect areas at each depth layer to judge the packaging quality of semiconductor power devices.

[0011] Preferably, in step S1, the value of each pixel in the ultrasound scan image is further determined by the maximum value of the echo signal at the corresponding scanning position in the corresponding depth layer.

[0012] Preferably, in step S2, the edge irregularity is determined by a forward fusion result of the mean and standard deviation of the gradient values ​​between all adjacent pixel points on the edge of the corresponding closed edge region.

[0013] Preferably, in step S2, the internal irregularity is determined by the complement of the goodness of fit after fitting the backbone line within the corresponding closed edge area.

[0014] Preferably, in step S2, when calculating the distortion degree of the echo signal, the pixel values ​​of the pixel points are first used to screen the feature points in the corresponding closed edge area; the frequency shift, transmission energy and reception energy of all feature points in the corresponding closed edge area are analyzed to determine the distortion degree of the echo signal in the corresponding closed edge area.

[0015] Preferably, the method of using the pixel values ​​of the pixels to screen the feature points corresponding to the closed edge area is: obtaining the pixel values ​​of all the pixels in the current closed area, and taking the pixel corresponding to the mode of the pixel value as the feature point.

[0016] Preferably, the method of analyzing the frequency shift, transmitted energy, and received energy of all feature points in the corresponding closed edge area to determine the degree of distortion of the echo signal of the corresponding closed edge area includes:

[0017] Calculate the frequency shift of each feature point;

[0018] Forward fusion of the transmitted energy and received energy of each feature point;

[0019] Reversely fuse the frequency shift of each feature point in each closed edge area with the result of the forward fusion;

[0020] The average level of the reverse fusion results of all feature points in the corresponding closed edge area is taken as the distortion degree of the echo signal of the corresponding closed edge area.

[0021] Preferably, in step S3, the method for calculating the closest distance is further determined to be the Euclidean distance between the center points of the closed edge areas.

[0022] Preferably, in step S3, the method for determining the potential defect area is:

[0023] Calculate the edge, internal irregularity and distortion of the echo signal to perform forward fusion results, and calculate the reverse fusion results with the closest distance between the closed edge area and the adjacent depth layer of the depth layer where it is located;

[0024] When the reverse fusion result is greater than a preset defect threshold, the closed edge area is determined to be a potential defect area.

[0025] In a second aspect, another embodiment of the present application further provides a packaging quality inspection system for semiconductor power devices, which implements the above-mentioned packaging quality inspection method. The system includes:

[0026] Ultrasonic detection module: used to perform C-scan on the semiconductor power device through the ultrasonic detection module to obtain ultrasonic scanning images of different depth layers and echo signals at each scanning position. This module is implemented by step S1;

[0027] Packaging inspection module: used to use the scanning data obtained by the ultrasonic inspection module to perform defect detection and analysis on the packaging of semiconductor power devices and determine the packaging quality of semiconductor power devices. This module is implemented by steps S2, S3 and S4.

[0028] Visualization display module: used to visualize the defect detection results output by the packaging inspection module.

[0029] This application has at least the following beneficial effects:

[0030] Compared with the traditional ultrasonic scanning method for detecting semiconductor power device package defects, which only compares and analyzes the reflection intensity of the ultrasonic echo signal, this method focuses on analyzing the planar distribution form, echo waveform signal and spatial distribution continuity of the internal defects of the semiconductor power device to judge the internal defect situation. It solves the influence of the accuracy of the ultrasonic scanning equipment and the reflection differences of small normal components inside the semiconductor power device, reduces the missed detection and false detection of internal defects of the semiconductor power device package, and improves the detection precision and accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions and advantages of the embodiments of the present application or the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0032] Figure 1 A flowchart of a packaging quality inspection method for semiconductor power devices provided in one embodiment of the present application;

[0033] Figure 2 A processing flow chart of a semiconductor power device packaging quality inspection system provided in one embodiment of the present application. DETAILED DESCRIPTION Example 1

[0034] The packaging quality inspection method for semiconductor power devices provided in this embodiment is used to implement an ultrasonic inspection module and a packaging inspection module in a packaging quality inspection system for semiconductor power devices. Figure 1 , the method comprises the following steps:

[0035] S1: Perform C-scan on the semiconductor power device through the ultrasonic detection module to obtain ultrasonic scanning images of different depth layers and echo signals at each scanning position.

[0036] A single semiconductor power device is transferred into an ultrasonic scanning detector, the depth layer number of the semiconductor power device is input into the ultrasonic scanning detector, and a C-scan mode is used to obtain an ultrasonic scanning image of the semiconductor power device and echo signals at different scanning positions at different depth layers.

[0037] In a preferred embodiment, the number of depth layers is generally obtained by rounding off the ratio of the thickness of the semiconductor power device to the thickness of the circuit wiring, or is set by the implementer based on work experience.

[0038] In addition, in this embodiment, the value of each pixel in the ultrasound scan image is further determined by the maximum value of the echo signal at the corresponding scanning position in the corresponding depth layer.

[0039] Therefore, the C-scan mode can be used to obtain ultrasonic scan images of semiconductor power devices at various depth layers. In the ultrasonic scan images, higher brightness indicates greater reflection intensity, and lower brightness indicates lower reflection intensity.

[0040] At this point, ultrasonic scanning images of a single semiconductor power device at different depth layers and echo signals at each scanning position are obtained, and the obtained data are transmitted to the packaging inspection module, which performs packaging quality inspection of the semiconductor power device.

[0041] S2: extracting closed edge regions in the ultrasonic scan image, and calculating the edge and internal irregularities of each closed edge region and the degree of distortion of the echo signal in the closed edge region.

[0042] During the packaging process of semiconductor power devices, internal defects such as fine cracks, pores, and inclusions may exist. When ultrasound waves propagate to the defects, the echo signal changes, resulting in the appearance of different brightness colors in the ultrasound scan. However, in reality, semiconductor power devices contain not only the packaging medium but also various materials such as the lead frame, chip frame, and bonding wires, distributed throughout the various layers of the semiconductor device. When ultrasound waves propagate through materials different from the packaging medium, their propagation characteristics also change, causing interference in the ultrasound scan and affecting the accuracy of detecting internal defects in the semiconductor device. Therefore, it is necessary to combine the distribution of packaging quality defects within the semiconductor power device for detection and analysis.

[0043] Take, for example, an ultrasound scan of a single semiconductor power device at a certain depth. Internally, electrical signals are processed and transmitted through a rational wiring distribution. To ensure this, the wiring is often relatively regular. However, if the corresponding defect is an internal semiconductor defect—cracks, pores, or inclusions—due to improper packaging, the distribution often appears irregular.

[0044] Therefore, the present application analyzes the ultrasonic scanning image under a single depth layer and extracts the closed edge area in the ultrasonic scanning image. This embodiment extracts all the closed edges in the ultrasonic scanning image of this layer through the Canny edge detection algorithm, corrosion expansion and connected domain analysis. For a single closed edge, its internal area may represent the internal defects of the actual semiconductor device or the normal components inside the actual period, such as leads, bonding wires and chip frames. And the backbone lines inside the single closed edge area are obtained through the backbone extraction algorithm. Among them, the Canny edge detection algorithm, corrosion expansion, connectivity analysis and backbone extraction algorithm are well-known technologies and will not be repeated in this embodiment. In other embodiments, other methods can be used to extract the closed edge area in the ultrasonic scanning image and the backbone lines within the closed edge area, which are specifically set by the implementer.

[0045] Normal components in semiconductor devices tend to have a more regular morphological distribution, that is, the edges of the closed area are more rounded, and the inflection points on the backbone line change less, resulting in less edge roughness and greater goodness of fit of the backbone line, resulting in a smaller morphological distribution deviation in the current closed area.

[0046] Internal defects in semiconductor power devices differ from normal components in their morphological distribution in ultrasonic scans, and there are also significant differences in echo signals during ultrasonic scanning. Normal components within semiconductor power chips are often smooth and flat when viewed at depth. While the change from packaging material to metal alters the propagation characteristics of the ultrasonic signal, refracting and scattering some of the ultrasonic energy, the smooth surface of the metal material results in a more complete waveform with less distortion in the echo sequence. Internal defects in semiconductor devices, on the other hand, exhibit varying shapes and are relatively rough around the edges, resulting in significantly more distorted waveforms in the echo sequence.

[0047] Therefore, based on the above analysis, the present application calculates the edge and internal irregularities of each closed edge region and the degree of distortion of the echo signal within the closed edge region.

[0048] As a preferred embodiment, the edge irregularity is determined by the forward fusion result of the mean and standard deviation of the gradient values ​​between all adjacent pixel points on the edge of the corresponding closed edge area; the internal irregularity is determined by the complement of the goodness of fit after fitting the backbone line within the corresponding closed edge area.

[0049] It can be understood that forward fusion is a fusion method such as addition and multiplication between data. The specific forward fusion method is determined by the implementer according to the actual situation, and this application does not impose any special restrictions.

[0050] In this embodiment, the edge irregularity is determined by the sum of the mean and standard deviation of the gradient values ​​between all adjacent pixel points on the edge of the corresponding closed edge area; the internal irregularity is determined by fitting the backbone line in the corresponding closed edge area and calculating the goodness of fit, and the difference between the value 1 and the goodness of fit is used as the internal irregularity of the corresponding closed edge area.

[0051] As a preferred embodiment, when calculating the distortion degree of the echo signal, the pixel values ​​of the pixel points are first used to screen the feature points in the corresponding closed edge area; the frequency shift, transmission energy and reception energy of all feature points in the corresponding closed edge area are analyzed to determine the distortion degree of the echo signal in the corresponding closed edge area.

[0052] In some preferred embodiments, the method for analyzing the frequency shift, the emission energy and the reception energy of all feature points in the corresponding closed edge region to determine the distortion degree of the echo signal of the corresponding closed edge region comprises: calculating the frequency shift of each feature point; forward fusing the emission energy and the reception energy of each feature point; reverse fusing the frequency shift of each feature point in each closed edge region with the result of the forward fusion; and taking the average level of the reverse fusion results of all feature points in the corresponding closed edge region as the distortion degree of the echo signal of the corresponding closed edge region.

[0053] It can be understood that the reverse fusion is a subtraction or division fusion method between data, and the specific reverse fusion method is determined by the implementer according to the actual situation, and the present application does not make special limitations.

[0054] In the present embodiment, the calculation formula of the distortion degree B of the echo signal of the current closed edge region is: , wherein N represents the number of feature points in the current closed edge region, represents the frequency shift of the i-th feature point in the current closed edge region, i.e. the deviation value of the ultrasonic wave emission frequency and the fundamental frequency of the reflected echo waveform sequence, and respectively represent the emission energy and the reception energy of the i-th feature point, and are respectively represented by the effective values of the emitted ultrasonic wave and the echo signal.

[0055] It is worth noting that the feature points in the current closed region are obtained by using the pixel value of the pixel point to screen the feature points in the corresponding closed edge region, i.e. obtaining the pixel values of all pixel points in the current closed region, and taking the pixel point corresponding to the mode of the pixel value as the feature point.

[0056] It should be noted that the point with a higher pixel value usually corresponds to a position with a stronger ultrasonic wave reflection, which can reflect the characteristics of potential defects or normal components. By selecting the pixel point corresponding to the mode of the pixel value as the feature point, it can be ensured that the selected point has a pixel point that can represent the overall characteristics of the current closed region, and at the same time, it can avoid misjudgment caused by noise or abnormal values.

[0057] For the waveform distortion case, if the waveform distortion is more serious, the frequency deviation between the reflected echo signal and the emitted ultrasonic wave signal is larger, and the energy carried by the echo signal is smaller, and the value of the emission-reception ratio of the ultrasonic wave signal is larger, which can reflect the waveform distortion in the current region.

[0058] S3: Obtain the closed edge area closest to the depth layer where each closed edge area is located and its adjacent depth layer; determine the potential defect area by combining the edge, internal irregularity, the degree of distortion of the echo signal, and the closest distance calculated between the closed edge area and the adjacent depth layer where the closed edge area is located.

[0059] Based on the above analysis, it is possible to determine the defect status of a single area within the semiconductor power device at the current depth layer. However, the edges, internal irregularities, and echo signal distortion values ​​obtained for actual defective areas are relatively large. This analysis is based solely on ultrasonic scanning data from the current depth layer, which is limited by the accuracy of ultrasonic scanning and the relatively small metal wiring within semiconductor devices, resulting in large deviations during the scanning process. This may result in numerically calculated values ​​for edges, internal irregularities, and echo signal distortion, affecting the determination of the actual defect status.

[0060] In this application, the depth levels are mainly divided according to the wiring levels within the semiconductor device. In order to reduce the interference of electromagnetic signals between lines in the semiconductor device, the lines are staggered at different depth levels, that is, the area of ​​normal components is discontinuous in the depth space, while the defective area may run through multiple depth layers, so it has a certain continuity in the depth layer.

[0061] Based on the above analysis, the present application first obtains the closed edge region closest to the depth layer where each closed edge region is located and its adjacent depth layer.

[0062] As some preferred embodiments, the method for calculating the closest distance is further determined to be the Euclidean distance between the center points of the closed edge region. In other embodiments, the closest distance can also be determined using the shortest distance between the edge points of the closed edge region.

[0063] Furthermore, the present application determines the potential defect area by combining the edge, internal irregularity, the degree of distortion of the echo signal and the closest distance calculated between the closed edge area and the adjacent depth layer of the depth layer where it is located.

[0064] As a preferred embodiment, the method for determining potential defect areas is: calculating the results of forward fusion of edges, internal irregularities, and the degree of distortion of echo signals, and calculating the reverse fusion results with the closest distance calculated between the closed edge area and the adjacent depth layer of the depth layer in which it is located; when the reverse fusion result is greater than a preset defect threshold, the closed edge area will be determined to be a potential defect area.

[0065] In this embodiment, the calculated reverse fusion result is recorded as the defect judgment value F of the current closed edge area. The calculation relationship of F is: Where, Indicates the sum of the edge and internal irregularities of the current closed edge area, Indicates the degree of distortion of the echo signal in the current closed edge area. Represents the Euclidean distance between the center point of the current closed edge area and the center point of the closest closed edge area in the two adjacent depth layers of its depth layer. If When the value of is zero, set That is, the center of the current closed edge region is mapped to the adjacent depth layer, and the closest distance between it and the center point of other closed edge regions in the adjacent depth layer is calculated.

[0066] The defect judgment value equation primarily considers the distribution characteristics of the morphology and echo signals of the area to be identified at the current depth layer, while also analyzing the spatial continuity of the identified area in the depth layer. Since real defect areas often exhibit continuity in depth space, the spatial displacement of the center points at adjacent depth layers is small, resulting in a larger defect judgment value.

[0067] Based on step S2, the defect judgment value of each closed edge area extracted on each depth layer of the current semiconductor power device can be obtained. For each depth layer, when the defect judgment value is greater than the preset defect threshold, the closed edge area will be judged as a potential defect area, wherein the preset defect threshold is set in this embodiment as: the defect judgment value of all closed edge areas of all depth layers is obtained by using the Otsu threshold segmentation method to obtain a segmentation threshold, and the closed edge area greater than the segmentation threshold is recorded as a potential defect area.

[0068] S4: Mark the potential defect areas at each depth layer to judge the packaging quality of semiconductor power devices.

[0069] At the same time, the ultrasonic scanning data of each depth layer is displayed in three-dimensional visualization. If a certain area inside the semiconductor device is marked as a potential defect area in M ​​consecutive depth layers, it is judged that the semiconductor device has internal defects. Otherwise, the semiconductor device is judged to be a qualified production component and can enter subsequent production links, such as packaging.

[0070] It should be noted that the number of the M consecutive depth layers is related to the defects in production, and is usually set in the range of [3-8]. In this embodiment, it is set to 5, and the specific value can be set by the implementer.

[0071] On the visual display interface, semiconductor power devices marked as internal defects are visually displayed, and potential defect areas corresponding to the space on M consecutive depth layers are marked in red. At the same time, the detection information is fed back to technical staff to help them make auxiliary judgments. Example 2

[0072] Another embodiment of the present application also provides a package quality detection system for semiconductor power devices, which aims to detect each piece of semiconductor power device produced in the production of semiconductor power device pipeline by using ultrasonic scanning detection equipment, so that the process flow chart of the semiconductor power device package quality detection system is shown in FIG. 2. Figure 2

[0073] Figure 2 The ultrasonic detection module, package detection module and visual display module in the basic process flow of the semiconductor power device package quality detection system contained in the embodiment include:

[0074] The ultrasonic detection module is used to perform C-scan on the semiconductor power device through the ultrasonic detection module to obtain ultrasonic scanning images of different depth layers and echo signals of each scanning position, and this module is realized by step S1.

[0075] The basic principle is that when the ultrasonic wave propagates in the medium, reflection occurs when the characteristics of the medium change. For places with high reflection intensity, the brightness of the scanning image is high; on the contrary, for areas with low reflection intensity, the brightness of the scanning image is dark.

[0076] The package detection module is used to perform defect detection analysis on the package condition of the semiconductor power device by using the scanning data obtained by the ultrasonic detection module to judge the package quality of the semiconductor power device, and this module is realized by steps S2, S3 and S4.

[0077] The visual display module is used to visualize the defect detection results output by the package detection module.

[0078] Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. The present application is intended to cover any variations, uses or adaptive changes of this application following the general principles thereof and including those expressly stated or implied herein.

[0079] It should be understood that the present application is not limited to the precise construction that has been described above and shown in the accompanying drawings, and that various modifications and changes can be made without departing from the scope thereof.​

Claims

1. A packaging quality inspection method for semiconductor power devices, characterized in that: The method comprises the following steps: S1: Perform C-scan on the semiconductor power device through the ultrasonic detection module to obtain ultrasonic scan images of different depth layers and echo signals at each scanning position; S2: Analyze the ultrasound scan image at a single depth layer, extract the closed edge area in the ultrasound scan image, and calculate the edge irregularity, internal irregularity and distortion degree of the echo signal in each closed edge area; S3: Obtain the closest closed edge region in the depth layer where each closed edge region is located and in the adjacent depth layer; determine the potential defect area by combining the edge irregularity, internal irregularity, degree of distortion of the echo signal, and the calculated closest distance between the closed edge region and the closed edge region in the adjacent depth layer where the closed edge region is located; S4: Mark the potential defect areas at each depth layer to judge the packaging quality of semiconductor power devices; In step S2, the edge irregularity is determined by the forward fusion result of the mean and standard deviation of the gradient values ​​between all adjacent pixels on the edge of the corresponding closed edge area; In step S2, the internal irregularity is determined by the complement of the goodness of fit after fitting the backbone line within the corresponding closed edge area; In step S2, when calculating the distortion degree of the echo signal, the pixel values ​​of the pixel points are first used to screen the feature points in the corresponding closed edge area; the frequency shift, transmission energy and reception energy of all feature points in the corresponding closed edge area are analyzed to determine the distortion degree of the echo signal in the corresponding closed edge area.

2. The packaging quality inspection method for semiconductor power devices according to claim 1, wherein: In step S1 , each pixel value in the ultrasound scan image is further determined by the maximum value of the echo signal at the corresponding scanning position in the corresponding depth layer.

3. The packaging quality inspection method for semiconductor power devices according to claim 1, wherein: The method of using the pixel values ​​of the pixel points to screen the feature points in the corresponding closed edge area is as follows: obtaining the pixel values ​​of all the pixel points in the current closed area, and taking the pixel point corresponding to the mode of the pixel value as the feature point.

4. The packaging quality inspection method for semiconductor power devices according to claim 1, wherein: The method of analyzing the frequency shift, transmission energy, and reception energy of all feature points in the corresponding closed edge area to determine the distortion degree of the echo signal of the corresponding closed edge area includes: Calculate the frequency shift of each feature point; Forward fusion of the transmitted energy and received energy of each feature point; Reversely fuse the frequency shift of each feature point in each closed edge area with the result of the forward fusion; The average level of the reverse fusion results of all feature points in the corresponding closed edge area is taken as the distortion degree of the echo signal of the corresponding closed edge area.

5. The packaging quality inspection method for semiconductor power devices according to claim 1, wherein: In step S3 , the method for calculating the closest distance is further determined to be the Euclidean distance between the center points of the closed edge areas.

6. The packaging quality inspection method for semiconductor power devices according to claim 1, wherein: In step S3, the method for determining the potential defect area is: Calculate the edge irregularity, internal irregularity and the distortion degree of the echo signal to perform forward fusion results, and calculate the reverse fusion results with the closest distance calculated between the closed edge area and the adjacent depth layer of the depth layer where it is located; When the reverse fusion result is greater than a preset defect threshold, the closed edge area is determined to be a potential defect area.

7. Applicable to the packaging quality inspection system of semiconductor power devices, characterized by: The system is used to perform the packaging quality inspection method according to any one of claims 1 to 6, and the system includes: Ultrasonic detection module: used to perform C-scan on the semiconductor power device through the ultrasonic detection module to obtain ultrasonic scanning images of different depth layers and echo signals at each scanning position. This module is used to implement step S1; Packaging inspection module: used to use the scanning data obtained by the ultrasonic inspection module to perform defect detection and analysis on the packaging of the semiconductor power device and determine the packaging quality of the semiconductor power device. This module is used to implement steps S2, S3 and S4; Visualization display module: used to visualize the defect detection results output by the packaging inspection module.

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