SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) active driving circuit and method based on switch track optimization

Abstract

The invention discloses a SiC MOSFET active driving circuit and method based on switch track optimization, the circuit comprises a detection module, a logic processing module, a class B power amplifier module and a two-level driving module, the detection module is connected with a source electrode and a drain electrode of a SiC MOSFET, collects drain-source electrode voltage and sends the drain-source electrode voltage to the logic processing module; the logic processing module judges the current change condition of the drain electrode of the SiC MOSFET according to the drain-source electrode voltage, and controls the class B power amplifier module to inject current to the grid electrode of the SiC MOSFET or extract current from the grid electrode of the SiC MOSFET according to the judgment result; and the two-level driving module is connected with a grid electrode of the SiC MOSFET and provides a driving signal for the SiC MOSFET. According to the invention, the current overstress in the turn-on transient state of the SiC MOSFET and the voltage overstress in the turn-off transient state of the SiC MOSFET can be effectively reduced, and the amplification of the switching loss can be limited within a relatively low range; meanwhile, the active driving circuit does not need to additionally design an isolation driving power supply, has high compactness and reliability, and is convenient to integrate.

Description

Technical Field

[0001] The present invention belongs to the field of power electronic device applications, relates to wide bandgap power semiconductor application technology, and particularly relates to a SiC MOSFET active drive circuit and method based on switch trajectory optimization. Background Art

[0002] SiC MOSFETs are gradually replacing Si IGBTs in power electronics due to their lower on-resistance, faster switching speeds, and improved thermal stability. Furthermore, SiC MOSFETs do not exhibit the current tailing characteristic of Si IGBTs, offering significant advantages in reducing switching losses and improving system efficiency.

[0003] However, the negative effects of SiC MOSFET high-speed switching transients (i.e., non-ideal switching trajectories) have become a key factor restricting its further promotion. Since SiC MOSFETs need to complete the transition between on and off states within tens of nanoseconds, energy mutations within short time scales are bound to lead to overshoot of voltage and current stress. When the drain current and drain-source voltage of the SiC MOSFET exceed the rated values, the device will undergo irreversible degradation and failure. At the same time, the parasitic inductance of the loop will form a resonant network with the junction capacitance of the SiC MOSFET, causing the voltage and current waveforms of the SiC MOSFET to exhibit a trend of high-frequency attenuated oscillation. The energy of the high-frequency oscillation will be conducted along the line or radiated through space, greatly deteriorating the electromagnetic compatibility performance of the device and reducing its operational reliability.

[0004] Optimizing circuit layout, adding filters, and modifying drive circuit parameters are three common solutions to these problems. Optimizing circuit layout relies heavily on design experience, and further reducing loop inductance requires complex packaging techniques. Adding filters reduces the device's power density. Modifying drive circuit parameters offers greater flexibility and minimal impact on system power density, but it reduces the SiC MOSFET's switching speed and increases the device's switching losses. This is primarily due to the inability of conventional two-level drive circuits to distinguish the SiC MOSFET's different switching transients and to adjust the drive circuit parameters during the switching process. Therefore, to effectively balance low stress, low electromagnetic interference, and low switching losses during device switching transients, an active drive technology that can actively adjust the SiC MOSFET's switching transients in a time-sharing manner is an ideal solution. Currently, active drive circuits are primarily classified into three types: variable drive resistance, variable drive voltage, and variable drive current. The variable drive resistance type has poor resolution, and a large number of auxiliary switches bring stability problems to the drive circuit; the variable drive voltage type has higher control accuracy, but requires an additional auxiliary power supply, which increases the complexity of the isolated drive power supply design; the variable drive current type is incompatible with conventional two-level drive and is less used.

[0005] Therefore, it is necessary to design a compact and stable active drive circuit to proactively identify the different switching transients of SiC MOSFET and reduce the switching speed in the sensitive stage to optimize the switching trajectory. Summary of the Invention

[0006] The objective of the present invention is to provide a SiC MOSFET active drive circuit and method based on switching trajectory optimization, which can effectively reduce the current overstress during the SiC MOSFET turn-on transient and the voltage overstress during the turn-off transient, and can limit the increase in switching losses to a relatively low range. At the same time, the active drive circuit of the present invention does not require the additional design of an isolated drive power supply, has high compactness and reliability, and is easy to integrate.

[0007] In order to achieve the above object, the solution of the present invention is:

[0008] A SiC MOSFET active drive circuit based on switching trajectory optimization includes a detection module, a logic processing module, a Class B power amplifier module, and a two-level drive module. The detection module is connected to the source and drain of the SiC MOSFET, collects the drain-source voltage, and sends it to the logic processing module. The logic processing module determines the change in the drain current of the SiC MOSFET based on the drain-source voltage, and controls the Class B power amplifier module to inject current into the gate of the SiC MOSFET or extract current from the gate of the SiC MOSFET based on the determination result. The two-level drive module is connected to the gate of the SiC MOSFET and provides a drive signal to the SiC MOSFET.

[0009] The detection module includes a first RC voltage divider network and a second RC voltage divider network. The first RC voltage divider network and the second RC voltage divider network have the same structure, both including capacitors and resistors connected in parallel. The first RC voltage divider network and the second RC voltage divider network are connected in series and are respectively connected to the source and drain of the SiC MOSFET. The connection point between the first and second RC voltage divider networks is connected to the input end of the logic processing module.

[0010] The logic processing module includes an opening logic processing module, a closing logic processing module and a third XOR gate;

[0011] The opening logic processing module includes a first high-speed comparator, a first XOR gate, a first analog switch, a first delay link, and a second delay link, wherein the positive input of the first high-speed comparator is connected to a first preset reference voltage, the negative input is connected to the output of the detection module, and the output of the first high-speed comparator is connected to the first input of the first XOR gate; the input of the first delay link is connected to the switching signal PWM of the SiC MOSFET, and the output of the first delay link is connected to the second input of the first XOR gate; the output of the first XOR gate is connected to the input of the second delay link, and the output of the second delay link is connected to the first input of the third XOR gate through the first analog switch;

[0012] The shutdown logic processing module includes a second high-speed comparator, a second XOR gate, a second analog switch, a third delay link, and a fourth delay link, wherein the positive input of the second high-speed comparator is connected to the second preset reference voltage, the negative input is connected to the output of the detection module, and the output of the second high-speed comparator is connected to the first input of the second XOR gate; the input of the third delay link is connected to the inverted signal of the switching signal PWM of the SiC MOSFET, and the output of the third delay link is connected to the second input of the second XOR gate; the output of the second XOR gate is connected to the input of the fourth delay link, and the output of the fourth delay link is connected to the second input of the third XOR gate through the second analog switch;

[0013] The opening and closing of the first analog switch and the second analog switch are both controlled by PWM signals, and the logics are opposite; the third XOR gate outputs the instruction signal of the logic processing module.

[0014] The above-mentioned Class B power amplifier module includes module T and module B;

[0015] The module T includes a third analog switch, a fourth analog switch, a first operational amplifier, a first feedback resistor, a second feedback resistor, a first driving resistor, a first diode, a first NPN transistor, and a first PNP transistor, wherein the input end of the third analog switch is connected to a third preset reference voltage, the input end of the fourth analog switch is connected to a fourth preset reference voltage, the output ends of the third analog switch and the fourth analog switch are connected and then connected to the negative input end of the first operational amplifier via the first feedback resistor, the positive input end of the first operational amplifier is connected to the output end of the logic processing module, the output end of the first operational amplifier is respectively connected to the base of the first NPN transistor and the base of the first PNP transistor, the collector of the first NPN transistor is connected to a positive power supply, the collector of the first PNP transistor is connected to a negative power supply, the emitter of the first NPN transistor is connected to the emitter of the first PNP transistor, and then connected to the anode of the first diode, and the cathode of the first diode is connected to the gate of the SiC MOSFET via the first driving resistor; the opening and closing of the third analog switch and the fourth analog switch are both controlled by the switching signal PWM of the SiC MOSFET, and the logic is opposite;

[0016] The module B includes a fifth analog switch, a sixth analog switch, a second operational amplifier, a third feedback resistor, a fourth feedback resistor, a second drive resistor, a second diode, a second NPN transistor, and a second PNP transistor, wherein the input end of the fifth analog switch is connected to a fifth preset reference voltage, the input end of the sixth analog switch is connected to a sixth preset reference voltage, the output ends of the fifth analog switch and the sixth analog switch are connected, and then connected to the negative input end of the second operational amplifier via the third feedback resistor, and the negative input end of the second operational amplifier is also connected to the cathode of the second diode via the fourth feedback resistor; the positive input end of the second operational amplifier is connected to the output end of the logic processing module, the output end of the second operational amplifier is respectively connected to the base of the second NPN transistor and the base of the second PNP transistor, the collector of the second NPN transistor is connected to a positive power supply, the collector of the second PNP transistor is connected to a negative power supply, the emitter of the second NPN transistor is connected to the emitter of the second PNP transistor, and then connected to the cathode of the second diode, and the anode of the second diode is connected to the gate of the SiC MOSFET via the second drive resistor; the opening and closing of the fifth analog switch and the sixth analog switch are both controlled by the switching signal PWM of the SiC MOSFET, and the logic is opposite.

[0017] The above-mentioned two-level driving module includes a first transistor switch, a second transistor switch and a third driving resistor, wherein one end of the first transistor switch is connected to a positive power supply, and the other end of the first transistor switch is connected to a negative power supply via the second transistor switch; the connection point between the first transistor switch and the second transistor switch is also connected to the gate of the SiC MOSFET via the third driving resistor; the opening and closing of the first transistor switch and the second transistor switch are both controlled by the switching signal PWM of the SiC MOSFET, and the logic is opposite.

[0018] A SiC MOSFET active driving method based on switching trajectory optimization includes collecting the SiC MOSFET drain-source voltage to determine whether it is in a drain current variation stage; wherein, based on the drop component of the drain-source voltage during the turn-on process and / or the overshoot component of the drain-source voltage during the turn-off process, it is determined whether the device is in the drain current variation stage during the turn-on process; if it is in the drain current variation stage, current is extracted from the SiC MOSFET gate; otherwise, current is injected into the SiC MOSFET gate.

[0019] After adopting the above scheme, the present invention has the following beneficial effects: the present invention connects two Class B power amplifier drivers in parallel outside the conventional two-level driving circuit, and based on the precise positioning of the SiC MOSFET switching transient, by flexibly and alternately adjusting the output voltage of the Class B power amplifier, it can realize the active switching of the total driving voltage in different transient stages, thereby adjusting the switching speed of each stage of the SiC MOSFET switching transient, and finally adjusting the switching trajectory of the device. In the drain current change stage, by reducing the drain current change rate of the SiC MOSFET, the voltage and current overshoot oscillations are effectively suppressed; in other stages, the high-speed switching of the SiC MOSFET can be guaranteed to maintain low switching losses. The active driving circuit of the present invention does not require the additional design of an isolated driving power supply, and can be easily compatible with the conventional two-level driving circuit; at the same time, due to the parallel structure, the driving circuit has high reliability.

[0020] The present invention improves the reliability of SiC MOSFET under high-speed switching and has greater flexibility than conventional two-level drive circuits. It is beneficial to reduce the electrical stress and electromagnetic interference energy in the transient process of wide-bandgap semiconductor switches without significantly increasing switching delay and switching loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a circuit principle diagram of the present invention;

[0022] Figure 2 This is the circuit diagram of the detection module;

[0023] Figure 3 It is the circuit diagram of the logic processing module;

[0024] Figure 4 This is the circuit diagram of the Class B power amplifier module;

[0025] Figure 5 This is the circuit diagram of the two-level drive module;

[0026] Figure 6 It is an implementation effect diagram of the present invention;

[0027] Among them, (a) is the optimization effect of SiC MOSFET turn-on trajectory, and (b) is the optimization effect of SiC MOSFET turn-off trajectory. DETAILED DESCRIPTION

[0028] The technical solutions and beneficial effects of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0029] like Figure 1 As shown, the present invention provides a SiC MOSFET active drive circuit based on switching trajectory optimization, including a detection module, a logic processing module, a Class B power amplifier module and a two-level drive module, wherein the detection module is connected to the source and drain of the SiC MOSFET, collects the drain-source voltage and sends it to the logic processing module, the logic processing module determines the change of the drain current of the SiC MOSFET based on the drain-source voltage, and controls the Class B power amplifier module to inject current into the gate of the SiC MOSFET or extract current from the gate of the SiC MOSFET based on the determination result; the two-level drive module is connected to the gate of the SiC MOSFET and provides a drive signal to the SiC MOSFET.

[0030] The detection module is used to collect the drain-source voltage of SiC MOSFET and generate an analog value u ds FB Sent to the logic processing module, such as Figure 2 As shown, the detection module includes two stages of RC voltage divider network in series, where each stage of the network resistor is connected in parallel with the capacitor, sampling the drain-source voltage of the SiC MOSFET to generate the analog value u ds_FB , where the resistance value determines the voltage divider ratio, and adjusting the capacitance value can suppress the interference of loop parasitic oscillation on the sampling signal.

[0031] The logic processing module is based on the signal u ds_FB Generate command signal V slow To the Class B amplifier module, with Figure 3As shown, the logic processing module specifically includes an opening logic processing module, a closing logic processing module and an XOR gate. The two have similar structures and both include a high-speed comparator, an XOR gate, an analog switch and two delay links; the opening logic processing module includes a high-speed comparator CMP1, a first XOR gate, a first analog switch, a delay link delay1 and a delay link delay2, wherein the positive input terminal of the high-speed comparator CMP1 is connected to a preset reference voltage V on_ref , the negative input terminal is connected to the drain-source voltage analog quantity u ds_FB The output end of the high-speed comparator CMP1 is connected to the first input end of the first XOR gate; the input end of the delay link delay1 is connected to the switching signal PWM of the SiC MOSFET, and after delaying the switching signal PWM, the output end of the delay link delay1 is connected to the second input end of the first XOR gate; the output end of the first XOR gate is connected to the input end of the delay link delay2, and the output end of the delay link delay2 is connected to the first input end of the third XOR gate through the first analog switch;

[0032] The shutdown logic processing module includes a high-speed comparator CMP2, a second XOR gate, a second analog switch, a delay link delay3 and a delay link delay4, wherein the positive input terminal of the high-speed comparator CMP2 is connected to a preset reference voltage V off_ref , the negative input terminal is connected to the drain-source voltage analog quantity u ds_FB The output of the high-speed comparator CMP2 is connected to the first input of the second XOR gate; the input of the delay link delay3 is connected to the inverted signal of the SiC MOSFET switching signal PWM, and after delaying the inverted signal, the output of the delay link delay3 is connected to the second input of the second XOR gate; the output of the second XOR gate is connected to the input of the delay link delay4, and the output of the delay link delay4 is connected to the second input of the third XOR gate through the second analog switch;

[0033] The first analog switch and the second analog switch are both turned on and off by PWM signals, and their logics are opposite. The third XOR gate outputs the instruction signal V of the logic processing module. slow ;

[0034] When the SiC MOSFET is in the on-state, the change in drain current will interact with the parasitic inductance, which will cause u ds When the drain current of SiC MOSFET drops, the high-speed comparator CMP1 will be triggered. When the SiC MOSFET is in the off state, the change of drain current will cause the drain-source voltage to overshoot the bus voltage, which will cause u dsAs the voltage increases, the high-speed comparator CMP2 is triggered. Through a certain logic delay, the logic processing circuit can effectively capture the transient change of the SiC MOSFET's drain current, thereby effectively distinguishing different switching stages.

[0035] like Figure 4 As shown, the Class B power amplifier module is composed of module T and module B, which have similar structures and are composed of two analog switches, a current feedback high-speed operational amplifier CFA, and a feedback resistor R g 、R f , NPN transistor Q1 and PNP transistor Q2, and diode D source (D sink ), driving resistance R source (R sink ), Q1 and Q2 form a typical Class B power amplifier structure in cascade form, and its output end is connected through R f Feedback to the negative input of CFA, PWM alternately switches the two analog switches, making two different reference voltages V ref1 and V ref2 The signal V slow The input is directly connected to the positive input terminal of the CFA. The structural difference between module T and module B lies in the different preset reference voltages. At the same time, the diodes at the output end of the Class B amplifier are arranged in opposite directions. Module T only injects current into the SiC MOSFET gate, while module B only extracts current from the gate.

[0036] The Class B power amplifier module works in closed-loop mode. On the one hand, its output voltage can accurately follow the input voltage. On the other hand, the closed loop can effectively eliminate crossover distortion while ensuring the stability of the system operation.

[0037] This embodiment uses a current feedback operational amplifier. Compared with a voltage feedback operational amplifier, it is not limited by the gain-bandwidth product and has a higher slew rate, which is more suitable for high-speed driving applications of SiC MOSFET. The output voltage of the Class B power amplifier module can be expressed as:

[0038]

[0039] Among them, S b Indicates the switching state of SiC MOSFET. When S b =1 indicates that SiC MOSFET is in the turn-on transient state. b =0 indicates that the SiC MOSFET is in the turn-off transient state.

[0040] Figure 5 A typical two-level driver module is shown, which shares the positive power supply V with the Class B power amplifier module. GG With negative power supply VEE The output terminals of the three sub-module circuits are connected in parallel to the gate of the SiC MOSFET to jointly adjust the switching trajectory of the SiC MOSFET. The driving resistor R source , driving resistance R of Class B power amplifier module B sink And the driving resistance R of the two-level driving module g The values ​​are equal to R g .

[0041] The present invention also provides a SiC MOSFET active driving method based on switch trajectory optimization, by detecting the sampling signal u of the SiC MOSFET drain-source voltage ds_FB To determine whether the device is in the drain current change stage. The specific judgment method is: when the device is in the drain current change period during the turn-on process, the higher current change rate di / dt will interact with the parasitic inductance L in the loop. s Phase interaction forms a significant voltage drop L on the drain-source voltage of the device. s di / dt, this voltage drop will be reflected in the feedback voltage u ds_FB The device is in the process of shutting down and the drain current changes during the period of time. Also, due to the interaction between the current change rate and the parasitic inductance, the drain-source voltage of the device will have a significant overshoot. s di / dt, the post-stage logic processing module monitors the reference value through the comparator to output the instruction. If the device is in the drain current change stage of the turn-on or turn-off process, V slow Set to 1, by adjusting the output voltage of the Class B power amplifier module B, the total driving voltage is reduced, the circuit will output a lower voltage to reduce the speed of the SiC MOSFET, the Class B power amplifier module B extracts current from the gate to reduce the drain current change rate, the turn-on current stress caused by the reverse recovery of the SiC MOSFET body diode is reduced, and the current oscillation is weakened; if outside this stage, that is, the turn-off drain current change stage, by adjusting the output voltage of the Class B power amplifier module T, the total driving voltage is increased, V slow When set to 0, the circuit will output a higher voltage to speed up the switching speed of the SiC MOSFET. The Class B power amplifier module T injects current into the gate to increase the drain current change rate. The shutdown power supply stress caused by the parasitic inductance of the loop is reduced, and the voltage oscillation is weakened.

[0042] The output voltage of the two-level driver module and the output voltage of the Class B power amplifier module jointly drive the SiC MOSFET. By adjusting the output voltage of the Class B power amplifier, the total driving voltage is adjusted. The specific method is as follows:

[0043] When the SiC MOSFET receives the turn-on command, it will go through three stages: turn-on delay, drain current rise, and drain-source voltage drop. During the turn-on delay and drain-source voltage drop stages, the outputs of the two Class B amplifiers are close to the positive drive level V GG , the Class B power amplifier module B is cut off by the diode, and the total driving voltage is equal to V GG ; During the drain current rising phase, the output of the Class B power amplifier module T is close to the negative drive voltage V EE The diode is cut off, and adjusting the output voltage of the Class B power amplifier module B can change the total driving level value.

[0044] When the SiC MOSFET receives the shutdown command, it will go through three stages: shutdown delay, drain-source voltage rise, and drain current drop. During the shutdown delay and drain-source voltage rise stages, the outputs of the two Class B amplifiers are close to V EE , the Class B power amplifier module T is cut off by the diode, and the total driving voltage is equal to V EE ; During the drain current drop phase, the output of the Class B amplifier module B is close to V GG The diode is cut off, and adjusting the output voltage of the Class B power amplifier module T can change the total driving level value.

[0045] Let the positive voltage of the isolated driver be V GG , the negative voltage is V EE , the output voltage of the conventional two-level driver module is u PWM , the output voltage of the Class B power amplifier module T is u source , the output voltage of the Class B power amplifier module B is u sink , the driving resistance of each module is R g According to Kirchhoff’s voltage law, the total equivalent driving voltage u for SiC MOSFET is eq And the equivalent driving resistance R eq There are the following relationships:

[0046]

[0047] Among them, S a Indicates the alternating relationship between the two Class B amplifiers, S a =1 means that the Class B power amplifier module T is working while the Class B power amplifier module B is reversely blocked by the diode and does not participate in the switching trajectory regulation; S a =0 indicates that the class B power amplifier module B is working and the class B power amplifier module T is cut off.

[0048] According to formula (3), the total output voltage of the active drive circuit of the present invention is controlled by the conventional two-level output voltage u PWM , Class B power amplifier module T output voltage u sourceAnd the output voltage u of Class B power amplifier module B sink . Where u source and u sink The value can be adjusted by adjusting the reference voltage V ref1 ~V ref4 The value of can be freely adjusted to achieve the purpose of controlling the switching trajectory of SiCMOSFET.

[0049] a. When SiC MOSFET is in the two transient states of turn-on delay and turn-on drain-source voltage drop, by adjusting u source and u sink Output is V GG , which can make SiC MOSFET drive at the maximum total voltage u eq =V GG Turn on, thereby effectively reducing the two transient turn-on losses. At this time, the Class B power amplifier module B is connected to the diode D sink Reverse cutoff, does not participate in the trajectory regulation of SiC MOSFET.

[0050] b. When the SiC MOSFET is in the turn-on drain current rising stage, the large current change rate will cause the freewheeling diode reverse recovery current to be superimposed on the turn-on current of the SiC MOSFET, causing current overstress. source Output is V EE , can make the Class B power amplifier module T be diode D source Reverse cutoff, does not participate in the trajectory regulation of SiC MOSFET. sink That is, the total driving voltage u can be adjusted eq , thereby achieving the purpose of adjusting the drain current change rate, and then reducing the overstress and oscillation of the turn-on current.

[0051] c. When SiC MOSFET is in the two transient states of turn-off delay and turn-off drain-source voltage rise, by adjusting u source and u sink Output is V EE , which can make SiC MOSFET drive with minimum total voltage u eq =V EE Turn off, thereby effectively reducing the two transient turn-off losses. At this time, the Class B power amplifier module T is connected to the diode D source Reverse cutoff, does not participate in the trajectory regulation of SiCMOSFET.

[0052] d. When the SiC MOSFET is in the off-state drain current falling stage, the large current change rate and the loop parasitic inductance will cause the SiC MOSFET to generate voltage overstress. sink Output is V GG, can make the Class B power amplifier module B be diode D sink Reverse cutoff, does not participate in the trajectory regulation of SiC MOSFET. By adjusting u source That is, the total driving voltage u can be adjusted eq , thereby achieving the purpose of adjusting the drain current change rate and reducing the turn-off voltage stress and oscillation.

[0053] By adopting the above circuit structure design and control strategy, the implementation effect of the present invention is as follows: Figure 6 As shown in the figure, the experiment was conducted on a double-pulse test platform with a DC bus voltage of 400V, a load current of 20A, and a gate drive resistance of 5Ω. The gray solid line represents the switching trajectory of the SiC MOSFET without the present invention, and the black solid line represents the switching trajectory of the SiC MOSFET with the present invention. Figure 6 (a) shows the optimization effect of the SiC MOSFET turn-on trajectory. The turn-on current peak value reaches 33A without the present invention, while the turn-on current peak value is only 28A with the present invention. The current overstress is reduced by 38.4%. At the same time, the turn-on current oscillation decays faster, reducing the electromagnetic interference of the system. Figure 6 (b) shows the optimization effect of the SiC MOSFET turn-off trajectory. The turn-off voltage peak value without the present invention reaches 580V, while the turn-off voltage peak value with the present invention is only 540V. The voltage overstress is reduced by 22.2%. At the same time, the attenuation rate of the turn-off voltage oscillation is accelerated, and the system electromagnetic interference is reduced. At the same time, the use of the present invention does not significantly increase the switching delay and switching loss. It can be seen that the present invention can optimize the switching trajectory of the SiC MOSFET, reduce the overshoot and oscillation of the turn-on drain current without significantly increasing the turn-on delay and turn-on loss, and reduce the overshoot and oscillation of the turn-off voltage without significantly increasing the turn-off delay and turn-off loss, thereby improving the reliability of the device.

[0054] It will be understood by those skilled in the art that the embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of the present invention may be implemented in various computer languages, for example, the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0055] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0056] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0057] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0058] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0059] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. A SiC MOSFET active drive circuit based on switching trajectory optimization, characterized by: The system comprises a detection module, a logic processing module, a Class B power amplifier module and a two-level driving module. The detection module is connected to the source and drain of the SiC MOSFET, collects the drain-source voltage and sends it to the logic processing module; the logic processing module determines the change of the drain current of the SiC MOSFET according to the drain-source voltage, and controls the Class B power amplifier module to inject current into the gate of the SiC MOSFET or extract current from the gate of the SiC MOSFET according to the determination result; the two-level driving module is connected to the gate of the SiC MOSFET and provides a driving signal to the SiC MOSFET.

2. The SiC MOSFET active drive circuit based on switching trajectory optimization according to claim 1, characterized in that: The detection module includes a first RC voltage divider network and a second RC voltage divider network, wherein the first RC voltage divider network and the second RC voltage divider network have the same structure and both include capacitors and resistors connected in parallel. The first RC voltage divider network and the second RC voltage divider network are connected in series and are respectively connected to the source and drain of the SiC MOSFET, and the connection point between the first RC voltage divider network and the second RC voltage divider network is connected to the input end of the logic processing module.

3. The SiC MOSFET active drive circuit based on switching trajectory optimization according to claim 1, characterized in that: The logic processing module includes an opening logic processing module, a closing logic processing module and a third XOR gate; The opening logic processing module includes a first high-speed comparator, a first XOR gate, a first analog switch, a first delay link, and a second delay link, wherein the positive input of the first high-speed comparator is connected to a first preset reference voltage, the negative input is connected to the output of the detection module, and the output of the first high-speed comparator is connected to the first input of the first XOR gate; the input of the first delay link is connected to the switching signal PWM of the SiC MOSFET, and the output of the first delay link is connected to the second input of the first XOR gate; the output of the first XOR gate is connected to the input of the second delay link, and the output of the second delay link is connected to the first input of the third XOR gate through the first analog switch; The shutdown logic processing module includes a second high-speed comparator, a second XOR gate, a second analog switch, a third delay link, and a fourth delay link, wherein the positive input of the second high-speed comparator is connected to the second preset reference voltage, the negative input is connected to the output of the detection module, and the output of the second high-speed comparator is connected to the first input of the second XOR gate; the input of the third delay link is connected to the inverted signal of the switching signal PWM of the SiC MOSFET, and the output of the third delay link is connected to the second input of the second XOR gate; the output of the second XOR gate is connected to the input of the fourth delay link, and the output of the fourth delay link is connected to the second input of the third XOR gate through the second analog switch; The opening and closing of the first analog switch and the second analog switch are both controlled by PWM signals, and the logics are opposite; the third XOR gate outputs the instruction signal of the logic processing module.

4. The SiC MOSFET active drive circuit based on switching trajectory optimization according to claim 1, wherein: The class B power amplifier module includes module T and module B; The module T includes a third analog switch, a fourth analog switch, a first operational amplifier, a first feedback resistor, a second feedback resistor, a first driving resistor, a first diode, a first NPN transistor, and a first PNP transistor, wherein the input end of the third analog switch is connected to a third preset reference voltage, the input end of the fourth analog switch is connected to a fourth preset reference voltage, the output ends of the third analog switch and the fourth analog switch are connected and then connected to the negative input end of the first operational amplifier via the first feedback resistor, the positive input end of the first operational amplifier is connected to the output end of the logic processing module, the output end of the first operational amplifier is respectively connected to the base of the first NPN transistor and the base of the first PNP transistor, the collector of the first NPN transistor is connected to a positive power supply, the collector of the first PNP transistor is connected to a negative power supply, the emitter of the first NPN transistor is connected to the emitter of the first PNP transistor, and then connected to the anode of the first diode, and the cathode of the first diode is connected to the gate of the SiC MOSFET via the first driving resistor; the opening and closing of the third analog switch and the fourth analog switch are both controlled by the switching signal PWM of the SiC MOSFET, and the logic is opposite; The module B includes a fifth analog switch, a sixth analog switch, a second operational amplifier, a third feedback resistor, a fourth feedback resistor, a second drive resistor, a second diode, a second NPN transistor, and a second PNP transistor, wherein the input end of the fifth analog switch is connected to a fifth preset reference voltage, the input end of the sixth analog switch is connected to a sixth preset reference voltage, the output ends of the fifth analog switch and the sixth analog switch are connected, and then connected to the negative input end of the second operational amplifier via the third feedback resistor, and the negative input end of the second operational amplifier is also connected to the cathode of the second diode via the fourth feedback resistor; the positive input end of the second operational amplifier is connected to the output end of the logic processing module, the output end of the second operational amplifier is respectively connected to the base of the second NPN transistor and the base of the second PNP transistor, the collector of the second NPN transistor is connected to a positive power supply, the collector of the second PNP transistor is connected to a negative power supply, the emitter of the second NPN transistor is connected to the emitter of the second PNP transistor, and then connected to the cathode of the second diode, and the anode of the second diode is connected to the gate of the SiC MOSFET via the second drive resistor; the opening and closing of the fifth analog switch and the sixth analog switch are both controlled by the switching signal PWM of the SiC MOSFET, and the logic is opposite.

5. The SiC MOSFET active drive circuit based on switching trajectory optimization according to claim 1, wherein: The two-level drive module includes a first transistor switch, a second transistor switch, and a third drive resistor. One end of the first transistor switch is connected to a positive power supply, and the other end of the first transistor switch is connected to a negative power supply via the second transistor switch. The connection point between the first transistor switch and the second transistor switch is also connected to the gate of the SiC MOSFET via the third drive resistor. The opening and closing of the first transistor switch and the second transistor switch are both controlled by the switching signal PWM of the SiC MOSFET, with opposite logic.

6. A SiC MOSFET active driving method based on switching trajectory optimization, characterized by: include, The drain-source voltage of the SiC MOSFET is collected to determine whether it is in the drain current variation stage. The device is judged to be in the drain current variation stage during the turn-on process based on the drop component of the drain-source voltage during the turn-on process and / or the overshoot component of the drain-source voltage during the turn-off process. If the device is in the drain current variation stage, current is extracted from the SiC MOSFET gate; otherwise, current is injected into the SiC MOSFET gate.

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